Crystalline / amorphous 2d-2d diffusion barrier

Abstract

The invention relates to a device for preventing the diffusion of atoms from an electrically conductive material, in particular from electric conductor tracks in integrated circuits, into a dielectric material, comprising a layer arrangement which is located between the electrically conductive material and the dielectric material and comprises at least a first layer and a second layer situated on top of one another, the first layer being an amorphous two-dimensional layer and the second layer being a crystalline two-dimensional layer. The invention also relates to a method for depositing a diffusion barrier of this kind.

Description

Description Crystalline / amorphous 2D-2D diffusion bamers field of technology

[0001] The invention relates to a device for preventing the diffusion of atoms from an electrically conductive material, in particular copper, into a dielectric material, having a layer arrangement arranged between the electrically conductive material and the dielectric material, which layer arrangement comprises at least a first and a second layer superimposed on one another, wherein the first layer is an amorphous two-dimensional layer and the second layer is a crystalline two-dimensional layer, and a method for depositing such a diffusion barrier. State of the art

[0002] Complex wiring systems are used to contact the circuit elements arranged in integrated circuits, for example transistors integrated in microprocessors. Within these wiring systems, conductor tracks run in a multitude of metallization levels, each of which is separated from one another by dielectric intermediate layers. The common material for these conductor tracks is copper due to its low specific electrical resistance and high thermal conductivity. However, copper requires a barrier to prevent the diffusion of copper atoms into a silicon layer and a surrounding dielectric. Transition metals such as tantalum (Ta), tungsten (W), titanium (Ti), and their compounds with nitrogen (N), carbon (C), or Si, such as Ta / TaN, W2N, TiN, TiC, TaSiN, or SEN2, are known as diffusion barrier materials.However, a Ta / TaN layer is usually used as a barrier for copper conductors. It is used because of its low resistivity, good adhesion between copper and the dielectric, and low solubility in copper and the often silicon-based dielectrics. Ta serves as an adhesion layer for the copper, and TaN as a diffusion barrier.

[0003] With the advent of 5 nm technology, the half-distance between two interconnects reaches approximately 20 nanometers or less. Since the diffusion barriers consisting of conventional materials occupy a large portion of the cross-sectional area in significantly downscaled copper interconnects, the conduction resistance is significantly increased due to the significantly higher resistance of conventional materials, such as Ta / TaN, compared to copper (Lo, Chun-Li, et al. "Enhancing interconnect reliability and performance by converting tantalum to 2D layered tantalum sulfide at low temperature" Advanced Materials 31.30 (2019): 1902397). Furthermore, it has been found that conventional diffusion barrier materials lose their ability to prevent the diffusion of copper atoms when their thickness decreases below 3 nanometers.In addition, the resistance of copper increases as the dimensions of the copper interconnects approach the mean free path of electrons in copper. This effect results primarily from electron scattering at grain boundaries and is estimated to increase the resistance of a 10-nanometer-wide polycrystalline copper interconnect by an order of magnitude greater than the resistivity. These factors currently limit the downscaling of copper interconnects and diffusion barriers made of conventional materials (Havemann RH and Hutchby JA 2001 High-performance interconnects: An integration overview Proc. IEEE 89586-601).

[0004] In addition to temperature stability, there are also specific requirements for the electrical conductivity of the diffusion barrier layers. to minimize the contact resistances within the metallization levels, so that very electrically conductive diffusion barriers must be used here.

[0005] The use of 2D materials, such as transition metal dichalcogenides or graphene, as diffusion barrier materials for nanometer-scale applications is known from the state of the art. These materials are less than one nanometer thick and prevent the diffusion of copper atoms into the surrounding dielectric without increasing the resistance of the conductor itself. Furthermore, the deposition of copper onto the transition metal dichalcogenide M0S2 reduces scattering at the interface, thereby significantly improving the conductivity of copper with a layer thickness in the nanometer range, as shown in a publication by Shen et al. (Shen, Tingting, et al. "M0S2 for enhanced electrical performance of ultrathin copper films" ACS applied materials & interfaces 11.31 (2019): 28345-28351).

[0006] At nanometer-scale structures, atomic diffusion processes occur primarily along defects, grain boundaries, and interfaces, known as diffusion paths. Therefore, the layer used as a diffusion barrier must have either a defect-free single-crystalline structure or an amorphous structure to effectively block atomic diffusion. Amorphous diffusion barriers are typically preferred because the fabrication of single-crystalline layers is much more difficult.

[0007] The publication by An et al. shows the use of amorphous carbon layers with a thickness of less than one nanometer as a material for diffusion barriers of copper conductors (An, Byeong-Seon, et al. "Characteristics of an amorphous carbon layer as a diffusion barrier for an advanced copper interconnect" ACS applied materials & interfaces 12.2 (2019): 3104-3113).

[0008] The deposition of a monolayer of amorphous carbon by laser CVD was first demonstrated by Toh et al. (Toh, Chee-Tat, et al. "Synthesis and properties of free-standing monolayer amorphous carbon" Nature 577.7789 (2020): 199-203).

[0009] The use of a heterostructure consisting of two different 2D materials as a diffusion barrier for copper interconnects is also known from the literature. For example, Chang et al. (Chang, Che-Jia, et al. "Layered Graphene Growth Directly on Sapphire Substrates for Applications." ACS omega 7.15 (2022): 13128-13133) demonstrated a diffusion barrier for copper interconnects based on a heterostructure consisting of an MoS2 and a graphene monolayer. Graphene serves as the diffusion barrier, and MoS2 as the adhesion layer. The copper layer is deposited directly on the MoS2 monolayer, forming a polycrystalline structure.

[0010] The state of the art also includes, in particular, US 2017 / 0033003 Al and US 2022 / 0246547 Al. Summary of the invention

[0011] The invention is based on the object of providing a diffusion barrier which has a layer structure scalable to approximately one nanometer and suppresses the diffusion of atoms from an electrically conductive material into a dielectric material without increasing the resistance of the electrically conductive material, and which has the crystal structure of a to control the layer structure of deposited electrically conductive material, and to provide a method by which such a diffusion barrier can be deposited.

[0012] This object is achieved by the invention specified in the claims, wherein, first and foremost, the diffusion barrier comprises a 2D-2D heterostructure consisting of at least two different 2D materials arranged one above the other. In particular, the heterostructure comprises two monolayers of different 2D materials. The heterostructure can also consist of multilayers of different 2D materials. By using 2D materials as a diffusion barrier, conductor tracks in wiring systems can be scaled down to a few nanometers.

[0013] One of the two 2D materials is amorphous and the other 2D material is crystalline. The 2D-2D heterostructure can act as a diffusion barrier for atoms diffusing out of an electrically conductive material. This 2D-2D heterostructure can, in particular, have the property of being impermeable, or as impermeable as possible, to copper atoms. The diffusion barrier can be applied to a dielectric material. Due to the weak van der Waals forces acting between 2D materials and between 2D materials and 3D materials, the 2D-2D heterostructure does not lie directly on the dielectric, but rather a so-called van der Waals gap exists between the 2D-2D heterostructure and the dielectric.

[0014] The amorphous 2D material forms the diffusion barrier that prevents atoms from one electrically conductive material, for example copper, from diffusing into another, especially dielectric material, for example SiCh. The invention is based on the finding that, due to the amorphous structure of the 2D material, unlike a polycrystalline crystal structure, no grain boundary diffusion occurs, which primarily occurs at structure sizes in the nanometer range. In a preferred embodiment of the invention, the amorphous 2D material is a monolayer consisting of amorphous carbon (MAC for short). This MAC can be produced, for example, using laser MOCVD, as is known from the literature.

[0015] The second 2D layer is crystalline to enable epitaxial growth of the conductive material on the 2D-2D heterostructure. For example, copper can be epitaxially deposited on the crystalline 2D layer. Epitaxial copper is characterized by increased conductivity because electron scattering at grain boundaries is minimized. Transition metal dichalcogenides, particularly sulfur-based transition metal dichalcogenides such as tungsten disulfide (WS2) or molybdenum disulfide (MOS2), can be used as the crystalline 2D material. However, crystalline 2D layers consisting of other materials, such as graphene, can also be used.

[0016] The order in which the amorphous and crystalline 2D materials are arranged one above the other within the diffusion barrier can be reversed. Thus, the conductive material can be deposited either directly onto the crystalline 2D layer using van der Waals epitaxy or directly onto the amorphous 2D layer using remote epitaxy. If the conductive material is deposited onto the amorphous 2D material using remote epitaxy, the surface potential of the underlying crystalline 2D material can penetrate through the amorphous 2D material due to the small thickness of the 2D materials, allowing the copper adatoms to interact electrostatically with the crystalline 2D material. This results in the growing copper adopting the crystallographic orientation of the crystalline 2D material. Since weak van der Waals forces act between the 2D materials, as well as between the 2D and 3D materials, boundary conditions due to lattice mismatches during growth are eliminated.

[0017] The device according to the invention can, in particular, be a diffusion barrier for conductor tracks, especially copper conductor tracks, of wiring levels. However, the 2D-2D diffusion barrier can also be implemented in other electrical component structures in which the diffusion of atoms from an electrically conductive material is to be prevented.

[0018] The crystalline 2D material can be deposited using CVD, MOCVD, MBE, PVD, or another vapor deposition method as a monolayer, bilayer, or multilayer, with monolayer being preferred. However, the 2D material can also be deposited as a bulk crystal. Using mechanical exfoliation, known from the literature, individual monolayers can then be detached from the bulk crystal.

[0019] The amorphous material can be deposited by MOCVD, in particular laser MOCVD or another suitable method.

[0020] The crystalline and amorphous 2D materials can be deposited successively within one MOCVD process or in consecutive MOCVD processes in the same reactor or different reactors. The crystalline and amorphous 2D materials can be deposited using the same deposition method or different deposition methods. If the crystalline and amorphous 2D If materials are not deposited successively, i.e., deposited one after the other using the same or different deposition processes, they can also be stacked using suitable transfer processes, such as dry or wet chemical transfer processes. Before the transfer process, the 2D materials are deposited on different substrates using different processes and then individually detached and stacked on top of each other on a target substrate. The crystalline and amorphous 2D materials can be transferred individually or as a heterostructure to other substrates, particularly dielectric substrates such as SiCh.

[0021] A method for producing a 2D-2D diffusion barrier according to the invention may comprise the following steps: 1. A crystalline 2D layer, for example, WS2, is deposited or transferred onto the surface of a dielectric substrate, for example, SiO. The deposition can be performed in an MOCVD reactor using an MOCVD process. The thickness of the WS layer can correspond to a monolayer. 2. Deposition or transfer of an amorphous 2D layer, such as a MAC. The MAC can be deposited using laser MOCVD, whereby steps 1 and 2 can also be performed in reverse order. 3. Epitaxial deposition of an electrically conductive layer, such as copper. Deposition can be carried out using electrochemical metal deposition, atomic layer deposition, chemical vapor deposition, or physical vapor deposition.

[0022] The above-mentioned processes can be carried out one after the other in different process stations. Short description of the drawings

[0023] Embodiments of the invention are explained below with reference to the accompanying drawings. They show: Fig. 1 shows a schematic representation of a cross section of a diffusion barrier 3 produced according to the invention arranged between an electrically conductive material 1 and a dielectric material 2, wherein an amorphous 2D layer 4 is arranged above a crystalline 2D layer 5, Fig. 2 is a schematic representation of a second embodiment according to Figure 1, wherein the crystalline 2D layer 5 is arranged above the amorphous 2D layer 4, Fig. 3 is a schematic representation of a third embodiment according to Figure 1, wherein the crystalline 2D layer is the transition metal dichalcogenide WS2 and the amorphous layer is a monolayer of amorphous carbon (MAC) arranged between a Cu layer and a SiCh layer, Fig. 4 is a schematic representation of a fourth embodiment according to Figure 3, wherein the crystalline 2D layer consists of two monolayers of the transition metal dichalcogenide WS2 and the amorphous layer consists of two monolayers of amorphous carbon (MAC), Fig. 5 is a schematic representation of a cross-section of a conductor track consisting of an electrically conductive material 1, the surrounded by a diffusion barrier consisting of an amorphous 4 and a crystalline 2D layer 5 and embedded in a dielectric 2, Fig. 6 is a schematic representation of a CVD reactor 15, Fig. 7 is a schematic representation of a laser CVD reactor 20, Fig. 8 is a schematic representation of a transfer process of a crystalline 2D layer 4 and an amorphous 2D layer 5 onto a substrate 6. Description of the embodiments

[0024] Figure 1 shows a simplified representation of the diffusion barrier according to the invention. A layer sequence 3 is deposited on a dielectric material 2, wherein the layer sequence 3 consists of two superimposed two-dimensional layers 4, 5. The first layer 4 is an amorphous 2D layer. The second layer 5 is a crystalline 2D layer. An electrically conductive material 1 has been deposited on this layer sequence 3.

[0025] Figure 2 shows the layer structure illustrated in Figure 1, with the 2D layers 4, 5 deposited in reverse order on the dielectric layer 2. Here, the second, crystalline 2D layer 5 is deposited on the first, amorphous 2D layer 4.

[0026] Figure 3 shows the diffusion barrier according to the invention in more detail. The layer sequence 3 was deposited on a dielectric layer 2 consisting of of SiO2 deposited on a Si substrate 6. The layer sequence 3 consists of a crystalline monolayer 5 of WS2 and an amorphous 4 monolayer of carbon (MAC). Since weak van der Waals forces act between the 2D materials, but also between the 2D and 3D materials, they are slightly spaced from each other. This is where a so-called van der Waals gap forms. If the conductive material 1, for example, copper, is deposited on the amorphous 2D material 4 by remote epitaxy, the surface potential of the underlying crystalline 2D material 5 can penetrate through the amorphous 2D material 4 due to the small thickness of the 2D materials. This is indicated by the arrows in Figure 3. This leads to the copper adatoms being able to interact electrostatically with the crystalline monolayer 5 WS2 and the growing copper 1 adopting the crystallographic orientation of the crystalline monolayer 5 WS2.

[0027] As shown in Figure 4, the amorphous 2D layer 4 can also consist of two superimposed MACs, and the crystalline 2D layer 5 can consist of two superimposed WS2 monolayers. This layer sequence 3, consisting of the amorphous layer 4 and the crystalline 2D layer 5, was deposited on a SiO2 layer 2 on a Si substrate.

[0028] Figure 5 shows a cross-sectional view of an electrical conductor track 1, for example in an integrated circuit, which is surrounded by a diffusion barrier consisting of an amorphous 2D layer 4 and a crystalline 2D layer 5 and is embedded in a dielectric 2. Reference numeral 6 denotes a pre-structured substrate. A dielectric 2 is deposited on the surface of any layer of this substrate 6, which dielectric is subsequently structured in a structuring process. In the exemplary embodiment, a trench was introduced, for example, etched, into the dielectric 2. The walls and the floor of the trench are coated with the 2D layers 4, 5. An electrical material, here copper, was deposited in the remaining trench, creating an electrical conductor 1.

[0029] Figure 6 schematically shows a CVD reactor 15 suitable for carrying out the method according to the invention, in particular for the deposition of the crystalline 2D layer 4. Various starting materials are fed into a gas-tight reactor chamber 11 of the CVD reactor 15 via a gas inlet element 7. The starting materials can be reactive gases, which, together with a carrier gas, which can be, for example, hydrogen, nitrogen, and argon, are fed into the gas inlet element 7 through feed lines 8, 9, 10. The inflow of the starting materials into the gas inlet element 7 is controlled via mass flow controllers 13, 13', 13" and valves 14, 14', 14".

[0030] In one variant of the invention, a starting material from a bubbler 17, for example W(CO)6 for the deposition of WS2, can be fed into the gas inlet element 7 through one or more feed lines 8, 9, 10. For this purpose, the carrier gas or the inert gas is introduced into the bubbler 17. A second bubbler, not shown, can contain (C4H9)2S. With a carrier gas, (C4H9)2S can be fed through one of the feed lines 8, 9, 10 through the gas inlet element 7 into the process chamber 11. Suitable reactive gases include, for example, transition metal and chalcogen compounds for the deposition of transition metal dichalcogenides. However, other gases, for example those containing carbon, can also be used to deposit other 2D materials, such as graphene.The reactive gas, which can consist of one or more components, is selected according to the invention such that a crystalline or amorphous 2D layer is formed on substrates 6 arranged within the process chamber 11 and supported by a susceptor 12. layer. A heating device 16 is located beneath the susceptor 12, which controls the process temperature of the susceptor 12. The process temperature can be measured by means of optical or other suitable measuring instruments on the surface of the substrates 6 or in the gas phase in the process chamber 11. On its surface facing the gas inlet element 7, the susceptor 12 supports one or more substrates 6. The susceptor can be arranged stationary or rotatably in the process chamber 11.

[0031] Dielectric substrates, such as sapphire substrates, silicon substrates, graphite substrates, or the like, can be used as substrates. SiC substrates or the like can be used, although these or other substrates can also contain a layer of SiCh, SiC, graphene, or hBN.

[0032] Pre-structured or pre-processed substrates can also be used as substrates. The diffusion barrier can, for example, be deposited or transferred onto substrates or layers patterned using photolithography. The substrates can also contain partially or fully patterned (opto)electronic component structures. The diffusion barrier can also be deposited or transferred onto patterned component structures, such as transistor structures or conductor structures, during integrated circuit manufacturing, both in front-end and back-end production.

[0033] The method according to the invention deposits continuous 2D layers on preferably crystalline substrates using a CVD process, preferably a MOCVD process. The method according to the invention can be used to deposit successive 2D layers, consisting of different 2D materials, as heterostructures. The method according to the invention can be used to deposit coherent layers each consisting of a single element, wherein the atoms forming the layer are arranged in a two-dimensional arrangement. In particular, graphene can be deposited. The method according to the invention can also be used to deposit coherent layers each consisting of several elements, wherein the atoms forming the layers are arranged in a two-dimensional arrangement. In particular, it is provided that elements of main groups III and V, for example hBN, or elements of main group VI, e.g. oxides, are deposited. Furthermore, it can be provided that transition metal dichalcogenides are deposited, for example transition metal disulfides, selenides or tellurides.

[0034] The laser CVD reactor 20, schematically illustrated in Figure 7, is suitable for carrying out the method according to the invention, in particular for the deposition of the amorphous 2D layer 4. In the process chamber 21 of the laser CVD reactor 20, the substrate 6 is arranged on the susceptor 12, which can be heated by means of the heating device 16. Various reactive gases can be introduced into the process chamber 21 via supply lines 8, 9, 10. For example, CH4 can be used as a reactive gas for the deposition of a monolayer of amorphous carbon. The reactive gases are decomposed in the process chamber 21 by the thermal energy emitted by a focused laser beam 22 of a laser source 19 in order to form a layer on the substrate 6. An amorphous 2D layer 4 is preferably formed.The thermal energy is transferred locally, whereby the point of impact of the laser beam 22 on the surface of the substrate 6 can migrate across the surface by continuously moving the susceptor 12 relative to the laser beam 22 in order to achieve greater surface coverage. The laser beam 22 can, for example, have a wavelength in the ultraviolet range. KrF with a laser wavelength of 248 nanometers can be used as the laser source 19 for the deposition of amorphous carbon. The laser beam 22 can be pulsed. A plasma can also be used for the thermal decomposition of the reactive gases. Preferably, the deposition takes place directly onto the dielectric or directly onto a previously deposited crystalline 2D layer.

[0035] It is known from the prior art to deposit the amorphous 2D layer 4 on other substrates for subsequent transfer. Cu, Au, or Ru, for example, are considered as substrate 6, but other metallic and non-metallic substrates can also be used. The substrate 6 can be transferred into the process chamber 21. The substrate 6 rests on the susceptor 12 in the process chamber. The susceptor 12 can be made of titanium. The process chamber 21 can be evacuated using a vacuum pump (not shown). Base pressures in the range of 10 to 6 mbar can be achieved. The surface temperature of the substrate 6 can be monitored using a sensor 18, for example, a pyrometer.

[0036] Figure 8 schematically shows a transfer process in which, at the top left, a crystalline 2D layer 5 was first deposited on a temporary substrate 6 and then mechanically or otherwise transferred to the dielectric 2. The bottom left shows the deposition of an amorphous 2D layer 4 on a temporary substrate 6, which is then applied to the already transferred crystalline 2D layer 5 using a suitable transfer process.

[0037] With the method according to the invention, coherent, preferably amorphous 2D layers are deposited on substrates using a laser CVD method, preferably a laser MOCVD method. The method according to the invention can be used to deposit individual monolayers. With the method according to the invention, in a first step, a crystalline 2D layer 5 can be deposited in the MOCVD reactor 15 and, in a second step, an amorphous 2D layer 4 can be deposited onto the crystalline 2D layer 5 in the laser CVD reactor 20. The first and second steps can also be carried out in reverse order. The crystalline 2D layer 4 and the amorphous 2D layer 5 can also be deposited on different substrates and, following the respective deposition process, stacked on top of one another by means of a transfer process, as shown schematically in Figure 8, for example.

[0038] The above statements serve to explain the inventions covered by the application as a whole, which each independently develop the state of the art by at least the following combinations of features, whereby two, several or all of these combinations of features can also be combined, namely:

[0039] A diffusion barrier between an electrically conductive material 1, in particular copper, and a dielectric material 2, with a layer arrangement 3 arranged between the electrically conductive material 1 and the dielectric material 2, which layer arrangement comprises at least a first layer 4 and a second layer 5 superimposed on one another, wherein the first layer 4 is an amorphous two-dimensional layer and the second layer 5 is a crystalline two-dimensional layer.

[0040] A diffusion barrier characterized in that the first layer 4 is amorphous carbon and the second layer 5 is a crystalline transition metal dichalcogenide.

[0041] A diffusion barrier, which is characterized in that the layer arrangement 3 is a carrier layer for conductor tracks, in particular copper conductor tracks, of wiring levels.

[0042] An integrated circuit with a diffusion barrier between an electrically conductive material 1, in particular copper, and a dielectric material 2, with a layer arrangement 3 arranged between the electrically conductive material 1 and the dielectric material 2, which layer arrangement comprises at least a first layer 4 and a second layer 5 superimposed on one another, wherein the first layer 4 is an amorphous two-dimensional layer and the second layer 5 is a crystalline two-dimensional layer.

[0043] A method for depositing a diffusion barrier on a substrate 2, consisting of a layer arrangement 3 with at least two two-dimensional layers arranged one above the other, of which at least a first layer 4 is crystalline and a second layer 5 is amorphous, wherein preferably the first layer 4 is deposited by means of MOCVD and the second layer 5 by means of laser MOCVD.

[0044] A method characterized in that the first 4 and / or the second layer 5 are deposited on a dielectric material 2 or transferred after deposition.

[0045] A process characterized in that the two-dimensional layers 4, 5 are deposited successively on one another.

[0046] A method characterized in that the two-dimensional layers 4, 5 are arranged on top of one another by means of a transfer process.

[0047] A method which is characterized in that the layer arrangement 3 is coated with an electrically conductive material 1, in particular copper.

[0048] All disclosed features are essential to the invention (individually, but also in combination with one another). The disclosure of the application hereby fully incorporates the disclosure content of the associated / attached priority documents (copy of the prior application), also for the purpose of incorporating features of these documents into claims of the present application. The subclaims characterize, even without the features of a referenced claim, independent inventive developments of the prior art with their features, in particular for filing divisional applications based on these claims. The invention specified in each claim may additionally comprise one or more of the features provided in the above description, in particular with reference numbers, and / or specified in the list of reference numbers.The invention also relates to designs in which individual features mentioned in the above description are not implemented, in particular insofar as they are clearly unnecessary for the respective intended use or can be replaced by other technically equivalent means. List of reference symbols 1 electrically conductive layer 19 laser source 2 dielectric 20 laser CVD reactor 3 layer arrangement 21 process chamber 4 amorphous 2D layer 22 laser beam 5 crystalline 2D layer 23 transparent window 6 Substrat 7 Gas inlet organ 8 supply line 9 Supply line 10 supply line 11 Trial Chamber 12 Susceptor 13 Mass flow measuring / control device 13' Mass flow measuring / control device 13" mass flow measuring / control device 14 Valve 14' valve 14" valve 15 CVD reactor 16 Heating device 17 bubblers 18 Sensor

Claims

Claims 1. Diffusion barrier between an electrically conductive material (1), in particular copper, and a dielectric material (2), with a layer arrangement (3) arranged between the electrically conductive material (1) and the dielectric material (2), which layer arrangement comprises at least a first layer (4) and a second layer (5) superimposed on one another, wherein the first layer (4) is an amorphous two-dimensional layer and the second layer (5) is a crystalline two-dimensional layer.

2. Diffusion barrier according to claim 1, characterized in that the first layer (4) is amorphous carbon and the second layer (5) is a crystalline transition metal dichalcogenide.

3. Diffusion barrier according to one of the preceding claims, characterized in that the layer arrangement (3) is a carrier layer for conductor tracks, in particular copper conductor tracks, of wiring levels.

4. Integrated circuit with a diffusion barrier between an electrically conductive material (1), in particular copper, and a dielectric material (2), with a layer arrangement (3) arranged between the electrically conductive material (1) and the dielectric material (2), which layer arrangement comprises at least a first layer (4) and a second layer (5) superimposed on one another, wherein the first layer (4) is an amorphous two-dimensional layer and the second layer (5) is a crystalline two-dimensional layer.

5. Method for depositing a diffusion barrier on a substrate (2), consisting of a layer arrangement (3) with at least two superimposed mutually arranged two-dimensional layers, of which at least a first layer (4) is crystalline and a second layer (5) is amorphous, wherein the second layer (5) is deposited by means of laser MOCVD.

6. The method according to claim 5, characterized in that the first layer (4) is deposited by means of MOCVD.

7. Method according to claim 5 or 6, characterized in that the first (4) and / or the second layer (5) are deposited on a dielectric material (2).

8. Method according to claim 7, characterized in that the first (4) and / or the second layer (5) are transferred after deposition 9. Method according to one of claims 5 or 6, characterized in that the two-dimensional layers (4, 5) are deposited successively on one another.

10. Method according to claim 5 or 6, characterized in that the two-dimensional layers (4, 5) are arranged on top of one another by means of a transfer process.

11. Method according to one of claims 5 to 10, characterized in that the layer arrangement (3) is coated with an electrically conductive material (1), in particular copper.

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