Wafer scale, low defect density, strain relaxed template for iii-nitride-based high efficiency and high power devices

Abstract

A method of growing a wafer scale, low defect density, strain relaxed template (SRT) for III-nitride-based devices, such as LEDs, LDs, FETs and heterostructure FETs. The SRT uses at least one highly defective III-nitride thin layer as a decomposition layer (DL), such as a thermally decomposed InGaN underlayer. Above the DL, a strain relaxed III-nitride-based layer is grown as a decomposition stop layer (DSL), which can be GaN, low In composition InGaN, or low Al composition AlGaN. The strain relaxed III-nitride-based layer is patterned and etched, with a first III-nitride-based film regrown on the patterned and etched strain relaxed III-nitride-based layer, wherein the first III-nitride-based film is coalesced by lateral overgrowth. One or more second III-nitride-based layers are grown on the first III-nitride-based film, with the second III-nitride-based layers' strain being at least partially relaxed.

Description

[0001] WAFER SCALE, LOW DEFECT DENSITY, STRAIN RELAXED TEMPLATE FOR III-NITRIDE-BASED HIGH EFFICIENCY AND HIGH POWER DEVICES

[0002] CROSS REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the benefit under 35 U.S.C. Section 119(e) of the following co-pending and commonly-assigned application:

[0004] U.S. Provisional Application Serial No. 63 / 592,980, filed on October 25, 2023. by Hsun-Ming Chang, Vincent Rienzi, Norleakvisoth Lim, Michael J. Gordon. Steven P. DenBaars and Shuji Nakamura, entitled '‘WAFER SCALE, LOW DEFECT DENSITY, STRAIN RELAXED TEMPLATE FOR III-NITRIDE-BASED HIGH EFFICIENCY AND HIGH POWER DEVICES,” attorneys’ docket number G&C 30794.0846USP1 (UC-2024-849-1); which application is incorporated by reference herein.

[0005] This application is related to the following co-pending and commonly- assigned applications:

[0006] U.S. Utility Patent Application Serial No. 18 / 559,654, filed on November 8, 2023. by Philip Chan, Steven P. DenBaars and Shuji Nakamura, entitled “III- NITRIDE-BASED DEVICES GROWN ON A THIN TEMPLATE ON THERMALLY-DECOMPOSED MATERIAL,” attorneys’ docket number G&C 30794.0802USWO (UC 2021-888-3), which application claims the benefit under 35 U.S.C. Section 365(c) of co-pending and commonly-assigned P C. T. International Patent Application No. PCT / US22 / 28264, filed on May 9, 2022, by Philip Chan, Steven P. DenBaars and Shuji Nakamura, entitled “III-NITRIDE-BASED DEVICES GROWN ON A THIN TEMPLATE ON THERMALLY-DECOMPOSED MATERIAL.” attorneys’ docket number G&C 30794.0802WOU1 (UC 2021-888-3), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly-assigned U.S. Provisional Patent Application Serial No. 63 / 186,749, filed on May 10, 2021, by Philip Chan, Steven P. DenBaars and Shuji Nakamura, entitled “III-NITRIDE-BASED DEVICES GROWN ON A THIN TEMPLATE ON THERMALLY DECOMPOSED MATERIAL,” atorneys’ docket number G&C 30794.0802USP1 (UC 2021-888-1) and U.S. Provisional Patent Application Serial No. 63 / 230,205, filed on August 6, 2021, by Philip Chan, Steven P. DenBaars and Shuji Nakamura, entitled “III-NITRIDE-BASED DEVICES GROWN ON A THIN TEMPLATE ON THERMALLY DECOMPOSED MATERIAL,” atorneys’ docket number G&C 30794.0802USP1 (UC 2021-888-2);

[0007] P C T. International Patent Application No. PCT / US22 / 42526, filed on September 2. 2022, by Norleakvisoth Lim, Philip Chan. Steven P. Denbaars, Michael J. Gordon and Shuji Nakamura, entitled ‘III-NITRIDE-BASED DEVICES GROWN ON OR ABOVE A STRAIN COMPLIANT TEMPLATE,” atorneys’ docket number G&C 30794.0806WOU1 (UC 2022-760-2), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly -as signed U.S. Provisional Patent Application Serial No. 63 / 240,517. filed on September 3, 2021, by Norleakvisoth Lim, Philip Chan, Steven P. Denbaars, Michael J. Gordon and Shuji Nakamura, entitled “III-NITRIDE-BASED DEVICES GROWN WITH A RELAXED ACTIVE REGION,” attorneys’ docket number G&C 30794.0806USP1 (UC 2022- 760-1) and U.S. Provisional Patent Application Serial No. 63 / 245,105, filed on September 16, 2021, by Philip Chan, Steven P. DenBaars and Shuji Nakamura, entitled “SURFACE MORPHOLOGY OF III-NITRIDE-BASED DEVICES GROWN ON OR ABOVE A STRAIN COMPLIANT TEMPLATE,” atorneys’ docket number G&C 30794.0808USP1 (UC 2022-763-1); and

[0008] U.S. Utility Patent Application Serial No. 18 / 730,604, filed on July 19, 2024, by Philip Chan, Hsun-Ming Chang, Vincent Rienzi and Shuji Nakamura, entitled “III- NITRIDE-BASED HIGH EFFICIENCY AND HIGH-POWER DEVICES GROWN ON OR ABOVE A STRAIN RELAXED TEMPLATE,” attorneys' docket number G&C 30794.0813USWO (UC 2022-775-2), which application claims the benefit under 35 U.S.C. Section 365(c) of co-pending and commonly -assigned P.C.T. International Patent Application No. PCT / US23 / 61748, filed on February' 1, 2023, by Philip Chan, Hsun-Ming Chang, Vincent Rienzi and Shuji Nakamura, entitled “III- NITRIDE-BASED HIGH EFFICIENCY AND HIGH-POWER DEVICES GROWN ON OR ABOVE A STRAIN RELAXED TEMPLATE;’ atorneys’ docket number G&C 30794.0813WOU1 (UC 2022-775-2), which application claims the benefit under 35 U.S.C. Section 119(e) of co-pending and commonly -as signed U.S. Provisional Patent Application Serial No. 63 / 305,441 , filed on February 1, 2022, by Philip Chan, Hsun-Ming Chang, Vincent Rienzi and Shuji Nakamura, entitled “III- NITRIDE-BASED HIGH EFFICIENCY AND HIGH-POWER DEVICES GROWN ON OR ABOVE A STRAIN RELAXED TEMPLATE,” atorneys’ docket number G&C 30794.0813USP1 (UC 2022-775-1); all of which applications are incorporated by reference herein.

[0009] STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH AND DEVELOPMENT

[0010] This invention was made with Government support under Grant Nos. HR001120C0135 and W911NF-22-1-0210 awarded by the Defense Advanced Research Projects Agency (DARPA). The Government has certain rights in this invention.

[0011] BACKGROUND OF THE INVENTION

[0012] 1. Field of the Invention.

[0013] This invention relates to a method for making a wafer scale, low defect density, strain relaxed template (SRT) for Ill-nitride-based high power and high efficiency electronic and optoelectronic devices.

[0014] 2. Description of the Related Art.

[0015] The bandgap of InGaN-based Ill-nitride alloys span across a wide range from 0.7 eV to 3.4 eV, corresponding to the entire visible / near infrared (NIR) spectrum, and hence are promising for massive applications in electronic and optoelectronic devices. For example, InGaN based blue and violet light emiting diodes (LEDs) and laser diodes (LDs) have been successfully developed with high efficiency and high power. [1-3] InGaN-based green LDs with a higher indium composition than blue at around 25 % have also been demonstrated. [4, 5] In addition, InGaN alloy with indium composition higher than 30 - 35 % can be used for red LEDs for display [6, 7], and near infrared (NIR) sensing. [8, 9] Furthermore, recently the demands for photonic integrated circuits and quantum technologies bring up new impacts for III- nitride alloys. The wide spectrum from visible to NIR of InGaN-based emitters can sen e as the light source for atomic clocks, atom / trapping cooling and trapping. [10, 11] In addition, integration of Ill-nitride LDs with photonic circuit platforms can enable chip-scale optics system, including optical clocks, imaging and sensing, quantum computing, etc. [12, 13]

[0016] Despite the promising properties, there exists a large lattice mismatch in this material system: the lattice mismatch between InN and GaN is more than 10%.

[0014] This large lattice mismatch causes high strain for InGaN grown on GaN, resulting in generation of dislocations and degradation of surface morphology. For example, compositional pulling effects make indium incorporation for high composition InGaN challenging. [15, 16] In addition, the high threading dislocation density (TDD) generated from the large lattice mismatch serves as non-radiative recombination centers, causing a drastic degradation in quantum efficiency as well as device lifetime. [17-20] Besides, the high strain exacerbates quantum-confined Stark effect (QCSE) due to the piezoelectricity inherent to Ill-nitrides, causing a reduction of electron-hole wavefunction overlap and hence degrading the radiative recombination rate and optical gain. [21, 22] All the above issues hinder the development of InGaN-based emitters with wavelengths longer than green.

[0017] It is therefore critical to address the high strain issues to improve the InGaN- based long wavelength emitters. Although it has been reported that a virtual bulk InGaN substrate can solve the issues by reducing the strain

[0023] , experimentally the epitaxial method for bulk InGaN substrate is still lacking. So far, several methods to relax the strain by growth in metalorganic chemical vapor deposition (MOCVD) have been proposed. Two of the more recent and well-studied approaches use nano porous GaN [24, 25] or SOITECH’s Smart Cut™ technology. [26, 27] Both methods can produce relaxed InGaN pseudo substrates but require complex processing and patterning the planar surface into tiles. Besides, the size of tiles limited the usable area for devices.

[0018] Another technique is using a strain relaxed template (SRT) consisting of a decomposition stop layer (DSL) on top of a thermally decomposed underlayer, which is an InGaN decomposition layer (DL). [28, 29] This technique has been previously reported to achieve a 85% relaxed Ino.o4Gao.96N layer for an entire 2-inch wafer

[0028] , and red LEDs were demonstrated with a record high active region growth temperature of 870 °C on a fully relaxed Ino.07Gao.93N buffer using this technique.

[0029] Moreover, a more than 100 nm redshift in red LEDs (670 nm) has been demonstrated via a SRT on Si substrates

[0030] . and blue laser diodes have been successfully demonstrated on a SRT. [31, 32] How ever, there exists a high density of threading dislocations (TDs) and defects due to epitaxial growth on the DL.

[0033] Such high defect density not only roughens the surface morphology but also results in degradation of internal quantum efficiency (IQE) and the lifetime of the devices.

[0019] SUMMARY OF THE INVENTION

[0020] The present invention discloses a method of growing a w afer scale, low defect density, SRT for Ill-nitride-based devices, such as LEDs, LDs, field effect transistors (FETs) and heterostructure FETs.

[0021] The SRT uses a high defect Ill-nitride-based thin layer as a DL, such as a thermally decomposed InGaN underlayer. Above the DL is a DSL, which can be GaN, low In composition InGaN, or low Al composition AlGaN. A buffer layer is then grown, comprising InGaN, AlGaN. an InGaN / GaN superlattice (SL), or an AlGaN / GaN SL. In this context, AlGaN comprises AlxGa<i-x)N, where l>x>0, and InGaN comprises InxGa<i-x)N, where l>x>0. This method is capable of resolving the high defect density issues caused by the DL, while providing a wafer-scale strain relaxation in the SRT. Based on the prior work on the SRT. additional processes including patterning, etching, and III- nitride-based film regrowth are applied. The strain relaxed film exhibits a TDD reduced by more than one order of magnitude. Although a patterning process is applied, the relaxation is uniform across the sample and, due to coalescence of the regrown Ill-nitride layers, the entire wafer can be used for device fabrication. Thus, the method achieves a wafer scale, low defect density, strain relaxed template for all kinds of Ill-nitride-based optical or electronic devices.

[0022] BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee.

[0024] Fig. 1 is a cross-sectional schematic that shows a starting epitaxial structure of an SRT according to present invention.

[0025] Figs. 2A, 2B. 2C and 2D are cross-sectional schematics that together outline the processes to pattern and etch an SRT, showing various processes to pattern an SRT.

[0026] Figs. 3A and 3B are scanning electron microscope (SEM) images of one of the patterned SRT structures according to the present invention.

[0027] Fig. 4 is a cross-sectional schematic that outlines the lateral overgrowth of a Ill-nitride-based film on a patterned strain relaxed Ill-nitride-based layer.

[0028] Fig. 5 is a cross-sectional schematic that outlines a regrown Ill-nitride-based layer on top of the lateral overgrowth of the Ill-nitride-based film.

[0029] Figs. 6A and 6B are atomic force microscopy (AFM) characterizations of the lateral overgrowth of the Ill-nitride-based film.

[0030] Figs. 7A and 7B are cathodoluminescence (CL) characterizations of the regrown Ill-nitride-based film. Figs. 8A and 8B are high resolution X-ray diffraction reciprocal space maps (RSMs) of the IIII-nitride-based layers.

[0031] Fig. 9 is a flowchart illustrating the process steps for creating an SRT. according to the present invention.

[0032] DETAILED DESCRIPTION OF THE INVENTION

[0033] In the following description of the preferred embodiment, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration a specific embodiment in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present invention.

[0034] Technical Description

[0035] Fig. 1 is a cross-sectional schematic that shows a starting epitaxial structure according to the present invention.

[0036] The substrate 100 used for MOCVD growth may be sapphire (patterned or polished), silicon, SiC. bulk GaN or bulk AIN with a normal face of any crystal plane. The results presented herein are on c-plane substrates, with some of them being patterned sapphire and bulk GaN.

[0037] On top of the substrate 100 is an n-type or unintentionally doped (UID) GaN template 101 with a typical thickness between 2 and 10 pm. The purpose of this layer 101 is to nucleate good crystal growth for subsequent layers, and conditions are dependent on choice of substrate 100.

[0038] Then, a thin, highly defective, decomposition layer (DL) 102 is grown for strain relaxation. These layers have been discussed in depth in the prior art and related applications. These layers can be grown as either a single high indium composition InGaN layer or a series of InGaN layers with GaN, lower composition InGaN or AlGaN interlayers between them, or a high aluminum content AlGaN layer. These layers are ty pically grown between 700 °C and 780 °C, and then the growth temperature is increased to more than 900 °C to grow a decomposition stop layer (DSL) 103. During the high temperature growth of the DSL 103, the DL 102 is decomposed to nitrogen gas, and indium and gallium metals, to form the voids in the DL 102, and then create high number of defects originated from the interface between the decomposed DL 102 and DSL 103 to relax the strain at least partially and thus reform the in-plane lattice constant. In the preferred embodiment, and for all results shown, this layer of DL 102 is a single, high composition InGaN layer.

[0039] The DSL 103 is then grown on top of the DL 102, which consists of multi growth steps. First, a capping layer, typically ranging from 2 - 10 nm of GaN, low composition InGaN or InGaN / GaN superlattices, is grown at or near the growth temperature of the DL 102. Then, a thicker layer of GaN, low composition InGaN or InGaN / GaN superlattices, is grown at a high temperature, typically over 930 °C, to recover surface morphology and decompose the DL 102. An extra annealing at temperature higher than 1000°C can be applied for better decomposition of the DL 102. According to previous disclosures, in this step, strain relaxation will take place and the in-plane lattice constant is reset. In the preferred embodiment, and for all results shown herein, the design of the SRT is for compressive strain relaxation of InGaN grown on a GaN substrate. In the preferred embodiment, the DSL 103 is a GaN layer, since the DL 102 in this embodiment tends to increase the in-plane lattice constant according to prior art

[0030] , and GaN grown on the DL 102 is found to be in tensile strain as well.

[0032] The GaN in tensile strain has a larger in-plane lattice constant, providing the compressive strain relaxation of the InGaN layer grown above. The thickness of the DSL 103 is typically more than 200 nm, but lower than the critical thickness to avoid generation of extra microstructure defects or cracks.

[0040] Figs. 2A, 2B, 2C and 2D are cross-sectional schematics that together outline the processes to pattern and etch an SRT.

[0041] First, in Fig. 2A, a mask 200 is deposited on the epitaxial structure of Fig. 1 . The mask 200 can be a photoresist, a dielectric, a metal, or anything that can be patterned and have good etching selectivity to Ill-nitrides. Methods of depositing the mask 200 onto the epitaxial structure include spin-coating or any kind of deposition.

[0042] Next, in Fig. 2B, the mask 200 is patterned by any kind of lithography, any annealing, or any other methods, which can form segregations or clusters in the mask 200. The length of the patterns in the mask 200 is denoted as their width, while the distance between patterns in the mask 200 is denoted as their spacing. Both the patterns’ width and spacing can be as large as a few microns to as small as less than 100 nm. The geometry of each of the patterns in the mask 200 can be a square, a hexagon, a circle, a stripe, or any kind of geometry, including any random asymmetric shapes.

[0043] Then, in Fig. 2C, the regions uncovered by the mask 200 are etched into trenches 201 by dry etching methods, such as reactive ion etch (RIE) or inductively coupled plasma-reactive ion etching (1CP-R1E). The depth of the etching can range from a few tens of nanometers to a few microns.

[0044] Finally, in Fig. 2D, the mask 200 is removed, potentially by solvent or any wet chemicals that will not react with the epitaxial structure in Fig. 1.

[0045] Figs. 3A and 3B are scanning electron microscope (SEM) images of one of the patterned SRT structures according to the present invention. Here, a method using nickel (Ni) and silicon dioxide (SiCh) double-layer masks is applied. Firstly, rapid thermal annealing (RTA) is carried out to form nanoclusters of Ni. The Ni nanoclusters then serve as masks for Si O2 etching, followed by GaN trench etching using SiO2 masks. Compared to Ni, SiCh has a higher etching selectivity over GaN, and is therefore a better mask for GaN etching. The planar SEM view after patterning and etching is shown in Fig. 3A. The size of mesas and spacings are in the order of 100 - 600 nm. A cross-sectional SEM view is shown in Fig. 3B, confirming the depth of the trench etch. Note that, although patterns in micron-scale by standard photolithography are also applied in the present invention, a nano patterning method can generate more uniform relaxation across the patterns during the lateral overgrowth in the following steps. Fig. 4 is a cross-sectional schematic that outlines the lateral overgrowth of a first Ill-nitride film 400 after the processes in Figs. 2A, 2B, 2C and 2D. Prior to the lateral overgrowth, the epitaxial structure may be cleaned by solvents and ultraviolet (UV) ozone to remove polymer or organic residues, and then soaked in hydrofluoric acid (HF) solution to remove any surface oxides. This regrowth forms a coalesced film 400 by lateral overgrowth from the top surface of the mesa formed by the DSL 103. During the lateral overgrowth, the TDs generated from the DL 102 and DSL 103 will start bending toward the overgrowth, or in a lateral direction, and terminate at the coalesced facets, instead of reaching the top surface. It is also w orth noting that the lateral overgrowth can produce voids under the coalesced film 400, which also provide free space for TD termination. Hence, the growth conditions should be optimized to promote the lateral overgrowth, such as a higher temperature, lower reactor pressure, V / 111 ratio and so on. The thickness of the lateral overgrowth of the first Ill-nitride film 400 must be higher than the thickness needed for film 400 coalescence and is dependent on the vertical / lateral growth rate under different growth conditions, such as temperature, pressure, V / III ratio and so on. The lateral overgrowth of the first Ill-nitride film 400 can be GaN, low In composition InGaN, or InGaN / GaN superlattices. In the preferred embodiment, the lateral overgrowth of the first III -nitride film 400 is GaN growm at an atmospheric pressure and at a temperature above 1050 °C using H2 carrier gas.

[0046] Fig. 5 is a cross-sectional schematic that outlines the regrowth of a second III- nitride layer 500 as a buffer layer on top of the lateral overgrowth of the first III- nitride film 400. The second Ill-nitride layer 500 can be InGaN or InGaN / GaN superlattices, with an average In composition higher than that of the lateral overgrowth of the first Ill-nitride film 400. However, the In composition should not be too high, typically below 12%, to avoid deterioration of surface morphology or generation of extra defects / microstructures. The same applies for the thickness of the second Ill-nitride layer 500; the thickness should be less than a critical value which varies with In composition and relaxation degree to avoid the degradation of the first Ill-nitride film 400. In this embodiment, the second Ill-nitride layer 500 is a few periods of InGaN / GaN superlattices.

[0047] All the above epitaxial layers in the present disclosure are deposited by MOCVD, but can be deposited by any other epitaxial methods such as molecular beam epitaxy (MBE). Precursors used during growth of all layers include triethylgallium (TEG), trimethylgallium (TMG), trimethylindium (TMI), trimethylaluminum (TMA), disilane, biscyclopentadienylmagnesium (C’pzMg). and ammonia (NH3) though other precursors may be used.

[0048] Figs. 6A and 6B are the atomic force microscopy (AFM) characterizations of the lateral overgrowth of the first Ill-nitride film 400. Fig. 6A shows the planar SRT sample without any patterning as a reference, and Fig. 6B shows the lateral overgrowth of the first Ill-nitride film 400 using a nano patterning SRT structure as described herein. The substrate used is a GaN template on patterned sapphire. The 5 by 5 pm2scan in Fig. 6A shows that the step flow growth mode is disrupted by TDs, while the 5 by 5 pm2scan in Fig. 6B demonstrates the step flow growth is less disrupted, indicating the TDs are greatly suppressed. The AFM scan in Fig. 6B ensures that more than one repeated pattern is covered, and therefore it can be representative for the entire patterned area in general.

[0049] Figs. 7A and 7B are panchromatic cathodoluminescence (CL) characterization results of the lateral overgrowth of the first Ill-nitride film 400. Among them, Fig. 7A shows the lateral overgrowth of the first Ill-nitride film 400 regrown on the region without any patterning processes, while Fig. 7B shows the patterned SRT according to the present invention using a square patterning array structure with 5 / 5 pm of width / spacing. All the CL results shown herein are measured under an acceleration voltage of 5 kV which will only excite the electron-hole pairs near the surface. As demonstrated in Fig. 7A. the density of dark spots is very high, indicating no radiative recombination occurs in most of the region and therefore a high defect density. Combined with the observation in the AFM results, the dark spots in CL correspond to TDs. On the other hand, Fig. 7B exhibits much less TD density, which is also in accordance with the AFM results. By counting the number of dark spots, the TDD can be calculated for each case. The calculated TDD for Figs. 6A and 6B is >1E9 and 7E7 cm’2, respectively. It is clearly observed that the present invention can suppress TDD by more than 1 order of magnitude. Most importantly, the TDD of the present invention is within the typical range of 1E7 - 1E8 cm’2of bare GaN on sapphire substrates.

[0050] After the regrowth of the second Ill-nitride layer 500, high-resolution X-raydiffraction (XRD) was conducted to characterize the second Ill-nitride layer 500. which has a total thickness of 200 nm of InGaN / GaN superlattice in this embodiment. Reciprocal space mapping (RSM) was measured using both (-1-124) and (10-15) off- axis, allowing the analysis of the strain and indium composition of the second III- nitride layer 500 in the m-direction and a-direction, respectively. The results are shown in Figs. 8A and 8B. Like previous characterizations, RSM is done on both with and without the patterning process of SRT. The second Ill-nitride layer 500 is an InGaN buffer that is shown to be an average composition of Ino os4Gao.9i6N that is 11.8% relaxed using (-1-124) off-axis, and Ino.os3Gao.917N that is 11.1% relaxed using (10-15) off-axis. The results show that the patterned SRT is biaxially relaxed. Note that the results shown here are on a nano-patterned SRT.

[0051] Alternatives and Modifications

[0052] The following describes various alternatives and modifications for the present invention:

[0053] 1. Generally, the present invention describes a method, comprising: creating a strain relaxed template (SRT) by: growing at least one highly defective Ill-nitride-based thin layer; growing a strain relaxed Ill-nitride-based layer on the highly defective III- nitride-based thin layer; patterning and etching the strain relaxed Ill-nitride-based layer; regrowing a first Ill-nitride-based film on the patterned and etched strain relaxed Ill-nitride-based layer, wherein the first Ill-nitride-based film is coalesced by lateral overgrowth; and growing one or more second Ill-nitride-based layers on the first III-nitride- based film with the second Til-nitride-based layers’ strain being at least partially relaxed.

[0054] 2. The method of 1 above, wherein the highly defective Ill-nitride-based thin layer is grown with a defect density at least an order of magnitude greater than the strain relaxed Ill-nitride-based layer.

[0055] 3. The method of 2 above, wherein the highly defective III -nitride-based thin layer is thermally decomposed InGaN, a three-dimensional (3D) AIN island, AlGaN, a different defect creating layer, or any combination thereof.

[0056] 4. The method of 2 above, wherein a thickness of the highly defective III- nitride-based thin layer is not limited to any value.

[0057] 5. The method of 2 above, wherein an in-plane lattice constant of the strain relaxed Ill-nitride-based layer is adjusted due to the high defect density, providing for strain relaxation of layers and films grown above the strain relaxed III- nitride-based layer.

[0058] 6. The method of 1 above, wherein the strain relaxed Ill-nitride-based layer is a nitride semiconductor alloy, with a general formula of ScvGawAlxInyBzN, where 0<v<l, 0<w<l, 0<x<l, 0<y<l, 0<z<l, and v+w+x+y+z=l. and can be compositionally uniform, graded, a superlattice region, or any combination thereof.

[0059] 7. The method of 6 above, wherein the patterning and etching the strain relaxed Ill-nitride-based layer starts with depositing a mask, by vacuum deposition or spin coating, on top of the strain relaxed Ill-nitride-based layer, after the growth of the strain relaxed Ill-nitride-based layer.

[0060] 8. The method of 7 above, wherein the mask is a dielectric, metal and / or photoresist. 9. The method of 8 above, wherein the mask provides a dry etching selectivity7to the strain relaxed Ill-nitride-based layer and the highly defective III- nitride-based thin layer to reach a desired etch depth.

[0061] 10. The method of 9 above, wherein the desired etch depth is at least below the bottom of the highly defective Ill-nitride-based thin layer.

[0062] 11. The method of 7 above, wherein the mask comprises SiO2 / Ni.

[0063] 12. The method of 11 above, wherein the patterning of the SiCh / Ni is performed using thermal annealing, and the patterning of a photoresist is done by standard photolithography.

[0064] 13. The method of 7 above, wherein the patterning of the photoresist is performed using standard photolithography.

[0065] 14. The method of 7 above, wherein a dimension of patterns resulting from the patterning ranges from 1 nm to 20 microns.

[0066] 15. The method of 7 above, wherein the etching is performed by dry etching using reactive ion etching (RIE), inductively coupled plasma-reactive ion etching (ICP-RIE), or any combination thereof.

[0067] 16. The method of 7 above, wherein layers of the mask are removed by wet chemicals including solvents or acids after etching.

[0068] 17. The method of 1 above, wherein, after patterning and etching the strain relaxed Ill-nitride-based layer, and prior to regrowing the first Ill-nitride-based film, the layers are exposed to solvents, UV ozone, HF solutions, HF vapors, or any combination thereof.

[0069] 18. The method of 1 above, wherein a step flow growth mode is demonstrated by atomic force microscopy (AFM) characterization of the strain relaxed Ill-nitride-based layer, in comparison to a reference sample without patterning and etching the strain relaxed III -nitride-based layer where a no step flow growth mode is demonstrated by AFM characterization.

[0070] 19 The method of 1 above, wherein a threading dislocation density (TDD) of the strain relaxed Ill-nitride-based layer corresponding to dark spot density in cathodoluminescence (CL) characterization is reduced by at least one order of magnitude as compared to a reference sample without patterning and etching the strain relaxed Ill-nitride-based layer.

[0071] 20. The method of 19 above, wherein the TDD of the strain relaxed III- nitride-based layer is on the same order as in the SRT.

[0072] 21. The method of 1 above, wherein the first Ill-nitride-based film is a nitride semiconductor alloy, with a general formula of ScvGawAlxInyBzN, where 0<v<l, 0<w<L 0<x<L 0<y<l. 0<z<l, and v+w+x+y+z=l, and can be compositionally uniform, graded, a superlattice region, or any combination thereof.

[0073] 22. The method of 21 above, wherein the first Ill-nitride-based film is grown at a temperature at least as high as that used for the strain relaxed III-nitride- based layer.

[0074] 23. The method of 21 above, wherein the first Ill-nitride-based film is at least partially grown at atmospheric pressure, below' atmospheric pressure, at multiple different pressures, or any combination thereof.

[0075] 24. The method of 21 above, wherein the first Ill-nitride-based film is coalesced.

[0076] 25. The method of 21 above, wherein a high density of threading dislocations is bent toward and terminated at coalesced interfaces during lateral overgrowth of the first Ill-nitride-based film, instead of penetrating to a top surface.

[0077] 26. The method of 1 above, wherein the coalesced first Ill-nitride-based film is used to reduce threading dislocations after growing the strain relaxed III- nitride-based layer.

[0078] 27. The method of 26 above, wherein one or more device structures or regions are grown on or above the coalesced first Ill-nitride-based film.

[0079] 28. The method of 27 above, wherein the device structures include lightemitting diodes (LEDs), laser diodes (LDs), transistors, photodiodes, or other devices.

[0080] 29. The method of 1 above, w'herein the second Ill-nitride-based layers are a nitride semiconductor alloy, with a general formula of ScvGawAlxInyBzN, where 0<v<l, 0<w<l, 0<x<l, 0<y<l, 0<z<l, and v+w+x+y+z=l, and can be compositionally uniform, graded, a superlattice region, or any combination thereof.

[0081] 30. The method of 29 above, wherein an average composition of at least one of the elements Sc. Ga, Al, In or B in the second Ill-nitride-based layers is equal to or higher than that of the first ITI-nitride-based film coalesced by lateral overgrowth.

[0082] 31. The method of 29 above, wherein a strain of the second III-nitride- based layers grown on or above the coalesced first Ill-nitride-based film is partially and / or completely strain relaxed.

[0083] 32. The method of 31 above, wherein the second III -nitride-based layers’ strain is uniaxially or biaxially relaxed.

[0084] 33. The method of 32 above, wherein strain relaxation is uniform or radially symmetric across the second 111-nitride-based layers.

[0085] 34. The method of 1 above, wherein the SRT is a low defect density SRT grown on or above a substrate, and the substrate is a sapphire, silicon (Si), SiC, glass, GaN, or other substrate, with any cry stal orientation, such as polar, nonpolar, semipolar, or other crystal orientation.

[0086] 35. The method of 34 above, wherein the low defect density SRT is a template for growth of one or more devices, such as light-emitting diodes (LEDs), laser diodes (LDs), transistors, photodiodes, or other devices.

[0087] Process Steps

[0088] Fig. 9 is a flowchart illustrating the process steps for creating an SRT, according to the present invention.

[0089] Block 901 represents the step of growing at least one highly defective III- nitride-based thin layer. The highly defective Ill-nitride-based thin layer is thermally decomposed InGaN, a three-dimensional (3D) AIN island, AlGaN, a different defect creating layer, or any combination thereof. Moreover, a thickness of the highly defective Ill-nitride-based thin layer is not limited to any value. It is preferable that the highly defective Ill-nitride-based thin layer is grown with a defect density at least an order of magnitude higher than the subsequent strain relaxed Ill-nitride-based layer.

[0090] Block 902 represents the step of growing a strain relaxed Ill-nitride-based layer on the highly defective Ill-nitride-based thin layer. The strain relaxed III- nitride-based layer is a nitride semiconductor alloy, with a general formula of ScvGawAlxInyBzN, where 0<v<l, 0<w<l, 0<x<l, 0<y<l, 0<z<l, and v+w+x+y+z=l, and can be compositionally uniform, graded, a superlattice region, or any combination thereof. An in-plane lattice constant of the strain relaxed Ill-nitride-based layer is adjusted due to the high defect density, providing for strain relaxation of layers and films grown above the strain relaxed Ill-nitride-based layer.

[0091] Block 903 represents the step of patterning and etching the strain relaxed III- nitride-based layer. The patterning and etching of the strain relaxed 111-nitride-based layer starts with depositing a mask, by vacuum deposition or spin coating, on top of the strain relaxed Ill-nitride-based layer, after the grow th of the strain relaxed III- nitride-based layer. The mask is a dielectric, metal and / or photoresist, for example, the mask comprises SiO2 / Ni. wherein the patterning of the SiO2 / Ni is performed using thermal annealing, and the patterning of a photoresist is done by standard photolithography. The mask provides a dry etching selectivity to the strain relaxed Ill-nitride-based layer and the highly defective Ill-nitride-based thin layer to reach a desired etch depth, wherein the desired etch depth is at least below a bottom of the highly defective III-nitnde-based thin layer. The patterning of the photoresist is performed using standard photolithography, wherein a dimension of patterns resulting from the patterning ranges from 1 nm to 20 microns, and the etching is performed by dry etching using reactive ion etching (RIE), inductively coupled plasma-reactive ion etching (ICP-RIE). or any combination thereof.

[0092] Layers of the mask are removed by wet chemicals including solvents or acids after etching. In addition, after patterning and etching the strain relaxed Ill-nitride- based layer, and prior to regrowing the first Ill-nitride-based film, the layers are exposed to solvents, UV ozone, HF solutions, HF vapors, or any combination thereof.

[0093] A step flow growth mode is demonstrated by atomic force microscopy (AFM) characterization of the strain relaxed Ill-nitride-based layer, in comparison to a reference sample without patterning and etching the strain relaxed Ill-nitride-based layer where a no step flow growth mode is demonstrated by AFM characterization.

[0094] A threading dislocation density (TDD) of the strain relaxed Ill-nitride-based layer corresponding to dark spot density in cathodoluminescence (CL) characterization is reduced by at least one order of magnitude as compared to a reference sample without patterning and etching the strain relaxed Ill-nitride-based layer.

[0095] The TDD of the strain relaxed Ill-nitride-based layer is on the same order as in the SRT.

[0096] Block 904 represents the step of regrowing a first Ill-nitride-based film on the patterned and etched strain relaxed Ill-nitride-based layer, wherein the first III -nitridebased film is coalesced by lateral overgrowth. The first Ill-nitride-based film is a nitride semiconductor alloy, with a general formula of ScvGawAlxInyBzN. where 0<v<l, 0<w<l, 0<x<l, 0<y<l, 0<z<l, and v+w+x+y+z=l, and can be compositionally uniform, graded, a superlattice region, or any combination thereof. The first Ill-nitride-based film is grown at a temperature at least as high as that used for the strain relaxed Ill-nitride-based layer. The first Ill-nitride-based film is at least partially grown at atmospheric pressure, below atmospheric pressure, at multiple different pressures, or any combination thereof.

[0097] Preferably, the first Ill-nitride-based film is coalesced, such that a high density of threading dislocations is bent toward and terminated at coalesced interfaces during lateral overgrowth of the first Ill-nitride-based film, instead of penetrating to a top surface. As a result, the coalesced first Ill-nitride-based film is used to reduce threading dislocations after growing the strain relaxed Ill-nitride-based layer. One or more device structures or regions are grown on or above the coalesced first III-nitride- based film, wherein the device structures include light-emitting diodes (LEDs), laser diodes (LDs), transistors, photodiodes, or other devices.

[0098] Block 905 represents the step of growing one or more second Ill-nitride-based layers on the first Ill-nitride-based film with the second Ill-nitride-based layers' strain being at least partially relaxed. The second ITI-nitride-based layers are a nitride semiconductor alloy, with a general formula of ScvGawAlxInyBzN, where 0<v<l, 0<w<l, 0<x<l, 0<y<l. 0<z<l, and v+w+x+y+z=l, and can be compositionally uniform, graded, a superlattice region, or any combination thereof. An average composition of at least one of the elements Sc, Ga, AL In or B in the second III- nitride-based layers is equal to or higher than that of the first Ill-nitride-based film coalesced by lateral overgrowth.

[0099] A strain of the second Ill-nitride-based layers grown on or above the coalesced first 111 -nitride-based film is partially and / or completely strain relaxed. Moreover, the second Ill-nitride-based layers’ strain is uniaxially or biaxially relaxed. The strain relaxation is uniform or radially symmetric across the second Ill-nitride-based layers.

[0100] Block 906 represents the end result of the process steps, namely, one or more SRT structures fabricated using the method. Specifically, a low defect density SRT is grown on or above a substrate, and the substrate is a sapphire, silicon (Si), SiC, glass, GaN, or other substrate, with any crystal orientation, such as polar, nonpolar, semipolar, or other crystal orientation. The low defect density SRT provides a template for grow th of one or more devices, such as light-emitting diodes (LEDs), laser diodes (LDs), transistors, photodiodes, or other devices.

[0101] References

[0102] The following publications are incorporated by reference herein:

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[0131]

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[0132] Conclusion

[0133] This concludes the description of the preferred embodiment of the present invention. The foregoing description of one or more embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.

Claims

WHAT IS CLAIMED IS:

1. A method, comprising: creating a strain relaxed template (SRT) by: growing at least one highly defective Ill-nitride-based thin layer; growing a strain relaxed Ill-nitride-based layer on the highly defective III- nitride-based thin layer; patterning and etching the strain relaxed Ill-nitride-based layer; regrowing a first Ill-nitride-based film on the patterned and etched strain relaxed Ill-nitride-based layer, wherein the first Ill-nitride-based film is coalesced by lateral overgrowth; and growing one or more second Ill-nitride-based layers on the first Ill-nitride- based film with the second Ill-nitride-based layers’ strain being at least partially relaxed.

2. The method of claim 1. wherein the highly defective Ill-nitride-based thin layer is grown with a defect density at least an order of magnitude greater than the strain relaxed Ill-nitride-based layer.

3. The method of claim 2, wherein the highly defective Ill-nitride-based thin layer is thermally decomposed InGaN, a three-dimensional (3D) AIN island, AlGaN, a different defect creating layer, or any combination thereof.

4. The method of claim 2, wherein an in-plane lattice constant of the strain relaxed Ill-nitride-based layer is adjusted due to the high defect density, providing for strain relaxation of layers and films grown on or above the strain relaxed Ill-nitride-based layer.

5. The method of claim 1, wherein each of the strain relaxed III -nitridebased layer, the first Ill-nitride-based film, and the second Ill-nitride-based layers, comprise a nitride semiconductor alloy, with a general formula of ScvGawAlxInyBzN, where 0<v<l, 0<w<l, 0<x<l, 0<y<l, 0<z<l, and v+w+x+y+z=l. and can be compositionally uniform, graded, a superlattice region, or any combination thereof.

6. The method of claim 1, wherein the patterning and etching the strain relaxed Ill-nitride-based layer starts with depositing a mask on top of the strain relaxed Ill-nitride-based layer, after the growth of the strain relaxed Ill-nitride-based layer.

7. The method of claim 6, wherein the mask provides a dry etching selectivity to the strain relaxed 111-nitride-based layer and the highly defective 111- nitride-based thin layer to reach a desired etch depth, wherein the desired etch depth is at least below a bottom of the highly defective Ill-nitride-based thin layer.

8. The method of 1 above, wherein a dimension of patterns resulting from the patterning and etching ranges from 1 nm to 20 microns.

9. The method of claim 1, wherein a step flow growth mode is demonstrated by atomic force microscopy (AFM) characterization of the strain relaxed Ill-nitride-based layer, in comparison to a reference sample without patterning and etching the strain relaxed Ill-nitride-based layer.10 The method of claim 1, wherein a threading dislocation density (TDD) of the strain relaxed Ill-nitride-based layer corresponding to dark spot density in cathodoluminescence (CL) characterization is reduced by at least one order of magnitude as compared to a reference sample without patterning and etching the strain relaxed Ill-nitride-based layer.

11. The method of 10 above, wherein the TDD of the strain relaxed III- nitride-based layer is on the same order as in the SRT.

12. The method of claim 1 , wherein the first Ill-nitride-based film is grown at a temperature at least as high as that used for the strain relaxed Ill-nitride-based layer.

13. The method of claim 1, wherein the first Ill-nitride-based film is coalesced.

14. The method of claim 13, wherein a high density of threading dislocations is bent toward and terminated at coalesced interfaces of the first 111- nitride-based film during lateral overgrowth of the first Ill-nitride-based film, instead of penetrating to a top surface of the first Ill-nitride-based film.

15. The method of claim 13, wherein the coalesced first Ill-nitride-based film is used to reduce threading dislocations after growing the strain relaxed III- nitride-based layer.

16. The method of claim 13, wherein one or more device structures, such as light-emitting diodes (LEDs), laser diodes (LDs), transistors, photodiodes, or other devices, are grown on or above the coalesced first Ill-nitride-based film17. The method of claim 13, wherein the second Ill-nitride-based layers grown on or above the coalesced first Ill-nitride-based film are partially and / or completely strain relaxed.

18. The method of claim 17, wherein the second Ill-nitride-based layers are uniaxially or biaxially relaxed.

19. The method of claim 17, wherein the second Ill-nitride-based layers have a strain relaxation that is uniform or radially symmetric across the second III- nitride-based layers.

20. A structure, comprising: a strain relaxed template (SRT) including: at least one highly defective Ill-nitride-based thin layer; a strain relaxed Ill-nitride-based layer grown on the highly defective III- nitride-based thin layer, wherein the strain relaxed Ill-nitride-based layer is patterned and etched; a first Ill-nitride-based film regrown on the patterned and etched strain relaxed Ill-nitride-based layer, wherein the first Ill-nitride-based film is coalesced by lateral overgrowth; and one or more second Ill-nitride-based layers grown on the first Ill-nitride-based film with the second Ill-nitride-based layers’ strain being at least partially relaxed.

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