Circuit board, display module, and display apparatus

Abstract

The present application relates to a circuit board. The circuit board comprises a circuit board body (1), a protective layer (2) and a blocking dam (3), wherein the circuit board body (1) comprises a wiring area (101) and a pin area (103), which are sequentially spaced apart from each other in a first direction, the protective layer (2) covers the wiring area (101), and the blocking dam (3) covers the end of the wiring area (101) that is close to the pin area (103), the protective layer (2) flows along the wiring area (101) to the pin area (103) before being cured, a height difference formed between the blocking dam (3) and the circuit board body (1) enables blocking of the flowing protective layer (2), so as to prevent the protective layer (2) from flowing to a binding area of the pin area (103). This ensures a binding effect of a pin (123), and ensures the final reliability of a display module. Further provided in the present application are a display module comprising the circuit board described above, and a display apparatus comprising the display module.

Description

Circuit board, display module and display device

[0001] Cross-references

[0002] This disclosure claims priority to Chinese patent application number 202311434649.X filed on October 31, 2023, entitled “Circuit board, display module and display device”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to the field of display technology, and in particular to a circuit board, a display module, and a display device. Background Art

[0004] In application scenarios such as aviation, automotive, and industrial control that require high reliability of display modules, it is necessary to coat a protective layer on the surface of the circuit board to improve the circuit board's insulation, moisture-proof, leakage-proof, shock-proof, dust-proof, and corrosion-proof functions.

[0005] However, the protective layer is in liquid form before solidification. During the coating process on the circuit board surface, it is easy to seep from the routing area to the pin area, resulting in poor binding in the pin area and affecting the ultimate reliability of the display module.

[0006] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field.

[0007] Summary of the Invention

[0008] The purpose of the present disclosure is to overcome the above-mentioned deficiencies of the prior art and to provide a circuit board, a display module and a display device.

[0009] According to one aspect of the present disclosure, a circuit board is provided, comprising a circuit board body, a protective layer, and a blocking dam, wherein the circuit board body comprises a routing area and a pin area spaced apart in sequence along a first direction; the protective layer is disposed on one side of the circuit board body, the protective layer covering the routing area, and the protective layer flows along the routing area toward the pin area before solidification; the blocking dam and the protective layer are disposed on the same side of the circuit board body, the blocking dam covering one end of the routing area close to the pin area, and the blocking dam can form a barrier to the flowing protective layer.

[0010] In one embodiment of the present disclosure, the barrier dam includes a first barrier layer and a second barrier layer sequentially arranged in a direction away from the circuit board body, and an edge of the second barrier layer adjacent to the protective layer is closer to the pin area than an edge of the first barrier layer adjacent to the protective layer.

[0011] In one embodiment of the present disclosure, a guide groove is provided on one side of the barrier dam close to the routing area. The guide groove is provided along a second direction and extends to an edge of the barrier dam. The second direction is perpendicular to the first direction.

[0012] In one embodiment of the present disclosure, the barrier dam is gradually inclined away from the pin area along a direction away from the circuit board body.

[0013] In one embodiment of the present disclosure, the circuit board body includes a substrate and a first conductive layer, the first conductive layer includes a plurality of pins, the plurality of pins are located in the pin area and are arranged parallel to each other along a first direction, the first conductive layer also includes a circuit trace, the circuit trace is located in the trace area, a transition area is provided between the trace area and the pin area, and a plurality of adapter wires are provided in parallel to each other along the first direction in the transition area, and each adapter wire is respectively connected to the circuit trace and the plurality of pins.

[0014] In one embodiment of the present disclosure, the adapter wires are arranged on the same layer as the circuit wiring and pins, a groove is formed between two adjacent adapter wires, and the barrier dam fills at least one end of each groove close to the wiring area.

[0015] In one embodiment of the present disclosure, the circuit board also includes an insulating layer, which is arranged between the substrate and the first conductive layer. The adapter wire is arranged between the insulating layer and the substrate. The pin is connected to the adapter wire through a first via hole, and the circuit line is connected to the adapter wire through a second via hole.

[0016] In one embodiment of the present disclosure, the orthographic projection of the adapter wire on the substrate overlaps with the orthographic projection of the circuit trace on the substrate to form an overlapping region, and the orthographic projection of the second via on the substrate is located in the overlapping region.

[0017] In one embodiment of the present disclosure, an orthographic projection of the second via hole on the substrate is located on a side of the overlapping region away from the pin region.

[0018] In one embodiment of the present disclosure, different circuit traces are connected to different pins through different second vias, and orthographic projections of at least some of the second vias in the first direction do not overlap.

[0019] In one embodiment of the present disclosure, at least one buffer segment is formed between two adjacent transfer wires, and a width of the buffer segment is greater than a distance between two adjacent pins.

[0020] In one embodiment of the present disclosure, the width of the buffer segment gradually increases in a direction approaching the pin region.

[0021] In one embodiment of the present disclosure, the width of the buffer segment gradually increases and then gradually decreases in a direction approaching the pin region.

[0022] In one embodiment of the present disclosure, the edge of the buffer segment has an arc-shaped contour.

[0023] In one embodiment of the present disclosure, a plurality of buffer segments are formed between two adjacent transfer wires, and the widths of the plurality of buffer segments gradually increase in a direction approaching the pin area.

[0024] In one embodiment of the present disclosure, a patterned protective layer is provided on the side of the circuit routing away from the substrate, the protective layer is located in the routing area, the blocking dam covers the side of the protective layer close to the pin area, the routing area includes a device area away from the pin area, and the blocking dam does not contact the device area.

[0025] In one embodiment of the present disclosure, the protection layer covers one end of the circuit trace close to the pin region and is at least partially located in the transition region.

[0026] In one embodiment of the present disclosure, the barrier dam at least partially covers a region of the insulating layer located in the transition region.

[0027] In one embodiment of the present disclosure, the barrier dam covers the patch cord.

[0028] In one embodiment of the present disclosure, the barrier dam overlaps with an end of the pin close to the adapter wire, and the overlapping width of the barrier dam and the pin is less than one-fifth of the length of the pin.

[0029] In one embodiment of the present disclosure, the protective layer is a conformal coating.

[0030] According to another aspect of the present disclosure, a display module is provided, comprising a display panel and a circuit board that are electrically connected, wherein the circuit board is the circuit board provided in one aspect of the present disclosure.

[0031] According to yet another aspect of the present disclosure, a display device is provided, comprising the display module provided in one aspect of the present disclosure.

[0032] The circuit board disclosed herein includes a circuit board body, a protective layer and a blocking dam. The circuit board body includes a routing area and a pin area arranged in sequence along a first direction. The protective layer covers the routing area, and the blocking dam covers one end of the routing area close to the pin area. Before solidification, the protective layer flows along the routing area to the pin area. The height difference formed by the blocking dam and the circuit board body can block the flowing protective layer, preventing the protective layer from flowing to the binding area of ​​the pin area, thereby ensuring the binding effect of the pins and ensuring the ultimate reliability of the display module.

[0033] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0035] FIG1 is a schematic cross-sectional view of the pin area of ​​the circuit board along the second direction when the liquid protective layer seeps into the pin area according to an embodiment of the present disclosure.

[0036] FIG2 is a schematic cross-sectional view of the pin area of ​​the circuit board according to an embodiment of the present disclosure along the second direction when the liquid protective layer seeps into the pin area.

[0037] FIG3 is a schematic cross-sectional view of the circuit board along the first direction according to an embodiment of the present disclosure when no barrier dam is provided.

[0038] FIG4 is a schematic cross-sectional view of the circuit board along a first direction according to an embodiment of the present disclosure when a barrier dam is provided.

[0039] FIG5 is a plan view of a circuit board according to an embodiment of the present disclosure when a barrier dam is provided.

[0040] 6 is a cross-sectional schematic diagram of a circuit board according to an embodiment of the present disclosure, when the barrier dam includes a first barrier layer and a second barrier layer, and the second barrier layer and the silk-screen layer are made of the same layer and material.

[0041] 7 is a plan view of a circuit board according to an embodiment of the present disclosure, when the barrier dam includes a first barrier layer and a second barrier layer, and the second barrier layer and the silk-screen layer are made of the same layer and material.

[0042] 8 is a cross-sectional schematic diagram of a circuit board according to an embodiment of the present disclosure, when the barrier dam includes a first barrier layer and a second barrier layer, and the second barrier layer and the second filling layer are made of the same layer and material.

[0043] 9 is a plan view of a circuit board according to an embodiment of the present disclosure, when the barrier dam includes a first barrier layer and a second barrier layer, and the second barrier layer and the second filling layer are made of the same layer and material.

[0044] FIG10 is a schematic cross-sectional view of the circuit board according to an embodiment of the present disclosure when the adapter wires are on different layers from the pins and circuit traces.

[0045] 11 is a schematic cross-sectional view of the circuit board according to an embodiment of the present disclosure, when the orthographic projection of the second via hole on the substrate is located within the overlapping region of the orthographic projection of the adapter wire on the substrate and the device region.

[0046] FIG12 is a schematic cross-sectional view of the circuit board according to an embodiment of the present disclosure when the orthographic projections of the second via holes in the first direction do not overlap.

[0047] FIG13 is a schematic cross-sectional view of the circuit board according to an embodiment of the present disclosure when the protective layer covers one end of the circuit trace close to the pin area and covers a portion of the transition area.

[0048] FIG14 is a schematic cross-sectional view of the circuit board according to an embodiment of the present disclosure, wherein the barrier dam is arranged to be gradually inclined away from the pin area in a direction away from the circuit board body.

[0049] FIG15 is a schematic cross-sectional view of the circuit board according to an embodiment of the present disclosure, when the barrier dam is arranged to gradually tilt in a direction away from the circuit board body and toward a direction close to the pin area.

[0050] FIG16 is a schematic cross-sectional view of the circuit board according to an embodiment of the present disclosure when a guide groove is provided on a side of the barrier dam close to the wiring area.

[0051] Figure 17 is a schematic diagram of the arrangement of the guide groove on the blocking dam when the blocking dam includes a first blocking layer and a second blocking layer, and the blocking dam is arranged to gradually tilt from a direction away from the circuit board body to a direction away from the pin area, according to an embodiment of the present disclosure.

[0052] FIG18 is a planar schematic diagram of the first conductive layer involved in an embodiment of the present disclosure when the distance between adjacent transfer wires is equal to the distance between adjacent pins.

[0053] FIG19 is a planar schematic diagram of the first conductive layer involved in an embodiment of the present disclosure when the width of the buffer segment is greater than the distance between adjacent pins.

[0054] FIG20 is a plan view of the first conductive layer according to an embodiment of the present disclosure when the width of the buffer segment gradually increases in a direction approaching the pin region.

[0055] FIG21 is a planar schematic diagram of the first conductive layer involved in an embodiment of the present disclosure when the width of the buffer segment is set to gradually increase and then gradually decrease along a direction close to the pin area.

[0056] 22 is a planar schematic diagram of the first conductive layer involved in an embodiment of the present disclosure when the width of the buffer segment is set to gradually increase and then gradually decrease in the direction close to the pin area, and the edge profile of the buffer segment is an arc shape.

[0057] FIG23 is a planar schematic diagram of the first conductive layer involved in an embodiment of the present disclosure, in which multiple buffer segments are formed between two adjacent transfer wires and the widths of the multiple buffer segments gradually increase in a direction approaching the pin area.

[0058] FIG24 is a partial plan view of the first conductive layer involved in an embodiment of the present disclosure when the width of the buffer segment is set to gradually increase and then gradually decrease along the direction close to the pin area.

[0059] Explanation of the accompanying drawings: 1. Circuit board body, 11. Base, 12. First conductive layer, 121. Circuit trace, 122. Adapter wire, 123. Pin, 124. Groove, 1241. Buffer section, 13. Protective layer, 14. Insulating layer, 101. Tracing area, 1011. Overlapping area, 102. Transition area, 101. Pin area, 141. First via, 142. Second via, 2. Protective layer, 3. Barrier dam, 31. First barrier layer, 32. Second barrier layer, 301. Guide groove. DETAILED DESCRIPTION

[0060] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the figures represent identical or similar structures, and thus their detailed descriptions will be omitted. Furthermore, the figures are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0061] Although relative terms such as "upper" and "lower" are used in this specification to describe the relationship of one illustrated component to another, these terms are used herein for convenience only, such as in accordance with the orientation of the illustrations in the accompanying drawings. It will be understood that if the illustrated device were flipped upside down, the component described as "upper" would become the component "lower." When a structure is referred to as "on" another structure, this may mean that the structure is integrally formed with the other structure, that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via the other structure.

[0062] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0063] As shown in Figures 1 to 3, the pin area 103 of the circuit board is provided with a plurality of parallel pins 123, and adjacent pins 123 are usually spaced apart. In applications such as aviation, automotive, and industrial control, which require high reliability of the display module, a protective layer 2 is applied to the wiring area 101 of the circuit board to enhance the circuit board's insulation, moisture resistance, leakage protection, shock resistance, dust resistance, and corrosion resistance. It should be noted that the protective layer 2 can be a three-conformal paint. However, the three-conformal paint is usually a transparent UV curing glue that is liquid before curing, has low viscosity, and fluidity close to that of water, making it easy to penetrate and sputter. During the process of spray coating on the surface of the circuit board, the low viscosity of the three-conformal paint makes it easy to seep uncontrolled. In severe cases, it will seep into the pin area 101 and fill between two adjacent pins 123, resulting in poor binding of the pins 123, affecting the ultimate reliability of the display module.

[0064] Based on this, embodiments of the present disclosure provide a circuit board. As shown in Figures 4 to 24 , the circuit board includes a circuit board body 1, a protective layer 2, and a barrier dam 3. The circuit board body 1 includes a routing area 101 and a pin area 101 spaced apart in sequence along a first direction. The protective layer 2 is disposed on one side of the circuit board body 1, covering the routing area 101. Before solidification, the protective layer 2 flows along the routing area 101 toward the pin area 101. The barrier dam 3 is disposed on the same side of the circuit board body 1 as the protective layer 2, covering the end of the routing area 101 near the pin area 101. The barrier dam 3 can block the flowing protective layer 2.

[0065] The protective layer 2 covers the routing area 101, and the blocking dam 3 covers one end of the routing area 101 close to the pin area 101. The protective layer 2 flows along the routing area 101 toward the pin area 101 before solidification. The height difference formed by the blocking dam 3 and the circuit board body 1 can block the flowing protective layer 2, preventing the protective layer 2 from flowing to the binding area of ​​the pin area 101, thereby ensuring the binding effect of the pin 123 and ensuring the ultimate reliability of the display module.

[0066] The circuit board involved in the embodiment of the present disclosure is described in detail below with reference to specific examples.

[0067] As shown in Figures 4 and 5, the circuit board includes a circuit board body 1, which has a routing area 101, a transition area 102 and a pin area 101 arranged in sequence along a first direction. The transition area 102 is arranged between the routing area 101 and the pin area 101, and is connected to the routing area 101 and the pin area 101 respectively.

[0068] The circuit board body 1 includes a base 11 and a first conductive layer 12, which is disposed on one side of the base 11. The first conductive layer 12 includes circuit traces 121, multiple adapter wires 122, and multiple pins 123. The circuit traces 121 are located in the trace area 101, the multiple pins 123 are located in the pin area 101, and the multiple adapter wires 122 are located in the transition area 102.

[0069] The plurality of pins 123 are arranged parallel to each other along the first direction, and the plurality of adapter wires 122 are arranged parallel to each other along the first direction, and each adapter wire 122 is respectively connected to the circuit trace 121 and the plurality of pins 123. It is understandable that each adapter wire 122 is arranged on the same layer as the circuit trace 121 and the pins 123.

[0070] The circuit board body 1 also includes a protective layer 13, which is disposed on the side of the first conductive layer 12 away from the substrate 11. Protective layer 13 is located in the wiring area 101. Protective layer 13 is a patterned coating with a device area. The patterned coating is applied to the unused circuit traces 121 and the substrate 11 to provide long-term protection for the formed circuit pattern. Protective layer 13 typically has a hollowed-out portion in the device area, exposing a portion of the circuit traces 121 as a soldering point, to which electronic components are soldered. It should be noted that the protective layer is typically provided with green oil.

[0071] The circuit board also includes a protective layer 2, which is applied to the side of the protective layer 13 facing away from the substrate 11. Protective layer 2 can be made of conformal coating, which is typically a transparent UV-curing adhesive. After curing, the conformal coating forms a transparent protective film with excellent insulation, moisture resistance, leakage protection, shock resistance, dust resistance, corrosion resistance, aging resistance, and corona resistance. In particular, it exhibits excellent resistance to moisture, salt spray, and mildew, representing the three key properties of conformal coating. The conformal coating can be fluorescent, which appears blue under ultraviolet light, making it easier to control the coating accuracy of the protective layer 2.

[0072] The liquid protective layer 2 flows along the wiring area 101 toward the pin area 101. When the liquid protective layer 2 seeps into the pin area 101, it can cause poor binding of the pins 123. Therefore, the circuit board also includes a barrier dam 3, which covers the side of the protective layer 13 near the pin area 101. The height difference between the side of the barrier dam 3 away from the substrate 11 and the side of the protective layer 13 away from the substrate 11 prevents the liquid protective layer 2 from reaching the edge of the pin area 101.

[0073] The adapter wire 122 is raised relative to the base 11, so a groove 124 is formed between two adjacent adapter wires 122, and multiple parallel grooves 124 are formed between multiple adapter wires 122, which are equivalent to capillaries. The liquid protective layer 13 in the narrow space such as the groove 124 can make the liquid that is wet or non-wet with its groove wall generate a capillary force pointing in the direction of the concave liquid surface. When the liquid protective layer 13 is coated or splashed onto the edge of the adapter wire 122, due to the capillary surface tension, the flowable protective layer 13 will penetrate and flow along the groove 124 to the pin area 101, and even penetrate the entire pin area 101. The blocking dam 3 fills at least one end of each groove 124 close to the wiring area 101, which can prevent the liquid protective layer 2 from seeping into the pin area 101 due to capillary action.

[0074] In this embodiment, the barrier dam 3 covers the side of the protective layer 13 near the pin area 101, and the barrier dam 3 covers the patch cord 122. The barrier dam 3 overlaps the end of the pin 123 near the patch cord 122. The width of the overlap between the barrier dam 3 and the pin 123 is less than one-fifth of the length of the pin 123. Otherwise, it will interfere with the binding of the pin 123, affecting the binding yield of the circuit board. There is no specific limit to the overlap width between the barrier dam 3 and the protective layer 13, as long as the barrier dam 3 does not contact the device area. For example, when the length of the pin 123 along the first direction is 2500 μm, the overlap width between the barrier dam 3 and the pin 123 cannot exceed 500 μm.

[0075] The circuit board may also include a first filling layer and a silk screen layer. The first filling layer is usually used to fill the through holes on the circuit board to improve the flatness of the circuit board, and the silk screen layer is used to print various logos. The silk screen layer is provided on the first filling layer. When forming the silk screen layer, there must be a film layer so that no additional process and cost are added to the first filling layer. It should be noted that the material of the first filling layer can usually be resin, and the silk screen layer can usually be white paint. The barrier dam 3 can be formed of the same layer and material as the first filling layer, because the thickness of the first filling layer can be made relatively thick, which facilitates the adjustment of the thickness of the first filling layer. In addition, there is no need to form the barrier dam 3 separately, which can save a process.

[0076] As shown in Figures 6 to 9, the blocking dam 3 may also include a first blocking layer 31 and a second blocking layer 32. The first blocking layer 31 and the second blocking layer 32 are arranged in sequence along the direction away from the circuit board body 1. The second blocking layer 32 is close to the edge of the protective layer 2 and may be closer to the pin area 101 than the edge of the first blocking layer 31 is close to the protective layer 2. The second blocking layer 32 is away from the edge of the protective layer 2 and may be farther from the pin area 101 than the edge of the first blocking layer 31 is away from the protective layer 2.

[0077] The orthographic projection of the second barrier layer 32 on the substrate 11 lies within the orthographic projection of the first barrier layer 32 on the substrate 11. It is understood that the two sides of the second barrier layer 32 extending in the second direction are both recessed in the first direction relative to the two sides of the first barrier layer 31 extending in the second direction. Therefore, the width of the second barrier layer 32 is smaller than that of the first barrier layer 31, thus forming a stepped barrier dam 3. When the barrier dam 3 has the same height, compared to the structures shown in Figures 4 and 5 where only the first barrier layer 31 is provided, it is more difficult for the flowing protective layer 2 to pass over the stepped barrier dam 3, requiring a larger volume of barrier layer and a longer distance to climb.

[0078] It should be noted that the second direction is perpendicular to the first direction. The first direction is the x direction in FIG. 7 and FIG. 9 , and the second direction is the y direction in FIG. 7 and FIG. 9 .

[0079] As shown in Figures 6 and 7 , in one embodiment, the first barrier layer 31 can be formed from the same layer and material as the first filling layer, and the second barrier layer 32 can be formed from the same layer and material as the silk-screen layer. As shown in Figures 8 and 9 , in another embodiment, the circuit board further includes a second filling layer, the first barrier layer 31 can be formed from the same layer and material as the filling layer, and the second barrier layer 32 can be formed from the same layer and material as the second filling layer.

[0080] The material of the first filling layer and the material of the second filling layer can both be set as resin. When making the double-layer resin barrier dam 3, two layers of steel mesh layers can be used, and the first filling layer and the second filling layer can be coated on the two layers of steel mesh layers respectively. The first filling layer and the second filling layer can also be coated in sequence by inkjet printing.

[0081] To further prevent the liquid protective layer from flowing into the pin area, the surface of the barrier dam 3 facing away from the substrate 11 can be roughened. Specifically, the roughened surface can be formed by providing multiple wavy barrier patterns on the surface of the barrier dam 3 facing away from the substrate 11. The wavy barrier patterns are spaced apart along the first direction, and any two adjacent wavy barrier patterns are parallel to each other in the second direction. The roughened surface can also be formed by providing multiple arrayed bumps on the surface of the barrier dam 3 facing away from the substrate 11.

[0082] As shown in Figure 10, the circuit board body 1 includes a substrate 11, an insulating layer 14, a first conductive layer 12, a second conductive layer and a protective layer 13. The second conductive layer is arranged on one side of the substrate 11, the insulating layer 14 is arranged on the side of the second conductive layer away from the substrate 11, the first conductive layer 12 is arranged on the side of the insulating layer 14 away from the substrate 11, and the protective layer 13 is arranged on the side of the first conductive layer 12 away from the substrate 11.

[0083] The first conductive layer 12 includes a circuit trace 121 and multiple pins 123. The circuit trace 121 is located in the trace area 101, and the multiple pins 123 are located in the pin area 101. The multiple pins 123 are arranged parallel to each other along a first direction. The second conductive layer includes multiple adapter wires 122. The multiple adapter wires 122 are arranged parallel to each other along the first direction. One end of the orthographic projection of the adapter wire 122 on the substrate 11 overlaps with the orthographic projection of the circuit trace 121 on the substrate 11, and the other end of the orthographic projection of the adapter wire 122 on the substrate 11 overlaps with the orthographic projection of the pins 123 on the substrate 11. The pins 123 are connected to the adapter wires 122 through first vias 141, and the circuit trace 121 is connected to the adapter wires 122 through second vias 142.

[0084] The patterned protective layer 13 is located in the routing area 101, covering the side of the circuit routing 121 away from the substrate 11. The blocking dam 3 covers the side of the protective layer 13 close to the pin area 101, and along the side of the protective layer 13 and the circuit routing 121 close to the pin area 101, covers the area of ​​the insulating layer 14 located in the transition area 102. The blocking dam 3 can also extend from the insulating layer 14 to the pin 123. The overlapping width of the blocking dam 3 and the pin 123 is less than one-fifth of the length of the pin 123. There is no specific restriction on the overlapping width of the blocking dam 3 and the protective layer 13, as long as the blocking dam 3 does not contact the device area.

[0085] Pins 123 and adapter wires 122 are disposed on the first conductive layer 12 and the second conductive layer, respectively. Insulation layer 14 can fill the grooves 124 formed between two adjacent adapter wires 122. If barrier dam 3 does not completely cover the insulating layer 14 in the transition region 102, even if the liquid protective layer 2 flows over barrier dam 3, it will seep onto the surface of insulating layer 14, thus preventing capillary forces from causing the liquid protective layer 2 to migrate toward pins 123.

[0086] As shown in Figure 11, the patch cord 122 is extended along a first direction to the device area, so that the orthographic projection of the patch cord 122 on the substrate 11 overlaps with the device area, forming an overlapping region 1011. The orthographic projection of the second via 142 on the substrate 11 is located within the overlapping region 1011. The circuit trace 121 is connected to the patch cord 122 through the second via 142. The orthographic projection of the second via 142 on the substrate 11 is located on the side of the overlapping region 1011 away from the pin 123 region 101. This can increase the distance between the second via 142 and the first via 141, reducing electromagnetic interference generated during signal transmission.

[0087] As shown in Figure 12 , different circuit traces 121 are connected to different pins 123 through different second vias 142. The orthographic projections of at least some of the second vias 142 in the first direction do not overlap. If space in the first direction permits, the orthographic projections of all second vias 142 in the first direction can be configured to not overlap. It is understood that this increases the distance between adjacent second vias 142, reduces the density of the second transfer vias, and further reduces electromagnetic interference generated during signal transmission.

[0088] As shown in Figure 13, protective layer 13 covers the end of circuit trace 121 near pin region 101 and is at least partially located in transition region 102. It is important to note that protective layer 13 does not cover pin 123. Protective layer 13 supports and raises barrier dam 3. Protective layer 2 is coated at the same thickness, allowing the top of barrier dam 3 to block the thicker liquid protective layer 2. In other embodiments, protective layer 13 can be located in trace region 101 and not overlap with barrier dam 3.

[0089] As shown in Figure 14 , to enhance the barrier effect of barrier dam 3 on liquid protective layer 2, barrier dam 3 is configured to gradually slope away from circuit board body 1 and away from pin area 101. This increases the capacity of liquid protective layer 2 and the resistance to overflow of liquid protective layer 2 during overflow of liquid protective layer 2 toward pin area 101, thereby enhancing the barrier effect of barrier dam 3. As shown in Figure 15 , in other feasible embodiments, barrier dam 3 can also be configured to gradually slope away from circuit board body 1 and toward pin area 101.

[0090] As shown in Figure 16, to enhance the barrier dam 3's barrier effect on the liquid anti-slip layer, a diversion groove 301 can be provided on the side of the barrier dam 3 near the wiring area 101. The diversion groove 301 can extend along a second direction perpendicular to the first direction to the edge of the barrier dam 3. The diversion groove 301 can be positioned near the side of the barrier dam 3 away from the substrate 11. When the coating height of the liquid protective layer 2 reaches a certain level, the diversion groove 301 can divert excess liquid protective layer 2 away, ensuring effective protection while reducing the probability of the liquid protective layer 2 flowing over the barrier dam 3. To enhance the diversion effect, multiple diversion grooves 301 can be provided in a direction away from the substrate 11.

[0091] As shown in Figure 17, when the blocking dam 3 includes a first blocking layer 31 and a second blocking layer 32, the first blocking layer 31 and the second blocking layer 32 can be set to be gradually inclined from the direction away from the circuit board body 1 to the direction away from the pin area 101, and the guide groove 301 can be set on the side of the second blocking layer 32 close to the routing area 101, and the bottom surface of the guide groove 301 can be set to be parallel to the inclined surface of the second blocking layer 32.

[0092] As shown in FIG18 , when the liquid protective layer 2 flows over the barrier dam 3 and into the groove 124 , to prevent the liquid protective layer 2 from seeping into the pin area 101 due to capillary forces and affecting the binding of the pins 123, as shown in FIG19 , at least one buffer section 1241 of the groove 124 is formed between two adjacent patch cords 122. The width of the buffer section 1241 is greater than the distance between the two adjacent pins 123. That is, in the transition region 102, the width of at least a portion of the patch cord 122 is narrowed, increasing the distance between adjacent patch cords 122 in the narrowed section.

[0093] As shown in FIG20 , in order to further reduce the effect of capillary force, the width of the buffer section 1241 is set to gradually increase in the direction close to the pin area 101. As shown in FIG21 , in order to facilitate the processing of the buffer section 1241 on the groove 124, the width of the buffer section 1241 can also be set to first gradually increase and then gradually decrease in the direction close to the pin area 101. As shown in FIG22 , in order to ensure the reliability of the conduction of the adapter line 122, the edge contour of the buffer section 1241 can also be an arc shape. It should be noted that the shapes mentioned above are included but not limited to, as long as they can gradually reduce the capillary force in the direction close to the pin area 101.

[0094] As shown in FIG23 , a plurality of buffer segments 1241 are formed between two adjacent adapter wires 122, and the width of the plurality of buffer segments 1241 gradually increases in the direction approaching the pin area 101. Along the flow direction of the liquid protective layer 2, each buffer segment 1241 can play a role in weakening the capillary force. Moreover, the effect of each buffer segment 1241 in weakening the capillary force gradually increases in the direction approaching the pin area 101. By performing multi-stage reduction of the capillary force through a plurality of buffer segments 1241 of different sizes, the probability of the liquid protective layer 2 invading the pin area 101 can be further reduced. It should be noted that the buffer segment 1241 is not limited to the rectangular structure shown in the figure, and can also adopt the above-mentioned structure with discontinuous width along the first direction.

[0095] As shown in FIG24 , the advantage of such a design is that, according to the mechanism of capillary force, the capillary force points in the direction of the concave surface of the liquid, and its magnitude is proportional to the surface tension of the liquid and inversely proportional to the radius R of the capillary, that is, the smaller the radius R, the stronger the capillary force, and vice versa. As shown in FIG13 , the radius of the capillary in the buffer section 1241 is defined as R2, and the radius of the other sections of the groove 124 is defined as R1. R2 is significantly larger than R1. After the width of the adapter line 122 is narrowed, as the liquid protective layer 2 flows toward the pin area 101, the width of the groove 124 in the buffer section 1241 increases. As the radius R of the capillary gradually increases, the capillary force gradually weakens, which can effectively reduce the probability of the liquid protective layer 2 invading the pin area 101 due to the capillary force.

[0096] The present disclosure also provides a display module. The display module may include the circuit board and a display panel described in any of the above embodiments of the present disclosure. The circuit board is typically attached to the non-display surface of the display panel and bonded to a flexible circuit board connected to the display panel, or directly bonded to a flexible display panel having a bendable region.

[0097] The present disclosure also provides a display device. The display device may include the display module described above in the present disclosure. The specific structure and beneficial effects of the display module have been described in detail above and will not be repeated here.

[0098] It should be noted that, in addition to the display module, the display device also includes other necessary components and components, such as a housing, a power cord, etc. Those skilled in the art can make corresponding supplements based on the specific usage requirements of the display device, which will not be elaborated here.

[0099] When the flexible circuit board is of the structure shown in the figure, the display device can be a traditional electronic device, such as a mobile phone, a computer, a television, and a camcorder, or an emerging wearable device, such as a virtual reality device and an augmented reality device, which are not listed here one by one.

[0100] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the appended claims.

Claims

1. A circuit board, wherein: include: A circuit board body, the circuit board body comprising a routing area and a pin area sequentially spaced apart along a first direction; A protective layer is provided on one side of the circuit board body, the protective layer covers the wiring area, and the protective layer flows along the wiring area toward the pin area before solidification; The blocking dam and the protective layer are arranged on the same side of the circuit board body, the blocking dam covers one end of the routing area close to the pin area, and the blocking dam can form a barrier to the flowing protective layer.

2. The circuit board according to claim 1, wherein: The barrier dam includes a first barrier layer and a second barrier layer sequentially arranged in a direction away from the circuit board body, wherein an edge of the second barrier layer adjacent to the protective layer is closer to the pin area than an edge of the first barrier layer adjacent to the protective layer.

3. The circuit board according to claim 1, wherein: A guide groove is provided on one side of the blocking dam close to the routing area. The guide groove is arranged along a second direction and extends to an edge of the blocking dam. The second direction is perpendicular to the first direction.

4. The circuit board according to claim 1, wherein: The blocking dam is gradually inclined in a direction away from the circuit board body and away from the pin area.

5. The circuit board according to claim 1, wherein: The circuit board body includes a substrate and a first conductive layer, the first conductive layer includes a plurality of pins, the plurality of pins are located in the pin area and are arranged parallel to each other along the first direction, the first conductive layer also includes a circuit trace, the circuit trace is located in the trace area, a transition area is provided between the trace area and the pin area, the transition area is provided with a plurality of parallel adapter wires along the first direction, each of the adapter wires is respectively connected to the circuit trace and the plurality of pins.

6. The circuit board according to claim 5, wherein: The adapter wires are arranged in the same layer as the circuit wiring and the pins, a groove is formed between two adjacent adapter wires, and the blocking dam at least fills one end of each groove close to the wiring area.

7. The circuit board according to claim 5, wherein: The circuit board also includes an insulating layer, which is arranged between the substrate and the first conductive layer. The adapter is arranged between the insulating layer and the substrate. The pin is connected to the adapter through a first via hole, and the circuit trace is connected to the adapter through a second via hole.

8. The circuit board according to claim 7, wherein: The orthographic projection of the adapter wire on the substrate overlaps with the orthographic projection of the circuit trace on the substrate to form an overlapping area, and the orthographic projection of the second via on the substrate is located in the overlapping area.

9. The circuit board according to claim 8, wherein: The orthographic projection of the second via hole on the substrate is located on a side of the overlapping region away from the pin region.

10. The circuit board according to claim 8 or 9, wherein: Different circuit traces are connected to different pins through different second vias, and orthographic projections of at least some of the second vias in the first direction do not overlap.

11. The circuit board according to claim 6, wherein: At least one buffer section is formed between two adjacent transfer lines, and the width of the buffer section is greater than the distance between two adjacent pins.

12. The circuit board according to claim 11, wherein: The width of the buffer section gradually increases along a direction approaching the pin area.

13. The circuit board according to claim 11, wherein: The width of the buffer section gradually increases and then gradually decreases along a direction approaching the pin area.

14. The circuit board according to claim 13, wherein: The edge of the buffer section has an arc-shaped contour.

15. The circuit board according to claim 11, wherein: A plurality of buffer sections are formed between two adjacent transfer lines, and the widths of the plurality of buffer sections gradually increase in a direction approaching the pin area.

16. The circuit board according to claim 6 or 7, wherein: A patterned protective layer is provided on the side of the circuit routing away from the substrate, the protective layer is located in the routing area, the blocking dam covers the side of the protective layer close to the pin area, the routing area includes a device area away from the pin area, and the blocking dam does not contact the device area.

17. The circuit board according to claim 16, wherein: The protection layer covers one end of the circuit trace close to the pin area and is at least partially located in the transition area.

18. The circuit board according to claim 7, wherein: The barrier dam at least partially covers a region of the insulating layer located in the transition region.

19. The circuit board according to claim 6, wherein: The barrier dam covers the patch cord.

20. The circuit board according to claim 18 or 19, wherein: The blocking dam overlaps with an end of the pin close to the adapter wire, and the overlapping width of the blocking dam and the pin is less than one fifth of the length of the pin.

21. The circuit board according to claim 1, wherein: The protective layer is a triple-proof paint.

22. A display module, wherein: It comprises a display panel and a circuit board which are electrically connected, wherein the circuit board is the circuit board according to any one of claims 1 to 19.

23. A display device, wherein: Includes the display module described in claim 20.

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