Hybrid package-on-package structure

Abstract

Provided in the present disclosure is a hybrid package-on-package structure. The package-on-package structure comprises: a memory, which has signal cells used for transmitting signals; and an adapter board, which has a first surface and a second surface arranged opposite each other, wherein the first surface faces the memory; the second surface faces an SOC substrate; first-type solder balls arranged in a first direction and second-type solder balls arranged in a second direction are provided on the second surface; the first-type solder balls are connected to the signal cells of the memory and are configured for the signal fan-out of the memory; the second-type solder balls are configured to support the adapter board and the SOC substrate, the second-type solder balls are divided into a plurality of solder ball groups, and the spacing between adjacent solder ball groups in the second direction is greater than the spacing between adjacent second solder balls in the solder ball groups; and the first direction is different from the second direction; and the SOC substrate is in signal connection with the first-type solder balls. By means of the solution, the adapter board and the SOC substrate can be supported; moreover, the mold flow filling yield can be improved and the package layout design of the SOC substrate is facilitated.

Description

Hybrid vertical stacking package structure

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on October 30, 2023, with application number 202311423381.X and invention name “Hybrid Vertical Stacked Packaging Structure”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present invention relate to the field of packaging technology, and in particular to a hybrid vertical stacking packaging structure. Background Art

[0003] In traditional vertically stacked packages (Hybrid PoP), memory chip signals are routed around the perimeter of the memory package, allowing for direct integration with the SOC substrate. The memory may be Low Power Double Data Rate SDRAM (LPDDR). For example, with LPDDR, as the number of LPDDR chip signals increases and the size of the LPDDR package increases, the signals are increasingly routed inside the package, leading to the development of the Hybrid PoP format.

[0004] In Hybrid PoP packaging design and manufacturing, the solder ball layout beneath the interposer (also known as the interposer substrate) directly impacts the fanout layout of the SOC substrate. This can also impact mold flow (MD) process yield (for example, voids after MD mold flow molding) and the consistency of stand-off height (SOH) values ​​after reflow soldering between stacked layers after thermal compression bonding (TCB). However, current Hybrid PoP packaging designs fail to effectively address all of these issues simultaneously.

[0005] Summary of the Invention

[0006] The embodiments of the present invention solve the problem that the existing Hybrid PoP packaging design cannot simultaneously solve the packaging mold flow effect, the packaging layout design of the SOC substrate and the height consistency of the solder balls after reflow soldering.

[0007] To solve the above technical problems, an embodiment of the present invention provides a hybrid vertical stacking packaging structure, including: a memory having signal particles for transmitting signals; an adapter board, the adapter board having a first surface and a second surface arranged opposite to each other, the first surface facing the memory, and the second surface facing the SOC substrate, the second surface being provided with first-type solder balls arranged along a first direction and second-type solder balls arranged along a second direction, the first-type solder balls being connected to the signal particles of the memory, the first-type solder balls being used for signal fan-out of the memory, the second-type solder balls being used for supporting the adapter board and the SOC substrate, the second-type solder balls having a plurality of solder ball groups, each solder ball group including one or more second solder balls, the spacing between adjacent solder ball groups along the second direction being greater than the spacing between adjacent second solder balls in the solder ball group, wherein the first direction is different from the second direction; the SOC substrate being signal-connected to the first-type solder balls.

[0008] Optionally, the first direction is perpendicular to the second direction.

[0009] Optionally, the second surface of the adapter plate has a first edge area and a second edge area relative to each other, and the first type of solder balls are located in the first edge area and the second edge area; and / or, the second surface of the adapter plate has a third edge area and a fourth edge area relative to each other, and the second type of solder balls are located in the third edge area and the fourth edge area.

[0010] Optionally, the cross-section of the second type solder ball along a direction parallel to the second surface is circular, waist-shaped or elliptical.

[0011] Optionally, the first type of solder ball is spherical, the second type of solder ball has a waist-shaped cross-section along a direction parallel to the second surface, the long side of the second type of solder ball extends along the second direction, and the length of the long side of the second type of solder ball is greater than the diameter of the first type of solder ball; or, the second type of solder ball has an elliptical cross-section along a direction parallel to the second surface, the long axis of the second type of solder ball extends along the second direction, and the length of the long axis of the second type of solder ball is greater than the diameter of the first type of solder ball.

[0012] Optionally, the cross-section of the second type solder ball along the direction parallel to the second surface is waist-shaped, and the length of the short side of the second type solder ball is smaller than the diameter of the first type solder ball; or, the cross-section of the second type solder ball along the direction parallel to the second surface is elliptical, and the length of the short axis of the second type solder ball is smaller than the diameter of the first type solder ball.

[0013] Optionally, the second type of solder balls are formed by an automatic ball planting process; or, the second type of solder balls are formed by an electroplating ball process.

[0014] Optionally, the solder ball parameters of the first type of solder ball and the solder ball parameters of the second type of solder ball are determined based on at least one of the following parameters: the number of signal particles of the memory, the signal particle layout of the memory, the trace width of the adapter board, the trace spacing of the adapter board, and the package size of the adapter board.

[0015] Optionally, the second type solder balls are arranged in one or more rows along the second direction.

[0016] Optionally, when the second type of solder balls are distributed and arranged into multiple columns along the second direction, for two adjacent columns of second type solder balls, the spacing between adjacent solder ball groups in a column close to the center of the adapter plate is recorded as a first spacing, and the spacing between adjacent solder ball groups in a column close to the edge of the adapter plate is recorded as a second spacing, and the projection of the first spacing along the first direction is covered by the projection of the second spacing along the first direction.

[0017] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0018] The second surface of the adapter board is provided with a first type of solder balls arranged along a first direction and a second type of solder balls arranged along a second direction, and the first direction is different from the second direction. The first type of solder balls are connected to the signal particles of the memory and are connected to the signals of the SOC substrate to fan out the signals of the memory to the SOC substrate. The second type of solder balls are used to support the adapter board and the SOC substrate. The second type of solder balls have multiple solder ball groups, each solder ball group includes one or more second solder balls, and the spacing between adjacent solder ball groups along the second direction is greater than the spacing between adjacent second solder balls in the solder ball group. Therefore, the second type of solder balls can support the adapter board and the SOC substrate to ensure the high consistency of the solder balls after reflow soldering, while also ensuring the rapid passage of mold flow during the mold flow molding process, reducing the resistance to the mold flow, facilitating mold flow filling, reducing the probability of voids, and improving the mold flow molding yield. In addition, the spacing between adjacent solder ball groups can also provide corresponding packaging layout space, which is helpful for the SOC substrate packaging layout design. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] FIG1 is a schematic diagram of an existing adapter plate;

[0020] FIG2 is a schematic diagram of another existing adapter plate;

[0021] FIG3 is a schematic structural diagram of a hybrid vertical stacking package structure in an embodiment of the present invention from a viewing angle;

[0022] FIG4 is a schematic structural diagram of a hybrid vertical stacking package structure in another embodiment of the present invention;

[0023] FIG5 is a schematic diagram of an adapter plate in an embodiment of the present invention;

[0024] FIG6 is a schematic diagram of another adapter plate in an embodiment of the present invention;

[0025] FIG7 is a schematic diagram of another adapter plate in an embodiment of the present invention;

[0026] FIG8 is a schematic diagram of another adapter plate in an embodiment of the present invention;

[0027] FIG9 is a schematic diagram of a process for forming a second type of solder ball using an automatic ball placement process;

[0028] FIG10 is a schematic diagram of a process for forming a second type of solder ball using an automatic ball planting process;

[0029] FIG11 is a schematic diagram of a process for forming a second type of solder ball using a ball electroplating process;

[0030] FIG12 is a schematic diagram of a process for forming a second type of solder ball using a ball electroplating process;

[0031] Explanation of the accompanying drawings: 1-memory; 11-signal particles; 2-adapter board; 21-first side; 22-second side; 221-first edge area; 222-second edge area; 223-third edge area; 224-fourth edge area; 23-first type solder ball; 231-first solder ball; 24-second type solder ball; 240-solder ball group; 241-second solder ball; 3-SOC substrate; 4-flux tank; 5-steel mesh; 51-mesh; 6-solder paste; 7-flux; x-first direction; y-second direction. DETAILED DESCRIPTION

[0032] As mentioned above, in the Hybrid PoP packaging design and process, the solder ball layout design under the adapter board will directly affect the chip wiring strategy planning (Fanout) packaging layout design of the SOC substrate. It may also directly affect the packaging mold flow (MD) process yield (for example, the problem of voids after MD mold flow molding) and the consistency of the solder ball height (Stand Off Height, SOH) value after reflow soldering between the stacked solder balls after thermal compression bond (TCB).

[0033] Figure 1 shows a schematic diagram of an existing interposer board. Specifically, the solder balls at the 3 and 9 o'clock positions (also called inter-layer solder balls) primarily support the interposer board and the SOC substrate, while the solder balls at the 6 and 12 o'clock positions are used for signal fan-out. In the prior art, the solder balls at the 3 and 9 o'clock positions are typically spaced the same as the solder balls at the 6 and 12 o'clock positions, and are arranged in multiple columns. Research has found that excessive inter-layer solder balls in the 3 and 9 o'clock positions will block the fan-out layout of other module signals on the SOC chip on these two sides of the SOC substrate, limiting the quality and quantity of SOC chip signal outputs in these directions. Furthermore, this will hinder the mold flow process during the plastic encapsulation process, making voids more likely to occur. As shown in Figure 2, if the solder balls at the 3 and 9 o'clock positions are removed, the total SOH height of the inter-layer solder balls cannot be guaranteed, affecting the consistency of solder ball height. In summary, current Hybrid PoP packaging designs cannot effectively address these multiple issues simultaneously.

[0034] To solve the above problems, in an embodiment of the present invention, the second surface of the adapter board is provided with a first type of solder balls arranged along a first direction and a second type of solder balls arranged along a second direction, and the first direction is different from the second direction. The first type of solder balls are connected to the signal particles of the memory and are connected to the SOC substrate signals to fan out the memory signals to the SOC substrate. The second type of solder balls are used to support the adapter board and the SOC substrate. The second type of solder balls have multiple solder ball groups, each solder ball group includes one or more second solder balls, and the spacing between adjacent solder ball groups along the second direction is greater than the spacing between adjacent second solder balls in the solder ball group. Therefore, the second type of solder balls can support the adapter board and the SOC substrate, ensure the high consistency of the solder balls after reflow soldering, and ensure that the mold flow passes quickly during the mold flow molding process, reduce the resistance to the mold flow, facilitate mold flow filling, reduce the probability of voids, and improve the mold flow molding yield. In addition, the spacing between adjacent solder ball groups can also provide corresponding packaging layout space, which is helpful for the SOC substrate packaging layout design.

[0035] In order to make the above-mentioned objects, features and beneficial effects of the embodiments of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0036] An embodiment of the present invention provides a hybrid vertical stacking package structure, referring to Figures 3 to 8 , the hybrid vertical stacking package structure includes: a memory 1, an adapter board 2, and a SOC substrate 3. The memory 1 has a signal particle 11 for transmitting a signal.

[0037] The adapter board 2 has a first surface 21 and a second surface 22 arranged opposite to each other. The first surface 21 faces the memory 1. The second surface 22 faces the SOC substrate 3. The second surface 22 is provided with first-type solder balls 23 arranged along a first direction x and second-type solder balls 24 arranged along a second direction y. The first-type solder balls 23 are connected to the signal particles 11 of the memory 1. The first-type solder balls 23 are used for signal fan-out of the memory 1. The second-type solder balls 24 are used to support the adapter board 2 and the SOC substrate 3. The second-type solder balls 24 have a plurality of solder ball groups 240, and each solder ball group 240 includes one or more second solder balls 241. Along the second direction y, the spacing D between adjacent solder ball groups 240 is greater than the spacing d between adjacent second solder balls 241 in the solder ball group 240. The first direction x is different from the second direction y. The SOC substrate is signal-connected to the first-type solder balls 23. It should be noted that the distance D between adjacent solder ball groups 240 and the distance d between adjacent second solder balls 241 are illustrated in FIG. 8 as an example, and are not illustrated in other figures.

[0038] As can be seen from the above, the second surface 22 of the adapter board 2 is provided with first-type solder balls 23 arranged along a first direction x and second-type solder balls 24 arranged along a second direction y, where the first direction x differs from the second direction y. The first-type solder balls 23 are connected to the signal particles 11 of the memory 1 and to the SOC substrate 3 signal, fanning out the memory 1 signals to the SOC substrate 3. The second-type solder balls 24 are used to support the adapter board 2 and the SOC substrate 3. The second-type solder balls 24 have multiple solder ball groups 240, each of which includes one or more second solder balls 241. The spacing between adjacent solder ball groups 240 along the second direction y is greater than the spacing between adjacent second solder balls 241 within the same solder ball group 240. Therefore, the second-type solder balls 24 not only support the adapter board 2 and the SOC substrate 3 to ensure high solder ball consistency after reflow, but also ensure rapid mold flow during the mold flow molding process, reducing mold flow resistance, facilitating mold flow filling, reducing the probability of voids, and improving mold flow molding yield. In addition, the spacing between adjacent solder ball groups 240 can also provide corresponding package layout space, which is helpful for SOC substrate package layout design.

[0039] In some embodiments, the number of second solder balls 241 in each solder ball group 240 can be the same or different. As shown in FIG5 , some solder ball groups 240 include one second solder ball 241, some solder ball groups 240 include two second solder balls 241, and some solder ball groups 240 include three second solder balls 241. In practice, a solder ball group 240 may include four or more second solder balls 241, and these examples are not given here.

[0040] As shown in Figures 5 to 8 , the spacing between adjacent solder ball groups 240 can be the same. In Figures 6 and 7 , each solder ball group 240 includes only one second solder ball 241, and the solder ball groups 240 are arranged at equal intervals along the second direction y. As shown in Figure 8 , the spacing between adjacent solder ball groups 240 can also be different, with the solder ball groups 240 being arranged at unequal intervals along the second direction y.

[0041] The second type solder balls 24 are arranged in a row along the second direction y, as shown in Figures 5 to 7. The second type solder balls 24 can also be arranged in multiple rows along the second direction y, such as two rows as shown in Figure 8. In practice, there can also be three or more rows.

[0042] When the second-type solder balls 24 are arranged in multiple columns along the second direction y, for two adjacent columns of second-type solder balls 24, the spacing between adjacent solder ball groups 240 in the column near the center of the adapter plate 2 is recorded as a first spacing, and the spacing between adjacent solder ball groups 240 in the column near the edge of the adapter plate 2 is recorded as a second spacing. The projection of the first spacing along the first direction x is overlapped by the projection of the second spacing along the first direction x. In this way, during the mold flow process, the resistance of the second solder balls 241 in the solder ball groups 240 in the columns near the edge to the mold flow can be minimized, allowing the mold flow to enter the adjacent solder ball groups 240, thereby improving the mold flow yield.

[0043] In a specific implementation, the first direction x is perpendicular to the second direction y.

[0044] In some non-limiting embodiments, the memory 1 may be a dynamic random access memory (DRAM), which may include a low power double data rate SDRAM (LPDDR) or the like.

[0045] In practice, according to the Joint Electronic Device Engineers Council (JEDEC) standard, for hybrid vertically stacked DRAM packages, the signal output directions of DRAM chips (such as LPDDR) are face-to-face, with the other two directions being ground. For ease of explanation, the signal output directions of DRAM chips can be defined as the 12 o'clock and 6 o'clock directions, and the other two directions being ground are defined as the 3 o'clock and 9 o'clock directions.

[0046] In some embodiments, the second surface 22 of the interposer 2 has a first edge region 221 and a second edge region 222 opposite to each other, and the first type solder balls 23 are located in the first edge region 221 and the second edge region 222. Furthermore, / or, the second surface 22 of the interposer 2 has a third edge region 223 and a fourth edge region 224 opposite to each other, and the second type solder balls 24 are located in the third edge region 223 and the fourth edge region 224.

[0047] In some embodiments, the first edge region 221 , the second edge region 222 , the third edge region 223 , and the fourth edge region 224 are distributed around the second surface 22 of the adapter plate 2 .

[0048] The first edge region 221 and the second edge region 222 correspond to the regions of the DRAM signal particles 11, that is, to the 12 o'clock and 6 o'clock directions of the signal particles used to output signals from the DRAM, respectively, to enable the first type solder balls 23 to fan out the signals of the memory 1. The signal output lines of the memory 1 only need to occupy the first type solder balls 23 of the first edge region 221 and the second edge region 222 of the adapter board 2.

[0049] The third edge region 223 and the fourth edge region 224 correspond to the 3 o'clock direction and the 9 o'clock direction of the DRAM, respectively. The second type solder balls 24 disposed in the third edge region 223 and the fourth edge region 224 support the SOC substrate 3 and the interposer 2 .

[0050] In some embodiments, the cross-section of the second type solder ball 24 along a direction parallel to the second surface 22 is waist-shaped (also called racetrack-shaped or oblong), as shown in FIG. 6 .

[0051] In some other embodiments, the cross-section of the second type solder ball 24 along a direction parallel to the second surface 22 is elliptical, as shown in FIG. 7 and FIG. 8 .

[0052] It should be noted that the cross-sections of the second type solder balls 24 along the direction parallel to the second surface 22 may all be waist-shaped. The cross-sections of the second type solder balls 24 along the direction parallel to the second surface 22 may all be elliptical. The cross-sections of the second type solder balls 24 along the direction parallel to the second surface 22 may partially be waist-shaped and partially be elliptical.

[0053] In some other embodiments, the cross-section of the second type solder ball 24 along a direction parallel to the second surface 22 is circular, as shown in FIG. 5 .

[0054] In a specific implementation, the first type solder ball 23 is spherical, that is, the cross section along a direction parallel to the second surface 22 is circular.

[0055] In some embodiments, the second type solder ball 24 has a waist-shaped cross section along a direction parallel to the second surface 22 , the long side of the second type solder ball 24 extends along the second direction y, and the length of the long side of the second type solder ball 24 is greater than the diameter of the first type solder ball 23 .

[0056] The length of the short side of the second type solder ball 24 is smaller than the diameter of the first type solder ball 23 .

[0057] It should be noted that, along the direction perpendicular to the second surface 22, the lengths of the long sides and / or short sides of the cross-section of the second type solder ball 24 at different distances from the second surface 22 may be different, as long as the length of the maximum long side of the second type solder ball 24 is greater than the diameter of the first type solder ball 23, and / or the length of the maximum short side of the second type solder ball 24 is less than the diameter of the first type solder ball 23.

[0058] In other embodiments, the cross-section of the second type solder ball 24 along a direction parallel to the second surface 22 is elliptical, the long axis of the second type solder ball 24 extends along the second direction y, and the length of the long axis of the second type solder ball 24 is greater than the diameter of the first type solder ball 23.

[0059] The length of the minor axis of the second type solder ball 24 is smaller than the diameter of the first type solder ball 23 .

[0060] It should be noted that, along the direction perpendicular to the second surface 22, the lengths of the major axis and / or minor axis of the cross-section of the second type solder ball 24 at different distances from the second surface 22 may be different, as long as the length of the maximum major axis of the second type solder ball 24 is greater than the diameter of the first type solder ball 23, and / or the length of the maximum minor axis of the second type solder ball 24 is less than the diameter of the first type solder ball 23.

[0061] In a specific implementation, the solder ball parameters of the first type solder ball 23 and the solder ball parameters of the second type solder ball 24 are determined based on at least one of the following parameters: the number of signal particles of the memory, the signal particle layout of the memory, the trace width of the adapter board, the trace spacing of the adapter board, the package size of the adapter board, etc.

[0062] The first type solder balls 23 may include a plurality of first solder balls 231 , and the plurality of first solder balls 231 may be arranged in an array along a first direction.

[0063] The solder ball parameters of the first type solder balls 23 may include the diameter of the first solder balls and the spacing between adjacent first solder balls 231. The spacing between adjacent first solder balls 231 may include the spacing between the first solder balls 231 along the first direction x or the second direction y.

[0064] In some embodiments, the spacing between adjacent first solder balls 231 refers to the spacing between the edges of the first solder balls 231. In this case, the spacing between solder ball groups 240 in the second type solder balls 24 refers to the spacing between the edges of the two closest second solder balls 241 in two adjacent solder ball groups 240. For example, assuming that two adjacent solder ball groups are referred to as the first solder ball group and the second solder ball group, along the second direction y, the spacing between the first solder ball group and the second solder ball group refers to the spacing between the edges of the second solder balls 241 in the first solder ball group and the second solder ball group that are closest to each other.

[0065] In other embodiments, the spacing between adjacent first solder balls 231 refers to the spacing between the centers of the first solder balls 231. In this case, the spacing between solder ball groups 240 in the second type solder ball 24 refers to the spacing between the centers of the two closest second solder balls 241 in two adjacent solder ball groups 240. For example, assuming that two adjacent solder ball groups are referred to as the first solder ball group and the second solder ball group, along the second direction y, the spacing between the first solder ball group and the second solder ball group refers to the spacing between the centers of the second solder balls 241 in the first solder ball group and the second solder ball group that are closest to each other.

[0066] In some embodiments, the solder ball parameters of the first type solder ball 23 and the solder ball parameters of the second type solder ball 24 may be determined in the following manner.

[0067] Specifically, based on determining that the packaging form is a hybrid vertical stacking package, the solder ball parameters of the first type solder ball 23 and the ball pad size and ball pad opening size of the first type solder ball 23 on the adapter board 2 are determined according to one or more of the number of signal particles of the memory 1, the signal particle layout of the memory 1, the trace width of the adapter board 2, the trace spacing of the adapter board 2, the packaging size of the adapter board 2, etc.

[0068] Obtain the particle data information (such as datasheet) of the memory 1 and the design requirements of the SOC chip (die), and determine the package size (PKG size) of the adapter board 2.

[0069] The layout of the first type solder balls 23 in the first edge region 221 and the second edge region 222 of the interposer 2 and the spacing between adjacent first solder balls 231 in the first type solder balls 23 are determined based on the lead direction, the number and layout of the particle signals on the memory 1 .

[0070] The spacing D between adjacent solder ball groups 240 in the second type solder ball 24 along the second direction y and the spacing d between adjacent second solder balls 241 in the solder ball group 240 along the second direction y are determined based on the spacing between adjacent first solder balls 231 in the first type solder balls 23. The spacing D between adjacent solder ball groups 240 is greater than the spacing d between adjacent second solder balls 241 in the solder ball group 240.

[0071] The spacing between adjacent first solder balls 231 in the first type solder balls 23 can be the same as the spacing between second solder balls 241 in the solder ball group 240 . The spacing between adjacent first solder balls 231 in the first type solder balls 23 can also be smaller than the spacing between second solder balls 241 in the solder ball group 240 .

[0072] In some non-limiting embodiments, the arrangement of the second type solder balls 241 may be simulated, and the optimal spacing between solder ball groups 240 and the optimal spacing between adjacent second solder balls 241 in a solder ball group 240 may be determined based on the simulation results.

[0073] The solder ball types of the first type solder balls 23 and the second type solder balls 24 are determined based on engineering requirements and the capabilities of the outsourced semiconductor assembly and testing (OSAT). Solder ball types can include implanted balls and electroplated balls. In other words, the first type solder balls 23 and the second type solder balls 24 can be formed using either an automated implant process or an electroplated ball process.

[0074] 9 and 10 , taking the second type of solder balls as an example, a specific process of forming the second type of solder balls using the automatic ball placement process may include the following steps 91 to 94 .

[0075] Step 91 : After obtaining the solder ball parameters of the first type solder balls and the solder ball parameters of the second type solder balls, design and manufacture an adapter board according to the solder ball parameters of the first type solder balls and the solder ball parameters of the second type solder balls.

[0076] Specifically, the ball pad size and ball pad opening size of the first type of solder balls and the ball pad size and ball pad opening size of the second type of solder balls on the adapter board 2 are determined according to the solder ball parameters.

[0077] When the cross-section of the second type solder ball parallel to the second direction is waist-shaped, the long side of the second type solder ball extends along the second direction, that is, along the flow direction of the mold flow, the long side of the second type solder ball is larger than the diameter of the first type solder ball, and the short side of the second type solder ball is smaller than the diameter of the first type solder ball.

[0078] When the cross-section of the second type solder ball parallel to the second direction is elliptical, the long axis of the second type solder ball extends along the second direction, that is, along the flow direction of the mold flow, the long axis of the second type solder ball is larger than the diameter of the first type solder ball, and the short axis of the second type solder ball is smaller than the diameter of the first type solder ball.

[0079] In step 92 , flux is dipped and dropped on corresponding positions of the transfer board, and the solder balls are placed on corresponding ball pad openings of the transfer board.

[0080] The original shape of the solder balls can be circular, eliminating the need for special stencil design. Flux is drawn from the flux pot 4 and dripped onto the corresponding location on the adapter board 2. Heat-soldering (reflow) is then performed, followed by flux cleaning. Flux is drawn again and dripped onto the corresponding location on the adapter board 2. This corresponds to steps 1001 to 1006 in Figure 10 .

[0081] Place the solder ball on the solder ball pad opening, which corresponds to step 1007 to step 1008 in FIG.

[0082] Step 93 , reflowing the inter-laminar solder balls and the transfer board at a set temperature to ensure that the inter-laminar solder balls melt and are in complete contact with the corresponding copper leak areas of the transfer board to form the shape of the second type of solder balls.

[0083] The set temperature may be in the range of 230°C to 237°C.

[0084] Since the long side or long axis of the solder ball pad opening is larger than the diameter of the first type solder ball, the tin expands toward the long side or long axis under the action of surface tension during the reflow process, forming the shape of the second type solder ball, which corresponds to step 1009 in FIG.

[0085] In step 94, after flux cleaning, the solder balls are placed and the solder ball height (SOH) and other consistency issues between the stacked layers are checked as required.

[0086] Step 94 corresponds to step 1010 in FIG. 10 .

[0087] 11 and 12 , taking the second type of solder balls as an example, a specific process of forming the second type of solder balls using the automatic ball placement process may include the following steps 1101 to 1105 .

[0088] Step 1101 : After obtaining solder ball parameters of the first type solder balls and solder ball parameters of the second type solder balls, design and manufacture an adapter board according to the solder ball parameters of the first type solder balls and solder ball parameters of the second type solder balls.

[0089] For the specific process of step 1101, please refer to step 91, which will not be repeated here.

[0090] Step 1102: Print flux on the adapter plate to facilitate the subsequent ball electroplating process.

[0091] This corresponds to step 1201 and step 1202 in Figure 12. The flux can be printed on the adapter plate 2 by manual printing. For example, the flux 7 can be printed through the mesh 51 on the steel mesh 5.

[0092] Step 1103: Print solder paste on the steel mesh, and the solder paste passes through the mesh holes on the steel mesh and falls onto the adapter board.

[0093] The stencil 5 has multiple meshes 51. The meshes 51 used to form the first type of solder balls are shaped to match the shape of the first type of solder balls, while the meshes 51 used to form the second type of solder balls are shaped to match the shape of the second type of solder balls. The solder paste 6 used to form the second type of solder balls is distributed in a waist-shaped or oval shape. The solder paste 6 used to form the first type of solder balls is distributed in a circular shape. This corresponds to steps 1203 to 1204 in FIG. 12 .

[0094] In step 1104 , the solder paste and the transfer board are reflowed at high temperature. The solder paste is in a molten state and is in complete contact with the corresponding copper leakage area of ​​the transfer board to electroplate a second type solder ball in a waist or oval shape.

[0095] Since the long side or long axis of the ball pad opening is larger than the diameter of the first type of solder ball, the solder paste 6 expands toward the long side or long axis under the action of surface tension during the reflow process, forming the shape of the second type of solder ball, which corresponds to step 1205 in FIG.

[0096] Step 1105 , after flux cleaning, ball planting is completed, and consistency issues such as solder ball height are checked according to the package outline drawing (POD) drawing requirements.

[0097] Step 1105 corresponds to step 1206 in FIG. 12 .

[0098] It should be understood that the term "and / or" as used herein simply describes an association between related objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the character " / " as used herein indicates that the related objects are in an "or" relationship.

[0099] The term "plurality" used in the embodiments of the present application refers to two or more.

[0100] The first, second, etc. descriptions appearing in the embodiments of this application are only for illustration and distinction of the description objects. There is no order, nor does it indicate any special limitation on the number of devices in the embodiments of this application, and cannot constitute any limitation on the embodiments of this application.

[0101] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A hybrid vertical stacking packaging structure, characterized in that: include: A memory having signal particles for transmitting signals; An adapter board, the adapter board having a first surface and a second surface arranged opposite to each other, the first surface facing the memory, the second surface facing the SOC substrate, the second surface being provided with first type solder balls arranged along a first direction and second type solder balls arranged along a second direction, the first type solder balls being connected to signal particles of the memory, the first type solder balls being used for signal fan-out of the memory, the second type solder balls being used for supporting the adapter board and the SOC substrate, the second type solder balls having a plurality of solder ball groups, each solder ball group including one or more second solder balls, the spacing between adjacent solder ball groups along the second direction being greater than the spacing between adjacent second solder balls in the solder ball group, wherein the first direction is different from the second direction; The SOC substrate is signal-connected to the first type solder balls.

2. The hybrid vertical stacking package structure according to claim 1, characterized in that: The first direction is perpendicular to the second direction.

3. The hybrid vertical stacking package structure according to claim 1 or 2, characterized in that: The second surface of the adapter plate has a first edge area and a second edge area relative to each other, and the first type of solder balls are located in the first edge area and the second edge area; and / or, the second surface of the adapter plate has a third edge area and a fourth edge area relative to each other, and the second type of solder balls are located in the third edge area and the fourth edge area.

4. The hybrid vertical stacking package structure according to claim 1, wherein: The cross section of the second type solder ball along a direction parallel to the second surface is circular, waist-shaped or elliptical.

5. The hybrid vertical stacking package structure according to claim 4, characterized in that: The first type of solder ball is spherical, the cross-section of the second type of solder ball along the direction parallel to the second surface is waist-shaped, the long side of the second type of solder ball extends along the second direction, and the length of the long side of the second type of solder ball is greater than the diameter of the first type of solder ball; or, the cross-section of the second type of solder ball along the direction parallel to the second surface is elliptical, the long axis of the second type of solder ball extends along the second direction, and the length of the long axis of the second type of solder ball is greater than the diameter of the first type of solder ball.

6. The hybrid vertical stacking package structure according to claim 5, characterized in that: The cross-section of the second type solder ball along the direction parallel to the second surface is waist-shaped, and the length of the short side of the second type solder ball is smaller than the diameter of the first type solder ball; or, the cross-section of the second type solder ball along the direction parallel to the second surface is elliptical, and the length of the short axis of the second type solder ball is smaller than the diameter of the first type solder ball.

7. The hybrid vertical stacking package structure according to claim 1, wherein: The second type of solder balls are formed by an automatic ball implantation process; or, the second type of solder balls are formed by an electroplating ball process.

8. The hybrid vertical stacking package structure according to claim 1, wherein: The solder ball parameters of the first type of solder ball and the solder ball parameters of the second type of solder ball are determined based on at least one of the following parameters: the number of signal particles of the memory, the signal particle layout of the memory, the routing width of the adapter board, the routing spacing of the adapter board, and the packaging size of the adapter board.

9. The hybrid vertical stacking package structure according to claim 1, wherein: The second type solder balls are arranged in one or more rows along the second direction.

10. The hybrid vertical stacking package structure according to claim 9, characterized in that: When the second type of solder balls are distributed and arranged into multiple columns along the second direction, for two adjacent columns of second type solder balls, the spacing between adjacent solder ball groups in a column close to the center of the adapter plate is recorded as a first spacing, and the spacing between adjacent solder ball groups in a column close to the edge of the adapter plate is recorded as a second spacing, and the projection of the first spacing along the first direction is covered by the projection of the second spacing along the first direction.

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