Apparatus for generating data recovery information of NAND flash memory

Abstract

The present invention relates to an apparatus for generating data recovery information of a NAND flash memory and, more specifically, to an apparatus for generating data recovery information of a NAND flash memory, capable of recovering memory data by enabling parameter data of a corresponding memory to be loaded in an environment in which an internal controller of a NAND flash memory device cannot be used.

Description

NAND flash memory data recovery information generation device

[0001] The present invention relates to a NAND flash memory data restoration information generation device capable of restoring memory data by enabling loading of parameter data of a NAND flash memory device in an environment where the internal controller of the memory device is unavailable.

[0002] Flash memory is a semiconductor memory that can read and write data with electrical signals and retains stored data even after power is cut off. It can read / write in specific units within the memory, but must be erased in block units when erasing, so it has the characteristic that an area that has been written once must be erased before it can be written.

[0003] These flash memories can be broadly categorized into parallel NOR and serial NAND. While NAND offers slower data read speeds than NOR, its memory blocks are divided into multiple pages, allowing for faster write and erase speeds. Furthermore, its unit density is superior to NOR's, making it primarily used in solid-state drives (SSDs) and USB memory devices.

[0004] USB memory devices consist of flash memory and a controller, each in the form of separate chips, integrated onto a single board. If the device experiences physical damage or malfunction, the memory chip corresponding to the flash memory can be removed from the device board and installed in a recovery device equipped with a data recovery program. The program then uses the memory chip's parameter data to reassemble the dump data, allowing data recovery.

[0005] However, even if you use a data recovery program, in order to access the data area of ​​the memory chip, it is necessary that the controller that controls the memory operation of the memory chip is functioning normally.

[0006] Therefore, if there is a problem with the controller itself and it does not operate properly, it is difficult to recover the data in the memory chip.

[0007] The purpose of the present invention is to solve the above problem, and the purpose of the present invention is to provide a NAND flash memory data restoration information generation device capable of restoring memory data by enabling loading of parameter data of the memory in an environment where the internal controller of the NAND flash memory device is unavailable.

[0008] In order to achieve the above object, a NAND flash memory data restoration information generating device according to one aspect of the present invention comprises: an image storage unit that acquires and stores an image of the front of a memory chip or an image of the front of a memory chip according to a user input; a string extraction unit that extracts a string included in an image stored in the image storage unit using a preset string extraction algorithm; an ID data acquisition module that determines whether a controller manufacturer name among a plurality of controller manufacturer names pre-stored is included in the string extracted by the string extraction unit, and if it is determined that the manufacturer name is included in the string, provides the controller manufacturer name included in the string as a query to an external ID data DB that pre-stores the controller product name and ID data of each memory product corresponding to the controller manufacturer name and outputs the controller product name and ID data when the controller manufacturer name is provided as a query, thereby acquiring the controller product name and ID data corresponding to the controller manufacturer name provided as a query; a data loading unit that, when the ID data is acquired, inputs a call command value and a call address value, which are commands for calling a parameter page area of ​​a memory chip, to an input / output terminal of the memory chip and loads the parameter data stored in the parameter page area; and a data loading unit that loads the parameter data written at a specific byte position of the loaded parameter data. A mode classification unit extracting binary data and assigning a mode classification value based on the result of comparing the extracted binary data with a plurality of preset protocol signature information, and a restoration information generation unit generating parameter page restoration information by matching the byte-by-byte item value for the corresponding mode classification value and the contents of the parameter data in byte order based on the preset parameter page length and byte-by-byte item value information corresponding to the assigned mode classification value.

[0009] According to the present invention, even if the internal controller of a NAND flash memory device is physically damaged or malfunctions and becomes unusable, the operation and commands of the memory chip can be executed, thereby obtaining parameter data required for data restoration.

[0010] In addition, according to the present invention, there is an advantage in that the controller manufacturer name indicated on the NAND flash memory can be recognized, ID data for the recognized controller manufacturer name can be acquired through an external ID data DB, and NAND flash memory data can be restored using the acquired ID data.

[0011] In addition, according to the present invention, a parameter page library for each memory chip can be constructed, so that information necessary for data recovery of the corresponding memory can be obtained in a short period of time using only a memory chip image or data recorded on the memory chip.

[0012] The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description of the claims.

[0013] FIG. 1 is a conceptual diagram briefly illustrating a NAND flash memory data recovery information generation device according to one embodiment of the present invention.

[0014] FIG. 2 is a block diagram illustrating a NAND flash memory data recovery information generation device according to one embodiment of the present invention.

[0015] Figure 3 is a diagram showing the operation timing of a command input by the initial command input section and data loading section of Figure 2.

[0016] FIG. 4 is a drawing showing a part of a parameter page corresponding to a case classified as a first classification value by the mode classification unit of FIG. 2.

[0017] Fig. 5 is a drawing showing an example of a parameter page corresponding to a case where the second classification value is classified by the mode classification unit of Fig. 2.

[0018] FIG. 6 is a flowchart illustrating a method for generating NAND flash memory data recovery information according to another embodiment of the present invention.

[0019] Figure 7 is a flowchart showing step S100 of Figure 6 in detail.

[0020] Figure 8 is a flowchart showing the data restoration process between steps S500 and S700 of Figure 6.

[0021] Figure 9 is a flowchart showing the library recommendation process after step S700 of Figure 6.

[0022] Figure 10 is an example showing a user interface for searching ID data in an external ID data DB.

[0023] In order to achieve the above object, a NAND flash memory data restoration information generating device according to one aspect of the present invention comprises: an image storage unit that acquires and stores an image of the front of a memory chip or an image of the front of a memory chip according to a user input; a string extraction unit that extracts a string included in an image stored in the image storage unit using a preset string extraction algorithm; an ID data acquisition module that determines whether a controller manufacturer name among a plurality of controller manufacturer names pre-stored is included in the string extracted by the string extraction unit, and if it is determined that the manufacturer name is included in the string, provides the controller manufacturer name included in the string as a query to an external ID data DB that pre-stores the controller product name and ID data of each memory product corresponding to the controller manufacturer name and outputs the controller product name and ID data when the controller manufacturer name is provided as a query, thereby acquiring the controller product name and ID data corresponding to the controller manufacturer name provided as a query; a data loading unit that, when the ID data is acquired, inputs a call command value and a call address value, which are commands for calling a parameter page area of ​​a memory chip, to an input / output terminal of the memory chip and loads the parameter data stored in the parameter page area; and a data loading unit that loads the parameter data written at a specific byte position of the loaded parameter data. A mode classification unit extracting binary data and assigning a mode classification value based on the result of comparing the extracted binary data with a plurality of preset protocol signature information, and a restoration information generation unit generating parameter page restoration information by matching the byte-by-byte item value for the corresponding mode classification value and the contents of the parameter data in byte order based on the preset parameter page length and byte-by-byte item value information corresponding to the assigned mode classification value.

[0024] The specific details of the present invention, including the problems to be solved, the means for solving them, and the effects of the invention, are included in the embodiments and drawings described below. The advantages and features of the present invention, as well as the methods for achieving them, will become clearer with reference to the embodiments described below in detail, along with the accompanying drawings. Like reference numerals designate like elements throughout the specification.

[0025] FIG. 1 is a conceptual diagram briefly illustrating a NAND flash memory data recovery information generating device according to an embodiment of the present invention, FIG. 2 is a block diagram illustrating a NAND flash memory data recovery information generating device according to an embodiment of the present invention, FIG. 3 is a diagram illustrating an operation timing diagram of a command input by an initial command input unit and a data loading unit of FIG. 2, FIG. 4 is a diagram illustrating a part of a parameter page corresponding to a case where the mode classification unit of FIG. 2 classifies the data into a first classification value, and FIG. 5 is a diagram illustrating an example of a parameter page corresponding to a case where the mode classification unit of FIG. 2 classifies the data into a second classification value.

[0026] In addition, FIG. 6 is a flowchart showing a method for generating NAND flash memory data recovery information according to another embodiment of the present invention, FIG. 7 is a flowchart showing step S100 of FIG. 6 in detail, FIG. 8 is a flowchart showing a data recovery process between steps S500 and S700 of FIG. 6, and FIG. 9 is a flowchart showing a library recommendation process after step S700 of FIG. 6.

[0027] Hereinafter, with reference to the drawings described above, a device and method for generating NAND flash memory data recovery information according to a preferred embodiment of the present invention will be described.

[0028] The present invention relates to a NAND flash memory data restoration information generation device and method that restores data of a memory chip (14) in a NAND flash memory device (10) in an environment where the memory controller (12) of the memory device is unusable.

[0029] First, referring to FIG. 1, a NAND flash memory data restoration information generation device (20) according to one embodiment of the present invention is configured to include an ID data acquisition module (100), a data loading unit (200), an image recognition module (300), a mode classification unit (400), a restoration information generation unit (500), a memory restoration module (600), and a library module (700).

[0030] The ID data acquisition module (100) determines whether a string extracted from a front or bottom image of a memory chip (14) includes one of a plurality of controller manufacturer names pre-stored in a controller manufacturer name DB (161), and if it is determined that the controller manufacturer name is included in the string, it queries the controller manufacturer name included in the string to an external ID data DB (90), thereby acquiring the controller product name and ID data corresponding to the controller manufacturer name provided as a query.

[0031] The ID data acquisition module (100) may determine that the controller manufacturer name is included in the string if a manufacturer name that matches a string extracted from the front or bottom image of the memory chip (14) by a preset ratio (e.g., 80%) or more exists in the controller manufacturer name DB (161), and may provide the controller manufacturer name belonging to the controller manufacturer name DB (161) as a query to the external ID data DB (90).

[0032] Here, the external ID data DB (90) is an online accessible external database that stores the controller product name and ID data of each memory product corresponding to the controller manufacturer name, and outputs the controller product name and ID data corresponding to the controller manufacturer name when the controller manufacturer name is provided as a query.

[0033] The ID data acquisition module (100) may have a controller manufacturer name DB (161) internally in which multiple controller manufacturer names are pre-stored.

[0034] It is preferable that the multiple controller manufacturer names stored in the controller manufacturer name DB (161) be composed of controller manufacturer names that can be searched in the external ID data DB (90).

[0035] Meanwhile, obtaining an image of the front or bottom surface of the memory chip (14) and extracting a string from the obtained image can be accomplished through an image recognition module (300) described later.

[0036] Fig. 10 is an example showing a user interface for searching ID data of an external ID data DB (90). The external ID data DB (90) may have a search unit (901) for receiving a controller manufacturer name and searching for a controller product name and ID data, a manufacturer name display area (903) for displaying the searched controller manufacturer name, a controller product name display area (905) for displaying a controller product name corresponding to the searched controller manufacturer name, an ID data display area (905) for displaying ID data corresponding to the searched controller manufacturer name, and a product image display area (909) for providing a user interface.

[0037] Through the above-described configuration, the NAND flash memory data recovery information generation device (20) according to one embodiment of the present invention can obtain the controller product name and ID data corresponding to the controller manufacturer name using an external ID data DB.

[0038] If ID data is not acquired through an external ID data DB (90), the ID data acquisition module (100) may acquire ID data of the memory chip (14) by applying an initial setting voltage corresponding to a preset voltage level to the power terminal (VDD) of the memory chip (14) and inputting an initial command value and an initial address value to the input / output terminal (I / Ox) of the memory chip (140) to execute an ID read command.

[0039] That is, if ID data is not acquired through the external ID data DB (90), the ID data acquisition module (100) may check the operating voltage of the memory chip (14) to operate the memory chip (14) and then acquire the ID data of the memory chip (14).

[0040] Here, the ID data may correspond to unique identification information for distinguishing one memory chip from another, and may include, for example, information such as a manufacturer ID, a manufacturer's identification code, a device ID, and a device identification code.

[0041] Specifically, the ID data acquisition module (100) may include a voltage application unit (110), an initial command input unit (120), an execution confirmation unit (130), a control unit (140), an execution condition storage unit (150), an external ID data acquisition unit (160), and a controller manufacturer name DB (161) as illustrated in FIG. 2.

[0042] The voltage application unit (110) applies a first voltage value corresponding to one of a plurality of preset voltage levels to the initial setting voltage (V S ) and set the initial setting voltage (V S) is applied to the power terminal (VDD) of the memory chip (14).

[0043] Here, the initial setting voltage (V S ) refers to the voltage to set the memory chip to operate, and the preset multiple voltage levels may include 1.2V, 1.8V, and 3.3V.

[0044] The initial command input section (120) is the initial setting voltage (V S ) based on the initial setting voltage (V S ) is authorized, an initial command (C) including an initial command value and an initial address value is input to the input / output terminal (I / Ox) of the memory chip (14). I ) is entered.

[0045] Here, the initial command (C I ) may include “90h”, which is an initial command value indicating a read ID command of ID data as shown in FIG. 3.

[0046] The execution confirmation unit (130) is the initial command (C I ) to check whether the ID data of the memory chip (14) is acquired by executing the ID extraction command corresponding to the input.

[0047] The execution confirmation unit (130) may check whether ID data has been loaded according to the initial command value (“90h”).

[0048] The control unit (140) determines whether ID data has been acquired after the external ID data acquisition unit (160) generates and transmits a query to the external ID data DB (90), and if it is determined that ID data has not been acquired after the query transmission, it controls the operation of the voltage application unit (110) and the initial command input unit (120) to acquire the ID data of the memory chip (14).

[0049] The control unit (140) may control the operation of the voltage application unit (110) and the initial command input unit (120) to obtain the ID data of the memory chip (14) based on the confirmation result of the execution confirmation unit (130).

[0050] If the ID data is not obtained as a result of the confirmation of the execution confirmation unit (130), the control unit (140) determines the currently set initial setting voltage (V) among the plurality of voltage levels. S ) and a second voltage value having a different voltage level than the initial setting voltage (V S ) and apply it to the power terminal (VDD) and then the initial command (C I ) can be controlled to repeatedly perform the operation of re-inputting the input / output terminal (I / Ox) until ID data is acquired.

[0051] For example, if the first voltage value (1.8 V) is set to the initial setting voltage (V) of the memory chip (14) S ) is set and authorized as the initial command (C I ) is entered but ID data is not obtained as a result of verification, the control unit (140) sets the second voltage value (3.3 V) to the initial setting voltage (V S ) to control the voltage application unit (110) to apply the reset initial setting voltage (V S ) is authorized, the initial command (C I ) can be controlled to re-enter the initial command input section (120).

[0052] At this time, if the ID data acquisition module (100) confirms that the ID data has been acquired by the execution confirmation unit (130), the voltage value applied to the voltage terminal (VDD) of the memory chip (14) at the time the ID data was acquired, i.e., the initial setting voltage (V S) may further include a configuration of an execution condition storage unit (150) that stores the value as voltage condition information that enables the operation and command execution of the memory chip (14).

[0053] The external ID data acquisition unit (160) determines whether one of a plurality of controller manufacturer names pre-stored in the controller manufacturer name DB (161) is included in a string extracted from the front or bottom image of the memory chip (14), and if it is determined that the controller manufacturer name is included in the string, it provides the controller manufacturer name included in the string to the external ID data DB (90) as a query, thereby obtaining the controller product name and ID data corresponding to the controller manufacturer name provided as a query.

[0054] The controller manufacturer name DB (161) stores controller manufacturer names that can be searched in the external ID data DB (90) as a string or text.

[0055] The data loading unit (200) checks the acquisition of ID data and then loads the parameter data (D) of the memory chip (14). P ) is for loading.

[0056] When ID data is acquired, the data loading unit (200) sends a command (C) to the input / output terminal (I / Ox) of the memory chip (14) to call the parameter page area of ​​the memory chip (14). P ) to enter the parameter data (D) stored in the parameter page area. P ) is loaded.

[0057] Here, the command to call the parameter page area (C P ) may include a call command value "ECh" indicating a call command for a parameter page including a manufacturer code (Make Code) and a device code (Device code) as illustrated in FIG. 3.

[0058] Command to call parameter page area (C P) may be a predefined command for each manufacturer corresponding to the ID data.

[0059] The image recognition module (300) acquires an image of the front or bottom surface of the memory chip (14), extracts a string included in the image, and provides the image and the extracted string to the ID data acquisition module (100) and the library module (700).

[0060] The image recognition module (300) may include a camera unit (310), an interface unit (320), an image storage unit (330), and a string extraction unit (350).

[0061] The camera unit (310) acquires an image of the front or bottom surface of the memory chip (14) and transmits it to the image storage unit (330).

[0062] The interface unit (320) receives an image of the front or bottom of the memory chip (14) from the user through the user terminal (30) and transmits it to the image storage unit (330).

[0063] The image storage unit (330) acquires and stores images transmitted from the camera unit (310) or interface unit (320).

[0064] The string extraction unit (350) extracts strings included in an image stored in the image storage unit (330) using a preset string extraction algorithm.

[0065] The mode classification unit (400) is a parameter data (D P ) to determine the mode classification value (M) for the memory chip (14).

[0066] The mode classification unit (400) loads parameter data (D) loaded by the data loading unit (200). P ) extracts binary data written at a specific byte location.

[0067] At this time, the binary data extracted by the mode classification unit (400) is parameter data (D P) is preferably the first to fourth byte data.

[0068] Meanwhile, the mode classification unit (400) can also convert the extracted binary data into an ASCII code-based string.

[0069] In this case, the mode classification unit (400) is parameter data (D P ) are converted into the first string (S1), the second string (S2), the third string (S3), and the fourth string (S4), respectively.

[0070] The mode classification unit (400) assigns a mode classification value (M) based on the result of comparing the extracted binary data or converted string data with a plurality of preset protocol signature information.

[0071] Here, the plurality of protocol signature information may include "ONFI", an abbreviation for Open NAND Flash Interface Working Group, and "JESD", an abbreviation for a memory standard document (JEDEC standard) published by JEDEC (Joint Electron Device Engineering Council).

[0072] When binary data is used as a comparison target, the mode classification unit (400) uses parameter data (D P ) is compared with the binary conversion value of the first string of the agreement signature information ("O", "J"), and the parameter data (D P ) is compared with the binary conversion value of the second string of the agreement signature information ("N", "E"), and the parameter data (D P ) is compared with the binary conversion value of the third string of the agreement signature information ("F", "S"), and the parameter data (D P ) is compared with the binary conversion value of the fourth string of the agreement signature information (“I”, “D”).

[0073] When the mode classification unit (400) uses string data as a comparison target, it compares the first string (S1) with "O" and "J", which are the first strings of the protocol signature information, the second string (S2) with "N" and "E", which are the second strings of the protocol signature information, the third string (S3) with "F" and "S", which are the third strings of the protocol signature information, and the fourth string (S4) with "I" and "D", which are the fourth strings of the protocol signature information.

[0074] The mode classification unit (400) assigns a first classification value as the mode classification value (M) when it corresponds to “ONFI” according to the above-described comparison result, a second classification value when it corresponds to “JESD”, and a third classification value when it does not correspond to the first classification value or the second classification value.

[0075] The restoration information generation unit (500) generates the parameter data (D) loaded by the data loading unit (200) and the byte-by-byte item value for the mode classification value (M) based on the preset parameter page length and byte-by-byte item value information corresponding to the mode classification value (M) provided by the mode classification unit (400). P ) to match the contents in byte order to restore the parameter page information (I R ) is created.

[0076] At this time, a DB may be further included that stores table data of a parameter page corresponding to the first classification value (ONFI) illustrated in FIG. 4 and table data of a parameter page corresponding to the second classification value (JESD) illustrated in FIG. 5 by dividing them by classification value.

[0077] Here, the table data of the parameter page may be table data in which byte numbers and item value information are mapped and stored, and the parameter page length may be determined by the last byte number corresponding to the lowest item of the table.

[0078] For example, the last byte number of the lowest entry in the parameter page table for "ONFI" is '767', and the last byte number of the lowest entry in the parameter page table for "JESD" is '1535', so the parameter page lengths of the first classification value (ONFI) and the second classification value (JESD) are different.

[0079] The data restoration module (600) restores parameter page information (I R ) to restore the data originally stored in the memory chip (14).

[0080] The data recovery module (600) restores the dump data of the memory chip (14) to parameter page recovery information (I R ) can be used to restore the data originally stored in the memory chip (14).

[0081] The data recovery module (600) is composed of a dump extraction unit (610), a descrambling unit (620), and a data restoration unit (630), as shown in FIG. 2. The dump extraction unit (610) performs an operation of extracting dump data of a memory chip (14), and the descrambling unit (620) converts the extracted dump data into parameter restoration information (I). R ) and then performs an operation of descrambling through an XOR operation, and the data restoration unit (630) may perform an operation of restoring data originally stored in the memory chip (14) based on the descrambled data.

[0082] The library module (700) is for constructing a library for parameter page information of a memory chip (14).

[0083] Specifically, the library module (700) may include a library creation unit (710) and a library recommendation unit (720), as illustrated in FIG. 2.

[0084] The library creation unit (710) restores parameter page information (IR ), the initial setting voltage value (V) applied to the power terminal (VDD) at the time of acquiring the ID data of the memory chip (14) S ), a parameter page library (L) can be created and stored by matching and storing the assigned mode classification value (M) corresponding to the parameter page.

[0085] In this case, the library creation unit (710) restores the parameter page restoration information (I) described above. R ), initial setting voltage value (V S ), the image stored in response to the memory chip (14) and the string value extracted therefrom are matched and stored together, so that a parameter page library (L) can be created and stored for each memory chip.

[0086] The library recommendation unit (720) is for recommending a parameter page library of a memory chip similar to a newly stored memory chip image based on a pre-stored parameter page library.

[0087] The library recommendation unit (720) can generate recommendation information recommending a parameter page library having the most similar string value based on the result of comparing the extracted target string with the parameter page library for each memory chip previously stored by the library generation unit (710) when the string extraction unit (350) extracts a target string included in the chip image by newly storing a chip image for a given memory chip in the image storage unit (330).

[0088] At this time, it is desirable that the pre-saved parameter page library has string values ​​extracted from the memory chip image pre-saved for each memory chip.

[0089]

[0090] Based on the description of the components illustrated in the aforementioned Figures 1 and 2, a method for generating NAND flash memory data recovery information according to the present invention will be described with reference to Figures 6 to 9 as follows.

[0091] A method for generating NAND flash memory data restoration information according to one embodiment of the present invention includes an ID data acquisition step (S100), a parameter data loading step (S200), a binary data extraction step (S300), a mode classification value assignment step (S400), a restoration information generation step (S500), a memory restoration step (S600), and a library creation step (S700).

[0092] First, the ID data acquisition step (S100) is a step for acquiring the ID data of the memory chip (14).

[0093] Here, the ID data may correspond to unique identification information for distinguishing one memory chip from another, and may include, for example, information such as a manufacturer ID, a manufacturer's identification code, a device ID, and a device identification code.

[0094] In the above S100 step, ID data can be obtained through an external ID data DB, or an initial setting voltage corresponding to a preset voltage level can be applied to the power terminal (VDD) of the memory chip (14), and an initial command value and an initial address value can be input to the input / output terminal (I / Ox) of the memory chip (14) to obtain the ID data of the memory chip (14) according to the execution of the ID read command.

[0095] Specifically, the S100 step, as illustrated in FIG. 7, is a step (S110) of acquiring and storing an image of the front of the memory chip (14) or a front image of the memory chip (14) according to a user input, and extracting a string included in the stored image corresponding to the memory chip (14) using a preset string extraction algorithm, a step (S120) of determining whether the controller manufacturer name is included in the extracted string, and if it is determined that the controller manufacturer name is included in the extracted string, a step (S130) of providing the controller manufacturer name included in the string to an external ID data DB (90) as a query to obtain the controller product name and ID data corresponding to the controller manufacturer name provided as a query, and if it is determined that the ID data is acquired from the external ID data (90) (S140), and if it is determined that the ID data is not acquired from the external ID data (90), a step of setting the first voltage value as an initial setting voltage (V S ) and the set initial setting voltage (V S ) to the power terminal (VDD) of the memory chip (14) (S160), and the initial command (C) to the input / output terminal (I / Ox) of the memory chip (14) I ) input step (S170), and the initial command (C I ) to check whether the ID data of the memory chip (14) is acquired by executing the ID extraction command corresponding to the input (S180), and if the ID data is not acquired as a result of the confirmation in step S180, the currently set initial setting voltage (V) among the plurality of voltage levels S ) and a second voltage value having a different voltage level than the initial setting voltage (V S ) and a step of controlling the steps S160, S170, S180 and S190 described above to be repeatedly performed until ID data is acquired.

[0096] Here, the initial setting voltage (V S) refers to the voltage to set the memory chip to operate, and the preset multiple voltage levels may include 1.2V, 1.8V, and 3.3V.

[0097] Here, the initial command (C I ) may include “90h”, which is an initial command value indicating a read ID command of ID data as shown in FIG. 3.

[0098] In the above step S180, it may be checked whether ID data has been loaded according to the initial command value (“90h”).

[0099] At this time, if it is confirmed that the ID data has been acquired, the voltage value applied to the voltage terminal (VDD) of the memory chip (14) at the time the ID data was acquired, i.e., the initial setting voltage (V S ) may further include a step (not shown) of storing the value as voltage condition information that enables the operation and command execution of the memory chip (14).

[0100] Next, the parameter data loading step (S200) is performed after confirming the acquisition of ID data by the above S100 step, and then the parameter data (D) of the memory chip (14) is loaded. P ) is for loading.

[0101] In the above S200 step, if ID data is obtained as a result of the confirmation in the above S180 step, a command (C) for calling the parameter page area of ​​the memory chip (14) is sent to the input / output terminal (I / Ox) of the memory chip (14). P ) to enter the parameter data (D) stored in the parameter page area. P ) is loaded.

[0102] Here, the command to call the parameter page area (C P) may include a call command value "ECh" indicating a call command for a parameter page including a manufacturer code (Make Code) and a device code (Device code) as illustrated in FIG. 3.

[0103] Next, the binary data extraction step (S300) is performed by extracting the parameter data (D) loaded in the S200 step. P ) extracts binary data written at a specific byte location.

[0104] At this time, the binary data extracted in the above S300 step is parameter data (D P ) is preferably the first to fourth byte data.

[0105] In addition, a step (S350) of converting the binary data extracted by the above step S300 into an ASCII code-based string may be further included.

[0106] In this case, parameter data (D) is obtained by the above S350 step. P ) are converted into the first string (S1), the second string (S2), the third string (S3), and the fourth string (S4), respectively.

[0107] Next, the mode classification value assignment step (S400) is to assign parameter data (D P ) to determine the mode classification value (M) for the memory chip (14).

[0108] In the above step S400, a mode classification value (M) is assigned based on the result of comparing the binary data extracted in the above step S300 or the string data converted in the above step S350 with a plurality of preset protocol signature information.

[0109] Here, the plurality of protocol signature information may include "ONFI", an abbreviation for Open NAND Flash Interface Working Group, and "JESD", an abbreviation for a memory standard document (JEDEC standard) published by JEDEC (Joint Electron Device Engineering Council).

[0110] In the above S400 step, when the binary data extracted in the S300 step is used as a comparison target, the parameter data (D P ) is compared with the binary conversion value of the first string of the agreement signature information ("O", "J"), and the parameter data (D P ) is compared with the binary conversion value of the second string of the agreement signature information ("N", "E"), and the parameter data (D P ) is compared with the binary conversion value of the third string of the agreement signature information ("F", "S"), and the parameter data (D P ) is compared with the binary conversion value of the fourth string of the agreement signature information (“I”, “D”).

[0111] In the above step S400, when the string data converted in the above step S350 is used as a comparison target, the first string (S1) is compared with "O" and "J", which are the first strings of the agreement signature information, the second string (S2) is compared with "N" and "E", which are the second strings of the agreement signature information, the third string (S3) is compared with "F" and "S", which are the third strings of the agreement signature information, and the fourth string (S4) is compared with "I" and "D", which are the fourth strings of the agreement signature information.

[0112] In the above S400 step, if it corresponds to “ONFI” according to the above-described comparison result, a first classification value is assigned, if it corresponds to “JESD”, a second classification value is assigned, and if it does not correspond to the first classification value or the second classification value, a third classification value is assigned as the mode classification value (M).

[0113] Next, the restoration information generation step (S500) is based on the parameter page length and byte-by-byte item value information set in response to the mode classification value (M) assigned in the S400 step, and the byte-by-byte item value for the corresponding mode classification value (M) and the parameter data (D) loaded by the data loading unit (200). P ) to match the contents in byte order to restore the parameter page information (I R ) is created.

[0114] At this time, between the S400 step and the S500 step, a step (not shown) of storing the table data of the parameter page corresponding to the first classification value (ONFI) shown in FIG. 4 and the table data of the parameter page corresponding to the second classification value (JESD) shown in FIG. 5 by dividing them by classification value may be further included.

[0115] Here, the table data of the parameter page may be table data in which byte numbers and item value information are mapped and stored, and the parameter page length may be determined by the last byte number corresponding to the lowest item of the table.

[0116] Next, the memory restoration step (S600) restores the parameter page restoration information (I) generated in the S500 step. R ) to restore the data originally stored in the memory chip (14).

[0117] In the above S600 step, the dump data of the memory chip (14) is extracted to restore the parameter page information (I R) and then descrambled using an XOR operation, the data originally stored in the memory chip (14) can be restored.

[0118] Specifically, the above S600 step includes a step (S612) of extracting dump data of a memory chip (14) as shown in FIG. 8, and a step of restoring the extracted dump data as parameter restoration information (I R ) and then descrambling through an XOR operation (S614 to S620), and restoring the data originally stored in the memory chip (14) based on the descrambled data (S630).

[0119] Next, the library creation step (S700) is to build a library for parameter page information of the memory chip (14).

[0120] In the above S700 step, parameter page restoration information (I R ), the initial setting voltage value (V) applied to the power terminal (VDD) at the time of acquiring the ID data of the memory chip (14) S ), a parameter page library (L) is created and stored by matching and storing the assigned mode classification value (M) corresponding to the parameter page.

[0121] At this time, before the S700 step, a step (S730) of acquiring and storing an image of the front of the memory chip (14) or an image of the front of the memory chip (14) according to user input, and a step (S750) of extracting a string included in the image stored corresponding to the memory chip (14) using a preset string extraction algorithm may be further included.

[0122] Here, the above S730 step may be to acquire and store an image of the front or bottom of the memory chip (14) captured by the camera, or to acquire and store an image of the front or bottom of the memory chip (14) input by the user through the user terminal (30).

[0123] Here, the S750 step may be to extract a string included in the memory chip image stored in the S730 step using a preset string extraction algorithm.

[0124] In this case, the above S700 step restores parameter page information (I) for the memory chip (14). R ) and the voltage value (V) applied to the power terminal (VDD) at the time of acquiring the ID data of the memory chip (14) S ) and the mode classification value (M) assigned corresponding to the parameter page of the memory chip (14), and the image stored corresponding to the memory chip (14) by the steps S730 and S750 and the string value extracted therefrom are matched and stored together, thereby generating and storing the parameter page library (L) for each memory chip.

[0125] Meanwhile, in the case of a method for generating NAND flash memory data recovery information according to one embodiment of the present invention, in addition to the processes described above, the library recommendation process (S762, S764) illustrated in FIG. 9 may be further included.

[0126] The above library recommendation process is performed on the premise that each memory chip image and the string value extracted therefrom are matched and stored in the parameter page library for each memory chip stored in step S700, and specifically, may include a step (S730) of newly acquiring and storing a chip image for a given memory chip, a step (S750) of extracting a target string included in the stored chip image using a preset string extraction algorithm, and a step (S764) of generating recommendation information that recommends a parameter page library having the most similar string value based on a result of comparing the extracted target string with the parameter page library for each memory chip.

[0127] Accordingly, according to the present invention described above, even if the internal controller of a NAND flash memory device is physically damaged or malfunctions and becomes unusable, the operation and commands of the memory chip can be executed, thereby obtaining parameter data required for data restoration.

[0128] In addition, according to the present invention, a parameter page library for each memory chip can be constructed, so that information necessary for data recovery of the memory can be obtained in a short period of time using only a memory chip image or data recorded in the memory chip.

[0129] Although the present invention has been described in detail through preferred embodiments, the present invention is not limited thereto and may be implemented in various ways within the scope of the claims.

[0130] In particular, since the foregoing has broadly described the features and technical strengths of the present invention so as to enable a better understanding of the claims of the invention to be described later, it should be recognized by those skilled in the art that the concept and specific embodiments of the present invention described above can be immediately used as a basis for designing or modifying other shapes for carrying out similar purposes to the present invention.

[0131] Furthermore, it will be understood that the above-described embodiment is merely one embodiment according to the present invention, and that various modifications and changes can be implemented within the scope of the technical idea of ​​the present invention by those skilled in the art. Therefore, the disclosed embodiment should be considered from an illustrative rather than a limiting perspective, and such various modifications and changes are also included within the scope of the technical idea of ​​the present invention, as indicated in the claims of the present invention described above, and all differences within the scope equivalent thereto should be interpreted as being included in the present invention.

[0132] The present invention can be used in the industrial field to restore memory data by enabling loading of parameter data of a NAND flash memory device in an environment where the internal controller of the memory device is unavailable.

Claims

1. A NAND flash memory data restoration information generation device that restores data in a memory device in an environment where the memory controller of the NAND flash memory device is unavailable and generates restoration information, An image storage unit that acquires and stores an image of the front surface of a memory chip or an image of the front surface of the memory chip according to user input; A string extraction unit that extracts a string included in an image stored in the image storage unit using a preset string extraction algorithm; An ID data acquisition module which determines whether a controller manufacturer name among a plurality of controller manufacturer names that are pre-stored is included in a string extracted from the above string extraction unit, and if it is determined that the manufacturer name is included in the string, stores the controller product name and ID data of each memory product corresponding to the controller manufacturer name, and provides the controller manufacturer name included in the string as a query to an external ID data DB that outputs the controller product name and ID data when the controller manufacturer name is provided as a query, thereby acquiring the controller product name and ID data corresponding to the controller manufacturer name provided as the query; When the above ID data is acquired, a data loading unit that inputs a call command value and a call address value, which are commands for calling the parameter page area of ​​the memory chip, to the input / output terminal of the memory chip to load the parameter data stored in the parameter page area; A mode classification unit that extracts binary data recorded at a specific byte location of the loaded parameter data and assigns a mode classification value based on the result of comparing the binary data with a plurality of preset protocol signature information; and A restoration information generation unit that generates parameter page restoration information by matching the byte-by-byte item values ​​for the corresponding mode classification value and the contents of the parameter data in byte order based on the preset parameter page length and byte-by-byte item value information corresponding to the given mode classification value; A NAND flash memory data recovery information generating device including:

2. In paragraph 1, The above ID data acquisition module, If ID data is not acquired through the external ID data DB, an initial setting voltage corresponding to a preset voltage level is applied to the power terminal of the memory chip, and an initial command value and an initial address value are input to the input / output terminal of the memory chip to acquire the ID data of the memory chip according to the execution of the ID read command. A device for generating NAND flash memory data recovery information.

3. In the second paragraph above, It further includes a library generation unit that creates and stores a parameter page library by matching and storing the parameter page restoration information, the voltage value applied to the power terminal at the time of acquiring ID data from the ID data acquisition module, and the mode classification value assigned in response to the parameter page. A device for generating NAND flash memory data recovery information.

4. In paragraph 1, A data restoration module that extracts dump data of the above memory chip, reassembles it based on the parameter page restoration information, and then restores the data originally stored in the above memory chip by descrambling it through an XOR operation; A NAND flash memory data recovery information generating device further comprising:

5. In paragraph 1, The command for calling the above parameter page area is a command predefined by each manufacturer corresponding to the above ID data. A device for generating NAND flash memory data recovery information.

Images