Semiconductor processing device and semiconductor processing method therefor

Abstract

Disclosed in the present invention are a semiconductor processing system and a semiconductor processing method therefor. A semiconductor processing device comprises a first chamber portion and a second chamber portion. The first chamber portion and / or the second chamber portion have / has a groove channel. The groove channel can form a closed channel by means of the blocking of the surface of a wafer; and a target fluid is driven into the closed channel, and the fluid entering the closed channel can advance along the closed channel and flows out of the closed channel. Within a period of time, there are a plurality of sections of target fluid in the closed channel, and two adjacent sections of target fluid are isolated by spacer fluid. In this way, the effective time of contact between the target fluid with the wafer at each point can be increased and the extraction efficiency of contaminants on the surface of the wafer can be improved without increasing the volume of the target fluid and with almost no increase in a scanning time.

Description

Semiconductor processing device and semiconductor processing method thereof

Technical field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor processing device and a semiconductor processing method thereof. [Background Technology]

[0002] As semiconductor size continues to decrease, impurities contained in the silicon wafer material itself have become a requirement that needs to be detected and monitored in quality control. However, current wafer contamination detection technology is limited to extracting and detecting impurity contamination on the wafer surface or performing destructive testing on the entire wafer material.

[0003] Chinese patent application number 201510836143.0 discloses a method for wafer contamination detection using a closed channel in a microchamber. As shown in Figure 8, the closed channel 813 is connected to the outside through a first through hole 811 and a second through hole 812. A certain volume of extraction solution 820 is driven into the closed channel 813 through the first through hole 811. The extraction solution entering the closed channel 813 is pushed forward by nitrogen along the guide of the closed channel (i.e., spirally moving forward in the direction R1). The extraction solution 820 flowing through the surface of the wafer flows out through the second through hole 812 and is extracted, that is, the extraction solution 820 is used to scan the surface of the wafer, so that the contaminants on the surface of the wafer can be extracted and detected using a certain volume of extraction solution 820. However, the traditional extraction method shown in Figure 8 can only load a section of extraction solution 820 per scan. The volume of the extraction solution is generally 1 ml, and the nitrogen push rate is generally 20 ml / min. It can be calculated that the time each point on the wafer contacts the extraction solution is 1 ml / (20 ml / min) = 0.05 min = 3 s. The contact time at each point on the wafer has a greater impact on insoluble contamination. Generally speaking, the longer the contact time, the less contamination remains on the wafer and the higher the extraction efficiency. To improve extraction efficiency, feasible methods are to increase the volume of the extraction solution or reduce the nitrogen push rate. However, increasing the solution volume will increase the detection limit of the equipment, and reducing the nitrogen push rate will increase the scanning time, affecting production capacity.

[0004] It should be noted that the above introduction to the technical background is merely intended to provide a clear and complete description of the technical solutions of this application and facilitate understanding by those skilled in the art. Simply because these solutions are described in the background technology section of this application, it should not be assumed that the above technical solutions are well known to those skilled in the art.

[0005] [Summary of the invention]

[0006] The object of the present invention is to provide a semiconductor processing system and a semiconductor processing method thereof, which can increase the effective contact time of the target fluid at each point of the wafer without increasing the volume of the target fluid and almost without increasing the scanning time, thereby improving the extraction efficiency of pollutants on the wafer surface.

[0007] To achieve the above-mentioned objectives, the present invention provides a semiconductor processing device, which includes: a first chamber portion, a second chamber portion that can move between an open position and a closed position relative to the first chamber portion, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, and a wafer can be accommodated in the micro chamber, and when the second chamber portion is in the open position relative to the first chamber portion, the wafer can be taken out or put in, and the first chamber portion and / or the second chamber portion have a groove channel formed by a depression from the inner wall surface of the corresponding chamber portion, and a first passage from the outside passing through the corresponding chamber portion to communicate with the first position of the groove channel. The first through hole and the second through hole pass through the corresponding chamber portion from the outside to communicate with the second position of the groove channel. When the second chamber portion is in the closed position relative to the first chamber portion and the wafer is accommodated between the first chamber portion and the second chamber portion, the groove channel forms a closed channel with the help of the obstruction of the surface of the wafer. The closed channel is connected to the outside through the first through hole and the second through hole. The target fluid is driven into the closed channel through the first through hole. The target fluid entering the closed channel can move along the closed channel. At this time, the target fluid can contact a part of the surface of the wafer. The target fluid flowing through the surface of the wafer flows out through the second through hole and is extracted. Over a period of time, there are multiple sections of target fluid in the closed channel, and two adjacent sections of target fluid are separated by a spacer fluid.

[0008] According to another aspect of the present invention, there is provided a semiconductor processing method based on the semiconductor processing apparatus described above, comprising: dividing a target fluid into multiple segments, and isolating two adjacent segments of the target fluid using a spacer fluid; allowing the multiple segments of the target fluid separated by the spacer fluid to enter a closed channel through a first through hole, so that within a period of time, the closed channel has multiple segments of the target fluid, and the two adjacent segments of the target fluid are isolated by the spacer fluid; driving the multiple segments of the target fluid separated by the spacer fluid in the closed channel to flow out of the closed channel through a second through hole using a driving fluid; and merging the multiple segments of the target fluid flowing out of the closed channel for detection.

[0009] Compared with the prior art, the present invention divides the target fluid into multiple segments and uses a spacer fluid to isolate two adjacent segments of the target fluid, thereby obtaining multiple segments of the target fluid isolated by the spacer fluid, and driving the multiple segments of the target fluid isolated by the spacer fluid into the closed channel. In this way, without increasing the volume of the target fluid and almost without increasing the scanning time, the effective contact time of the target fluid at each point of the wafer can be increased, thereby improving the extraction efficiency of pollutants on the wafer surface.

[0010] It should be understood that this summary is provided only for the purpose of summarizing some embodiments in order to provide a basic understanding of some aspects of the present invention. Therefore, the above-mentioned embodiments are merely examples and should not be interpreted as narrowing the scope or concept of the present invention in any way. The features, aspects, and advantages of the various embodiments will become apparent upon reading the following detailed description and the accompanying drawings, which illustrate the principles of some embodiments by way of example.

Brief Description of the Drawings

[0011] The present invention will be more readily understood with reference to the accompanying drawings and the following detailed description, wherein like reference numerals correspond to like structural components, and wherein:

[0012] FIG1a is a schematic cross-sectional view of a semiconductor processing apparatus according to an embodiment of the present invention;

[0013] FIG1b is an enlarged schematic diagram of circle A in FIG1a;

[0014] FIG1c is an enlarged schematic diagram of circle B in FIG1a;

[0015] FIG2 a is a top view of the second chamber portion in one embodiment of the present invention;

[0016] FIG2 b is an enlarged schematic diagram of circle C in FIG2 a ;

[0017] FIG2c is an enlarged schematic diagram of circle D in FIG2a;

[0018] FIG2 d is a schematic cross-sectional view along the section line AA in FIG2 a ;

[0019] FIG2e is an enlarged schematic diagram of circle E in FIG2d;

[0020] FIG2 f is an enlarged schematic diagram of circle F in FIG2 a ;

[0021] FIG3 a is a top view of the first chamber portion in one embodiment of the present invention;

[0022] FIG3 b is an enlarged schematic diagram of circle G in FIG3 a ;

[0023] FIG3 c is an enlarged schematic diagram of circle H in FIG3 a ;

[0024] FIG3 d is a schematic cross-sectional view along the section line BB in FIG3 a ;

[0025] FIG3e is an enlarged schematic diagram of circle I in FIG3d;

[0026] FIG3 f is an enlarged schematic diagram of circle J in FIG3 a ;

[0027] FIG4 a is a schematic cross-sectional view of a semiconductor processing device according to another embodiment of the present invention;

[0028] Figure 4b is an enlarged schematic diagram of circle K in Figure 4a;

[0029] FIG5 a is a top view of the first chamber portion in one embodiment of the present invention;

[0030] FIG5b is a schematic cross-sectional view along the section line CC in FIG5a;

[0031] FIG5c is an enlarged schematic diagram of circle L in FIG5a;

[0032] FIG6 a is a top view of the second chamber portion in another embodiment of the present invention;

[0033] FIG6b is an enlarged schematic diagram along circle M in FIG6a;

[0034] FIG. 7 is a schematic flow chart of a semiconductor processing method according to an embodiment of the present invention.

[0035] FIG8 is a schematic diagram of the structure of wafer contamination detection using a closed channel in a microchamber in the prior art;

[0036] FIG9 is a schematic structural diagram of a semiconductor processing apparatus according to the present invention that utilizes a closed channel for wafer contamination detection;

[0037] FIG. 10 is a schematic flow chart of a semiconductor processing method according to an embodiment of the present invention. [Specific embodiment]

[0038] Some embodiments of the present invention will be described more fully below with reference to the accompanying drawings, some, but not all, of which are listed. Indeed, various embodiments of the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make this disclosure thorough and complete and will fully convey the scope of the invention to those skilled in the art. For example, unless otherwise stated, referring to something as first, second, etc. should not be construed as implying a particular order. Furthermore, something may be described as being higher than something (unless otherwise stated) when it is actually lower than something, and vice versa; similarly, something described as being on the left may be on the right, and vice versa. The same reference figure number always represents the same element.

[0039] The details of the present invention can be more clearly understood in conjunction with the accompanying drawings and the description of the specific embodiments of the present invention. However, the specific embodiments of the present invention described herein are for illustrative purposes only and are not to be construed as limiting the present invention in any way. Based on the teachings of the present invention, skilled artisans can conceive of any possible variations based on the present invention, all of which should be considered within the scope of the present invention. It should be noted that when an element is referred to as being "disposed on" another element, it can be directly on the other element or there can be an intermediate element. When an element is considered to be "connected to" another element, it can be directly connected to the other element or there can be an intermediate element. The terms "mounted," "connected," and "connected" should be interpreted broadly. For example, they can refer to mechanical or electrical connections, internal communication between two elements, direct connection, or indirect connection through an intermediary. Those skilled in the art will understand the specific meanings of these terms based on the specific circumstances. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only embodiments.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are intended only to describe specific embodiments and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0041] Part 1

[0042] In order to better extract and detect contaminants in the wafer, a semiconductor processing device is also proposed in this application.

[0043] Figure 1a is a schematic cross-sectional view of a semiconductor processing apparatus 100 according to one embodiment of the present invention. Figure 1b is an enlarged schematic view of circle A in Figure 1a; and Figure 1c is an enlarged schematic view of circle B in Figure 1a. As shown in Figure 1a, the semiconductor processing apparatus 100 includes a first chamber section 110 and a second chamber section 120. In this embodiment, the first chamber section 110 is the upper chamber section, and the second chamber section 120 is the lower chamber section. In other embodiments, the lower chamber section may be defined as the first chamber section, and the upper chamber section may be defined as the second chamber section.

[0044] The first chamber portion 110 includes an upper chamber plate 111 and a first flange 112 extending downward from a periphery of the upper chamber plate. The second chamber portion 120 includes a lower chamber plate 121 and a first groove 122 recessed downward from a periphery of the lower chamber plate 121 .

[0045] The first chamber portion 110 is movable between an open position and a closed position relative to the second chamber portion 120. When the first chamber portion 110 is in the open position relative to the second chamber portion 120, a wafer can be placed on or removed from the inner wall surface of the second chamber portion 120. When the first chamber portion 110 is in the closed position relative to the second chamber portion 120, the first flange 112 cooperates with the first groove 122 to form a sealed microchamber between the upper chamber plate and the lower chamber plate. The wafer can be accommodated in the microchamber to await subsequent processing.

[0046] Figure 2a is a top view of the second chamber portion 120 according to one embodiment of the present invention. Figure 2b is an enlarged schematic diagram of circle C in Figure 2a. Figure 2c is an enlarged schematic diagram of circle D in Figure 2a. Figure 2d is a cross-sectional schematic diagram along section line AA in Figure 2a. Figure 2e is an enlarged schematic diagram of circle E in Figure 2d. Figure 2f is an enlarged schematic diagram of circle F in Figure 2a.

[0047] As shown in Figures 2a-2f, the second chamber portion 120 includes a groove channel 124 formed by a depression formed from an inner wall surface 123 of the second chamber portion 120 facing the microchamber, a first through-hole 125 extending from the outside through the second chamber portion to communicate with a first position of the groove channel 124, and a second through-hole 126 extending from the outside through the second chamber portion to communicate with a second position of the groove channel 124. The cross-section of the groove channel 124 can be U-shaped, V-shaped, or semicircular, or other shapes. The number of through-holes within the groove channel 124 can be greater than or equal to one.

[0048] As shown in Figures 1a, 1b and 1c, when the first chamber portion 110 is in the closed position relative to the second chamber portion 120 and the wafer 200 is accommodated in the microchamber, one surface (lower surface) of the wafer 200 abuts against the inner wall surface 123 forming the groove channel 124. At this time, the groove channel 124 forms a closed channel with the help of the obstruction of the surface of the wafer 200. The closed channel is connected to the outside through the first through hole 125 and the second through hole 126. During use, the processing fluid can enter the closed channel through the first through hole 125, and the fluid entering the closed channel can move along the closed channel. At this time, the processing fluid can contact and process a partial area of ​​the surface of the wafer 200. The fluid that has processed the surface of the wafer 200 can flow out through the second through hole 126 and be extracted. In this way, not only can the flow direction and flow speed of the processing fluid be accurately controlled, but the amount of processing fluid used can also be greatly saved.

[0049] In one embodiment, as shown in Figures 2a, 2b, and 2c, the groove channel 124 is formed in a spiral shape, wherein the first through-hole 125 is located in the central region of the spiral groove channel (the region indicated by circle D), and the second through-hole 126 is located in the peripheral region of the spiral groove channel 124 (the region indicated by circle C). The first through-hole 125 can be used as an inlet, and the second through-hole 126 can be used as an outlet. In other embodiments, the second through-hole can be located in the central region of the spiral groove channel, while the second through-hole can be located in the peripheral region of the spiral groove channel.

[0050] In one embodiment, as shown in Figures 2d, 2e, and 2f, the first through-hole 125 includes a first buffer opening portion 125a that is directly connected to the groove channel 124 and is deeper and wider than the groove channel 124, and a first through-hole portion 125b that is directly connected to the first buffer opening portion 125a. The provision of the first buffer opening portion 125a prevents the initial velocity of the processing fluid entering through the first through-hole 125 from being too high, resulting in over-processing of the central area of ​​the wafer. The second through-hole 126 includes a second buffer opening portion 126a that is directly connected to the groove channel 124 and is deeper and wider than the groove channel 124, and a second through-hole portion 126b that is directly connected to the second buffer opening portion 126a. The provision of the second buffer opening portion 126a prevents the processing fluid from being unable to be discharged from the second through-hole 126 in a timely manner and overflowing. Preferably, the first buffer opening portion 125a can be a tapered groove, and the second buffer opening portion 126a can be a cylindrical groove.

[0051] Figure 3a is a top view of the first chamber portion 110 in one embodiment of the present invention; Figure 3b is an enlarged schematic diagram of circle G in Figure 3a; Figure 3c is an enlarged schematic diagram of circle H in Figure 3a; Figure 3d is a sectional schematic diagram along the section line BB in Figure 3a; Figure 3e is an enlarged schematic diagram of circle I in Figure 3d; Figure 3f is an enlarged schematic diagram of circle J in Figure 3a.

[0052] 3a to 3f , the first chamber portion 110 includes an upper chamber plate 111 and a first flange 112 extending downward from the periphery of the upper chamber plate 111. The first chamber portion 110 has a groove channel 113 recessed from an inner wall surface 113 of the first chamber portion facing the microchamber. The groove walls of the groove channels 114 formed on the inner wall surface 113 of the first chamber portion (the portion between adjacent groove channels 114) correspond to the groove walls of the groove channels 124 formed on the inner wall surface 123 of the second chamber portion 120 (the portion between adjacent groove channels 124) ( FIG. 1b and FIG. 1c ). Thus, when the first chamber portion 110 is in the closed position relative to the second chamber portion 120 and the wafer 200 is accommodated in the microchamber, the groove walls of the groove channels 114 of the first chamber portion 110 can press against the corresponding position of the wafer 200, allowing the wafer 200 to more tightly abut against the groove walls of the groove channels 124 of the second chamber portion 120, thereby improving the sealing performance of the finally formed closed channel. In addition, the groove walls of the groove channels 114 formed on the inner wall surface 113 of the first chamber portion (the portion between adjacent groove channels 114) and the groove walls of the groove channels 124 formed on the inner wall surface 123 of the second chamber portion 120 (the portion between adjacent groove channels 124) can also be arranged in an interlaced manner.

[0053] In another alternative embodiment, the structures of the first chamber portion 110 and the second chamber portion can be interchangeable or have the same structure. In this case, the upper surface of the wafer 200 forms a closed channel together with the groove of the first chamber portion 110. The processing fluid flowing through the closed channel can process the upper surface or the lower surface of the wafer 200, or both surfaces simultaneously.

[0054] Figure 4a is a schematic cross-sectional view of another embodiment of a semiconductor processing apparatus 200 according to the present invention; Figure 4b is an enlarged schematic view of the circle K in Figure 4a. The semiconductor processing apparatus 400 in Figure 4a differs from the semiconductor processing apparatus in Figure 1a in that the structure of the first chamber portion 410 in Figure 4a differs from that of the first chamber portion 110 in Figure 1a. Figure 5a is a top view of the first chamber portion 410 according to one embodiment of the present invention; Figure 5b is a schematic cross-sectional view taken along section line CC in Figure 5a; and Figure 5c is an enlarged schematic view of the circle L in Figure 5a. As shown in Figures 5a to 5c, the first chamber portion 410 includes an upper chamber plate 411, a first flange 412, a first inner wall surface 413 facing the microchamber, a second groove 414, a second flange 415 located between the first inner wall surface 413 and the second groove 414, and a channel 416 located in the center of the first inner wall surface 413. The second flange 415 abuts against the wafer 200 and the first inner wall surface 413 to form a closed space, which is connected to the outside world through the channel 416. Fluid can enter this closed space through the channel 416 to generate pressure, and force the wafer 200 to abut more tightly against the groove wall of the groove channel 124 of the second chamber portion 120, thereby improving the sealing performance of the resulting closed channel.

[0055] Figure 6a is a top view of another embodiment of the second chamber portion 620 of the present invention; Figure 6b is an enlarged schematic view along circle M in Figure 6a. Multiple grooves 624 are formed by recessing the inner wall surface 623 of the second chamber portion 620 facing the microchamber. Figure 6a shows five grooves 624, but other numbers may be used in other embodiments. Each groove 624 corresponds to a first through-hole 625 and a second through-hole 626. The different grooves 624 of the second chamber portion 620 are located in different regions of the inner wall surface 623. This allows for independent treatment of different regions.

[0056] The present invention also provides a semiconductor processing method using the semiconductor processing apparatus. As shown in FIG7 , the semiconductor processing method 700 includes the following steps.

[0057] Step 710 , placing the second chamber portion 120 in an open position relative to the first chamber portion 110 ;

[0058] Step 720 , placing the wafer between the second chamber portion 120 and the second chamber portion 110 ;

[0059] Step 730 , placing the second chamber portion 120 in a closed position relative to the first chamber portion 110 ;

[0060] Step 740 , injecting fluid into the groove channel 124 through the first through hole 125 ;

[0061] Step 750 , driving the fluid along the closed channel to the second through hole 126 ;

[0062] In step 760 , the fluid is extracted from the second through hole 126 .

[0063] In one embodiment, element detection can be performed based on the extracted fluid, so that the elements remaining on the surface of the wafer and their concentrations can be obtained.

[0064] In one embodiment, the fluid is a liquid, and the fluid is an extraction fluid. The extraction fluid can extract contaminants from the surface of the wafer it contacts.

[0065] The fluid can be driven to move in the closed channel by a driving fluid, which is an ultrapure gas that is not easily reactive, such as nitrogen, helium, argon, ultrapure water, acetone, tetrachloromethane, etc.

[0066] In another embodiment, the first through hole 125 may also serve as a fluid outlet, and the second through hole 126 may serve as a fluid inlet.

[0067] Part 2

[0068] Figure 8 illustrates a conventional method for extracting contamination from wafer surfaces. The enclosed channel 813, first through-hole 811, and second through-hole 812 in Figure 8 can be referenced to the enclosed channel, first through-hole, and second through-hole described above in the semiconductor processing apparatus. As mentioned in the background, in conventional techniques, only a portion of extraction solution 820 can be loaded per scan, resulting in low extraction efficiency.

[0069] Therefore, the present invention provides a semiconductor processing device and a semiconductor processing method thereof that can solve the above-mentioned problems.

[0070] FIG9 is a schematic structural diagram of a semiconductor processing device according to the present invention that utilizes a closed channel for wafer contamination detection. As shown in FIG9 , the semiconductor processing device includes a first chamber portion and a second chamber portion. The first chamber portion and / or the second chamber portion has a groove channel formed by a depression in the inner wall surface of the corresponding chamber portion, a first through-hole 911 passing through the corresponding chamber portion from the outside to communicate with the first position of the groove channel, and a second through-hole 913 passing through the corresponding chamber portion from the outside to communicate with the second position of the groove channel. When the second chamber portion is in the closed position relative to the first chamber portion and the wafer is accommodated between the first chamber portion and the second chamber portion, the groove channel forms a closed channel 913 by virtue of the obstruction of the surface of the wafer. The closed channel 913 communicates with the outside through the first through-hole 911 and the second through-hole 912. The structure of the semiconductor processing device according to the present invention can refer to the semiconductor processing device mentioned above, and will not be repeated here.

[0071] Figure 10 is a flow chart of a semiconductor processing method based on the semiconductor processing apparatus according to an embodiment of the present invention. Referring to Figures 9 and 10 , the semiconductor processing method includes the following steps.

[0072] Step 950: Divide the target fluid into multiple segments, and use a spacer fluid to isolate two adjacent segments of the target fluid.

[0073] In one embodiment, the spacer fluid is a gas and the target fluid is a liquid. For example, the spacer fluid is nitrogen. The target fluid may be an extraction solution, which can be used to extract contaminants from the surface of the wafer. The target fluid may also be referred to as a target extraction solution or extraction solution. For example, the extraction solution may react with contaminants (such as metal impurities or metal contaminants) and dissolve them in the extraction solution.

[0074] In step 960 , multiple segments of target fluid separated by the spacer fluid 930 are passed through the first through hole 911 into a closed channel 913 , so that within a period of time, the closed channel contains multiple segments of target fluid 920 ( 920 - 1 , 920 - 2 , and 920 - 3 ), and two adjacent segments of target fluid are separated by the spacer fluid.

[0075] As shown in FIG9 , there are three target fluid segments, with a spacer fluid 930 between each two adjacent target fluid segments. In other embodiments, there may be two, four, or more target fluid segments. It should be noted that the three target fluid segments 920 are within the same closed channel, rather than being separated into multiple closed channels.

[0076] Step 970, driving the multiple segments of target fluid separated by the spacer fluid in the closed channel to flow out of the closed channel through the second through hole by the driving fluid.

[0077] In one embodiment, the driving fluid is a gas. For example, the gas may be nitrogen. The driving fluid and the spacer fluid may be the same gas.

[0078] Step 980: Combine the multiple segments of target fluid flowing out of the closed channel for detection.

[0079] In one embodiment, the driving speed of the driving fluid is less than 40 ml / min, such as 20 ml / min or 25 ml / min, etc. The total volume of the target fluid in the multiple segments of the target fluid is less than 3 ml (milliliter), such as 1 ml or 2 ml.

[0080] Making multiple segments of target fluid flow through the closed channel can be referred to as performing a scan in the closed channel using multiple segments of target fluid. In one embodiment, the total volume of the target solution used for extracting pollutants using multiple segments of target fluid can be the same as the total volume of the target solution used for extracting pollutants using a single segment of target fluid in the prior art, so it will not affect the detection limit of the equipment. When the first segment of extraction solution 920-1 flows through the insoluble pollutants on the surface of the wafer, a trace amount of extraction solution will remain on the insoluble pollutants on the surface of the wafer and continue to react with the insoluble pollutants (i.e., dissolve the pollutants) until the second segment of extraction solution flow 920-2 passes through the insoluble pollutants. That is to say, during the period between the first segment of extraction solution 920-1 and the second segment of extraction solution flow 920-2, the residual trace amount of extraction solution will still react with the insoluble pollutants to dissolve, which is equivalent to greatly extending the contact time between the pollutants at the same point and the extraction solution. Therefore, the effective contact time of the extraction solution at each point on the wafer (here, each point on the wafer facing the closed channel) is the duration of the multiple extraction solution segments flowing through that point (e.g., 3 seconds) plus the total interval time between the multiple extraction solution segments flowing through that point. The propulsion speed of the driving gas (e.g., nitrogen) can remain unchanged, for example, at 20 ml / min, significantly increasing the effective contact time of the extraction solution at each point on the wafer. This shows that by using a multi-segment scanning method, simply increasing the time interval between the multiple extraction solution segments to allow for the introduction of the interval fluid can significantly increase the effective contact time of the extraction solution at each point on the wafer, thereby improving the efficiency of contamination extraction during a single scan.

[0081] This invention can be implemented by modifying the existing formula without changing the existing mechanical and electrical design. It significantly increases the effective contact time of the extraction solution at each point on the wafer surface, without increasing the volume of the extraction solution and only slightly increasing the total scanning time, thereby improving the extraction efficiency of insoluble metal contamination.

[0082] The above description is intended to be illustrative rather than restrictive. Although the present invention has been described with reference to specific illustrative examples, it should be understood that the present invention is not limited to the described embodiments. The scope of the present invention should be determined with reference to the claims and the full scope of equivalents to which the claims are entitled.

[0083] The "one example (embodiment)" or "example (embodiment)" referred to herein means that the specific features, structures or characteristics associated with the embodiment may be included in at least one implementation of the present invention. The "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it necessarily a separate or selected embodiment that is mutually exclusive with other embodiments. "Multiple" and "several" in the present invention mean two or more. "And / or" in the present invention means "and" or "or". In addition, the terms "first", "second", "third", "fourth" and the like used herein are intended to be used as labels to distinguish different elements, and may not necessarily have sequential meanings according to their numerical designations. Therefore, the terms used herein are only for the purpose of describing specific implementations and are not intended to be limiting.

[0084] It should also be noted that in some alternative embodiments, the functions / actions noted may not occur in the order noted in the figures. For example, two figures shown in succession may actually be performed substantially simultaneously or may sometimes be performed in reverse order, depending on the functions / actions involved.

[0085] Although the method operations are described in a particular order, it should be understood that other operations can be performed between the described operations. The described operations can be adjusted so that they occur at slightly different times, or the described operations can be distributed throughout the system. The system allows multiple unrelated programs to be processed simultaneously.

[0086] Many modifications and other implementations of the present invention involve those skilled in the art who have relevant industry knowledge and some original data. Therefore, it should be understood that the present invention is not limited to the specific embodiments disclosed, but also includes other embodiments modified within the scope of the appended claims. In addition, although the foregoing description and related drawings describe the implementation of specific embodiment combinations of elements and functions, within the scope of the appended claims, elements and functions that are implemented in different combinations by substitution are also included. The appended claims also include combinations of elements and functions that are different from the elements and functions explicitly described above. Although specific terms are used herein, they are intended to be generally descriptive only and not for limiting purposes.

Claims

1. A semiconductor processing device, characterized in that: It includes: a first chamber portion, a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is located at the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, and a wafer can be accommodated in the micro chamber; when the second chamber portion is located at the open position relative to the first chamber portion, the wafer can be taken out or put in; the first chamber portion and / or the second chamber portion has a groove channel formed by a depression on the inner wall surface of the corresponding chamber portion, a first through hole passing through the corresponding chamber portion from the outside to communicate with the first position of the groove channel, and a second through hole passing through the corresponding chamber portion from the outside to communicate with the second position of the groove channel; when the second chamber portion is located at the closed position relative to the first chamber portion and the wafer is accommodated between the first chamber portion and the second chamber portion, the groove channel forms a closed channel by means of the obstruction of the surface of the wafer, and the closed channel communicates with the outside through the first through hole and the second through hole; The target fluid is driven to enter the closed channel through the first through hole. The target fluid entering the closed channel can move along the closed channel. At this time, the target fluid can contact a partial area of ​​the surface of the wafer. The target fluid flowing through the surface of the wafer flows out through the second through hole and is extracted. Wherein, within a period of time, there are multiple sections of target fluid in the closed channel, and two adjacent sections of target fluid are isolated by a spacer fluid.

2. The semiconductor processing device according to claim 1, wherein: The spacer fluid is gas, the target fluid is liquid, each segment of the target fluid is driven by a driving fluid, the driving fluid is gas, and within a period of time, the multiple segments of the target fluid are in the same closed channel.

3. The semiconductor processing device according to claim 2, characterized in that The target fluid in each section of the target fluid is the same, and the target fluid is used to extract contaminants on the surface of the wafer.

4. The semiconductor processing device according to claim 2, wherein: The driving fluid is nitrogen gas, and the spacer fluid is nitrogen gas.

5. The semiconductor processing device according to claim 2, wherein: The driving speed of the driving fluid is less than 40 ml / min, and the total volume of the target fluid in the multiple sections of the target fluid is less than 3 ml.

6. The semiconductor processing device according to claim 1, wherein: Each groove track is spirally formed, wherein one of the first through hole and the second through hole is located in a central area of ​​the spiral groove track, and the other of the first through hole and the second through hole is located in a peripheral area of ​​the spiral groove track.

7. A semiconductor processing method of a semiconductor processing device, the semiconductor processing device comprising: A first chamber portion, a second chamber portion movable between an open position and a closed position relative to the first chamber portion, wherein when the second chamber portion is located at the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, a wafer can be accommodated in the micro chamber, and when the second chamber portion is located at the open position relative to the first chamber portion, the wafer can be taken out or put in, the first chamber portion and / or the second chamber portion has a groove channel formed by a depression of the inner wall surface of the corresponding chamber portion, a first through hole passing through the corresponding chamber portion from the outside to communicate with the first position of the groove channel, and a second through hole passing through the corresponding chamber portion from the outside to communicate with the second position of the groove channel, when the second chamber portion is located at the closed position relative to the first chamber portion and the wafer is accommodated between the first chamber portion and the second chamber portion, at this time, the groove channel forms a closed channel by blocking the surface of the wafer, and the closed channel communicates with the outside through the first through hole and the second through hole; characterized in that it comprises: Dividing the target fluid into multiple sections, and isolating two adjacent sections of the target fluid using a spacer fluid; Allowing multiple sections of target fluid separated by a spacer fluid to enter a closed channel through a first through hole, so that within a period of time, the closed channel has multiple sections of target fluid, and two adjacent sections of target fluid are separated by the spacer fluid; Using a driving fluid to drive a plurality of target fluid segments separated by a spacer fluid in the closed channel to flow out of the closed channel through the second through hole; and The multiple sections of target fluid flowing out of the closed channel are combined for detection.

8. The semiconductor processing method according to claim 7, characterized in that: The spacer fluid is a gas, the target fluid is a liquid, and the driving fluid is a gas. During a period of time, the multiple sections of target fluid are in the same closed channel, and the target fluid is used to extract pollutants on the surface of the wafer.

9. The semiconductor processing method according to claim 8, characterized in that: The driving fluid is nitrogen gas, and the spacer fluid is nitrogen gas.

10. The semiconductor processing method according to claim 8, characterized in that: The driving speed of the driving fluid is less than 40 ml / min, and the total volume of the target fluid in the multiple sections of the target fluid is less than 3 ml.

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