Display panel and preparation method therefor, and display apparatus

Abstract

A display panel, comprising a substrate, a first source-drain conductive layer, a first insulating layer and a light-emitting device layer. The first source-drain conductive layer comprises a first connecting line, a second connecting line and a third connecting line. The light-emitting device layer comprises a first electrode layer, a light-emitting functional layer and a second electrode layer, which are sequentially arranged in a stacked manner in a direction away from the substrate, the first electrode layer comprising a first electrode that belongs to a first light-emitting device, a second electrode that belongs to a second light-emitting device, and a third electrode that belongs to a third light-emitting device, wherein in a direction perpendicular to the substrate, at least two of the distance between the first electrode and the first connecting line, the distance between the second electrode and the second connecting line, and the distance between the third electrode and the third connecting line are unequal, such that the difference between every two of parasitic capacitance that is formed between the first electrode and the first connecting line, parasitic capacitance that is formed between the second electrode and the second connecting line, and parasitic capacitance that is formed between the third electrode and the third connecting line is within a preset range.

Description

Display panel, manufacturing method, and display device

[0001] This application claims priority to Chinese patent application No. 202311553591.0, filed on November 20, 2023, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0003] Organic light-emitting diodes (OLEDs) have been widely used in the display field due to their advantages such as self-luminescence, low driving voltage, high luminous efficiency, fast response speed and flexible display.

[0004] Summary of the Invention

[0005] In one aspect, a display panel is provided. The display panel includes a substrate, a first source-drain conductive layer, a first insulating layer, and a light-emitting device layer. The first source-drain conductive layer is located on one side of the substrate; the first source-drain conductive layer includes a first connecting line, a second connecting line, and a third connecting line. The first insulating layer is located on a side of the first source-drain conductive layer away from the substrate. The light-emitting device layer is located on a side of the first insulating layer away from the substrate. The light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer stacked sequentially in a direction away from the substrate. The light-emitting device layer forms first, second, and third light-emitting devices emitting different colors. The first electrode layer includes a first electrode for the first light-emitting device, a second electrode for the second light-emitting device, and a third electrode for the third light-emitting device. In an orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line. In which, along the direction perpendicular to the substrate, at least two of the distance between the first electrode and the first connecting line, the distance between the second electrode and the second connecting line, and the distance between the third electrode and the third connecting line are not equal, so that the difference between the parasitic capacitance formed by the first electrode and the first connecting line, the parasitic capacitance formed by the second electrode and the second connecting line, and the parasitic capacitance formed by the third electrode and the third connecting line is within a preset range.

[0006] In some embodiments, a distance between a connection line where one of the first electrode, the second electrode, and the third electrode overlaps with its orthographic projection is greater than a distance between connection lines where the other two electrodes overlap with their orthographic projections.

[0007] In some embodiments, the first insulating layer includes a first insulating portion, a second insulating portion, and a third insulating portion, wherein the first insulating portion is disposed between the first electrode and the first connecting line, the second insulating portion is disposed between the second electrode and the second connecting line, and the third insulating portion is disposed between the third electrode and the third connecting line. The thickness of the first insulating portion, the thickness of the second insulating portion, and the thickness of the third insulating portion is greater than the other two.

[0008] In some embodiments, a surface of one of the first insulating portion, the second insulating portion, and the third insulating portion away from the substrate is higher than surfaces of the other two insulating portions away from the substrate.

[0009] In some embodiments, the first connecting line, the second connecting line, and the third connecting line have the same thickness.

[0010] In some embodiments, a thickness of one of the first connecting line, the second connecting line, and the third connecting line is smaller than thicknesses of the other two.

[0011] In some embodiments, the first insulating portion, the second insulating portion, and the third insulating portion are flush away from a surface of the substrate.

[0012] In some embodiments, the first insulating portion, the second insulating portion, and the third insulating portion are integrally provided.

[0013] In some embodiments, the largest distance among the distance between the first electrode and the first connection line, the distance between the second electrode and the second connection line, and the distance between the third electrode and the third connection line is d max , and the other two distances are d o1 and d o2 ; Among them, d max / d o1 Less than or equal to 1.3, and / or, d max / d o2 Less than or equal to 1.3.

[0014] On the other hand, the display panel includes a substrate, a first source-drain conductive layer, a light-emitting device layer, and a first insulating layer. The first source-drain conductive layer is located on one side of the substrate; the first source-drain conductive layer includes a first connecting line, a second connecting line, and a third connecting line. The light-emitting device layer is located on a side of the first source-drain conductive layer away from the substrate. The light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, which are stacked in sequence away from the substrate. The light-emitting device layer forms first, second, and third light-emitting devices that emit different colors. The first electrode layer includes a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device. In an orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line. The first insulating layer is located between the first source-drain conductive layer and the first electrode layer. The first insulating layer includes a first insulating portion, a second insulating portion, and a third insulating portion, wherein the first insulating portion is disposed between the first electrode and the first connecting line, the second insulating portion is disposed between the second electrode and the second connecting line, and the third insulating portion is disposed between the third electrode and the third connecting line. The dielectric constant of the first insulating portion, the dielectric constant of the second insulating portion, and the dielectric constant of the third insulating portion are unequal, so that a difference between a parasitic capacitance formed between the first electrode and the first connecting line, a parasitic capacitance formed between the second electrode and the second connecting line, and a parasitic capacitance formed between the third electrode and the third connecting line is within a preset range.

[0015] In some embodiments, one of the dielectric constant of the first insulating portion, the dielectric constant of the second insulating portion, and the dielectric constant of the third insulating portion is smaller than the other two.

[0016] In some embodiments, among the first insulating part, the second insulating part and the third insulating part, the two with relatively larger dielectric constants have the same dielectric constant, and the two with relatively larger dielectric constants are integrally arranged; the one with the smallest dielectric constant is embedded in the integral structure formed by the two with relatively larger dielectric constants.

[0017] In some embodiments, the smallest dielectric constant among the dielectric constant of the first insulating portion, the dielectric constant of the second insulating portion, and the dielectric constant of the third insulating portion is ε max , and the other two dielectric constants are ε o1 and ε o2 ; Among them, ε max / ε o1 greater than or equal to 0.7, and / or, εmax / ε o2 Greater than or equal to 0.7.

[0018] In another aspect, the display panel includes a substrate, a first source-drain conductive layer, a first insulating layer, and a light-emitting device layer. The first source-drain conductive layer is located on one side of the substrate; the first source-drain conductive layer includes a first connecting line, a second connecting line, and a third connecting line. The first insulating layer is located on a side of the first source-drain conductive layer away from the substrate. The light-emitting device layer is located on a side of the first insulating layer away from the substrate, and the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer stacked in sequence in a direction away from the substrate, and the light-emitting device layer forms a first light-emitting device, a second light-emitting device, and a third light-emitting device with different luminous colors; the first electrode layer includes a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device, in an orthographic projection onto the substrate, the first electrode overlaps with the first connecting segment in the first connecting line, the second electrode overlaps with the second connecting segment in the second connecting line, and the third electrode overlaps with the third connecting segment in the third connecting line; wherein, at least two of the widths of the first connecting segment, the widths of the second connecting segment, and the widths of the third connecting segment are not equal, so that the difference between the parasitic capacitance formed by the first electrode and the first connecting line, the parasitic capacitance formed by the second electrode and the second connecting line, and the parasitic capacitance formed by the third electrode and the third connecting line is within a preset range.

[0019] In some embodiments, one of the width of the first connecting segment, the width of the second connecting segment, and the width of the third connecting segment is smaller than the other two.

[0020] In some embodiments, in the orthographic projection onto the substrate, the portion of the first connecting line that does not overlap with the first electrode is the fourth connecting segment, the portion of the second connecting line that does not overlap with the second electrode is the fifth connecting segment, and the portion of the third connecting line that does not overlap with the third electrode is the sixth connecting segment; wherein the width of the fourth connecting segment is greater than the width of the first connecting segment; and / or the width of the fifth connecting segment is greater than the width of the second connecting segment; and / or the width of the sixth connecting segment is greater than the width of the third connecting segment.

[0021] In some embodiments, a plurality of the first light-emitting devices, a plurality of the second light-emitting devices, and a plurality of the third light-emitting devices are arranged into a plurality of rows along the first direction and into a plurality of columns along the second direction; each row of light-emitting devices includes a plurality of the first light-emitting devices and a plurality of the third light-emitting devices arranged alternately along the first direction, or each row of light-emitting devices includes a plurality of the second light-emitting devices arranged along the first direction, and a light-emitting device row formed by a plurality of the first light-emitting devices and a plurality of the third light-emitting devices and a light-emitting device row formed by a plurality of the second light-emitting devices are arranged alternately; each column of light-emitting devices includes a plurality of the second light-emitting devices and a plurality of the third light-emitting devices arranged alternately along the second direction, or each column of light-emitting devices includes a plurality of the first light-emitting devices arranged along the second direction, a light-emitting device column formed by a plurality of the second light-emitting devices and a plurality of the third light-emitting devices and a light-emitting device column formed by a plurality of the first light-emitting device columns are arranged alternately; wherein, the second connecting line is reused as the third connecting line, and the second connecting segment and the third connecting segment are respectively different parts of the second connecting line.

[0022] In another aspect, a display device is provided, comprising: a display panel according to any one of the above embodiments.

[0023] In another aspect, a method for manufacturing a display panel is provided, which is applied to the display panel described in any one of the above embodiments. The preparation method includes: preparing a first source-drain conductive layer on a substrate; the first source-drain conductive layer includes a first connecting line, a second connecting line, and a third connecting line; using a half-tone mask to prepare a first insulating layer on a side of the first source-drain conductive layer away from the substrate; preparing a light-emitting device layer on a side of the first insulating layer away from the substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially stacked in a direction away from the substrate, the light-emitting device layer forming a first light-emitting device, a second light-emitting device, and a third light-emitting device with different luminous colors, the first electrode layer includes a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device, in an orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line; wherein, in the first insulating layer, at least two of the thicknesses of a portion located between the first electrode and the first connecting line, the thickness of a portion located between the second electrode and the second connecting line, and the thickness of a portion located between the third electrode and the third connecting line are unequal.

[0024] On the other hand, a method for preparing a display panel is provided, which is applied to the display panel described in any of the above embodiments. The preparation method includes: preparing a first source-drain conductive layer on a substrate; the first source-drain conductive layer includes a first connecting line, a second connecting line, and a third connecting line; preparing a first insulating layer on a side of the first source-drain conductive layer away from the substrate; preparing a light-emitting device layer on a side of the first insulating layer away from the substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially stacked in a direction away from the substrate, the light-emitting device layer forms a first light-emitting device, a second light-emitting device, and a third light-emitting device with different luminous colors, the first electrode layer includes a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a second electrode belonging to the first light-emitting device. The third electrode of the three light-emitting devices, in the orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line; wherein the first insulating layer includes a first insulating portion, a second insulating portion and a third insulating portion, the first insulating portion is arranged between the first electrode and the first connecting line, the second insulating portion is arranged between the second electrode and the second connecting line, and the third insulating portion is arranged between the third electrode and the third connecting line; at least two of the dielectric constants of the first insulating portion, the second insulating portion and the third insulating portion are not equal. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, actual timing of signals, and the like involved in the embodiments of the present disclosure.

[0026] FIG1 is a structural diagram of a display device according to some embodiments;

[0027] FIG2 is a structural diagram of a display panel according to some embodiments;

[0028] FIG3 is a cross-sectional view along section line AA in FIG2 ;

[0029] FIG4 is another cross-sectional view along section line AA in FIG2 ;

[0030] FIG5 is a structural diagram of a pixel circuit according to some embodiments;

[0031] FIG6 is a partial enlarged view of B in FIG2 ;

[0032] FIG7 is another partial enlarged view of B in FIG2 ;

[0033] FIG8 is a partial enlarged view of B in FIG2 ;

[0034] FIG9 is another partial enlarged view of B in FIG2 ;

[0035] 10 is a structural diagram illustrating a first insulating portion protruding from a second insulating portion and a third insulating portion according to some embodiments;

[0036] 11 is a structural diagram illustrating a second insulating portion protruding from a third insulating portion and a first insulating portion according to some embodiments;

[0037] 12 is a structural diagram illustrating a third insulating portion protruding from the first insulating portion and the second insulating portion according to some embodiments;

[0038] FIG13 is a structural diagram showing a first connecting line with a minimum thickness according to some embodiments;

[0039] FIG14 is a structural diagram showing a second connecting line with a minimum thickness according to some embodiments;

[0040] FIG15 is a structural diagram showing a third connecting line with a minimum thickness according to some embodiments;

[0041] 16 is a structural diagram illustrating a structure in which a first insulating portion is embedded in a second insulating portion and a third insulating portion are integrally provided according to some embodiments;

[0042] 17 is a structural diagram illustrating a structure in which a second insulating portion is embedded in a structure in which a first insulating portion and a third insulating portion are integrally provided according to some embodiments;

[0043] 18 is a structural diagram illustrating a structure in which a third insulating portion is embedded in a structure in which a first insulating portion and a second insulating portion are integrally provided according to some embodiments;

[0044] FIG19 is a structural diagram showing a first connecting segment having a minimum width according to some embodiments;

[0045] FIG20 is a structural diagram showing a second connecting segment having a minimum width according to some embodiments;

[0046] FIG21 is a structural diagram showing a third connecting segment having a minimum width according to some embodiments;

[0047] 22 and 23 are flowcharts of methods of manufacturing a display panel according to some embodiments. DETAILED DESCRIPTION

[0048] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0049] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0050] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0051] When describing some embodiments, the term "connected" and its derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the embodiments disclosed herein.

[0052] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0053] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0054] As used herein, “approximately” includes the stated value and an average value that is within an acceptable range of deviation from the particular value, where the acceptable range of deviation is determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0055] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within an acceptable deviation range, wherein the acceptable deviation range is as determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, that the difference between the two equals is less than or equal to 5% of either one.

[0056] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0057] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0058] Some embodiments of the present disclosure provide a display device 1000, as shown in FIG1 . The display device 1000 can be any device that displays either moving (e.g., video) or fixed (e.g., still images), and whether text or images. For example, the display device 1000 can be any product or component with a display function, such as a television, a laptop computer, a tablet computer, a mobile phone, a personal digital assistant (PDA), a navigator, a wearable device, an augmented reality (AR) device, or a virtual reality (VR) device.

[0059] The display device 1000 may be a liquid crystal display (LCD), an organic light emitting display (OLED), a quantum dot light emitting display (QLED), a mini / micro light emitting display (MLED), or an active-matrix organic light emitting diode (AMOLED) display. The embodiments of the present disclosure are described using an OLED display as an example.

[0060] Among them, AMOLED display devices have the characteristics of fast response speed, higher contrast, wider viewing angle and lower power consumption, and are one of the hot research topics in the field of display technology today. In the following embodiments, the display device 1000 is an AMOLED display device as an example for explanation.

[0061] As shown in FIG1 , the display device 1000 includes a display panel 100 . As shown in FIG2 to FIG4 , the display panel 100 includes a substrate 10 , a pixel circuit stack 20 , and a light emitting device layer 30 .

[0062] The substrate 10 may be a flexible substrate 10 or a rigid substrate 10. The material used for the substrate 10 may include a polymer resin or glass. For example, the substrate 10 may be flexible, and the material used for the substrate 10 may include a polymer resin, such as one of polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate two formal acid glycol ester (PEN), polyethylene terephthalate (PET), polyphenylene sulfide granule (PPS), polyimide (PI), polycarbonate (PC), and cellulose acetate propionate (CAP). Illustratively, the substrate 10 may be rigid and include a glass material containing SiO 2 as a main component.

[0063] It should be noted that the substrate 10 can be a single-layer structure or a multi-layer structure. For example, in the case of a multi-layer structure, the substrate 10 can include a base and a buffer layer provided on the base. The buffer layer is provided on the base. The material used for the buffer layer can include inorganic insulating materials such as silicon nitride (SiNx, x>0), silicon oxynitride (SiON) and silicon oxide (SiOx, x>0). The buffer layer is used to provide a good foundation for the formation of thin films when thin films are formed on the substrate 10.

[0064] As shown in Figures 3 and 4 , a pixel circuit stack 20 is disposed on a substrate 10 and includes a pixel circuit 21. The pixel circuit 21 includes a plurality of thin-film transistors (TFTs) 211 and at least one storage capacitor (C) 212. The thin-film transistors 211 may be, for example, oxide thin-film transistors (TFTs). Oxide thin-film transistors have high carrier mobility, which can improve the response speed of the thin-film transistors 211.

[0065] As shown in Figures 3 and 4, the thin film transistor 211 includes an active layer 2111, a source electrode 2112, a drain electrode 2113, and a gate electrode 2114. The source electrode 2112 and the drain electrode 2113 are respectively in contact with the active layer 2111. It should be noted that the source electrode 2112 and the drain electrode 2113 are interchangeable. The storage capacitor 212 includes a first electrode plate 2121 and a second electrode plate 2122 arranged opposite to each other.

[0066] The pixel circuit 21 may have various structures, which can be selected based on actual needs. For example, the pixel circuit 21 may have a structure such as "2T1C," "3T1C," "6T1C," "7T1C," "6T2C," or "7T2C." "T" represents a thin-film transistor 211, and the number preceding "T" represents the number of thin-film transistors 211. "C" represents a storage capacitor 212, and the number preceding "C" represents the number of storage capacitors 212.

[0067] For example, as shown in FIG5 , the pixel circuit 21 has a 7T1C structure. The pixel circuit 21 includes a first reset transistor T1, a compensation transistor T2, a drive transistor T3, a write transistor T4, a first emission control transistor T5, a second emission control transistor T6, a second reset transistor T7, and a storage capacitor 212. The control electrode of the first reset transistor T1 is electrically connected to the first reset signal terminal Reset, its first electrode is electrically connected to the initialization signal terminal Vinit, and its second electrode is electrically connected to the first node N1. The control electrode of the compensation transistor T2 is electrically connected to the scan signal terminal Gate, its first electrode is electrically connected to the second node N2, and its second electrode is electrically connected to the first node N1. The control electrode of the drive transistor T3 is electrically connected to the first node N1, its first electrode is electrically connected to the third node N3, and its second electrode is electrically connected to the second node N2. The control electrode of the write transistor T4 is electrically connected to the scan signal terminal Gate, its first electrode is electrically connected to the data write signal terminal Data, and its second electrode is electrically connected to the third node N3. The control electrode of the first light-emitting control transistor T5 is electrically connected to the enable signal terminal EM, its first electrode is electrically connected to the first power supply voltage terminal VDD, and its second electrode is electrically connected to the third node N3. The control electrode of the second light-emitting control transistor T6 is electrically connected to the enable signal terminal EM, its first electrode is electrically connected to the second node N2, and its second electrode is electrically connected to the anode of the light-emitting device 30. The control electrode of the second reset transistor T7 is electrically connected to the second reset signal terminal Reset(n+1), its first electrode is electrically connected to the initialization signal terminal Vinit, and its second electrode is electrically connected to the anode of the light-emitting device. The second plate of the storage capacitor 212 is electrically connected to the first power supply voltage terminal VDD, and its first plate is electrically connected to the first node N1. The cathode of the light-emitting device is electrically connected to the second power supply voltage terminal VSS.

[0068] The first electrode of the thin film transistor 211 can be a source electrode, and the second electrode can be a drain electrode; alternatively, the first electrode can be a drain electrode, and the second electrode can be a source electrode, and the embodiments of the present disclosure do not limit this. The first node N1, the second node N2, and the third node N3 do not represent actual components, but represent the junction points of the electrical connections of related sub-circuits or electronic components in the circuit diagram, that is, these nodes are nodes equivalent to the junction points of the electrical connections of related sub-circuits or electronic components in the circuit diagram. In addition, the "VDD" in the first power supply voltage terminal VDD is a constant high potential signal, and the embodiments of the present disclosure do not limit the voltage signal to a constant high potential signal such as VDD or VGH. Similarly, the "VSS" in the second power supply voltage terminal VSS is a constant low potential signal, and the embodiments of the present disclosure do not limit the voltage signal to a constant low potential signal such as VSS, Vinit, or VGL.

[0069] It should be noted that, according to the on-off type classification, the thin film transistor 211 includes a P-type thin film transistor and an N-type thin film transistor. The thin film transistor 211 provided in the embodiment of the present disclosure is not limited to this, and can be a P-type thin film transistor or an N-type thin film transistor, which is selected according to the specific implementation. According to the film layer structure type, the thin film transistor 211 includes a bottom-gate thin film transistor and a top-gate thin film transistor. The thin film transistor 211 provided in the embodiment of the present disclosure is not limited to this, and the following embodiments take a top-gate thin film transistor as an example.

[0070] As shown in Figures 3 and 4 , the light-emitting device layer 30 is located on the side of the pixel circuit stack 20 away from the substrate 10. As shown in Figures 6 to 9 , the light-emitting device layer 30 forms a first light-emitting device 31, a second light-emitting device 32, and a third light-emitting device 33 that emit different colors. The colors emitted by the first light-emitting device 31, the second light-emitting device 32, and the third light-emitting device 33 are three primary colors. For example, the first light-emitting device 31 emits red, the second light-emitting device 32 emits blue, and the third light-emitting device 33 emits green.

[0071] As shown in FIG3 and FIG4 , the light emitting device layer 30 includes a first electrode layer 301 , a light emitting functional layer 302 and a second electrode layer 303 which are sequentially stacked in a direction away from the substrate 10 .

[0072] The light-emitting functional layer 302 may include only a light-emitting layer, or, in addition to the light-emitting layer, may also include at least one of an electron transport layer (ETL), an electron injection layer (EIL), a hole transport layer (HTL), and a hole injection layer (HIL).

[0073] It should be noted that the first electrode layer 301 is an anode layer and the second electrode layer 303 is a cathode layer; alternatively, the first electrode layer 301 is a cathode layer and the second electrode layer 303 is an anode layer. The embodiments of the present disclosure are described by taking the first electrode layer 301 as the anode layer and the second electrode layer 303 as the cathode layer as an example.

[0074] The first electrode layer 301 may be electrically connected to the source 2112 or the drain 2113 of a thin film transistor serving as a driving transistor among the plurality of thin film transistors 211 . FIG. 3 and FIG. 4 illustrate that the first electrode layer 301 is electrically connected to the drain 2113 of the thin film transistor 211 .

[0075] As shown in FIG. 6 to FIG. 9 , the first electrode layer 301 includes a first electrode 311 belonging to the first light emitting device 31 , a second electrode 321 belonging to the second light emitting device 32 , and a third electrode 331 belonging to the third light emitting device 33 .

[0076] In some embodiments, as shown in Figures 3 and 4, the pixel circuit stack 20 includes a first source-drain conductive layer 201 and a first insulating layer 202. The material used for the first source-drain conductive layer 201 may include any one or more of molybdenum (Mo), magnesium (Mg), aluminum (Al), copper (Cu), and titanium (Ti).

[0077] The first insulating layer 202 is arranged between the first source-drain conductive layer 201 and the first electrode layer 301. The material used for the first insulating layer 202 may include an organic insulating material or an inorganic insulating material. Exemplarily, the organic insulating material includes any one or more of general polymers such as polymethyl methacrylate (English: Polymethyl Methacrylate, abbreviated: PMMA) and polystyrene (English: Polystyrene, abbreviated: PS), polymer derivatives with phenolic groups, acryl polymers, imide polymers, aromatic ether polymers, amide polymers, fluorine polymers, paraxylene polymers and vinyl alcohol polymers. For example, the material used for the first insulating layer 202 includes polyimide (English: Polyimide, abbreviated: PI).

[0078] In other embodiments, as shown in FIG4 , the pixel circuit stack 20 further includes a second source-drain conductive layer 203 and a second insulating layer 204. The second source-drain conductive layer 203 is disposed on a side of the first source-drain conductive layer 201 away from the first insulating layer 202. The second source-drain conductive layer 203 can be made of the same material as the first source-drain conductive layer 201. The second insulating layer 204 is disposed between the first source-drain conductive layer 201 and the second source-drain conductive layer 203. The second insulating layer 204 can be made of the same material as the first insulating layer 202.

[0079] As shown in Figures 3, 4, and 6 to 9, the first source-drain conductive layer 201 includes a first connecting line 2011, a second connecting line 2012, and a third connecting line 2013. As shown in Figures 6 to 9, in an orthographic projection onto the substrate 10, the first electrode 311 overlaps with the first connecting line 2011, the second electrode 321 overlaps with the second connecting line 2012, and the third electrode 331 overlaps with the third connecting line 2013.

[0080] As shown in FIG3 , when the display panel 100 includes only the first source-drain conductive layer 201, the first connection line 2011, the second connection line 2012, and the third connection line 2013 are data lines and voltage signal lines (e.g., a VDD line for transmitting a VDD signal and a VSS line for transmitting a VSS signal). The first source-drain conductive layer 201 also includes a source electrode 2112 and a drain electrode 2113 of a thin film transistor 211.

[0081] Exemplarily, the first connection line 2011, the second connection line 2012, and the third connection line 2013 are all data lines. Alternatively, exemplary, the first connection line 2011, the second connection line 2012, and the third connection line 2013 are all VDD lines. Alternatively, exemplary, some of the first connection line 2011, the second connection line 2012, and the third connection line 2013 are data lines, and the rest are VDD lines.

[0082] As shown in FIG4 , when the display panel 100 includes a first source-drain conductive layer 201 and a second source-drain conductive layer 203, the first connecting line 2011, the second connecting line 2012, and the third connecting line 2013 are multiple voltage signal lines, and the first source-drain conductive layer 201 further includes a switching electrode 2014. The second source-drain conductive layer 203 includes, for example, a source electrode 2112 and a drain electrode 2113 of a thin-film transistor 211. The switching electrode 2014 connects the anode of the light-emitting device 30 to the drain electrode 2113 of the thin-film transistor 211.

[0083] It should be noted that, as shown in Figure 4, when the first source-drain conductive layer 201 includes a transfer electrode 2014, no matter how the shapes of the first connecting line 2011, the second connecting line 2012 and the third connecting line 2013 change, it is necessary to ensure that the transfer electrode 2014 does not overlap with the patterns of the first connecting line 2011, the second connecting line 2012 and the third connecting line 2013, so as to ensure that the transfer electrode 2014 and the first connecting line 2011, the second connecting line 2012 and the third connecting line 2013 respectively work normally.

[0084] In the related art, a first parasitic capacitor is formed between the first electrode, the first connecting line, and the insulating layer therebetween. A second parasitic capacitor is formed between the second electrode, the second connecting line, and the insulating layer therebetween. A third parasitic capacitor is formed between the third electrode, the third connecting line, and the insulating layer therebetween. When the display panel switches from a black screen to a white screen, the first, second, and third parasitic capacitors cause the lighting speeds of the first, second, and third light-emitting devices to be inconsistent, which in turn causes the display panel to exhibit color shift when the black screen switches to a white screen. When the first light-emitting device emits red, the second light-emitting device emits blue, and the third light-emitting device emits green, when the first light-emitting device has the slowest lighting speed, the display panel appears bluish-green. When the second light-emitting device has the slowest lighting speed, the display panel appears yellowish-yellow. When the third light-emitting device has the slowest lighting speed, the display panel appears purple-pink.

[0085] In order to solve the above technical problems, as shown in Figures 10 to 15, in the display panel 100 provided in some embodiments of the present disclosure, along the direction perpendicular to the substrate 10, at least two of the distance between the connecting line where the first electrode 311 overlaps with its orthographic projection, the distance between the connecting line where the second electrode 321 overlaps with its orthographic projection, and the distance between the connecting line where the third electrode 331 overlaps with its orthographic projection are not equal, so that the difference between each of the first parasitic capacitance, the second parasitic capacitance and the third parasitic capacitance is within a preset range.

[0086] The preset range may be a range of differences between the first parasitic capacitance, the second parasitic capacitance, and the third parasitic capacitance corresponding to a color shift degree of the display panel that is acceptable to the user.

[0087] In this manner, the lighting speed of the light-emitting device to which the electrode belongs can be adjusted by increasing or decreasing the parasitic capacitance corresponding to the electrode by changing the distance between the connecting line where at least one of the first electrode 311, the second electrode 321, and the third electrode 331 overlaps with its orthographic projection. For example, for a light-emitting device with a slow lighting speed, the distance between the electrode of the light-emitting device and the connecting line where its orthographic projection overlaps is increased to reduce the parasitic capacitance corresponding to the electrode, thereby increasing the lighting speed of the light-emitting device with a slow lighting speed. For another example, for a light-emitting device with a fast lighting speed, the distance between the electrode of the light-emitting device and the connecting line where its orthographic projection overlaps is reduced to increase the parasitic capacitance corresponding to the electrode, thereby reducing the lighting speed of the light-emitting device with a fast lighting speed. In this manner, the difference in the lighting speeds of the first light-emitting device 31, the second light-emitting device 32, and the third light-emitting device 33 can be reduced, thereby improving the problem of color shift when the display panel 100 switches from a black screen to a white screen.

[0088] According to the formula C=εS / (4πkd) (where ε is the dielectric constant between the two plates of the capacitor, C is the capacitance of the capacitor, S is the area of ​​the two plates facing each other, k is the electrostatic force constant, and d is the distance between the two plates of the capacitor), it can be seen that the capacitance C of the capacitor is inversely proportional to the distance d between the two plates of the capacitor, that is, the larger the distance d between the two plates of the capacitor, the smaller the capacitance C of the capacitor.

[0089] In some embodiments, by increasing the distance between the electrode of the light-emitting device with a slow lighting speed and the connecting line where its projection overlaps, the parasitic capacitance corresponding to the electrode is reduced, the lighting speed of the light-emitting device with a slow lighting speed is increased, and the difference in the lighting speeds of the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33 is reduced, the problem of color deviation occurring when the display panel 100 switches from a black screen to a white screen is improved.

[0090] As shown in FIG10 to FIG15 , the distance between the connecting line overlapping with the orthographic projection of one of the first electrode 311 , the second electrode 321 and the third electrode 331 is greater than the distance between the connecting lines overlapping with the orthographic projections of the other two electrodes.

[0091] By setting it in this way, the parasitic capacitance corresponding to the electrode with the largest distance from the connecting line overlapping with its orthographic projection among the first electrode 311, the second electrode 321 and the third electrode 331 can be reduced, and the lighting speed of the light-emitting device belonging to the electrode can be increased, thereby reducing the difference in the lighting speed of the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33, and improving the problem of color deviation when the display panel 100 switches from a black screen to a white screen.

[0092] In some examples, as shown in Figures 10 and 13, the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a bluish tint appears, indicating that the first light-emitting device 31 is lit more slowly than the second light-emitting device 32 and the third light-emitting device 33. In this case, the distance d1 between the first electrode 311 and the first connecting line 2011 is set to be greater than the distance d2 between the second electrode 321 and the second connecting line 2012, and greater than the distance d3 between the third electrode 331 and the third connecting line 2013. Furthermore, the distance d2 between the second electrode 321 and the second connecting line 2012 can be greater than the distance d3 between the third electrode 331 and the third connecting line 2013, can be equal to the distance d3 between the third electrode 331 and the third connecting line 2013, or can be less than the distance d3 between the third electrode 331 and the third connecting line 2013.

[0093] By setting in this way, the capacitance value of the first parasitic capacitor can be reduced, thereby increasing the lighting speed of the first light-emitting device 31, and further improving the phenomenon that the display panel 100 appears bluish when the black screen switches to the white screen.

[0094] In other examples, as shown in Figures 11 and 14, the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a yellowish tint appears, indicating that the second light-emitting device 32 is lit more slowly than the third light-emitting device 33 and the first light-emitting device 31. In this case, the distance d2 between the second electrode 321 and the second connection line 2012 is set to be greater than the distance d3 between the third electrode 331 and the third connection line 2013, and greater than the distance d1 between the first electrode 311 and the first connection line 2011. In addition, the distance d3 between the third electrode 331 and the third connection line 2013 can be greater than the distance d1 between the first electrode 311 and the first connection line 2011, or less than the distance d1 between the first electrode 311 and the first connection line 2011, or equal to the distance d1 between the first electrode 311 and the first connection line 2011.

[0095] By setting it in this way, the capacitance value of the second parasitic capacitor can be reduced, thereby increasing the lighting speed of the second light-emitting device 32, and further improving the problem of the yellowish phenomenon when the display panel 100 switches from a black screen to a white screen.

[0096] In some other examples, as shown in Figures 12 and 15, the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a purple-pink phenomenon appears, indicating that the third light-emitting device 33 is slower than the first light-emitting device 31 and the second light-emitting device 32. In this case, the distance d3 between the third electrode 331 and the third connection line 2013 is set to be greater than the distance d1 between the first electrode 311 and the first connection line 2011, and greater than the distance d2 between the second electrode 321 and the second connection line 2012. In addition, the distance d1 between the first electrode 311 and the first connection line 2011 can be greater than the distance d2 between the second electrode 321 and the second connection line 2012, or less than the distance d2 between the second electrode 321 and the second connection line 2012, or equal to the distance d2 between the second electrode 321 and the second connection line 2012.

[0097] By setting it in this way, the capacitance value of the three parasitic capacitors can be reduced, thereby increasing the lighting speed of the third light-emitting device 33, and further improving the problem of the display panel 100 having a purple-pink color when switching from a black screen to a white screen.

[0098] In some embodiments, as shown in Figures 10 to 15, the first insulating layer 202 includes a first insulating portion 2021, a second insulating portion 2022, and a third insulating portion 2023. The first insulating portion 2021 is located between the first electrode 311 and the first connecting line 2011, the second insulating portion 2022 is located between the second electrode 321 and the second connecting line 2012, and the third insulating portion 2023 is located between the third electrode 331 and the third connecting line 2013.

[0099] Among the thicknesses of the first insulating portion 2021 , the second insulating portion 2022 , and the third insulating portion 2023 , one is greater than the other two.

[0100] In this manner, the distance between the connecting line overlapping with the orthographic projection of one of the first electrode 311 , the second electrode 321 and the third electrode 331 can be greater than the distance between the connecting lines overlapping with the orthographic projections of the other two electrodes.

[0101] In some examples, as shown in Figures 10 to 12, the surface of one of the first insulating portion 2021, the second insulating portion 2022 and the third insulating portion 2023 away from the substrate 10 is higher than the surfaces of the other two away from the substrate 10, so that one of the thickness of the first insulating portion 2021, the thickness of the second insulating portion 2022 and the thickness of the third insulating portion 2023 is greater than the other two.

[0102] 10 , the surface of the first insulating portion 2021 away from the substrate 10 is higher than the surface of the second insulating portion 2022 away from the substrate 10, and higher than the surface of the third insulating portion 2023 away from the substrate 10, so that the thickness of the first insulating portion 2021 is greater than the thickness of the second insulating portion 2022, and greater than the thickness of the third insulating portion 2023. In addition, the surface of the second insulating portion 2022 away from the substrate 10 may be flush with the surface of the third insulating portion 2023 away from the substrate 10.

[0103] Alternatively, for example, as shown in FIG11 , the surface of the second insulating portion 2022 away from the substrate 10 is higher than the surface of the first insulating portion 2021 away from the substrate 10, and higher than the surface of the third insulating portion 2023 away from the substrate 10, so that the thickness of the second insulating portion 2022 is greater than the thickness of the first insulating portion 2021, and greater than the thickness of the third insulating portion 2023. In addition, the surface of the first insulating portion 2021 away from the substrate 10 may be flush with the surface of the third insulating portion 2023 away from the substrate 10.

[0104] Alternatively, for example, as shown in FIG12 , the surface of the third insulating portion 2023 away from the substrate 10 is higher than the surface of the first insulating portion 2021 away from the substrate 10, and higher than the surface of the second insulating portion 2022 away from the substrate 10, so that the thickness of the third insulating portion 2023 is greater than the thickness of the first insulating portion 2021, and greater than the thickness of the second insulating portion 2022. In addition, the surface of the first insulating portion 2021 away from the substrate 10 may be flush with the surface of the second insulating portion 2022 away from the substrate 10.

[0105] As shown in Figures 10 to 12, on the basis that the surface of one of the first insulating part 2021, the second insulating part 2022 and the third insulating part 2023 away from the substrate 10 is higher than the surfaces of the other two away from the substrate 10, the thickness of the first connecting line 2011, the second connecting line 2012 and the third connecting line 2013 are equal. In this way, the resistance of the first connecting line 2011, the second connecting line 2012 and the third connecting line 2013 are roughly the same, which can make the voltage drops of the first connecting line 2011, the second connecting line 2012 and the third connecting line 2013 roughly the same.

[0106] In other embodiments, as shown in Figures 13 to 15, the thickness of one of the first connecting line 2011, the second connecting line 2012 and the third connecting line 2013 is smaller than the thickness of the other two, so that one of the thickness of the first insulating part 2021, the thickness of the second insulating part 2022 and the thickness of the third insulating part 2023 is greater than the other two.

[0107] 13 , the thickness of the first connection line 2011 is smaller than the thickness of the second connection line 2012, and smaller than the thickness of the third connection line 2013, so that the thickness of the first insulating portion 2021 is greater than the thickness of the second insulating portion 2022, and greater than the thickness of the third insulating portion 2023. Furthermore, the thickness of the second connection line 2012 may be equal to the thickness of the third connection line 2013.

[0108] Alternatively, as shown in FIG14 , the thickness of the second connection line 2012 is smaller than the thickness of the first connection line 2011 and smaller than the thickness of the third connection line 2013, so that the thickness of the second insulating portion 2022 is greater than the thickness of the first insulating portion 2021 and greater than the thickness of the third insulating portion 2023. Furthermore, the thickness of the first connection line 2011 may be equal to the thickness of the third connection line 2013.

[0109] Alternatively, as shown in FIG15 , the thickness of the third connection line 2013 is smaller than the thickness of the first connection line 2011 and smaller than the thickness of the second connection line 2012, so that the thickness of the third insulating portion 2023 is greater than the thickness of the first insulating portion 2021 and greater than the thickness of the second insulating portion 2022. In addition, the thickness of the first connection line 2011 can be equal to the thickness of the second connection line 2012.

[0110] As shown in Figures 13 to 15 , the thickness of one of the first connecting line 2011, the second connecting line 2012, and the third connecting line 2013 is smaller than the thickness of the other two, and the surfaces of the first insulating portion 2021, the second insulating portion 2022, and the third insulating portion 2023 away from the substrate 10 are flush. This makes the surface of the first insulating layer 202 away from the substrate 10 relatively flat, which can ensure a higher uniformity in the thickness of the first electrode layer 301, and further ensure a higher uniformity in the thickness of the light-emitting functional layer 302 disposed on the side of the first electrode layer 301 away from the substrate 10.

[0111] In some implementations, the first insulating portion 2021 , the second insulating portion 2022 , and the third insulating portion 2023 are integrally provided, so that the dielectric constants of the first insulating portion 2021 , the second insulating portion 2022 , and the third insulating portion 2023 are substantially the same.

[0112] In some embodiments, as shown in FIG10 to FIG15, the largest distance among the distance d1 between the first electrode 331 and the first connection line 2011, the distance d2 between the second electrode 332 and the second connection line 2012, and the distance d3 between the third electrode 333 and the third connection line 2013 is d max , and the other two distances are d o1 and d o2 Among them, d max / d o1 Less than or equal to 1.3, and / or, d max / d o2 Less than or equal to 1.3.

[0113] For example, d max is 2.2μm~2.4μm, for example, d max 2.2 μm, 2.3 μm or 2.4 μm. The embodiments disclosed herein are not listed one by one. o1 1.9μm~2.1μm, for example, d o1 1.9 μm, 2 μm or 2.1 μm, which are not listed one by one in the embodiments of the present disclosure. o2 1.9μm~2.1μm, for example, d o2 It is 1.9 μm, 2 μm or 2.1 μm, which are not listed one by one in the embodiments of the present disclosure.

[0114] By configuring in this manner, the distance between the connecting line where at least one of the first electrode 311, the second electrode 321, and the third electrode 331 overlaps with its orthographic projection can be appropriately adjusted to appropriately increase or decrease the parasitic capacitance corresponding to the electrode, thereby appropriately adjusting the lighting speed of the light-emitting device to which the electrode belongs. For example, for a light-emitting device with a slow lighting speed, the distance between the electrode of the light-emitting device and the connecting line where its orthographic projection overlaps can be appropriately increased to appropriately reduce the parasitic capacitance corresponding to the electrode, thereby appropriately increasing the lighting speed of the light-emitting device with a slow lighting speed. For another example, for a light-emitting device with a fast lighting speed, the distance between the electrode of the light-emitting device and the connecting line where its orthographic projection overlaps can be appropriately decreased to appropriately increase the parasitic capacitance corresponding to the electrode, thereby appropriately reducing the lighting speed of the light-emitting device with a fast lighting speed.

[0115] In some examples, d1 / d2 is less than or equal to 1.3, and / or d1 / d3 is less than or equal to 1.3.

[0116] Setting it in this way can improve the problem of excessive increase in the distance d1 between the first electrode 311 and the first connecting line 2011, which leads to excessive increase in the lighting speed of the first light-emitting device 31, and reduce the risk of excessive increase in the lighting speed of the first light-emitting device 31, which leads to the display panel 100 appearing reddish.

[0117] Exemplarily, d1 is 2.2 μm to 2.4 μm, for example, d1 is 2.2 μm, 2.3 μm, or 2.4 μm. The embodiments disclosed herein are not listed one by one. d2 is 1.9 μm to 2.1 μm, for example, d2 is 1.9 μm, 2 μm, or 2.1 μm. The embodiments disclosed herein are not listed one by one. d3 is 1.9 μm to 2.1 μm, for example, d3 is 1.9 μm, 2 μm, or 2.1 μm. The embodiments disclosed herein are not listed one by one.

[0118] In other examples, d2 / d1 is less than or equal to 1.3, and / or d2 / d3 is less than or equal to 1.3.

[0119] Setting it in this way can improve the problem of excessive increase in the distance d2 between the second electrode 321 and the second connecting line 2012, which leads to excessive increase in the lighting speed of the second light-emitting device 32, and reduce the risk of excessive increase in the lighting speed of the second light-emitting device 32, which leads to the display panel 100 appearing bluish.

[0120] Exemplarily, d2 is 2.2 μm to 2.4 μm, for example, d2 is 2.2 μm, 2.3 μm, or 2.4 μm. The embodiments of the present disclosure are not listed one by one. d1 is 1.9 μm to 2.1 μm, for example, d1 is 1.9 μm, 2 μm, or 2.1 μm, and the embodiments of the present disclosure are not listed one by one. d3 is 1.9 μm to 2.1 μm, for example, d3 is 1.9 μm, 2 μm, or 2.1 μm, and the embodiments of the present disclosure are not listed one by one.

[0121] In yet other examples, d3 / d1 is less than or equal to 1.3, and / or d3 / d2 is less than or equal to 1.3.

[0122] Setting it in this way can improve the problem of excessive increase in the distance d3 between the third electrode 333 and the third connecting line 2013, which leads to excessive increase in the lighting speed of the third light-emitting device 33, and reduce the risk of excessive increase in the lighting speed of the third light-emitting device 33, which leads to the display panel 100 appearing green.

[0123] Exemplarily, d3 is 2.2 μm to 2.4 μm, for example, d3 is 2.2 μm, 2.3 μm, or 2.4 μm. The embodiments of the present disclosure are not listed one by one. d1 is 1.9 μm to 2.1 μm, for example, d1 is 1.9 μm, 2 μm, or 2.1 μm. The embodiments of the present disclosure are not listed one by one. d2 is 1.9 μm to 2.1 μm, for example, d2 is 1.9 μm, 2 μm, or 2.1 μm. The embodiments of the present disclosure are not listed one by one.

[0124] In some embodiments, as shown in Figures 16 to 18, at least two of the dielectric constant ε1 of the first insulating portion 2021, the dielectric constant ε2 of the second insulating portion 2022, and the dielectric constant ε3 of the third insulating portion 2023 are not equal, so that the difference between the first parasitic capacitance, the second parasitic capacitance, and the third parasitic capacitance is within a preset range.

[0125] In this manner, the lighting speed of the light-emitting device corresponding to the insulating portion can be adjusted by changing the dielectric constant of at least one of the first insulating portion 2021, the second insulating portion 2022, and the third insulating portion 2023 to increase or decrease the parasitic capacitance corresponding to the insulating portion. For example, for a light-emitting device with a slow lighting speed, the dielectric constant of the insulating portion between the connecting line where the electrode of the light-emitting device and its orthographic projection overlap is reduced to reduce the parasitic capacitance corresponding to the electrode, thereby increasing the lighting speed of the light-emitting device with a slow lighting speed; for another example, for a light-emitting device with a fast lighting speed, the dielectric constant of the insulating portion between the connecting line where the electrode of the light-emitting device and its orthographic projection overlap is increased to increase the parasitic capacitance corresponding to the electrode, thereby reducing the lighting speed of the light-emitting device with a slow lighting speed. In this manner, the difference in the lighting speeds of the first light-emitting device 31, the second light-emitting device 32, and the third light-emitting device 33 can be reduced, thereby improving the problem of color shift when the display panel 100 switches from a black screen to a white screen.

[0126] According to the formula C=εS / (4πkd), the capacitance value C of the capacitor is proportional to the dielectric constant ε between the two plates of the capacitor. That is, the smaller the dielectric constant ε between the two plates of the capacitor, the smaller the capacitance value C of the capacitor.

[0127] In some embodiments, the dielectric constant of the insulating part between the electrode of the light-emitting device with a slow lighting speed and the connecting line where its orthographic projection overlaps is reduced, the parasitic capacitance corresponding to the electrode is reduced, the lighting speed of the light-emitting device with a slow lighting speed is increased, and the difference in the lighting speeds of the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33 is reduced, thereby improving the problem of color deviation in the display panel 100 when switching from a black screen to a white screen.

[0128] As shown in FIG. 16 to FIG. 18 , among the first insulating portion 2021 , the second insulating portion 2022 , and the third insulating portion 2023 , the dielectric constant of one is smaller than the dielectric constants of the other two.

[0129] This arrangement can reduce the parasitic capacitance corresponding to the insulating part with the smallest dielectric constant among the first insulating part 2021, the second insulating part 2022 and the third insulating part 2023, increase the lighting speed of the light-emitting device to which the electrode corresponding to the insulating part belongs, thereby reducing the difference in the lighting speed of the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33, and improving the problem of color deviation when the display panel 100 switches from a black screen to a white screen.

[0130] In some examples, as shown in FIG16 , the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a bluish tint appears, indicating that the first light-emitting device 31 is lit more slowly than the second light-emitting device 32 and the third light-emitting device 33. In this case, the dielectric constant ε1 of the first insulating portion 2021 is set to be smaller than the dielectric constant ε2 of the second insulating portion 2022, and smaller than the dielectric constant ε3 of the third insulating portion 2023. Furthermore, the dielectric constant ε2 of the second insulating portion 2022 can be greater than the dielectric constant ε3 of the third insulating portion 2023, or smaller than the dielectric constant ε3 of the third insulating portion 2023, or equal to the dielectric constant ε3 of the third insulating portion 2023.

[0131] By setting in this way, the capacitance value of the first parasitic capacitor can be reduced, thereby increasing the lighting speed of the first light-emitting device 31, and further improving the problem of the display panel 100 appearing bluish when switching from a black screen to a white screen.

[0132] In other examples, as shown in FIG17 , the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. If the display panel 100 exhibits a yellowish tint when switching from a black screen to a white screen, this indicates that the second light-emitting device 32 is lit more slowly than the first light-emitting device 31 and the third light-emitting device 33. In this case, the dielectric constant ε2 of the second insulating portion 2022 is set to be smaller than the dielectric constant ε3 of the third insulating portion 2023, and smaller than the dielectric constant ε1 of the first insulating portion 2021. Furthermore, the dielectric constant ε3 of the third insulating portion 2023 may be greater than the dielectric constant ε1 of the first insulating portion 2021, may be smaller than the dielectric constant ε1 of the first insulating portion 2021, or may be equal to the dielectric constant ε1 of the first insulating portion 2021.

[0133] By setting it in this way, the capacitance value of the second parasitic capacitor can be reduced, thereby increasing the lighting speed of the second light-emitting device 32, and further improving the problem of the yellowish phenomenon when the display panel 100 switches from a black screen to a white screen.

[0134] In some other examples, as shown in FIG18 , the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a purple-pink phenomenon appears, indicating that the third light-emitting device 33 is slower to light up than the first light-emitting device 31 and the second light-emitting device 32. In this case, the dielectric constant ε3 of the third insulating portion 2023 is set to be smaller than the dielectric constant ε1 of the first insulating portion 2021 and smaller than the dielectric constant ε2 of the second insulating portion 2022. Furthermore, the dielectric constant ε1 of the first insulating portion 2021 may be greater than the dielectric constant ε2 of the second insulating portion 2022, may be smaller than the dielectric constant ε2 of the second insulating portion 2022, or may be equal to the dielectric constant ε2 of the second insulating portion 2022.

[0135] By setting it in this way, the capacitance value of the third parasitic capacitor can be reduced, thereby increasing the lighting speed of the third light-emitting device 33, and further improving the problem of the display panel 100 having a purple-pink color when switching from a black screen to a white screen.

[0136] In some embodiments, as shown in Figures 16 to 18, the first insulating portion 2021, the second insulating portion 2022, and the third insulating portion 2023 have the same dielectric constant as the first insulating portion 2021, the second insulating portion 2022, and the third insulating portion 2023. The two portions with relatively large dielectric constants are integrally arranged. The portion with the smallest dielectric constant is embedded in the integral structure formed by the two portions with relatively large dielectric constants.

[0137] In some examples, as shown in FIG16 , the dielectric constant ε1 of the first insulating portion 2021 is the smallest, and the dielectric constant ε2 of the second insulating portion 2022 is equal to the dielectric constant ε3 of the third insulating portion 2023. The second insulating portion 2022 and the third insulating portion 2023 are integrally provided, and the first insulating portion 2021 is embedded in the integral structure formed by the second insulating portion 2022 and the third insulating portion 2023.

[0138] In other examples, as shown in FIG17 , the dielectric constant ε2 of the second insulating portion 2022 is the smallest, and the dielectric constant ε1 of the first insulating portion 2021 is equal to the dielectric constant ε3 of the third insulating portion 2023. The first insulating portion 2021 and the third insulating portion 2023 are integrally provided, and the second insulating portion 2022 is embedded in the integral structure formed by the first insulating portion 2021 and the third insulating portion 2023.

[0139] In yet other examples, as shown in FIG18 , the dielectric constant ε3 of the third insulating portion 2023 is the smallest, and the dielectric constant ε2 of the second insulating portion 2022 is equal to the dielectric constant ε1 of the first insulating portion 2021. The second insulating portion 2022 and the first insulating portion 2021 are integrally provided, and the third insulating portion 2023 is embedded in the integral structure formed by the second insulating portion 2022 and the first insulating portion 2021.

[0140] In some embodiments, as shown in FIG16 to FIG18, the dielectric constant ε1 of the first insulating portion 2021, the dielectric constant ε2 of the second insulating portion 2022, and the dielectric constant ε3 of the third insulating portion 2023, the smallest dielectric constant is ε max , and the other two dielectric constants are ε o1 and ε o2 Among them, ε max / ε o1 greater than or equal to 0.7, and / or, ε max / ε o2 Greater than or equal to 0.7.

[0141] For example, ε max is 2.3 to 3.1, for example, ε max is 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0 or 3.1. The embodiments of the present disclosure are not listed one by one. o1 is 3.2 to 3.4, for example, ε o1 3.2, 3.3 or 3.4. The embodiments of the present disclosure are not listed one by one. o2 is 3.2 to 3.4, for example, ε o2 The embodiments of the present disclosure are not listed one by one.

[0142] By configuring in this manner, the dielectric constant of at least one of the first insulating portion 2021, the second insulating portion 2022, and the third insulating portion 2023 can be appropriately adjusted to appropriately increase or decrease the parasitic capacitance corresponding to the insulating portion, thereby appropriately adjusting the lighting speed of the light-emitting device to which the electrode corresponding to the insulating portion belongs. For example, for a light-emitting device with a slow lighting speed, the dielectric constant of the insulating portion between the electrode of the light-emitting device and the connecting line where the orthographic projection overlaps is appropriately reduced to appropriately reduce the parasitic capacitance corresponding to the electrode, thereby appropriately increasing the lighting speed of the light-emitting device with a slow lighting speed. For another example, for a light-emitting device with a fast lighting speed, the dielectric constant of the insulating portion between the electrode of the light-emitting device and the connecting line where the orthographic projection overlaps is appropriately increased to appropriately increase the parasitic capacitance corresponding to the electrode, thereby appropriately reducing the lighting speed of the light-emitting device with a fast lighting speed.

[0143] In some examples, ε1 / ε2 is greater than or equal to 0.7, and / or, ε1 / ε3 is greater than or equal to 0.7.

[0144] Setting it in this way can improve the problem of excessive reduction of the dielectric constant ε1 of the first insulating part 2021, which leads to excessive increase in the lighting speed of the first light-emitting device 31, and reduce the risk of excessive increase in the lighting speed of the first light-emitting device 31, which leads to the display panel 100 appearing reddish.

[0145] Exemplarily, ε1 is 2.3 to 3.1, for example, ε1 is 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, or 3.1. The embodiments of the present disclosure are not listed one by one. ε2 is 3.2 to 3.4, for example, ε2 is 3.2, 3.3, or 3.4. The embodiments of the present disclosure are not listed one by one. ε3 is 3.2 to 3.4, for example, ε3 is 3.2, 3.3, or 3.4. The embodiments of the present disclosure are not listed one by one.

[0146] In other examples, ε2 / ε1 is greater than or equal to 0.7, and / or ε2 / ε3 is greater than or equal to 0.7.

[0147] Setting it in this way can improve the problem of excessive reduction of the dielectric constant ε2 of the second insulating part 2022, which leads to excessive increase in the lighting speed of the second light-emitting device 32, and reduce the risk of excessive increase in the lighting speed of the second light-emitting device 32, which leads to the display panel 100 appearing bluish.

[0148] Exemplarily, ε2 is 2.3 to 3.1, for example, ε2 is 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, or 3.1. The embodiments of the present disclosure are not listed one by one. ε1 is 3.2 to 3.4, for example, ε1 is 3.2, 3.3, or 3.4. The embodiments of the present disclosure are not listed one by one. ε3 is 3.2 to 3.4, for example, ε3 is 3.2, 3.3, or 3.4. The embodiments of the present disclosure are not listed one by one.

[0149] In yet other examples, ε3 / ε1 is greater than or equal to 0.7, and / or ε3 / ε2 is greater than or equal to 0.7.

[0150] Setting it in this way can improve the problem of excessive reduction of the dielectric constant ε3 of the third insulating part 2023, which leads to excessive increase in the lighting speed of the third light-emitting device 33, and reduce the risk of excessive increase in the lighting speed of the third light-emitting device 33, which leads to the display panel 100 appearing green.

[0151] Exemplarily, ε3 is 2.3 to 3.1, for example, ε3 is 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, or 3.1. The embodiments of the present disclosure are not listed one by one. ε1 is 3.2 to 3.4, for example, ε1 is 3.2, 3.3, or 3.4. The embodiments of the present disclosure are not listed one by one. ε2 is 3.2 to 3.4, for example, ε2 is 3.2, 3.3, or 3.4. The embodiments of the present disclosure are not listed one by one.

[0152] In some embodiments, as shown in Figures 6 to 9 and Figures 19 to 21, in the orthographic projection onto the substrate 10, the portion of the first connecting line 2011 overlapping with the first electrode 331 is the first connecting segment L1, the portion of the second connecting line 2012 overlapping with the second electrode 332 is the second connecting segment L2, and the portion of the third connecting line 2013 overlapping with the third electrode 333 is the third connecting segment L3.

[0153] At least two of the widths of the first connecting segment L1, the second connecting segment L2, and the third connecting segment L2 are unequal, such that the difference between the first parasitic capacitance, the second parasitic capacitance, and the third parasitic capacitance is within a predetermined range. The width of the first connecting segment L1 refers to the dimension of the first connecting segment L1 along a first direction X, which is perpendicular to the extension direction of the connecting lines (the first connecting line 2011, the second connecting line 2012, and the third connecting line 2013) and perpendicular to the substrate 10.

[0154] In this manner, by changing the width of at least one of the first connecting segment L1, the second connecting segment L2, and the third connecting segment L3, the area facing the electrode where the connecting segment overlaps with its orthographic projection can be increased or decreased, thereby increasing or decreasing the parasitic capacitance corresponding to the electrode and adjusting the lighting speed of the light-emitting device to which the electrode belongs. For example, for a light-emitting device with a slow lighting speed, the area facing the connecting segment where the electrode of the light-emitting device overlaps with its orthographic projection can be reduced to reduce the parasitic capacitance corresponding to the electrode, thereby increasing the lighting speed of the light-emitting device with a slow lighting speed. For another example, for a light-emitting device with a fast lighting speed, the area facing the connecting segment where the electrode of the light-emitting device overlaps with its orthographic projection can be increased to increase the parasitic capacitance corresponding to the electrode, thereby reducing the lighting speed of the light-emitting device with a fast lighting speed. In this manner, the difference in the lighting speeds of the first light-emitting device 31, the second light-emitting device 32, and the third light-emitting device 33 can be reduced, thereby improving the problem of color shift when the display panel 100 switches from a black screen to a white screen.

[0155] According to the formula C=εS / (4πkd), the capacitance C of a capacitor is proportional to the area S of the two plates facing each other. That is, the larger the area S of the two plates facing each other, the larger the capacitance C of the capacitor.

[0156] In some embodiments, by reducing the facing area of ​​the connecting segment where the electrode of the light-emitting device with a slow lighting speed overlaps with its positive projection, the parasitic capacitance corresponding to the electrode is reduced, the lighting speed of the light-emitting device with a slow lighting speed is increased, and the difference in the lighting speeds of the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33 is reduced, the problem of color deviation occurring when the display panel 100 switches from a black screen to a white screen is improved.

[0157] As shown in FIG. 19 to FIG. 21 , one of the width of the first connecting segment L1 , the width of the second connecting segment L2 , and the width of the third connecting segment L3 is smaller than the other two.

[0158] By setting it in this way, the area facing the electrode where the connecting segment with the smallest width among the first connecting segment L1, the second connecting segment L2 and the third connecting segment L3 overlaps with its positive projection can be reduced, thereby increasing the lighting speed of the light-emitting device to which the electrode belongs, thereby reducing the difference in the lighting speed of the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33, and improving the problem of color deviation in the display panel 100 when switching from a black screen to a white screen.

[0159] In some examples, as shown in FIG19 , the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a bluish tint appears. This indicates that the first light-emitting device 31 is lit more slowly than the second light-emitting device 32 and the third light-emitting device 33. In this case, the width of the first connecting segment L1 is set to be smaller than the width of the second connecting segment L2 and smaller than the width of the third connecting segment L3. Furthermore, the width of the second connecting segment L2 can be greater than, equal to, or even equal to the width of the third connecting segment L3.

[0160] By setting in this way, the capacitance value of the first parasitic capacitor can be reduced, thereby increasing the lighting speed of the first light-emitting device 31, and further improving the phenomenon that the display panel 100 appears bluish when the black screen switches to the white screen.

[0161] In other examples, as shown in FIG20 , the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a yellowish tint appears, indicating that the second light-emitting device 32 is lit more slowly than the first light-emitting device 31 and the third light-emitting device 33. In this case, the width of the second connecting segment L2 is set to be smaller than the width of the first connecting segment L1 and smaller than the width of the third connecting segment L3. Furthermore, the width of the first connecting segment L1 can be greater than, equal to, or even equal to the width of the third connecting segment L3.

[0162] By setting it in this way, the capacitance value of the second parasitic capacitor can be reduced, thereby increasing the lighting speed of the second light-emitting device 32, and further improving the problem of the yellowish phenomenon when the display panel 100 switches from a black screen to a white screen.

[0163] In some other examples, as shown in FIG21 , the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a blue light-emitting device, and the third light-emitting device 33 is a green light-emitting device. When the display panel 100 switches from a black screen to a white screen, a purple-pink phenomenon appears. This indicates that the third light-emitting device 33 is lit more slowly than the second light-emitting device 32 and the first light-emitting device 31. In this case, the width of the third connecting segment L3 is set to be smaller than the width of the first connecting segment L1 and smaller than the width of the second connecting segment L2. Furthermore, the width of the first connecting segment L1 can be greater than, equal to, or equal to the width of the second connecting segment L2.

[0164] By setting it in this way, the capacitance value of the third parasitic capacitor can be reduced, thereby increasing the lighting speed of the third light-emitting device 33, and further improving the problem of the display panel 100 having a purple-pink color when switching from a black screen to a white screen.

[0165] In some embodiments, as shown in Figures 6 to 9, in the orthographic projection onto the substrate 10, the portion of the first connecting line 2011 that does not overlap with the first electrode 331 is the fourth connecting segment L4, the portion of the second connecting line 2012 that does not overlap with the second electrode 332 is the fifth connecting segment L5, and the portion of the third connecting line 2013 that does not overlap with the third electrode 333 is the sixth connecting segment L6.

[0166] In some examples, as shown in FIG. 7 and FIG. 9 , the width of the fourth connecting segment L4 is greater than the width of the first connecting segment L1 .

[0167] By configuring in this manner, the resistance of the first connection line 2011 can be reduced, and the voltage drop on the first connection line 2011 can be lowered.

[0168] In other examples, as shown in FIG6 and FIG8 , the width L4 of the fourth connecting segment is equal to the width of the first connecting segment L4.

[0169] In this manner, the width of the first connection line 2011 is uniform everywhere, which can reduce the risk of signal reflection on the first connection line 2011 .

[0170] In some examples, as shown in FIG. 7 and FIG. 9 , the width of the fifth connecting segment L5 is greater than the width of the second connecting segment L2 .

[0171] By configuring in this manner, the resistance of the second connection line 2012 can be reduced, thereby lowering the voltage drop on the second connection line 2012 .

[0172] In other examples, as shown in FIG6 and FIG8 , the width of the fifth connecting segment L5 is equal to the width of the second connecting segment L2.

[0173] In this manner, the width of the second connection line 2012 is uniform everywhere, which can reduce the risk of signal reflection on the second connection line 2012 .

[0174] In some examples, as shown in FIG. 7 and FIG. 9 , the width of the sixth connecting segment L6 is greater than the width of the third connecting segment L3 .

[0175] By configuring in this manner, the resistance of the third connection line 2013 can be reduced, thereby lowering the voltage drop on the third connection line 2013 .

[0176] In other examples, as shown in FIG6 and FIG8 , the width of the sixth connecting segment L6 is equal to the width of the third connecting segment L3 .

[0177] In this way, the width of the third connection line 2013 is uniform everywhere, which can reduce signal reflection on the third connection line 2013 .

[0178] The arrangement of the first light emitting device 31 , the second light emitting device 32 and the third light emitting device 33 will be described below.

[0179] In some embodiments, as shown in Figures 6 and 7, a plurality of first light-emitting devices 31, a plurality of second light-emitting devices 32, and a plurality of third light-emitting devices 33 are arranged in a plurality of rows along a first direction X and in a plurality of columns along a second direction Y. The light-emitting devices in each row are arranged cyclically in the order of the first light-emitting devices 31, the second light-emitting devices 32, and the third light-emitting devices 33 along the first direction X. The light-emitting devices in each column include the first light-emitting devices 31, the second light-emitting devices 32, or the third light-emitting devices 33 arranged along the second direction Y.

[0180] At this time, the first connection line 2011 , the second connection line 2012 and the third connection line 2013 are different connection lines.

[0181] In other embodiments, as shown in Figures 8 and 9, a plurality of first light-emitting devices 31, a plurality of second light-emitting devices 32, and a plurality of third light-emitting devices 33 are arranged in a plurality of rows along the first direction X and in a plurality of columns along the second direction Y. Each row of light-emitting devices includes a plurality of first light-emitting devices 31 and a plurality of third light-emitting devices 33 arranged alternately along the first direction X, or each row of light-emitting devices includes a plurality of second light-emitting devices 32 arranged along the first direction X; a light-emitting device row consisting of a plurality of first light-emitting devices 31 and a plurality of third light-emitting devices 33 is arranged alternately with a light-emitting device row consisting of a plurality of second light-emitting devices 32. Each column of light-emitting devices includes a plurality of second light-emitting devices 32 and a plurality of third light-emitting devices 33 arranged alternately along the second direction Y, or each column of light-emitting devices includes a plurality of first light-emitting devices 31 arranged along the second direction Y; a light-emitting device column consisting of a plurality of second light-emitting devices 32 and a plurality of third light-emitting devices 33 is arranged alternately with a light-emitting device column consisting of a plurality of first light-emitting devices 31.

[0182] At this time, the second connection line 2012 is multiplexed into the third connection line 2013 , and the second connection segment L2 and the third connection segment L3 are different parts of the second connection line 2012 .

[0183] The present disclosure also provides a method S100 for manufacturing a display panel 100, which is used to manufacture the display panel 100 of any of the above embodiments. As shown in FIG22 , the method S100 includes: S110 to S130.

[0184] S110 : preparing a first source-drain conductive layer 201 on the substrate 10 .

[0185] The first source-drain conductive layer 201 includes a first connecting line 2011 , a second connecting line 2012 and a third connecting line 2013 .

[0186] S120 : using a half-tone mask to form a first insulating layer 202 on a side of the first source / drain conductive layer 201 away from the substrate 10 .

[0187] S130 : preparing a light-emitting device layer 30 on a side of the first insulating layer 202 away from the substrate 10 .

[0188] Among them, the light-emitting device layer 30 includes a first electrode layer 301, a light-emitting functional layer 302 and a second electrode layer 303 which are stacked in sequence in a direction away from the substrate 10. The light-emitting device layer 30 forms a first light-emitting device 31, a second light-emitting device 32 and a third light-emitting device 33 with different luminous colors. The first electrode layer 301 includes a first electrode 311 belonging to the first light-emitting device 31, a second electrode 321 belonging to the second light-emitting device 32, and a third electrode 331 belonging to the third light-emitting device 33. In the orthographic projection onto the substrate 10, the first electrode 311 overlaps with the first connecting line 2011, the second electrode 321 overlaps with the second connecting line 2012, and the third electrode 331 overlaps with the third connecting line 2013.

[0189] In the display panel obtained by the above-described manufacturing method, the thickness of the first insulating layer 202 between the first electrode 311 and the first connecting line 2011, the thickness between the second electrode 321 and the second connecting line 2012, and the thickness between the third electrode 331 and the third connecting line 2013 are unequal. This ensures that the difference between the parasitic capacitance formed between the first electrode 311 and the first connecting line 2011, the parasitic capacitance formed between the second electrode 321 and the second connecting line 2012, and the parasitic capacitance formed between the third electrode 331 and the third connecting line 2013 is within a preset range. This reduces the difference in the lighting speed of the first, second, and third light-emitting devices 31, 32, and 33, and improves the color shift problem that occurs when the display panel 100 switches from black to white.

[0190] The present disclosure also provides a method S200 for manufacturing a display panel 100, which is used to manufacture the display panel 100 of any of the above embodiments. As shown in FIG23 , the method S200 includes: S210 to S230.

[0191] S210 : preparing a first source-drain conductive layer 201 on the substrate 10 .

[0192] The first source-drain conductive layer 201 includes a first connecting line 2011 , a second connecting line 2012 and a third connecting line 2013 .

[0193] S220 : forming a first insulating layer 202 on a side of the first source / drain conductive layer 201 away from the substrate 10 .

[0194] The first insulating layer 202 includes a first insulating portion 2021 , a second insulating portion 2022 and a third insulating portion 2023 .

[0195] S230 : preparing a light-emitting device layer 30 on a side of the first insulating layer 202 away from the substrate 10 .

[0196] The light-emitting device layer 30 includes a first electrode layer 301, a light-emitting functional layer 302, and a second electrode layer 303 which are stacked in sequence in a direction away from the substrate 10. The light-emitting device layer 30 forms a first light-emitting device 31, a second light-emitting device 32, and a third light-emitting device 33 having different luminous colors. The first electrode layer 301 includes a first electrode 311 belonging to the first light-emitting device 31, a second electrode 321 belonging to the second light-emitting device 32, and a third electrode 331 belonging to the third light-emitting device 33. In the orthographic projection onto the substrate 10, the first electrode 311 overlaps with the first connecting line 2011, the second electrode 321 overlaps with the second connecting line 2012, and the third electrode 331 overlaps with the third connecting line 2013.

[0197] In the display panel obtained by the above-described manufacturing method, the first insulating portion 2021 is disposed between the first electrode 311 and the first connecting line 2011, the second insulating portion 2022 is disposed between the second electrode 321 and the second connecting line 2012, and the third insulating portion 2023 is disposed between the third electrode 331 and the third connecting line 2013. At least two of the dielectric constant ε1 of the first insulating portion 2021, the dielectric constant ε2 of the second insulating portion 2022, and the dielectric constant ε3 of the third insulating portion 2023 are unequal. This ensures that the difference between the parasitic capacitance formed between the first electrode 311 and the first connecting line 2011, the parasitic capacitance formed between the second electrode 321 and the second connecting line 2012, and the parasitic capacitance formed between the third electrode 331 and the third connecting line 2013 is within a predetermined range. This reduces the difference in the lighting speed of the first, second, and third light-emitting devices 31, 32, and 33, thereby improving the color shift problem that occurs when the display panel 100 switches from black to white.

[0198] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0199] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A display panel, comprising: substrate; A first source-drain conductive layer, located on one side of the substrate; The first source-drain conductive layer includes a first connecting line, a second connecting line and a third connecting line; A first insulating layer, located on a side of the first source-drain conductive layer away from the substrate; a light-emitting device layer, located on a side of the first insulating layer away from the substrate, the light-emitting device layer comprising a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially stacked in a direction away from the substrate, the light-emitting device layer forming a first light-emitting device, a second light-emitting device, and a third light-emitting device having different light-emitting colors; the first electrode layer comprising a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device, in an orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line; In which, along the direction perpendicular to the substrate, at least two of the distance between the first electrode and the first connecting line, the distance between the second electrode and the second connecting line, and the distance between the third electrode and the third connecting line are not equal, so that the difference between the parasitic capacitance formed by the first electrode and the first connecting line, the parasitic capacitance formed by the second electrode and the second connecting line, and the parasitic capacitance formed by the third electrode and the third connecting line is within a preset range.

2. The display panel according to claim 1, wherein: A distance between a connection line overlapping with the orthographic projection of one of the first electrode, the second electrode and the third electrode is greater than a distance between connection lines overlapping with the orthographic projections of the other two electrodes.

3. The display panel according to claim 2, wherein: The first insulating layer includes a first insulating portion, a second insulating portion and a third insulating portion, the first insulating portion is arranged between the first electrode and the first connecting line, the second insulating portion is arranged between the second electrode and the second connecting line, and the third insulating portion is arranged between the third electrode and the third connecting line; wherein, one of the thickness of the first insulating portion, the thickness of the second insulating portion and the thickness of the third insulating portion is greater than the other two.

4. The display panel according to claim 3, wherein: A surface of one of the first insulating portion, the second insulating portion, and the third insulating portion that is away from the substrate is higher than surfaces of the other two insulating portions that are away from the substrate.

5. The display panel according to claim 4, wherein: The first connection line, the second connection line and the third connection line have the same thickness.

6. The display panel according to claim 3, wherein: The thickness of one of the first connection line, the second connection line and the third connection line is smaller than the thickness of the other two.

7. The display panel according to claim 6, wherein: The first insulating portion, the second insulating portion, and the third insulating portion are flush with a surface away from the substrate.

8. The display panel according to any one of claims 3 to 7, wherein: The first insulating portion, the second insulating portion and the third insulating portion are integrally provided.

9. The display panel according to any one of claims 2 to 8, wherein: The largest distance among the distance between the first electrode and the first connecting line, the distance between the second electrode and the second connecting line, and the distance between the third electrode and the third connecting line is d max , and the other two distances are d o1 and d o2 ; Among them, d max / d o1 Less than or equal to 1.3, and / or, d max / d o2 Less than or equal to 1.

3.

10. A display panel, comprising: substrate; A first source-drain conductive layer, located on one side of the substrate; The first source-drain conductive layer includes a first connecting line, a second connecting line and a third connecting line; a light-emitting device layer, located on a side of the first source-drain conductive layer away from the substrate, the light-emitting device layer comprising a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially stacked in a direction away from the substrate, the light-emitting device layer forming a first light-emitting device, a second light-emitting device, and a third light-emitting device having different light-emitting colors; the first electrode layer comprising a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device, in an orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line; a first insulating layer, located between the first source-drain conductive layer and the first electrode layer; the first insulating layer comprises a first insulating portion, a second insulating portion and a third insulating portion, the first insulating portion is arranged between the first electrode and the first connecting line, the second insulating portion is arranged between the second electrode and the second connecting line, and the third insulating portion is arranged between the third electrode and the third connecting line; Among them, at least two of the dielectric constants of the first insulating part, the dielectric constants of the second insulating part and the dielectric constants of the third insulating part are not equal, so that the difference between the parasitic capacitance formed by the first electrode and the first connecting line, the parasitic capacitance formed by the second electrode and the second connecting line, and the parasitic capacitance formed by the third electrode and the third connecting line is within a preset range.

11. The display panel according to claim 10, wherein: One of the dielectric constant of the first insulating portion, the dielectric constant of the second insulating portion, and the dielectric constant of the third insulating portion is smaller than the other two.

12. The display panel according to claim 11, wherein: Among the first insulating part, the second insulating part and the third insulating part, the two with relatively larger dielectric constants have the same dielectric constant, and the two with relatively larger dielectric constants are integrally arranged; the one with the smallest dielectric constant is embedded in the integral structure formed by the two with relatively larger dielectric constants.

13. The display panel according to any one of claims 11 to 12, wherein: The smallest dielectric constant among the dielectric constant of the first insulating portion, the dielectric constant of the second insulating portion, and the dielectric constant of the third insulating portion is ε max , and the other two dielectric constants are ε o1 and ε o2 ; Among them, ε max / ε o1 greater than or equal to 0.7, and / or, ε max / ε o2 Greater than or equal to 0.

7.

14. A display panel, comprising: substrate; A first source-drain conductive layer, located on one side of the substrate; The first source-drain conductive layer includes a first connecting line, a second connecting line and a third connecting line; A first insulating layer, located on a side of the first source-drain conductive layer away from the substrate; a light-emitting device layer, located on a side of the first insulating layer away from the substrate, the light-emitting device layer comprising a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially stacked in a direction away from the substrate, the light-emitting device layer forming a first light-emitting device, a second light-emitting device, and a third light-emitting device having different luminous colors; the first electrode layer comprising a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device, in an orthographic projection onto the substrate, the first electrode overlaps with a first connecting segment in the first connecting line, the second electrode overlaps with a second connecting segment in the second connecting line, and the third electrode overlaps with a third connecting segment in the third connecting line; Among them, at least two of the width of the first connecting segment, the width of the second connecting segment and the width of the third connecting segment are not equal, so that the difference between the parasitic capacitance formed by the first electrode and the first connecting line, the parasitic capacitance formed by the second electrode and the second connecting line, and the parasitic capacitance formed by the third electrode and the third connecting line is within a preset range.

15. The display panel according to claim 14, wherein: One of the width of the first connecting segment, the width of the second connecting segment, and the width of the third connecting segment is smaller than the other two.

16. The display panel according to claim 14 or 15, wherein: In the orthographic projection onto the substrate, a portion of the first connecting line that does not overlap with the first electrode is a fourth connecting segment, a portion of the second connecting line that does not overlap with the second electrode is a fifth connecting segment, and a portion of the third connecting line that does not overlap with the third electrode is a sixth connecting segment; Wherein, the width of the fourth connecting segment is greater than the width of the first connecting segment; and / or, the width of the fifth connecting segment is greater than the width of the second connecting segment; and / or, the width of the sixth connecting segment is greater than the width of the third connecting segment.

17. The display panel according to any one of claims 14 to 16, wherein: A plurality of the first light-emitting devices, a plurality of the second light-emitting devices and a plurality of the third light-emitting devices are arranged in a plurality of rows along the first direction and in a plurality of columns along the second direction; each row of light-emitting devices includes a plurality of the first light-emitting devices and a plurality of the third light-emitting devices arranged alternately along the first direction, or each row of light-emitting devices includes a plurality of the second light-emitting devices arranged along the first direction, and a light-emitting device row formed by a plurality of the first light-emitting devices and a plurality of the third light-emitting devices and a light-emitting device row formed by a plurality of the second light-emitting devices are arranged alternately; each column of light-emitting devices includes a plurality of the second light-emitting devices and a plurality of the third light-emitting devices arranged alternately along the second direction, or each column of light-emitting devices includes a plurality of the first light-emitting devices arranged along the second direction, a light-emitting device column formed by a plurality of the second light-emitting devices and a plurality of the third light-emitting devices and a light-emitting device column formed by a plurality of the first light-emitting device columns are arranged alternately; The second connection line is multiplexed as the third connection line, and the second connection segment and the third connection segment are different parts of the second connection line.

18. A display device comprising: The display panel according to any one of claims 1 to 17.

19. A method for preparing a display panel, comprising: Preparing a first source-drain conductive layer on a substrate; The first source-drain conductive layer includes a first connecting line, a second connecting line and a third connecting line; Using a half-tone mask to form a first insulating layer on a side of the first source-drain conductive layer away from the substrate; A light-emitting device layer is prepared on a side of the first insulating layer away from the substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer which are sequentially stacked in a direction away from the substrate, the light-emitting device layer forms a first light-emitting device, a second light-emitting device, and a third light-emitting device having different luminous colors, the first electrode layer includes a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device, and in an orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line; Among them, in the first insulating layer, at least two of the thickness of the portion located between the first electrode and the first connecting line, the thickness of the portion located between the second electrode and the second connecting line, and the thickness of the portion located between the third electrode and the third connecting line are not equal.

20. A method for preparing a display panel, comprising: Preparing a first source-drain conductive layer on a substrate; The first source-drain conductive layer includes a first connecting line, a second connecting line and a third connecting line; Forming a first insulating layer on a side of the first source-drain conductive layer away from the substrate; A light-emitting device layer is prepared on a side of the first insulating layer away from the substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer which are sequentially stacked in a direction away from the substrate, the light-emitting device layer forms a first light-emitting device, a second light-emitting device, and a third light-emitting device having different luminous colors, the first electrode layer includes a first electrode belonging to the first light-emitting device, a second electrode belonging to the second light-emitting device, and a third electrode belonging to the third light-emitting device, and in an orthographic projection onto the substrate, the first electrode overlaps with the first connecting line, the second electrode overlaps with the second connecting line, and the third electrode overlaps with the third connecting line; Among them, the first insulating layer includes a first insulating part, a second insulating part and a third insulating part, the first insulating part is arranged between the first electrode and the first connecting line, the second insulating part is arranged between the second electrode and the second connecting line, and the third insulating part is arranged between the third electrode and the third connecting line; at least two of the dielectric constants of the first insulating part, the second insulating part and the third insulating part are not equal.

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