Memory capacity adjusting method and apparatus, electronic device and storage medium

Abstract

A memory capacity adjusting method and apparatus, an electronic device and a storage medium. The method comprises: acquiring a memory setting value in the starting process of a basic input and output system; generating a first memory bank value according to configuration serial detection data of a memory module; determining a second memory bank value according to the memory setting value, the total memory capacity and the first memory bank value; updating the first memory bank value according to the second memory bank value to update the configuration serial detection data; and controlling the basic input and output system to start on the basis of the updated configuration serial detection data.

Description

Memory capacity adjustment method, device, electronic device and storage medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on December 1, 2023, with application number 202311639474.6 and titled “A memory capacity adjustment method, device, electronic device and storage medium,” the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of computer systems and storage technology, and in particular to a memory capacity adjustment method, a memory capacity adjustment device, an electronic device, and a storage medium. Background Art

[0004] In a computer system, all data and information must be stored in memory. Even though some processors support a certain amount of cache, these cache functions only provide basic instruction execution requirements when the processor is turned on. Similarly, the BIOS (Basic Input Output System) image also needs to run in a certain amount of memory space. The self-test program that starts when the server is turned on and the applications running under the system all require a certain amount of memory to support them. Therefore, memory is a physical device that must exist in any computer product with any architecture. The size of the memory capacity during server operation affects the operating efficiency. Therefore, in order to improve operating efficiency, the memory is often configured to be maximized, that is, all servers in the data center are configured to be maximized. However, such a configuration wastes memory, easily leads to increased power consumption, and shortens the life of the memory.

[0005] Summary of the Invention

[0006] In view of the above problems, embodiments of the present application are proposed to provide a memory capacity adjustment method, a memory capacity adjustment device, an electronic device and a storage medium that overcome the above problems or at least partially solve the above problems.

[0007] To solve the above problems, in a first aspect of the present application, an embodiment of the present application discloses a memory capacity adjustment method, which is applied to a server. The server is provided with at least one central processing unit (CPU), which is connected to at least one memory stick. The CPU is deployed with a basic input / output system (BIOS), which stores the total memory capacity corresponding to the memory stick. The method includes:

[0008] During BIOS startup, get the memory setting value;

[0009] Generate a first memory bank value based on the configuration serial detection data of the memory bar;

[0010] Determining a second memory bank value based on a memory setting value, a total memory capacity, and a first memory bank value;

[0011] updating the first memory bank value according to the second memory bank value to update the configuration serial detection data;

[0012] The basic input and output system is controlled to start based on the updated configuration serial detection data.

[0013] Optionally, the step of generating the first memory bank value according to the configuration serial detection data of the memory bank includes:

[0014] Through the bidirectional two-wire synchronous serial bus protocol, the address of the memory bar is read and the configuration serial detection structure is generated;

[0015] Determine the configuration serial detection data according to the configuration serial detection structure;

[0016] The number of banks in the serial probe data will be configured as the first bank value.

[0017] Optionally, determining the configuration serial detection data according to the configuration serial detection structure includes:

[0018] The configuration serial detection data is generated according to the data of each message position of the configuration serial detection structure.

[0019] Optionally, the step of determining the second memory bank value based on the memory setting value, the total memory capacity and the first memory bank value is:

[0020] Determine the adjustment multiplier value based on the memory setting value and the total memory capacity;

[0021] The second memory bank value is determined according to the adjustment multiplier value and the first memory bank value.

[0022] Optionally, the second memory bank value is a memory bank value that meets user requirements.

[0023] Optionally, the step of determining the adjustment multiplier value according to the memory setting value and the total memory capacity includes:

[0024] Calculate the ratio of memory setting value to total memory capacity,

[0025] Determine the ratio as the adjustment factor value.

[0026] Optionally, the step of determining the second memory bank value according to the adjustment multiplier value and the first memory bank value includes:

[0027] Determine whether the adjustment multiple is one;

[0028] In response to the adjustment factor being one, determining that the second memory bank value is equal to the first memory bank value;

[0029] In response to the adjustment factor not being one, a second memory bank value is calculated according to the adjustment factor value and the first memory bank value.

[0030] Optionally, the adjustment direction is determined based on the adjustment multiplier value, including:

[0031] When the adjustment multiplier is greater than one, the number of memory banks is increased;

[0032] Adjusting the multiplier has a temporary effect and reduces the number of memory banks.

[0033] Optionally, when the adjustment multiple is less than one, the step of calculating the second memory bank value based on the adjustment multiple value and the first memory bank value includes:

[0034] The product of the adjustment multiplier value and the first memory bank value is calculated as a second memory bank value, and the second memory bank value is smaller than the first memory bank value.

[0035] Optionally, when the adjustment multiple is greater than one, the step of calculating the second memory bank value based on the adjustment multiple value and the first memory bank value includes:

[0036] The product of the adjustment multiplier value and the first memory bank value is calculated as a second memory bank value, and the second memory bank value is greater than the first memory bank value.

[0037] Optionally, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data includes:

[0038] The first memory bank value is replaced with the second memory bank value.

[0039] Optionally, controlling the basic input / output system to start based on the updated configuration serial detection data includes:

[0040] When the server is powered on and initialized, the memory is configured.

[0041] Optionally, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data further includes:

[0042] Write the updated first memory bank value into the configuration serial detection data.

[0043] Optionally, the method further comprises:

[0044] Receive memory restoration setting instructions;

[0045] The first memory bank value is determined as the default restored memory bank value.

[0046] Optionally, the preset restoration memory bank value is pre-set data for restoring the number of memory banks; the size of the preset restoration memory bank value is set according to the architecture of the server.

[0047] Optionally, the method further comprises:

[0048] Updates the configured serial probe data with the preset restore memory bank values.

[0049] Optionally, the method further comprises:

[0050] In response to an input instruction for a memory setting value, the memory setting value is modified.

[0051] In a second aspect of the present application, an embodiment of the present application discloses a memory capacity adjustment device, which is applied to a server. The server is provided with at least one central processing unit (CPU), the CPU is connected to at least one memory stick, the CPU is deployed with a basic input / output system (BIOS), and the BIOS stores the total memory capacity corresponding to the memory stick. The device includes:

[0052] An acquisition module is used to acquire a memory setting value during the basic input and output system startup process, where the memory setting value is in a multiple relationship with the total memory capacity;

[0053] A first memory bank value determination module, configured to generate a first memory bank value according to the configuration serial detection data of the memory bank;

[0054] A second memory bank value determination module, configured to determine a second memory bank value based on a memory setting value, a total memory capacity, and a first memory bank value;

[0055] An updating module, configured to update the first memory bank value according to the second memory bank value, so as to update the configuration serial detection data;

[0056] The startup module is used to control the basic input and output system to start based on the updated configuration serial detection data.

[0057] In the third aspect of the present application, an embodiment of the present application discloses an electronic device, including a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, the steps of the above memory capacity adjustment method are implemented.

[0058] In the fourth aspect of the present application, an embodiment of the present application discloses a computer non-volatile readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above memory capacity adjustment method are implemented.

[0059] The embodiments of the present application include the following advantages:

[0060] The embodiment of the present application obtains a memory setting value during the startup of a basic input / output system; generates a first memory bank value based on the configuration serial detection data of a memory stick; determines a second memory bank value based on the memory setting value, the total memory capacity, and the first memory bank value; updates the first memory bank value based on the second memory bank value to update the configuration serial detection data; controls the basic input / output system to start based on the updated configuration serial detection data; and adjusts the memory bank value of the memory capacity based on the memory setting value when initializing the basic input / output system during the server startup process to achieve automatic dynamic adjustment of the memory capacity of the entire server, thereby meeting the actual business needs of customers, improving the service life of the memory, and reducing operation and maintenance costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0062] FIG1 is a flowchart of a memory capacity adjustment method according to an embodiment of the present invention;

[0063] FIG2 is a flowchart of another embodiment of a memory capacity adjustment method of the present application;

[0064] FIG3 is a schematic diagram of a memory physical link diagram of an example of a memory capacity adjustment method of the present application;

[0065] FIG4 is a flowchart of an example of a method for adjusting memory capacity according to the present invention;

[0066] FIG5 is a timing diagram of the execution of steps of an example of a memory capacity adjustment method of the present application;

[0067] FIG6 is a memory schematic diagram of an example of a memory capacity adjustment method of the present application;

[0068] FIG7 is a memory schematic diagram of another memory capacity adjustment method example of the present application;

[0069] FIG8 is a structural block diagram of an embodiment of a memory capacity adjustment device of the present application;

[0070] FIG9 is a structural block diagram of an electronic device provided in an embodiment of the present application;

[0071] FIG10 is a structural block diagram of a storage medium provided in an embodiment of the present application. Specific embodiments

[0072] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0073] 1 , a flowchart of an embodiment of a memory capacity adjustment method of the present application is shown. The memory capacity adjustment method is applied to a server. The server is provided with at least one central processing unit (CPU), which is connected to at least one memory stick. The CPU is deployed with a basic input / output system (BIOS), which stores the total memory capacity corresponding to the memory stick. The memory capacity adjustment method may specifically include the following steps:

[0074] Step 101, during the basic input and output system startup process, obtaining a memory setting value;

[0075] During the basic input and output system startup process, the memory setting value can be obtained. The memory setting value is a multiple of the total memory capacity; for example, if the memory setting value is twice the total memory capacity; the total memory capacity is twice the memory setting value, then the memory setting value is half of the total memory capacity.

[0076] Step 102, generating a first memory bank value according to the configuration serial detection data of the memory bank;

[0077] In this embodiment of the present application, the server can read the memory module's configuration serial detection data, which is SPD (Serial Presence Detect) data. SPD is a memory device on the memory module that stores memory module parameter information. This information is read and saved to the motherboard chipset when the computer starts up, allowing the system to correctly configure the memory controller.

[0078] Based on the read configuration serial detection data of the memory module, the memory bank value recorded therein is determined to be the first memory bank value. The memory bank value is the number value of the banks in the memory.

[0079] Step 103, determining a second memory bank value based on the memory setting value, the total memory capacity, and the first memory bank value;

[0080] The memory bank value to be changed, namely the second memory bank value, is determined based on the memory setting value, the total memory capacity and the first memory bank value, wherein the second memory bank value is the memory bank value that meets the user's needs.

[0081] Step 104, updating the first memory bank value according to the second memory bank value to update the configuration serial detection data;

[0082] The first memory bank value is updated according to the second memory bank value, the second memory bank value is used as the memory bank value in this startup initialization, and the second memory bank value is updated to the configuration serial detection data to update the configuration serial detection data.

[0083] Step 105 : Control the basic input / output system to start based on the updated configuration serial detection data.

[0084] Then, the basic input and output system is controlled to start based on the updated configuration serial detection data, so that the content capacity of the memory after initialization can meet user needs without affecting the operating efficiency.

[0085] The embodiment of the present application obtains a memory setting value during the startup of a basic input / output system; generates a first memory bank value based on the configuration serial detection data of a memory stick; determines a second memory bank value based on the memory setting value, the total memory capacity, and the first memory bank value; updates the first memory bank value based on the second memory bank value to update the configuration serial detection data; controls the basic input / output system to start based on the updated configuration serial detection data; and adjusts the memory bank value of the memory capacity based on the memory setting value when initializing the basic input / output system during the server startup process to achieve automatic dynamic adjustment of the memory capacity of the entire server, thereby meeting the actual business needs of customers, improving the service life of the memory, and reducing operation and maintenance costs.

[0086] 2 , there is shown a flowchart of the steps of another embodiment of a memory capacity adjustment method of the present application. The memory capacity adjustment method is applied to a server. The server is provided with at least one central processing unit (CPU), which is connected to at least one memory stick. The CPU is deployed with a basic input / output system (BIOS) and a memory stick, and the BIOS stores the total memory capacity corresponding to the memory stick. In the present application, the server is provided with at least one CPU. As shown in FIG3 , two CPUs (CPUs) can be provided, each CPU is connected to at least one memory stick, and the number of memory sticks connected to each CPU is the same. The CPU is deployed with a basic input / output system (BIOS) and a memory stick. The memory stick is used by the server to store data. The BIOS stores the total memory capacity corresponding to the memory stick to process data within the limitation of the total memory capacity. The memory capacity adjustment method may specifically include the following steps:

[0087] Step 201: During the basic input and output system startup process, a memory setting value is obtained.

[0088] In the embodiment of the present application, the memory setting value preset by the user can be obtained during the basic input and output system startup process.

[0089] In some optional embodiments of the present application, the method further includes:

[0090] Step S1 : modifying the memory setting value in response to an input instruction for the memory setting value.

[0091] When a user needs to adjust a pre-set memory setting value in real time, they can send an input instruction to the server for the memory setting value. The input instruction includes the adjustment value for the memory setting value. In response to the input instruction for the memory setting value, the memory setting value is modified to the adjustment value to meet the user's real-time adjustment needs.

[0092] Step 202: Generate a first memory bank value according to the configuration serial detection data of the memory bank.

[0093] Since the structure of the memory stick configuration serial detection data (SPD data) records the memory bank value, the memory stick configuration serial detection data can be read from the address of the memory stick, and the structure of the configuration serial detection data is consistent for each memory. The data corresponding to the memory bank quantity flag can be read from the memory stick configuration serial detection data and determined as the first memory bank value.

[0094] Specifically, the step of generating a first memory bank value based on the configuration serial detection data of the memory stick includes: reading the address of the memory stick through a bidirectional two-wire synchronous serial bus protocol to generate a configuration serial detection structure; determining the configuration serial detection data based on the configuration serial detection structure; and setting the memory bank quantity value in the configuration serial detection data as the first memory bank value.

[0095] Because the memory stick and the server are connected using a bidirectional, two-wire synchronous serial bus (Inter-Integrated Circuit, I2C) protocol, the address of the memory stick can be read using the I2C protocol. Specifically, the data in the I2C address of the memory stick can be read to generate a configuration serial detection structure. Configuration serial detection data is then generated based on the data at each message location in the configuration serial detection structure. The memory bank quantity value recorded in the configuration serial detection data is determined as the first memory bank value. The first memory bank value is the memory bank value of the current memory.

[0096] Step 203: Determine the second memory bank value according to the memory setting value, the total memory capacity, and the first memory bank value.

[0097] The increase or decrease of memory is determined based on the memory setting value and the total memory capacity; the increase or decrease range is determined based on the first memory bank value, and then the second memory bank value is determined. That is, the second memory bank value is the adjusted memory bank value.

[0098] In some optional embodiments of the present application, the step of determining the second memory bank value according to the memory setting value, the total memory capacity, and the first memory bank value includes:

[0099] Sub-step S2031, determining an adjustment multiplier value based on the memory setting value and the total memory capacity;

[0100] First, determine the adjustment multiplier based on the mathematical relationship between the memory setting value and the total memory capacity to determine the direction of adjustment. If the memory setting value is a multiple of the total memory capacity, the number of memory banks will be increased; conversely, if the memory setting value is a multiple of the total memory capacity, the number of memory banks will be reduced.

[0101] Specifically, the step of determining the adjustment multiple value based on the memory setting value and the total memory capacity includes: calculating the ratio of the memory setting value to the total memory capacity, and determining the ratio as the adjustment multiple value.

[0102] The ratio of the memory setting value to the total memory capacity can be calculated and the ratio can be determined as the adjustment multiplier value. That is, when the ratio is greater than 1, the number of memory banks is increased; conversely, when the ratio is less than 1, the number of memory banks is reduced; and when the ratio is 1, the number of memory banks remains unchanged.

[0103] Sub-step S2032: determining the second memory bank value according to the adjustment multiplier value and the first memory bank value.

[0104] Then, the adjustment range is determined based on the adjustment multiple value and the first memory bank value, and the second memory bank value is determined.

[0105] Specifically, the step of determining the second memory bank value based on the adjustment multiplier value and the first memory bank value includes: judging whether the adjustment multiplier is one; in response to the adjustment multiplier being one, determining that the second memory bank value is equal to the first memory bank value; in response to the adjustment multiplier not being one, calculating the second memory bank value based on the adjustment multiplier value and the first memory bank value.

[0106] When determining the second memory bank value, it can be first determined whether the adjustment multiplier is one. If the adjustment multiplier is one, the number of memory banks remains unchanged. In response to the adjustment multiplier being one, the second memory bank value can be determined to be equal to the first memory bank value, maintaining the number of memory banks unchanged. If the adjustment multiplier is not one, meaning the number of memory banks needs to be increased or decreased, the second memory bank value can be calculated based on the adjustment multiplier value and the first memory bank value.

[0107] Furthermore, when the adjustment multiplier is less than one, the step of calculating the second memory bank value based on the adjustment multiplier value and the first memory bank value includes: calculating the product of the adjustment multiplier value and the first memory bank value as the second memory bank value, and the second memory bank value is less than the first memory bank value.

[0108] When the integer multiple is less than 1, the number of memory banks needs to be reduced. The product of the adjustment multiple value and the first memory bank value can be calculated as a second memory bank value, which is smaller than the first memory bank value.

[0109] Furthermore, when the adjustment multiplier is greater than one, the step of calculating the second memory bank value based on the adjustment multiplier value and the first memory bank value includes: calculating the product of the adjustment multiplier value and the first memory bank value as the second memory bank value, and the second memory bank value is greater than the first memory bank value.

[0110] When the integer multiple is greater than one, the number of memory banks needs to be increased. The product of the adjustment multiple value and the first memory bank value can be calculated as a second memory bank value, which is greater than the first memory bank value.

[0111] Step 204 : Update the first memory bank value according to the second memory bank value to update the configuration serial detection data.

[0112] The first memory bank value is updated according to the second memory bank value so that the second memory bank value can be used to set the memory, and the set first memory bank value is written back to the configuration serial detection data to update the configuration serial detection data.

[0113] In some optional embodiments of the present application, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data includes:

[0114] Step 2041: Replace the first memory bank value with the second memory bank value.

[0115] The second memory bank value may be used to replace the position of the first memory bank value in the configuration serial detection data to update the first memory bank value, thereby updating the configuration serial detection data.

[0116] Furthermore, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data further includes: writing the updated first memory bank value into the configuration serial detection data.

[0117] After the first memory bank value is updated, the first memory bank value may be written into the configuration serial detection data to update the serial detection data.

[0118] Step 205 : Control the basic input / output system to start based on the updated configuration serial detection data.

[0119] After obtaining the updated configuration serial detection data, the basic input and output system can be controlled to start based on the updated configuration serial detection data, so as to set the memory when the server is powered on and initialized.

[0120] Step 206: Receive a memory restoration setting instruction.

[0121] When a user needs to restore the memory bank corresponding to the memory bank of the server, the user can send a memory restoration setting instruction to the server. The server receives the memory restoration setting instruction.

[0122] Step 207: Determine the first memory bank value as the preset restored memory bank value.

[0123] The current first memory bank value in the configuration serial detection data can be set as a preset restoration memory bank value. The preset restoration memory bank value is pre-set data for restoring the number of memory banks. The size of the preset restoration memory bank value can be set based on the server architecture and is not limited in this embodiment of the present application.

[0124] Step 208: Update the configuration serial detection data using the preset restored memory bank value.

[0125] Then, the preset restoration memory library value can be written into the configuration serial detection data to update the configuration serial detection data, so that the service can obtain the new configuration serial detection data for memory setting when starting.

[0126] In the embodiment of the present application, when the server starts, the BIOS, as the startup management firmware, first obtains the memory setting value of the memory capacity set by the BIOS, and then makes further adjustments based on the memory setting value. If the memory setting value is not the maximum capacity setting, the BIOS needs to read the SPD data structure of each memory I2C address through the I2C protocol, and dynamically modulate the memory bank value in the obtained SPD data structure accordingly, such as 1 corresponds to 1 Bank, 2 corresponds to 2 Banks, and 4 corresponds to 4 Banks. The memory bank value is set according to actual needs, and the SPD data of the set memory bank value is written back to the SPD data structure of each memory. Since the SPD data structure parameters of memories of the same manufacturer, the same serial number, and the same batch are consistent, the difficulty of modifying the SPD data of each memory can be greatly reduced. The BIOS obtains the SPD data structure of the I2C address of each memory stick through the I2C protocol, and adjusts the memory bank value of the memory in the SPD data structure to implement the unmanned dynamic removal of the server memory stick. This can dynamically adjust the memory capacity of the entire server, meet the actual business needs of customers, increase the service life of the memory, and reduce operation and maintenance costs. It is not restricted by any server architecture and can expand its scope of application.

[0127] In order to make those skilled in the art more clear about the real-time process of the embodiment of the present application, the following examples are used to illustrate:

[0128] First, the original memory link of this example is shown in Figure 3. The server is equipped with two CPUs (Central Processing Units), and each CPU (CPU1, CPU2) is connected to its own memory stick via the I2C protocol.

[0129] For the implementation process, please refer to FIG4 , which shows a step flow chart of an example of a memory capacity adjustment method of the present application; and FIG5 , which shows a step execution sequence diagram of an example of a memory capacity adjustment method of the present application.

[0130] 1) During BIOS startup, obtain the BIOS preset value parameters for the total memory capacity, which are divided into three values: maximum, half, and one-quarter;

[0131] 2) After obtaining the preset value of the total memory capacity, the BIOS determines whether the preset value of the total memory capacity is the maximum value. If the preset value of the total memory capacity is the maximum value, the BIOS does not make any adjustments or changes to the SPD data structure of the memory on the server and can be started according to the default SPD data of each memory;

[0132] 3) If the preset total memory capacity value obtained by the BIOS is one-half, the BIOS reads the data of each memory SPD address through the I2C bus at the beginning of memory initialization, modifies the bank value of the obtained SPD data from 4 banks to 2 banks, and writes it back to the SPD data; then continues to start the server and enter the operating system; the modified memory can be seen in Figure 6.

[0133] 4) If the preset value of the total memory capacity obtained by the BIOS is one-fourth, the BIOS reads the data of each memory SPD address through the I2C bus at the beginning of memory initialization, modifies the bank value (memory bank value) of the obtained SPD data from 4 banks (banks) to 1 bank value, and writes it back to the SPD data; continues to start the server and enter the operating system; the modified memory can be seen in Figure 7.

[0134] 5) If the customer wants to restore the memory capacity from the modified value to the maximum value, follow steps 3 or 4 to modify the memory bank value.

[0135] It should be noted that for the method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present application are not limited by the order of the actions described, because according to the embodiments of the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present application.

[0136] 8 shows a block diagram of an embodiment of a memory capacity adjustment device according to the present application. The memory capacity adjustment device is applied to a server. The server is provided with at least one central processing unit (CPU), which is connected to at least one memory stick. The CPU is deployed with a basic input / output system (BIOS), which stores the total memory capacity corresponding to the memory stick. The memory capacity adjustment device may specifically include the following modules:

[0137] The acquisition module 801 is used to acquire the memory setting value during the basic input and output system startup process;

[0138] A first memory bank value determination module 802 is configured to generate a first memory bank value according to the configuration serial detection data of the memory bank;

[0139] A second memory bank value determination module 803 is configured to determine a second memory bank value based on a memory setting value, a total memory capacity, and a first memory bank value;

[0140] An updating module 804 is configured to update the first memory bank value according to the second memory bank value to update the configuration serial detection data;

[0141] The startup module 805 is used to control the basic input and output system to start based on the updated configuration serial detection data.

[0142] In some optional embodiments of the present application, the first memory bank value determination module 802 includes:

[0143] The reading submodule is used to read the address of the memory bar through the bidirectional two-wire synchronous serial bus protocol and generate a configuration serial detection structure;

[0144] The configuration serial detection data submodule is used to determine the configuration serial detection data according to the configuration serial detection structure;

[0145] The first memory bank value determination submodule is configured to set the memory bank quantity value in the configuration serial detection data to a first memory bank value.

[0146] In some optional embodiments of the present application, the second memory bank value determination module 803 includes:

[0147] An adjustment multiple value determination submodule is used to determine the adjustment multiple value based on the memory setting value and the total memory capacity;

[0148] The second memory bank value determination submodule is configured to determine the second memory bank value according to the adjustment multiple value and the first memory bank value.

[0149] In some optional embodiments of the present application, the adjustment multiple value determination submodule includes:

[0150] The first calculation unit is used to calculate the ratio of the memory setting value to the total memory capacity,

[0151] The adjustment multiple value determining unit is used to determine the ratio as the adjustment multiple value.

[0152] In some optional embodiments of the present application, the second memory bank value determination submodule includes:

[0153] a judging unit, used to judge whether the adjustment multiple is one;

[0154] a first response unit, configured to determine that the second memory bank value is equal to the first memory bank value in response to the adjustment multiplier being one;

[0155] The second response unit is configured to calculate a second memory bank value according to the adjustment multiple value and the first memory bank value in response to the adjustment multiple being different from one.

[0156] In some optional embodiments of the present application, when the adjustment multiple is less than one, the second response unit includes:

[0157] The second calculation subunit is used to calculate the product of the adjustment multiplier value and the first memory bank value as a second memory bank value, where the second memory bank value is smaller than the first memory bank value.

[0158] In some optional embodiments of the present application, when the adjustment multiple is greater than one, the second response unit includes:

[0159] The third calculation subunit is configured to calculate a product of the adjustment multiplier value and the first memory bank value as a second memory bank value, where the second memory bank value is greater than the first memory bank value.

[0160] In some optional embodiments of the present application, the update module 804 includes:

[0161] The replacement submodule is used to replace the first memory bank value with the second memory bank value.

[0162] In some selected embodiments of the present application, the update module 804 further includes:

[0163] Write the updated first memory bank value into the configuration serial detection data.

[0164] In some selected embodiments of the present application, the apparatus further comprises:

[0165] A receiving module, used for receiving a memory restoration setting instruction;

[0166] The restored memory bank value determination module is configured to determine the first memory bank value as a preset restored memory bank value.

[0167] In some selected embodiments of the present application, the apparatus further comprises:

[0168] The restoration module is used to update the configuration serial detection data using a preset restoration memory library value.

[0169] In some selected embodiments of the present application, the apparatus further comprises:

[0170] The modification module is configured to modify the memory setting value in response to an input instruction for the memory setting value.

[0171] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0172] 9 , an embodiment of the present application further provides an electronic device, including:

[0173] A processor 901 and a storage medium 902, wherein the storage medium 902 stores a computer program executable by the processor 901. When the electronic device is running, the processor 901 executes the computer program to perform a memory capacity adjustment method as described in any of the embodiments of the present application. The memory capacity adjustment method is applied to a server, wherein the server is provided with at least one central processing unit (CPU), the CPU is connected to at least one memory stick, the CPU is deployed with a basic input / output system (BIOS) and a memory stick, and the BIOS stores the total memory capacity corresponding to the memory stick. The method includes:

[0174] During BIOS startup, get the memory setting value;

[0175] Generate a first memory bank value based on the configuration serial detection data of the memory bar;

[0176] Determining a second memory bank value based on a memory setting value, a total memory capacity, and a first memory bank value;

[0177] updating the first memory bank value according to the second memory bank value to update the configuration serial detection data;

[0178] The basic input and output system is controlled to start based on the updated configuration serial detection data.

[0179] Optionally, the step of generating the first memory bank value according to the configuration serial detection data of the memory bank includes:

[0180] Through the bidirectional two-wire synchronous serial bus protocol, the address of the memory bar is read and the configuration serial detection structure is generated;

[0181] Determine the configuration serial detection data according to the configuration serial detection structure;

[0182] The number of banks in the serial probe data will be configured as the first bank value.

[0183] Optionally, the step of determining the second memory bank value based on the memory setting value, the total memory capacity and the first memory bank value is:

[0184] Determine the adjustment multiplier value based on the memory setting value and the total memory capacity;

[0185] The second memory bank value is determined according to the adjustment multiplier value and the first memory bank value.

[0186] Optionally, the step of determining the adjustment multiplier value according to the memory setting value and the total memory capacity includes:

[0187] Calculate the ratio of memory setting value to total memory capacity,

[0188] Determine the ratio as the adjustment factor value.

[0189] Optionally, the step of determining the second memory bank value according to the adjustment multiplier value and the first memory bank value includes:

[0190] Determine whether the adjustment multiple is one;

[0191] In response to the adjustment factor being one, determining that the second memory bank value is equal to the first memory bank value;

[0192] In response to the adjustment factor not being one, a second memory bank value is calculated according to the adjustment factor value and the first memory bank value.

[0193] Optionally, when the adjustment multiple is less than one, the step of calculating the second memory bank value based on the adjustment multiple value and the first memory bank value includes:

[0194] The product of the adjustment multiplier value and the first memory bank value is calculated as a second memory bank value, and the second memory bank value is smaller than the first memory bank value.

[0195] Optionally, when the adjustment multiple is greater than one, the step of calculating the second memory bank value based on the adjustment multiple value and the first memory bank value includes:

[0196] The product of the adjustment multiplier value and the first memory bank value is calculated as a second memory bank value, and the second memory bank value is greater than the first memory bank value.

[0197] Optionally, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data includes:

[0198] The first memory bank value is replaced with the second memory bank value.

[0199] Optionally, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data further includes:

[0200] Write the updated first memory bank value into the configuration serial detection data.

[0201] Optionally, the method further comprises:

[0202] Receive memory restoration setting instructions;

[0203] The first memory bank value is determined as the default restored memory bank value.

[0204] Optionally, the method further comprises:

[0205] Updates the configured serial probe data with the preset restore memory bank values.

[0206] Optionally, the method further comprises:

[0207] In response to an input instruction for a memory setting value, the memory setting value is modified.

[0208] The memory may include random access memory (RAM) or non-volatile memory, such as at least one disk storage. Alternatively, the memory may be at least one storage device located away from the processor.

[0209] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components.

[0210] Referring to Figure 10 , an embodiment of the present application further provides a non-volatile computer-readable storage medium 1001. A computer program is stored on the non-volatile computer-readable storage medium 1001. When the computer program is executed by a processor, the computer program executes a memory capacity adjustment method according to any one of the embodiments of the present application. The memory capacity adjustment method is applied to a server, wherein the server is provided with at least one central processing unit (CPU), the CPU being connected to at least one memory stick, the CPU being provided with a basic input / output system (BIOS), and the BIOS storing the total memory capacity corresponding to the memory stick. The method includes:

[0211] During the basic input and output system startup process, the memory setting value is obtained, and the memory setting value is in a multiple relationship with the total memory capacity;

[0212] Generate a first memory bank value based on the configuration serial detection data of the memory bar;

[0213] Determining a second memory bank value based on a memory setting value, a total memory capacity, and a first memory bank value;

[0214] updating the first memory bank value according to the second memory bank value to update the configuration serial detection data;

[0215] The basic input and output system is controlled to start based on the updated configuration serial detection data.

[0216] Optionally, the step of generating the first memory bank value according to the configuration serial detection data of the memory bank includes:

[0217] Through the bidirectional two-wire synchronous serial bus protocol, the address of the memory bar is read and the configuration serial detection structure is generated;

[0218] Determine the configuration serial detection data according to the configuration serial detection structure;

[0219] The number of banks in the serial probe data will be configured as the first bank value.

[0220] Optionally, the step of determining the second memory bank value based on the memory setting value, the total memory capacity and the first memory bank value is:

[0221] Determine the adjustment multiplier value based on the memory setting value and the total memory capacity;

[0222] The second memory bank value is determined according to the adjustment multiplier value and the first memory bank value.

[0223] Optionally, the step of determining the adjustment multiplier value according to the memory setting value and the total memory capacity includes:

[0224] Calculate the ratio of memory setting value to total memory capacity,

[0225] Determine the ratio as the adjustment factor value.

[0226] Optionally, the step of determining the second memory bank value according to the adjustment multiplier value and the first memory bank value includes:

[0227] Determine whether the adjustment multiple is one;

[0228] In response to the adjustment factor being one, determining that the second memory bank value is equal to the first memory bank value;

[0229] In response to the adjustment factor not being one, a second memory bank value is calculated according to the adjustment factor value and the first memory bank value.

[0230] Optionally, when the adjustment multiple is less than one, the step of calculating the second memory bank value based on the adjustment multiple value and the first memory bank value includes:

[0231] The product of the adjustment multiplier value and the first memory bank value is calculated as a second memory bank value, and the second memory bank value is smaller than the first memory bank value.

[0232] Optionally, when the adjustment multiple is greater than one, the step of calculating the second memory bank value based on the adjustment multiple value and the first memory bank value includes:

[0233] The product of the adjustment multiplier value and the first memory bank value is calculated as a second memory bank value, and the second memory bank value is greater than the first memory bank value.

[0234] Optionally, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data includes:

[0235] The first memory bank value is replaced with the second memory bank value.

[0236] Optionally, the step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data further includes:

[0237] Write the updated first memory bank value into the configuration serial detection data.

[0238] Optionally, the method further comprises:

[0239] Receive memory restoration setting instructions;

[0240] The first memory bank value is determined as the default restored memory bank value.

[0241] Optionally, the method further comprises:

[0242] Updates the configured serial probe data with the preset restore memory bank values.

[0243] Optionally, the method further comprises:

[0244] In response to an input instruction for a memory setting value, the memory setting value is modified.

[0245] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0246] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM (Compact Disc Read-Only Memory), optical storage, etc.) that contain computer-usable program code.

[0247] The present application embodiment is described with reference to the flow chart and / or block diagram of the method, terminal device (system), and computer program product according to the embodiment of the present application. It should be understood that each process and / or box in the flow chart and / or block diagram and the combination of the process and / or box in the flow chart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device produce a device for realizing the function specified in one process or multiple processes and / or one box or multiple boxes of the flow chart.

[0248] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0249] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce computer-implemented processing, so that the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0250] Although preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they become aware of the basic inventive concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0251] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0252] The above is a detailed introduction to the memory capacity adjustment method, device, electronic device and storage medium provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A memory capacity adjustment method, characterized in that: Applied to a server, the server is provided with at least one central processing unit, the central processing unit is connected to at least one memory stick, the central processing unit is deployed with a basic input and output system, the basic input and output system stores the total memory capacity corresponding to the memory stick, the method comprises: During the basic input and output system startup process, obtaining a memory setting value; generating a first memory bank value according to the configuration serial detection data of the memory bar; Determining a second memory bank value according to the memory setting value, the total memory capacity and the first memory bank value; updating the first memory bank value according to the second memory bank value to update the configuration serial detection data; The basic input and output system is controlled to start based on the updated configuration serial detection data.

2. The method according to claim 1, characterized in that The step of generating a first memory bank value according to the configuration serial detection data of the memory bar comprises: Read the address of the memory stick through a bidirectional two-wire synchronous serial bus protocol to generate a configuration serial detection structure; Determining configuration serial detection data according to the configuration serial detection structure; The memory bank quantity value in the configuration serial detection data is set as the first memory bank value.

3. The method according to claim 2, characterized in that The step of determining the configuration serial detection data according to the configuration serial detection structure includes: The configuration serial detection data is generated according to the data of each message position of the configuration serial detection structure.

4. The method according to claim 1, characterized in that: The step of determining the second memory bank value according to the memory setting value, the total memory capacity and the first memory bank value comprises: Determining an adjustment multiple value according to the memory setting value and the total memory capacity; The second memory bank value is determined according to the adjustment multiple value and the first memory bank value.

5. The method according to claim 4, characterized in that The second memory bank value is a memory bank value that meets user needs.

6. The method according to claim 4, characterized in that The step of determining the adjustment multiple value according to the memory setting value and the total memory capacity comprises: Calculating the ratio of the memory setting value to the total memory capacity, The ratio is determined as the adjustment multiple value.

7. The method according to claim 4, characterized in that The step of determining the second memory bank value according to the adjustment multiple value and the first memory bank value comprises: Determining whether the adjustment multiple is one; In response to the adjustment multiple being one, determining that the second memory bank value is equal to the first memory bank value; In response to the adjustment factor not being one, the second memory bank value is calculated according to the adjustment factor value and the first memory bank value.

8. The method according to claim 4, characterized in that According to the adjustment multiple value, determining the adjustment direction includes: When the adjustment multiple is greater than one, the number of memory banks is increased; The adjustment multiplier is effective temporarily, reducing the number of memory banks.

9. The method according to claim 7, characterized in that: When the adjustment multiple is less than one, the step of calculating the second memory bank value according to the adjustment multiple value and the first memory bank value comprises: The product of the adjustment multiple value and the first memory bank value is calculated as the second memory bank value, and the second memory bank value is smaller than the first memory bank value.

10. The method according to claim 7, characterized in that When the adjustment multiple is greater than one, the step of calculating the second memory bank value according to the adjustment multiple value and the first memory bank value comprises: The product of the adjustment multiple value and the first memory bank value is calculated as the second memory bank value, and the second memory bank value is greater than the first memory bank value.

11. The method according to claim 1, characterized in that: The step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data comprises: The first memory bank value is replaced with the second memory bank value.

12. The method according to claim 1, characterized in that The controlling the basic input / output system to start based on the updated configuration serial detection data includes: When the server is powered on and initialized, the memory is set.

13. The method according to claim 11, characterized in that The step of updating the first memory bank value according to the second memory bank value to update the configuration serial detection data further includes: The updated first memory bank value is written into the configuration serial detection data.

14. The method according to claim 1, characterized in that The method further comprises: Receive memory restoration setting instructions; The first memory bank value is determined as a preset restored memory bank value.

15. The method according to claim 14, characterized in that The preset restoration memory bank value is pre-set data for restoring the number of memory banks; the size of the preset restoration memory bank value is set according to the architecture of the server.

16. The method according to claim 14, characterized in that The method further comprises: The configured serial detection data is updated using the preset restored memory bank value.

17. The method according to claim 1, characterized in that The method further comprises: In response to an input instruction for the memory setting value, the memory setting value is modified.

18. A memory capacity adjustment device, characterized in that: Applied to a server, the server is provided with at least one central processing unit, the central processing unit is connected to at least one memory stick, the central processing unit is deployed with a basic input and output system, the basic input and output system stores the total memory capacity corresponding to the memory stick, the device comprises: An acquisition module, used for acquiring a memory setting value during the startup of the basic input and output system, wherein the memory setting value is in a multiple relationship with the total memory capacity; A first memory bank value determination module, configured to generate a first memory bank value according to the configuration serial detection data of the memory bar; A second memory bank value determination module, configured to determine a second memory bank value according to the memory setting value, the total memory capacity and the first memory bank value; An updating module, configured to update the first memory bank value according to the second memory bank value, so as to update the configuration serial detection data; The startup module is used to control the basic input and output system to start based on the updated configuration serial detection data.

19. An electronic device, characterized in that: The method comprises a processor, a memory and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, the steps of the memory capacity adjustment method as claimed in any one of claims 1 to 17 are implemented.

20. A computer non-volatile readable storage medium, characterized in that: The computer non-volatile readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the memory capacity adjustment method according to any one of claims 1 to 17 are implemented.

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