Power converter and power supply system
By controlling the level of the bridge arm output in the power converter, combining the switching of the first modulation mode and the second modulation mode, the shortcomings of bipolar modulation and unipolar modulation in power consumption and voltage balance are solved, and the balance of power quality and power consumption is achieved.
Patent Information
- Application Number
- PCT/CN2024/133223
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-27
- Filing Date
- 2024-11-20
- Publication Date
- 2025-06-05
AI Technical Summary
In power converters, although bipolar modulation can reduce the voltage imbalance of positive and negative DC buses, it will lead to an increase in power consumption; while unipolar modulation can reduce power consumption, it will increase the voltage imbalance of positive and negative DC buses, affecting operating efficiency.
By controlling the output of three levels or two levels of the bridge arm in the power conversion circuit to ensure the balance of the midpoint voltage in the power converter, the control circuit is used to switch the first modulation mode and the second modulation mode according to the unbalanced degree of positive and negative DC bus voltages and the output current of the bridge arm to balance the power quality and power consumption.
It realizes that without affecting the voltage balance of positive and negative DC buses, the power consumption of the power converter is reduced, the quality of output power is improved, and the stability of the power converter is improved.
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Figure CN2024133223_05062025_PF_FP_ABST
Abstract
Description
Power converter and power supply system
[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on November 27, 2023, with application number 202311611863.8 and invention name “A power converter and power supply system”, the entire contents of which are incorporated by reference into this application. Technical Field
[0002] The present application relates to the field of circuits, and more specifically, to a power converter and a power supply system. Background Art
[0003] Power converters are widely used in power systems. Bipolar modulation can be used to control power converters, that is, the bridge arm in the power converter can output three levels: positive level, reverse level and zero level within one switching cycle to fit sinusoidal alternating current and improve the quality of electric energy. Among them, when outputting zero level, it will cause different currents flowing into the positive and negative bus capacitors in the power converter, which will cause the positive and negative DC bus voltages of the power converter to be unbalanced. Since three levels are output during bipolar modulation, the duration of the zero level can be shortened, and the impact on the positive and negative DC bus voltages is reduced, so that the imbalance degree of the positive and negative DC bus voltages is within the tolerable range, ensuring that the power converter can operate normally.
[0004] However, bipolar modulation requires the bridge arm to output three voltage levels within a single switching cycle, which results in increased power consumption due to the frequent switching of the switches in the bridge arm of the power converter. To reduce power consumption, unipolar modulation has been proposed to control the power converter. This involves controlling the bridge arm of the power converter to output both a positive voltage level and a zero voltage level within a single switching cycle to fit the sinusoidal AC power. However, unipolar modulation increases the duration of the zero voltage level and the imbalance between the positive and negative DC bus voltages. In severe cases, the positive and negative DC bus voltages can become significantly uneven, affecting the operating efficiency of the power converter.
[0005] Therefore, how to reduce the power consumption of the power converter while keeping the imbalance between the positive and negative DC bus voltages within a tolerable range becomes an urgent problem to be solved. Summary of the Invention
[0006] The present application provides a power converter, which controls the bridge arm in the power conversion circuit to output three levels or two levels, so that the midpoint voltage of the power conversion circuit in the power converter remains balanced, thereby improving the quality of the output power and reducing the power consumption of the power converter.
[0007] In a first aspect, a power converter is provided. The positive terminal of the DC side of the power converter is connected to a positive DC bus, and the negative terminal of the DC side is connected to a negative DC bus. The power converter includes a power conversion circuit, a filter circuit, and a control circuit. The power conversion circuit includes an inverter circuit and a DC bus capacitor, wherein the DC bus capacitor is connected between the positive DC bus and the negative DC bus. The inverter circuit includes at least one bridge arm, each bridge arm output end is electrically connected to the filter circuit, and each bridge arm includes multiple switching transistors, and the bridge arm is configured to convert input DC power into AC power. The control circuit is configured to control the bridge arm to switch between a first modulation mode and a second modulation mode based on the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of at least one bridge arm. In the first modulation mode, the output voltage of any bridge arm during a switching cycle includes a positive voltage level, a zero voltage level, and a negative voltage level. In the second modulation mode, the output voltage of any bridge arm during a switching cycle includes a positive voltage level and a zero voltage level. The same-direction level is a level in the same direction as the equivalent voltage output by the inverter circuit, and the reverse-direction level is a level in the opposite direction to the equivalent voltage output by the inverter circuit.
[0008] It should be noted that the DC bus capacitor in this application includes a positive bus capacitor and a negative bus capacitor, wherein the positive bus capacitor is connected to the positive DC bus, the negative bus capacitor is connected to the negative DC bus, and the positive bus capacitor and the negative bus capacitor are connected in series.
[0009] In this application, the bridge arm can output a mixed output of three levels and two levels, and the output levels can be fitted into AC power after subsequent filtering circuits, etc. Compared with outputting only two levels, the bridge arm in this application can reduce the time of outputting zero level and reduce the imbalance of positive and negative bus voltages caused by zero level. In addition, the effect of fitting AC power through three levels is stronger than fitting AC power through two levels, thereby improving the quality of the output power. Compared with outputting only three levels, the bridge arm in this application can reduce the switching frequency of the switch tube, thereby reducing the power consumption of the switch tube, so that the circuit achieves a balance between power quality and power consumption.
[0010] By considering the voltage difference between the positive bus capacitor and the negative bus capacitor and the output current of the bridge arm, the midpoint voltage balance of the power conversion circuit can be ensured and the stability of the power converter can be improved.
[0011] In combination with the first aspect, in certain implementations of the first aspect, the control circuit is specifically configured to: in response to a preset condition being met, control the bridge arm to switch from the second modulation mode to the first modulation mode;
[0012] Pre-conditions include any of the following:
[0013] Condition 1: V + -V - ≥V limit1>0 and 0 limit1 ≤I≤I limit2 ;
[0014] Condition 2: V + -V - ≥V limit1 >0 and I limit3 ≤I≤I limit4 <0;
[0015] Condition 3: V + -V - ≤V limit2 <0 and 0 limit1 ≤I≤I limit2 ;
[0016] Condition 4: V + -V - ≤V limit2 <0 and I limit3 ≤I≤I limit4 <0,
[0017] Among them, V + Represents the voltage across the positive bus capacitor, V - Represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit1 Represents the preset first voltage threshold, V limit2 Represents the preset second voltage threshold, I limit1 Represents the preset first current threshold, I limit2 Represents the preset second current threshold, I limit3 Represents the preset third current threshold, I limit4 represents a preset fourth current threshold.
[0018] In the present application, the degree of imbalance between the positive and negative bus voltages is determined by the voltage difference between the positive bus capacitor and the negative bus capacitor and the output current of the bridge arm. When the degree of imbalance exceeds the preset value, the first modulation mode is used to reduce the duration of the zero level, which can ensure the midpoint voltage balance of the power conversion circuit and improve the stability of the power converter; when the degree of imbalance exceeds the preset value, the second modulation mode is used to reduce the switching frequency of the switching tube, which can reduce the power consumption of the switching tube.
[0019] In combination with the first aspect, in some implementations of the first aspect, in the first modulation mode,
[0020] t1>t2, and
[0021] t3 <t4,
[0022] Among them, t1 represents the duration of the bridge arm outputting the reverse level within one switching cycle when the above condition 1 is met, t2 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 2 is met, t3 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 3 is met, and t4 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 4 is met.
[0023] In conditions 1 and 2 above, the voltage across the positive bus capacitor is greater than the voltage across the negative bus capacitor, requiring a reduction in charging or an increase in discharging of the positive bus capacitor. Under condition 1, since the output current of the bridge arm is positive, the bridge arm's output reverse level is equivalent to discharging the positive bus capacitor. Under condition 2, since the output current of the bridge arm is positive, the bridge arm's output reverse level is equivalent to charging the positive bus capacitor. When the duration of the output reverse level under condition 1 is greater than the duration of the output reverse level under condition 2, the charging of the positive bus capacitor can be reduced or the discharging of the positive bus capacitor can be increased, thereby reducing the voltage difference between the voltage across the positive bus capacitor and the voltage across the negative bus capacitor, thereby improving the stability of the inverter circuit. By properly adjusting the duration of the reverse level under different conditions, the flexibility of the inverter circuit can be improved.
[0024] In combination with the first aspect, in certain implementations of the first aspect, the control circuit is specifically configured to: in response to a preset condition being met, control the bridge arm to switch from the second modulation mode to the first modulation mode;
[0025] Pre-conditions include any of the following:
[0026] Condition 5: V + -V - ≥V limit3 >0 and 0 limit5 ≤I≤I limit6 ;
[0027] Condition 6: V + -V - ≤V limit4 <0 and I limit7 ≤I≤I limit8 <0,
[0028] Among them, V + Represents the voltage across the positive bus capacitor, V - Represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit3 Represents the preset third voltage threshold, V limit4 Represents the preset fourth voltage threshold, I limit5 Represents the preset fifth current threshold, I limit6 Represents the preset sixth current threshold, I limit7 Indicates the preset seventh current threshold, I limit8 Indicates the preset eighth current threshold.
[0029] In the above solution, the use of the first modulation mode is reduced, the proportion of the first modulation mode is reduced, the switching frequency of the switch tube can be reduced, and the power consumption of the switch tube can be reduced.
[0030] In combination with the first aspect, in certain implementations of the first aspect, the power converter further includes: a detection circuit, the detection circuit being used to detect the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of the bridge arm.
[0031] Based on the above scheme, the voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor and the output current of the bridge arm can be obtained through the detection circuit, ensuring that the power converter can obtain parameters in a timely and accurate manner.
[0032] In a second aspect, a control method is provided, which is applied to a power converter, wherein the positive pole of the DC side of the power converter is used to connect to the positive DC bus, and the negative pole of the DC side is used to connect to the negative DC bus. The power converter includes a power conversion circuit, a filter circuit and a control circuit; the power conversion circuit includes an inverter circuit and a DC bus capacitor, and the DC bus capacitor is connected between the positive DC bus and the negative DC bus. The inverter circuit includes at least one bridge arm, and the output end of each bridge arm is electrically connected to the filter circuit. Each bridge arm includes multiple switching tubes, and the bridge arm is used to convert the input DC power into AC power.
[0033] The control method includes: obtaining the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of each bridge arm; and controlling the bridge arm to switch between a first modulation mode and a second modulation mode based on the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of at least one bridge arm. In the first modulation mode, the voltage level output by the bridge arm during a switching cycle includes a unidirectional voltage level, a zero voltage level, and a reverse voltage level; and in the second modulation mode, the voltage level output by the bridge arm during a switching cycle includes a unidirectional voltage level and a zero voltage level, wherein the unidirectional voltage level is a voltage level in the same direction as the equivalent voltage output by the inverter circuit, and the reverse voltage level is a voltage level in the opposite direction to the equivalent voltage output by the inverter circuit.
[0034] In conjunction with the second aspect, in certain implementations of the second aspect, the method includes: in response to a preset condition being met, controlling the bridge arm to switch from the second modulation mode to the first modulation mode;
[0035] Pre-conditions include any of the following:
[0036] Condition 1: V + -V - ≥V limit1 >0 and 0 <Ilimit1 ≤I≤I limit2 ;
[0037] Condition 2: V + -V - ≥V limit1 >0 and I limit3 ≤I≤I limit4 <0;
[0038] Condition 3: V + -V - ≤V limit2 <0 and 0 limit1 ≤I≤I limit2 ;
[0039] Condition 4: V + -V - ≤V limit2 <0 and I limit3 ≤I≤I limit4 <0,
[0040] Among them, V + Represents the voltage across the positive bus capacitor, V - Represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit1 Represents the preset first voltage threshold, V limit2 Represents the preset second voltage threshold, I limit1 Represents the preset first current threshold, I limit2 Represents the preset second current threshold, I limit3 Represents the preset third current threshold, I limit4 represents a preset fourth current threshold.
[0041] In conjunction with the second aspect, in certain implementations of the second aspect, in the first modulation mode,
[0042] t1>t2, and
[0043] t3 <t4,
[0044] Among them, t1 represents the duration of the bridge arm outputting the reverse level within one switching cycle when the above condition 1 is met, t2 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 2 is met, t3 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 3 is met, and t4 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 4 is met.
[0045] In conjunction with the second aspect, in certain implementations of the second aspect, the method includes: in response to a preset condition being met, controlling the bridge arm to switch from the second modulation mode to the first modulation mode;
[0046] Pre-conditions include any of the following:
[0047] Condition 5: V + -V - ≥V limit3 >0 and 0 limit5 ≤I≤I limit6 ;
[0048] Condition 6: V + -V - ≤V limit4 <0 and I limit7 ≤I≤I limit8 <0,
[0049] Among them, V + Represents the voltage across the positive bus capacitor, V - Represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit3 Represents the preset third voltage threshold, V limit4 Represents the preset fourth voltage threshold, I limit5 Represents the preset fifth current threshold, I limit6 Represents the preset sixth current threshold, I limit7 Indicates the preset seventh current threshold, I limit8 Indicates the preset eighth current threshold.
[0050] In combination with the second aspect, in certain implementations of the second aspect, the method also includes: obtaining the voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor, and the output current of the bridge arm from the detection circuit, and the detection circuit is used to detect the voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor, and the output current of the bridge arm.
[0051] The beneficial effects of the second aspect and its implementation method can be found in the description of the first aspect and its implementation method, and will not be repeated here.
[0052] In a third aspect, a power supply system is provided, comprising: a power supply, a positive busbar, a negative busbar, and at least one power converter according to the first aspect and possible implementations thereof. The power supply is connected to the positive input terminal of the power converter via the positive busbar, and to the negative input terminal of the power converter via the negative busbar. The power converter is configured to convert direct current (DC) power input from the power supply into alternating current (AC) power output for a load.
[0053] In combination with the third aspect, in certain implementations of the third aspect, the power source includes: a photovoltaic power generation device and / or an energy storage device.
[0054] The beneficial effects of the third aspect and its implementation methods can be found in the description of the first aspect and its implementation methods, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0055] FIG1 is a schematic diagram of an application scenario of an embodiment of the present application.
[0056] FIG2 is a topological diagram of a three-phase power conversion circuit provided in an embodiment of the present application.
[0057] FIG3 is a topological diagram of a power conversion circuit provided in an embodiment of the present application.
[0058] FIG4 is a topological diagram of another power conversion circuit provided in an embodiment of the present application.
[0059] FIG5 is a topological diagram of yet another power conversion circuit provided in an embodiment of the present application.
[0060] FIG6 is a timing diagram of the switch tubes on the bridge arm during unipolar modulation provided by an embodiment of the present application.
[0061] FIG7 is a timing diagram of the switch tubes on the bridge arm during bipolar modulation provided by an embodiment of the present application.
[0062] FIG8 is a schematic diagram of a power converter provided in an embodiment of the present application.
[0063] FIG9 is a schematic diagram of a control method provided in an embodiment of the present application.
[0064] FIG10 is a control logic diagram of a control circuit provided in an embodiment of the present application.
[0065] FIG11 is a control logic diagram of another control circuit provided in an embodiment of the present application.
[0066] FIG12 is a timing diagram provided in an embodiment of the present application.
[0067] FIG13 is a simulation voltage diagram provided in an embodiment of the present application. DETAILED DESCRIPTION
[0068] The technical solution in this application will be described below with reference to the accompanying drawings.
[0069] Figure 1 shows a schematic diagram of an application scenario of an embodiment of the present application. As shown in Figure 1, a photovoltaic power generation system includes photovoltaic (PV) modules and a photovoltaic inverter. PV modules convert solar energy into electrical energy. Since PV modules generate direct current (DC), a PV inverter is required to convert DC into AC to facilitate power transmission and utilization.
[0070] The photovoltaic inverter includes a direct current to alternating current (DC / AC) converter, and the DC / AC converter is used to convert direct current into alternating current.
[0071] The photovoltaic inverter also includes a maximum power point tracking (MPPT) module, which is used to track the highest voltage and current values so that the power generation system can output current at maximum power.
[0072] The MPPT module and DC / AC converter in the photovoltaic inverter can be arranged in the same package device or in different package devices.
[0073] The MPPT module may include a direct current to direct current (DC / DC) converter, which is used to stabilize (or convert) the DC power generated by the PV module. The stabilized DC power can be output to the power system.
[0074] One end of the DC / AC converter in a photovoltaic inverter is connected to the MPPT module and an energy storage system, and the other end is used to connect to the AC load. Thus, the DC / AC converter converts the DC power output by the MPPT module or energy storage system into AC power and supplies it to the grid or AC load.
[0075] An energy storage system consists of an energy storage device and a power conversion system (PCS). The energy storage device includes one or more battery clusters and one or more battery management systems (BMS), with each battery cluster corresponding to a BMS. A BMS typically performs functions such as dynamic battery charging and discharging monitoring, cell balancing, and battery state of charge assessment.
[0076] In an embodiment of the present application, the energy storage device includes one or more battery clusters, and when the energy storage device includes multiple battery clusters, the multiple battery clusters are connected in parallel. Among them, a battery cluster is composed of multiple battery packs. Among them, each battery pack includes one or more battery packs (PACK). In one implementation, each battery pack may also include a battery management unit (BMU), and the energy storage device also includes a battery control unit (BCU). The above-mentioned BMS includes the BMU and the BCU. The BMU is used to monitor the voltage, temperature and other information of the PACK, and report the above information to the BCU. The BCU monitors the PCK based on the above information and generates power control instructions for the PACK.
[0077] Since the energy storage device stores direct current (DC), it needs to be converted to alternating current (AC) via a PCS to facilitate transmission and utilization. The PCS includes a DC / AC converter, which converts DC to AC.
[0078] The power converter provided in the embodiments of the present application can be applied to any independent system of the above-mentioned photovoltaic power generation system or energy storage system, or can be applied to the photovoltaic storage system, that is, the overall system of the above-mentioned photovoltaic power generation system and energy storage system. It should be understood that the photovoltaic inverter and PCS in the above-mentioned scenario are only examples of power converters. The power converter in the embodiments of the present application can also include other devices for power conversion, such as filters, etc., without limitation to this.
[0079] The power converter includes a power conversion circuit. FIG2 is a topological diagram of a three-phase power conversion circuit provided in an embodiment of the present application. The power conversion circuit in FIG2 can be applied to the above-mentioned PCS or photovoltaic inverter.
[0080] As shown in Figure 2, the power conversion circuit includes an A-phase bridge arm, a B-phase bridge arm, a C-phase bridge arm, five capacitors and six inductors. The power conversion circuit receives current through the positive bus and the negative bus, wherein capacitor C1 and capacitor C2 are connected in series between the positive bus and the negative bus, capacitor C1 is connected to the positive bus, and capacitor C2 is connected to the negative bus. After passing through the A-phase bridge arm, the B-phase bridge arm, and the C-phase bridge arm, the current is output through the filter inductors L1, L2 and L3 respectively. The current output by the A-phase bridge arm, the B-phase bridge arm, and the C-phase bridge arm through the filter inductor passes through capacitors C3, C4 and C5 respectively and then converges into the series connection point of capacitor C1 and capacitor C2. The current output by the A-phase bridge arm, the B-phase bridge arm, and the C-phase bridge arm through the filter inductor passes through inductors L4, L5 and L6 respectively to supply power to the load.
[0081] In the power conversion circuit shown in Figure 2, the structures of the Phase A, Phase B, and Phase C arms are similar. To avoid redundancy, the following description uses the Phase A arm as an example. The structures of the Phase B and Phase C arms can be found in the description of the Phase A arm. The Phase A arm includes an upper arm, a lower arm, and a bypass branch. The upper arm includes series-connected switches Q1 and Q2, with Q1 connected to the positive busbar. The lower arm includes series-connected switches Q3 and Q4, with Q4 connected to the negative busbar. The bypass branch includes series-connected switches Q5 and Q6. Each switch is connected in parallel with a diode, the conduction direction of the diode is opposite to that of the switch, Q5 in the bypass branch is connected to the series connection point of Q1 and Q2 in the upper bridge arm, Q6 in the bypass branch is connected to the series connection point of Q3 and Q4 in the lower bridge arm, Q2 in the upper bridge arm is connected in series with Q3 in the lower bridge arm, the series connection point of the upper bridge arm and the lower bridge arm is connected to the series connection point of capacitors C1 and C2, and the series connection point of Q5 and Q6 in the bypass branch is connected to L1. In this application, the switch is turned on or off according to the drive signal input to the switch.
[0082] In the power conversion circuit shown in Figure 2, the voltage of the series connection point of capacitor C1 and capacitor C2 is V0, the series connection point of capacitor C1 and capacitor C2 is connected to the connection point of Q2 and Q3, one end of capacitor C1 is connected to the positive bus, and the other end is connected to one end of C2, and the other end of C2 is connected to the negative bus. The voltage of the positive bus is U, and the voltage of the negative bus is -U. The positive bus is connected to the positive pole of the DC side of the power conversion circuit, and the negative bus is connected to the negative pole of the DC side of the power conversion circuit.
[0083] In the embodiment of the present application, the output voltage of the bridge arm in the power conversion circuit during the switching cycle can have three conditions according to the on / off state of the switch tube. Specifically, when Q1 and Q5 in the upper bridge arm are turned on and Q4 and Q6 in the lower bridge arm are turned off, the output voltage V A The voltage value of the bridge arm is U; when Q4 and Q6 in the lower bridge arm are turned on and Q1 and Q5 in the upper bridge arm are turned off, the output voltage of the bridge arm is V A The voltage value is -U; when Q2 and Q5 in the upper bridge arm or Q3 and Q6 in the lower bridge arm are turned on, the output voltage V A The voltage value is 0.
[0084] The topology of the power conversion circuit in Figure 2 is only an example. The power conversion circuit in the power converter may also have other topological structures, such as the topology shown in Figures 3-5. It should be noted that Figures 3-5 only show the topology of a single-phase inverter circuit. The technical solution of the present application can be applied to a single-phase power supply circuit or a three-phase power supply circuit. Therefore, what is shown in Figures 3-5 may be the topology of a single-phase power supply circuit or the topology of a single-phase bridge arm shown in a three-phase power supply circuit. It can be understood that each phase circuit corresponds to a bridge arm.
[0085] In Figure 3-5, by controlling the on and off of the switch tube, the output voltage of the bridge arm in the power conversion circuit during the switching cycle can have three conditions.
[0086] As shown in FIG3 , the power conversion circuit receives current through the positive bus and the negative bus, wherein capacitors C1 and C2 are connected in series between the positive bus and the negative bus, one end of capacitor C1 is connected to the positive bus, the other end is connected to one end of C2, and the other end of C2 is connected to the negative bus. The power conversion circuit includes an upper bridge arm, a lower bridge arm and a bypass branch, wherein the upper bridge arm includes switch tubes Q1 and Q2 connected in series, Q1 is connected to the positive bus, the lower bridge arm includes switch tubes Q3 and Q4 connected in series, Q4 is connected to the negative bus, the bypass branch includes diodes D5 and D6 connected in series, each switch tube is connected in parallel with a diode, the conduction direction of the diode is opposite to the conduction direction of the switch tube, D5 in the bypass branch is connected to the series connection point of Q1 and Q2 in the upper bridge arm, D6 in the bypass branch is connected to the series connection point of Q3 and Q4 in the lower bridge arm, Q2 in the upper bridge arm is connected in series with Q3 in the lower bridge arm, D5 and D6 in the bypass branch are connected in series, and the series connection point of D5 and D6 is connected to the series connection point of capacitor C1 and capacitor C2. In this application, the switch tube is turned on or off according to the drive signal of the input switch tube.
[0087] In the circuit of Figure 3, the voltage of the positive bus is U, and the voltage of the negative bus is -U. When Q1 and Q2 are turned on and Q3 and Q4 are turned off, the output voltage V out The voltage value is U; when Q3 and Q4 are turned on and Q1 and Q2 are turned off, the output voltage V out The voltage value is -U; when Q1 and Q4 are turned off and Q2 or Q3 is turned on, the output voltage V out The voltage value is U.
[0088] As shown in FIG4 , the power conversion circuit receives current through the positive bus and the negative bus, wherein capacitors C1 and C2 are connected in series between the positive bus and the negative bus, one end of capacitor C1 is connected to the positive bus, and the other end is connected to one end of C2, and the other end of C2 is connected to the negative bus. The power conversion circuit includes an upper bridge arm, a lower bridge arm and a bypass branch, wherein the upper bridge arm includes switch tubes Q1 and Q5 connected in series, Q1 is connected to the positive bus, the lower bridge arm includes switch tubes Q4 and Q6 connected in series, Q4 is connected to the negative bus, the bypass branch includes Q2 and Q3 connected in series, each switch tube is connected in parallel with a diode, the conduction direction of the diode is opposite to the conduction direction of the switch tube, Q2 in the bypass branch is connected to the series connection point of Q1 and Q5 in the upper bridge arm, Q3 in the bypass branch is connected to the series connection point of Q4 and Q6 in the lower bridge arm, Q5 in the upper bridge arm is connected in series with Q6 in the lower bridge arm, and the series connection point of Q2 and Q3 in the bypass branch is connected to the series connection point of capacitor C1 and capacitor C2. In this application, the switch tube is turned on or off according to the drive signal of the input switch tube.
[0089] In the circuit of Figure 4, the voltage of the positive bus is U, and the voltage of the negative bus is -U. When Q1 and Q5 in the upper bridge arm are turned on and Q4 and Q6 in the lower bridge arm are turned off, the output voltage V out The voltage value is U; when Q4 and Q6 in the lower bridge arm are turned on and Q1 and Q5 in the upper bridge arm are turned off, the output voltage V out The voltage value is -U; when Q2 and Q5 in the upper arm or Q3 and Q6 in the lower arm are turned on, the output voltage V out The voltage value is 0.
[0090] As shown in Figure 5, the power conversion circuit receives current through the positive bus and the negative bus, wherein a capacitor C1 and a capacitor C2 are connected in series between the positive bus and the negative bus, one end of the capacitor C1 is connected to the positive bus, the other end is connected to one end of C2, and the other end of C2 is connected to the negative bus. The power conversion circuit includes an upper bridge arm, a lower bridge arm and a bypass branch, wherein the upper bridge arm includes a switch tube Q1, Q1 is connected to the positive bus, the lower bridge arm includes a switch tube Q4, Q4 is connected to the negative bus, the bypass branch includes Q2 and Q3 connected in series, each switch tube is connected in parallel with a diode, and the conduction direction of the diode is opposite to the conduction direction of the switch tube, Q1 and Q4 are connected in series, Q3 in the bypass branch is connected to the series connection point of Q1 and Q4, and Q2 in the bypass branch is connected to the series connection point of capacitor C1 and capacitor C2. In this application, the switch tube is turned on or off according to the drive signal input to the switch tube.
[0091] In the circuit of Figure 5, the voltage of the positive bus is U, and the voltage of the negative bus is -U. When Q1 is turned on and Q2, Q3 and Q4 are turned off, the output voltage V out The voltage value is U; when Q4 is turned on and Q1, Q2 and Q3 are turned off, the output voltage Vout The voltage value is -U; when Q2 and Q3 are turned on and Q1 and Q4 are turned off, the output voltage V out The voltage value is 0.
[0092] It should be understood that the switch tubes in Figures 2-5 can be insulated gate bipolar transistors IGBTs, field effect transistors MOSFETs, or other controlled switches.
[0093] It should be noted that the bridge arm of the power converter in the embodiment of the present application has three voltage outputs during the switching cycle. In actual use, a modulation method is used to make the bridge arm of the power converter output different levels to synthesize a step wave to approximate a sinusoidal output voltage, where each level corresponds to an output voltage. The modulation methods involved in the embodiments of the present application mainly include unipolar modulation and bipolar modulation.
[0094] Bipolar modulation: The full name is bipolar pulse width modulation (PWM) modulation. Bipolar modulation refers to the levels output by the bridge arm during the switching cycle, including the same-direction level, the reverse level, and the zero level, where the zero level corresponds to zero voltage, the voltage corresponding to the positive level has the same polarity or direction as the equivalent voltage output by the power conversion circuit, and the voltage corresponding to the reverse level has the opposite polarity or direction to the equivalent voltage output by the power conversion circuit. For example, when the equivalent voltage output by the power conversion circuit is a positive voltage, the same-direction level refers to the positive level, and the reverse level refers to the negative level; when the equivalent voltage output by the power conversion circuit is a negative voltage, the same-direction level refers to the negative level, and the reverse level refers to the positive level. Since the bridge arm will output three levels during the switching cycle during bipolar modulation, bipolar modulation is also called three-level modulation.
[0095] Unipolar modulation: The full name is unipolar PWM modulation. Unipolar modulation refers to the situation where the voltage levels output by the bridge arm during the switching cycle only include the same-direction voltage and the zero level, and do not include the reverse voltage. For example, when the equivalent voltage output by the power conversion circuit is the voltage of the positive half-cycle of the sinusoidal voltage, the bridge arm will output the positive level and the zero level under unipolar modulation; when the equivalent voltage output by the power conversion circuit is the voltage of the negative half-cycle of the sinusoidal voltage, the bridge arm will output the negative level and the zero level under unipolar modulation. Because the bridge arm only outputs two voltage levels during the switching cycle during unipolar modulation, unipolar modulation is also called two-level modulation.
[0096] The following describes the process of unipolar modulation and bipolar modulation in detail by taking the circuit topology in FIG. 3 as an example and combining the timing diagrams in FIG. 6 and FIG. 7 .
[0097] FIG6 is a timing diagram of the switch tubes on the bridge arm during unipolar modulation provided by an embodiment of the present application.
[0098] It should be understood that a high level indicates that the switch is on, and a low level indicates that the switch is off. Q1-Q4 in Figure 6 corresponds to Q1-Q4 in the circuit topology of Figure 3. According to the timing diagram in Figure 6, Q2 is always on and Q4 is always off. When Q1 is on within time t1 and Q3 is off within time t1, the positive bus current is output to the load through Q1 and Q2, and the bridge arm outputs the same level. When Q1 is off within time t2 and Q3 is on within time t2, there is no path between the positive and negative bus bars, and the bridge arm outputs zero level.
[0099] It should be understood that the time lengths of t1 and t2 can be adjusted according to demand, and the sum of t1 and t2 is less than or equal to the length of one switching cycle.
[0100] The control circuit 620 can also perform bipolar modulation on the bridge arm by inputting a driving signal to each switch tube in the bridge arm. Taking the circuit topology diagram in Figure 3 as an example, the timing diagram of the switch tube when the driving signal is used to control the switch tube for bipolar modulation can be seen in Figure 8.
[0101] FIG7 is a timing diagram of the switch tubes on the bridge arm during bipolar modulation provided by an embodiment of the present application.
[0102] It should be understood that a high level indicates that the switch is on, and a low level indicates that the switch is off. It should be understood that a high level indicates that the switch is on, and a low level indicates that the switch is off. Q1-Q4 in Figure 7 corresponds to Q1-Q4 in the circuit topology in Figure 3. According to the timing diagram in Figure 7, during the t3 duration, Q1 and Q2 in Figure 3 are off, Q3 and Q4 in Figure 3 are on, the negative bus current is output to the load through Q4 and Q3, and the bridge arm outputs a reverse level; during the t4 duration, Q1 and Q4 are off, Q2 and Q3 are on, neither the positive bus nor the negative bus has a path, and the bridge arm outputs a zero level; during the t5 duration, Q1 and Q2 are on, Q3 and Q4 are off, the positive bus current is output to the load through Q1 and Q2, and the bridge arm outputs a positive level.
[0103] It should be understood that the time lengths of t3, t4 and t5 can be adjusted according to demand, and the sum of t3, t4 and t5 is less than or equal to the length of one switching cycle.
[0104] It should be noted that FIG6 and FIG7 are examples of switch tube timing diagrams provided for the output level of the circuit topology in FIG3 . The timing diagrams of the switch tubes may be different for different topologies.
[0105] In this application, the power conversion circuit can use multiple levels to synthesize a step wave to approximate a sinusoidal output voltage. When outputting zero level, this causes an imbalance in the midpoint voltage V0 of the power conversion circuit, resulting in an imbalance in the voltages of the positive and negative busbars. When bipolar modulation is used, the power conversion circuit has an additional output level compared to unipolar modulation. The PWM wave output by the power conversion circuit is closer to a sinusoidal waveform, has less ripple content, and has better quality of the output AC power. In addition, when bipolar modulation is used, the bridge arm needs to output three levels within a switching cycle, which can reduce the duration of the zero level and reduce the impact on the voltages of the positive and negative busbars. However, bipolar modulation can cause increased power consumption due to the frequent switching of the switches on the bridge arm of the power converter. When unipolar modulation is used, although the increase in power consumption caused by the frequent switching of the switches on the bridge arm of the power converter can be suppressed, it will increase the duration of the zero level and increase the degree of imbalance between the positive and negative DC busbar voltages. In severe cases, the positive and negative DC busbar voltages are significantly uneven, affecting the operating efficiency of the power converter.
[0106] Taking Figures 6 and 7 as examples, for the same power converter, the following relationships should be satisfied: t1+t2=t3+t4+t5#(1)# t1×V1+t2×V2=t3×V3+t4×V2+t5×V1#(2)
[0107] Wherein, V1 represents the voltage value of the positive level, V2 represents the voltage value of the zero level (i.e., 0), and V3 represents the voltage value of the reverse level. t1 is the duration of the positive level in FIG6 , t2 is the duration of the zero level in FIG6 , t3 is the duration of the reverse level in FIG7 , t4 is the duration of the zero level in FIG7 , and t5 is the duration of the positive level in FIG7 . Formula (1) represents that the switching cycles are equal, and formula (2) represents that the equivalent voltages are equal. Assuming that V1 is a positive value, V3 is a negative value. According to formulas (1) and (2), it can be seen that t2 is greater than t4, that is, the duration of the zero level in unipolar modulation is greater than the duration of the zero level in bipolar modulation. Therefore, unipolar modulation increases the imbalance degree of the positive and negative DC bus voltages. In severe cases, the positive and negative DC bus voltages are significantly uneven.
[0108] In order to reduce the power consumption of the power converter when the imbalance degree between the positive and negative DC bus voltages is within a tolerable range, the present application proposes the following power converter.
[0109] FIG8 is a power converter provided in an embodiment of the present application.
[0110] As shown in FIG8 , the power converter includes a power conversion circuit 810 and a control circuit 820, wherein the input end of the power conversion circuit 810 is connected to the positive bus and the negative bus, that is, the input voltage of the power conversion circuit 810 is the positive bus voltage BUS+ and the negative bus voltage BUS-, and the output current I out Provide power to the load.
[0111] The power conversion circuit 810 includes an inverter circuit and a DC bus capacitor, which is connected in parallel with the inverter circuit. The DC bus capacitor is connected between the positive bus and the negative bus. The DC bus capacitor includes a positive bus capacitor C1 and a negative bus capacitor C2 connected in series, wherein the positive bus capacitor is used to connect to the positive bus and the negative bus capacitor is used to connect to the negative bus. The inverter circuit includes multiple bridge arms, the output end of the bridge arm is electrically connected to the filter circuit, and each bridge arm includes multiple switching transistors, which are used to convert the input DC power into AC power.
[0112] It should be noted that in the embodiment of the present application, the voltage output by the bridge arm is converted into sinusoidal alternating current only after passing through the filter circuit, that is, the output end of the above-mentioned bridge arm is connected to the filter circuit, and the output end of the bridge arm outputs a PWM waveform.
[0113] The power conversion circuit 810 can be a three-phase bridge arm, and the topology structure of each phase bridge arm can output three levels. The power conversion circuit 810 can also be a single-phase bridge arm. This application does not limit its specific topology structure. For example, the three-phase topology structure of the power conversion circuit 810 can be as shown in Figure 2, or the topology structure of each phase bridge arm can also be as shown in Figures 3-5.
[0114] The control circuit 820 is used to control the bridge arm to switch between the first modulation mode and the second modulation mode based on the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of the bridge arm.
[0115] In the first modulation mode, bipolar modulation is applied to the bridge arm, meaning that the output voltage levels of the bridge arm within a switching cycle include a unipolar level, a zero level, and a reverse level. In the second modulation mode, unipolar modulation is applied to the bridge arm, and the output voltage levels of the bridge arm within a switching cycle include a unipolar level and a zero level. The unipolar level is a level with the same direction as the equivalent voltage output by the inverter circuit, and the reverse level is a level with the opposite direction to the equivalent voltage output by the inverter circuit. If the equivalent voltage output by the inverter circuit within the switching cycle is positive, the unipolar level refers to the positive level, and the reverse level refers to the negative level. If the equivalent voltage output by the inverter circuit within the switching cycle is negative, the unipolar level refers to the negative level, and the reverse level refers to the positive level.
[0116] It should be noted that in the implementation scenario with multiple bridge arms, the modulation mode of each bridge arm is independently controlled. Therefore, the bridge arm controlled in the embodiment of the present application refers to the corresponding bridge arm that meets the above-mentioned first condition or second condition. For example, in a scenario with three bridge arms, if only the A-phase bridge arm meets the first condition, then the A-phase bridge arm can be controlled to switch to the first modulation mode, and the other two phases can continue to work in the second modulation mode without switching. If both the A-phase bridge arm and the B-phase bridge arm meet the first condition, then the A-phase bridge arm and the B-phase bridge arm can be controlled to switch to the first modulation mode, and the C-phase bridge arm can continue to work in the second modulation mode without switching.
[0117] Therefore, the embodiment of the present application mainly describes the situation of one bridge arm, and the control logic of the other bridge arms is consistent and will not be repeated.
[0118] Specifically, if the control circuit 820 determines that the preset first condition is met, the control bridge arm switches from the second modulation mode to the first modulation mode; if the control circuit 820 determines that the first condition is not met, the control bridge arm operates in the second modulation mode.
[0119] In one possible implementation, the first condition is used to characterize the degree of imbalance between the positive and negative bus voltages, that is, the control circuit 820 determines whether the bridge arm operates in the first modulation mode or the second modulation mode according to the degree of imbalance between the positive and negative bus voltages.
[0120] Exemplarily, the control circuit 820 determines the degree of imbalance between the positive and negative bus voltages according to the difference between the voltage across the positive bus capacitor and the voltage across the negative bus capacitor and the output current of the bridge arm.
[0121] In a possible implementation, the first condition includes any of the following conditions:
[0122] Condition 1: V + -V - ≥V limit1 >0 and 0 limit1 ≤I≤I limit2 ;
[0123] Condition 2: V + -V - ≥V limit1 >0 and I limit3 ≤I≤I limit4 <0;
[0124] Condition 3: V + -V - ≤V limit2 <0 and 0 limit1 ≤I≤I limit2 ;
[0125] Condition 4: V + -V - ≤V limit2 <0 and I limit3 ≤I≤I limit4 <0,
[0126] Among them, V + Represents the voltage across the positive bus capacitor, V - Represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit1 Represents the preset first voltage threshold, V limit2 Represents the preset second voltage threshold, I limit1 Represents the preset first current threshold, I limit2 Represents the preset second current threshold, I limit3 Represents the preset third current threshold, I limit4 represents a preset fourth current threshold.
[0127] If the above-mentioned first condition is met, it means that the imbalance degree of the positive and negative bus voltages exceeds the preset range. The control circuit 820 determines that the bridge arm is operating in the first modulation mode based on the imbalance degree of the positive and negative bus voltages. Since in the first modulation mode, three levels need to be output, the duration of the zero level is reduced, and the imbalance degree of the positive and negative bus voltages is reduced; if the above-mentioned first condition is met, it means that the imbalance degree of the positive and negative bus voltages does not exceed the preset range. The control circuit 820 determines that the bridge arm is operating in the second modulation mode based on the imbalance degree of the positive and negative bus voltages. Since in the second modulation mode, only two levels need to be output, the switching frequency of the switch tube is lower, which can reduce power consumption.
[0128] When the bridge arm operates in the first modulation mode, the duration of outputting the three levels may be different in different situations.
[0129] For example, when the above-mentioned condition 1 or condition 2 is met, the difference between the voltage across the positive bus capacitor and the voltage across the negative bus capacitor is greater than or equal to the first voltage threshold. In order to balance the bus voltage, the positive bus capacitor needs to be discharged or the negative bus capacitor needs to be charged. In condition 1, the output current of the bridge arm is greater than or equal to the first current threshold and less than or equal to the second current threshold, that is, the bridge arm outputs a positive current, and the reverse level output by the bridge arm is a negative level, charging the negative bus capacitor; in condition 2, the output current of the bridge arm is greater than or equal to the fourth current threshold and less than or equal to the third current threshold, that is, the bridge arm outputs a reverse current, and the reverse level output by the bridge arm is a positive level, charging the positive bus capacitor. Therefore, when condition 2 is met, it is necessary to reduce the duration of the bridge arm outputting the reverse level within a switching cycle. For example, when condition 1 is met, the duration of the bridge arm outputting the reverse level within a switching cycle is 0.2 times the switching cycle duration. When condition 2 is met, the duration of the bridge arm outputting the reverse level within a switching cycle is 0.1 times the switching cycle duration.
[0130] For example, when the above-mentioned condition 3 or condition 4 is met, when the difference between the voltage across the positive bus capacitor and the voltage across the negative bus capacitor is less than or equal to the second voltage threshold, in order to balance the bus voltage, the positive bus capacitor needs to be charged or the negative bus capacitor needs to be discharged. In condition 3, the output current of the bridge arm is greater than or equal to the first current threshold and less than or equal to the second current threshold, that is, the bridge arm outputs a positive current, and the reverse level output by the bridge arm is a negative level, which discharges the positive bus capacitor; in condition 4, the output current of the bridge arm is greater than or equal to the fourth current threshold and less than or equal to the third current threshold, that is, the bridge arm outputs a reverse current, and the reverse level output by the bridge arm is a positive level, which charges the positive bus capacitor. Therefore, when condition 3 is met, it is necessary to reduce the duration of the bridge arm outputting the reverse level within a switching cycle. For example, when condition 3 is met, the duration of the bridge arm outputting the reverse level within a switching cycle is 0.1 times the switching cycle duration, and when condition 4 is met, the duration of the bridge arm outputting the reverse level within a switching cycle is 0.2 times the switching cycle duration.
[0131] In one possible implementation, when condition 2 is met, the duration of the bridge arm outputting the reverse level within a switching cycle may be reduced directly to zero, which is equivalent to the bridge arm operating in the second modulation mode; similarly, when condition 3 is met, the duration of the bridge arm outputting the reverse level within a switching cycle may be reduced directly to zero, which is equivalent to the bridge arm operating in the second modulation mode. At this time, the first condition includes the above conditions 1 and 4.
[0132] It should be noted that the above-mentioned first voltage threshold, second voltage threshold, first current threshold, second current threshold, third current threshold, and fourth current threshold can be determined based on the tolerance for the imbalance of the positive and negative bus voltages, wherein the tolerance for the imbalance of the positive and negative bus voltages may vary in different scenarios. The absolute values of the first voltage threshold and the second voltage threshold may be the same or different, the absolute values of the first current threshold and the third current threshold may be the same or different, and the absolute values of the second current threshold and the fourth current threshold may be the same or different, and this application does not impose any restrictions on this.
[0133] In one possible implementation, if the control circuit 820 determines that a preset second condition is met, the control bridge arm is controlled to operate in the first modulation mode; if the control circuit 820 determines that the second condition is not met, the control bridge arm is controlled to operate in the second modulation mode. The second condition includes any of the following conditions:
[0134] Condition 5: V + -V - ≥V limit3 >0 and 0 limit5 ≤I≤I limit6 ;
[0135] Condition 6: V + -V - ≤V limit4 <0 and I limit7 ≤I≤I limit8 <0,
[0136] Among them, V + Represents the voltage across the positive bus capacitor, V - Represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit3 Represents the preset third voltage threshold, V limit4 Represents the preset fourth voltage threshold, I limit5 Represents the preset fifth current threshold, I limit6 Represents the preset sixth current threshold, I limit7 Indicates the preset seventh current threshold, I limit8 Indicates the preset eighth current threshold.
[0137] Among them, the third voltage threshold, the fourth voltage threshold, the fifth current threshold, the sixth current threshold, the seventh current threshold, and the eighth current threshold can be determined based on the tolerance for the imbalance of the positive and negative bus voltages, wherein the tolerance for the imbalance of the positive and negative bus voltages may be different in different scenarios. The absolute values of the third voltage threshold and the fourth voltage threshold may be the same or different, the absolute values of the fifth current threshold and the seventh current threshold may be the same or different, and the absolute values of the sixth current threshold and the eighth current threshold may be the same or different, and this application does not impose any restrictions on this.
[0138] In the present application, the control circuit 820 can obtain the voltage difference between the positive bus capacitor and the negative bus capacitor and the output current of the bridge arm.
[0139] Exemplarily, the power converter further includes a detection circuit 830, which is connected to both sides of the positive bus capacitor, both sides of the negative bus capacitor, and the output end of the bridge arm in the power conversion circuit 810. The detection circuit 830 can be an internal module located in the control circuit 820, or it can be an independent unit independent of the control circuit 820, and this application does not limit this. The detection circuit 830 can be an internal module located in the power conversion circuit 810, or it can be an independent unit independent of the power conversion circuit 810, and this application does not limit this.
[0140] In this application, the control circuit can control the bridge arm to output a mixed three-level or two-level output. When the imbalance between the positive and negative busbars of the circuit is too high, the three-level output reduces the duration of the zero-level, suppresses the imbalance between the positive and negative busbars, and improves the quality of the power output. When the imbalance between the positive and negative busbars of the circuit is within the tolerance range, the two-level output reduces the switching frequency of the switch tube and reduces the power consumption of the power converter. By considering the voltage difference between the positive and negative busbar capacitors and the output current of the bridge arm, a balance can be achieved between power quality and power consumption, maintaining the balance of the midpoint voltage, and improving the stability of the power converter.
[0141] In the present application, the control circuit 820 can control the bridge arm to output different levels by inputting a driving signal to each switching tube in the bridge arm. When the driving signal is used to control the switching tube so that the bridge arm outputs two levels within one switching cycle, the timing diagram of the switching tube can be seen in Figure 6; when the driving signal is used to control the switching tube so that the bridge arm outputs three levels within one switching cycle, the timing diagram of the switching tube can be seen in Figure 7.
[0142] FIG9 is a schematic diagram of a control method provided in an embodiment of the present application, which can be applied to the power converter in FIG8 .
[0143] As shown in FIG9 , at S910 , the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of the bridge arm are obtained.
[0144] Exemplarily, the voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor and the output current of the bridge arm can be obtained from the detection unit, which is used to detect the voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor and the output current of the bridge arm.
[0145] S920, based on the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of the bridge arm, controls the bridge arm to switch between the first modulation mode and the second modulation mode. In the first modulation mode, the levels output by the bridge arm within a switching cycle include a unidirectional level, a zero level, and a reverse level; in the second modulation mode, the levels output by the bridge arm within a switching cycle include a unidirectional level and a zero level. The unidirectional level is a level in the same direction as the equivalent voltage output by the inverter circuit, and the reverse level is a level in the opposite direction to the equivalent voltage output by the inverter circuit. The conditions for using the first modulation mode or the second modulation mode are described in the relevant description in FIG8 and are not further elaborated here.
[0146] The switching logic between the first modulation mode and the second modulation mode will be described in detail below with reference to the logic diagrams of FIG10 and FIG11 .
[0147] The control logic of the control circuit is described below with reference to FIG10 and FIG11.
[0148] FIG10 is a control logic diagram provided in an embodiment of the present application.
[0149] As shown in FIG10 , the control circuit determines whether the imbalance degree of the positive and negative bus voltages exceeds a preset range based on the voltage difference between the positive and negative bus capacitors and the output current of the bridge arm in the power conversion circuit.
[0150] S1010, the control circuit determines the voltage difference between the positive and negative bus capacitors and the output current of the bridge arm in the power conversion circuit, and then determines the output level according to the voltage difference between the positive and negative bus capacitors and the output current of the bridge arm in the power conversion circuit.
[0151] S1020, determine whether the voltage difference between the positive and negative bus capacitors is greater than the first voltage threshold. If the voltage difference between the positive and negative bus capacitors is greater than the first voltage threshold, execute S1030. If the voltage difference between the positive and negative bus capacitors is not greater than the first voltage threshold, execute S1040. The first voltage threshold is a positive value.
[0152] S1030, determine whether the bridge arm output current is greater than the first current threshold and less than the second current threshold. If the bridge arm output current satisfies the conditions of being greater than the first current threshold and less than the second current threshold, execute S1070; if the bridge arm output current does not satisfy the conditions of being greater than the first current threshold and less than the second current threshold, execute S1050, the first current threshold is less than the second current threshold, and the first current threshold is greater than or equal to zero.
[0153] S1040, determine whether the voltage difference between the positive and negative bus capacitors is less than the second voltage threshold. If the voltage difference between the positive and negative bus capacitors is less than the second voltage threshold, execute S1030. If the voltage difference between the positive and negative bus capacitors is not less than the second voltage threshold, execute S1060, and the second voltage threshold is a negative value.
[0154] S1050, determine whether the bridge arm output current is less than the third current threshold and greater than the fourth current threshold. If the bridge arm output current satisfies the conditions of being less than the third current threshold and greater than the fourth current threshold, execute S1070; if the bridge arm output current does not satisfy the conditions of being less than the third current threshold and greater than the fourth current threshold, execute S1060, the third current threshold is greater than the fourth current threshold, and the third current threshold is less than or less than zero.
[0155] S1060, controlling the bridge arm to output two levels in one switching cycle: a same-direction level and a zero level.
[0156] S1070, control the bridge arm to output three levels in one switching cycle: the same direction level, the zero level, and the reverse direction level.
[0157] It should be understood that the positive and negative values in the embodiments of the present application are used to indicate the direction of voltage or current. In the present application, the direction that is the same as the positive bus voltage is set to be positive, and the direction that is opposite to the positive bus voltage is set to be negative.
[0158] It should be noted that the above-mentioned first voltage threshold, second voltage threshold, first current threshold, second current threshold, third current threshold, and fourth current threshold can be determined based on the tolerance for the imbalance of the positive and negative bus voltages, wherein the tolerance for the imbalance of the positive and negative bus voltages may vary in different scenarios. The absolute values of the first voltage threshold and the second voltage threshold may be the same or different, the absolute values of the first current threshold and the third current threshold may be the same or different, and the absolute values of the second current threshold and the fourth current threshold may be the same or different, and this application does not impose any restrictions on this.
[0159] It should be noted that in the embodiment of the present application, the bridge arm may output three levels within one switching cycle under various conditions, but in different situations, the duration of each of the three levels output by the bridge arm within one switching cycle may be different. For example, when the voltage difference between the positive and negative bus capacitors is greater than the first voltage threshold, the duration of the reverse level output by the bridge arm when the bridge arm output current is greater than the first current threshold and less than the second current threshold is greater than the duration of the reverse level output by the bridge arm when the bridge arm output current is less than the third current threshold and greater than the fourth current threshold, thereby ensuring that the negative bus capacitor can be charged or the positive bus capacitor can be discharged, thereby reducing the imbalance between the positive and negative buses; when the voltage difference between the positive and negative bus capacitors is less than the second voltage threshold, the duration of the reverse level output by the bridge arm when the bridge arm output current is greater than the first current threshold and less than the second current threshold is less than the duration of the reverse level output by the bridge arm when the bridge arm output current is less than the third current threshold and greater than the fourth current threshold, thereby ensuring that the positive bus capacitor can be charged or the negative bus capacitor can be discharged, thereby reducing the imbalance between the positive and negative buses.
[0160] FIG11 is another control logic diagram provided in an embodiment of the present application.
[0161] As shown in FIG11 , at S1110 , the control circuit determines the voltage difference between the positive and negative bus capacitors and the output current of the bridge arm in the power conversion circuit, and then determines the output level based on the voltage difference between the positive and negative bus capacitors and the output current of the bridge arm in the power conversion circuit.
[0162] S1120, determine whether the voltage difference between the positive and negative bus capacitors is greater than the third voltage threshold. If the voltage difference between the positive and negative bus capacitors is greater than the third voltage threshold, execute S1130. If the voltage difference between the positive and negative bus capacitors is not greater than the third voltage threshold, execute S1140, and the third voltage threshold is a positive value.
[0163] S1130, determine whether the bridge arm output current is greater than the fifth current threshold and less than the sixth current threshold. If the bridge arm output current satisfies the conditions of being greater than the fifth current threshold and less than the sixth current threshold, execute S1170; if the bridge arm output current does not satisfy the conditions of being greater than the fifth current threshold and less than the sixth current threshold, execute S1160, and the fifth current threshold and the sixth current threshold are positive values.
[0164] S1140, determine whether the voltage difference between the positive and negative bus capacitors is less than the fourth voltage threshold. If the voltage difference between the positive and negative bus capacitors is less than the fourth voltage threshold, execute S1150. If the voltage difference between the positive and negative bus capacitors is not less than the fourth voltage threshold, execute S1160, and the fourth voltage threshold is a negative value.
[0165] S1150, determine whether the bridge arm output current is less than the seventh current threshold and greater than the eighth current threshold. If the bridge arm output current satisfies the conditions of being less than the seventh current threshold and greater than the eighth current threshold, execute S1170; if the bridge arm output current does not satisfy the conditions of being less than the seventh current threshold and greater than the eighth current threshold, execute S1160, and the seventh current threshold and the eighth current threshold are negative values.
[0166] S1160, control the bridge arm to output two levels in one switching cycle: the same direction level and the zero level.
[0167] S1170, control the bridge arm to output three levels in one switching cycle: same direction level, zero level and reverse level.
[0168] It should be understood that the positive and negative values in the embodiments of the present application are used to indicate the direction of voltage or current. In the present application, the direction that is the same as the positive bus voltage is set to be positive, and the direction that is opposite to the positive bus voltage is set to be negative.
[0169] Compared with Figure 10, in Figure 11, the duration of the output reverse level is reduced to zero when the voltage difference between the positive and negative bus capacitors is greater than a positive value and the bridge arm output current is a negative value, or when the voltage difference between the positive and negative bus capacitors is less than a negative value and the bridge arm output current is a positive value. The control circuit controls the bridge arm to output two levels instead of three levels. While ensuring that the positive and negative bus balance can be achieved, the switching frequency of the switch tube is reduced and the power consumption is reduced.
[0170] The control circuit in FIG6 adopts the control logic of FIG10 or FIG11, which can reduce the duration of the zero level when outputting three levels, maintain the stability of the midpoint voltage between the positive bus capacitor and the negative bus capacitor, and enable the power conversion device to stably output high-quality AC power.
[0171] FIG12 is a timing diagram of the power conversion device in FIG6 adopting mixed control of unipolar modulation and bipolar modulation, wherein the power conversion device in FIG6 adopts the circuit topology in FIG3.
[0172] During the T1 period, Q2 in Figure 3 is always on and Q4 is always off. When Q1 is off within the t1 duration and Q3 is on within the t1 duration, there is no path for the positive bus and the negative bus, and the bridge arm outputs zero level; when Q1 is on within the t2 duration and Q3 is off within the t2 duration, the positive bus current is output to the load through Q1 and Q2, and the bridge arm outputs the same direction level. At this time, unipolar modulation is used.
[0173] During the T2 period, Q1 and Q2 in Figure 3 are turned off within the t3 duration, Q3 and Q4 are turned on within the t3 duration, the negative bus current is output to the load through Q4 and Q3, and the bridge arm outputs a reverse level; Q1 and Q4 are turned off within the t4 duration, Q2 and Q3 are turned on within the t4 duration, there is no path for both the positive bus and the negative bus, and the bridge arm outputs a zero level; Q1 and Q2 are turned on within the t5 duration, Q3 and Q4 are turned off within the t5 duration, the positive bus current is output to the load through Q1 and Q2, and the bridge arm outputs a same-direction level. At this time, unipolar modulation is used.
[0174] Figure 13 is a voltage diagram of the positive bus capacitor and the negative bus capacitor provided in an embodiment of the present application. It can be seen from Figure 13 that the present application can keep the voltage difference (midpoint voltage) between the positive bus capacitor and the negative bus capacitor almost zero, ensuring that the power conversion device can stably output high-quality electrical energy.
[0175] It should be noted that the power converter of the present application can be used in many scenarios, and the present application does not limit this. For example, in a photovoltaic power generation scenario, the power converter can correspond to a photovoltaic inverter.
[0176] The present application also provides a power supply system including a power supply and a power converter. The power converter is described in FIG6 , and is not described in detail here. The power supply may include an energy storage device and / or a photovoltaic power generation device. For example, the energy storage device may include one or more of an energy storage cabinet, a battery, a battery pack, or a battery cluster, and the photovoltaic power generation device may include a photovoltaic panel.
[0177] Optionally, the power supply system may also include a positive bus, a negative bus and a transformer. The power supply is connected to the positive input terminal of the power converter through the positive bus, and is connected to the negative input terminal of the power converter through the negative bus. The power converter is used to convert the direct current input of the power supply into alternating current, and the transformer is used to transform the alternating current output of the power converter and output it to the load.
[0178] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0179] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0180] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.
[0181] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.
[0182] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
[0183] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.
[0184] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.
Claims
1. A power converter, characterized in that: The positive electrode of the DC side of the power converter is used to connect to the positive DC bus, and the negative electrode of the DC side is used to connect to the negative DC bus. The power converter includes: a power conversion circuit, a filter circuit and a control circuit; The power conversion circuit includes an inverter circuit and a DC bus capacitor, wherein the DC bus capacitor is connected between the positive DC bus and the negative DC bus, and the DC bus capacitor includes a positive bus capacitor and a negative bus capacitor connected in series; The inverter circuit comprises a bridge arm, an output end of the bridge arm is electrically connected to the filter circuit, the bridge arm comprises a plurality of switch tubes, and the bridge arm is used to convert input direct current into alternating current; The control circuit is used to control the bridge arm to switch between the first modulation mode and the second modulation mode based on the voltage across the positive bus capacitor, the voltage across the negative bus capacitor and the output current of the bridge arm, wherein In the first modulation mode, the level output by any of the bridge arms in one switching cycle includes a same-direction level, a zero level, and a reverse level. In the second modulation mode, the level output by any of the bridge arms in one switching cycle includes the same direction level and the zero level. The same-direction level is a level in the same direction as the equivalent voltage output by the inverter circuit, and the reverse-direction level is a level in the opposite direction to the equivalent voltage output by the inverter circuit.
2. The power converter according to claim 1, characterized in that: The control circuit is specifically used for: In response to a preset condition being met, controlling the bridge arm to switch from the second modulation mode to the first modulation mode; The preset condition includes any of the following conditions: Condition 1: V + -V - ≥V limit1 >0 and 0 limit1 ≤I≤I limit2 ; Condition 2: V + -V - ≥V limit1 >0 and I limit3 ≤I≤I limit4 <0; Condition 3: V + -V - ≤V limit2 <0 and 0 limit1 ≤I≤I limit2 ; Condition 4: V + -V - ≤V limit2 <0 and I limit3 ≤I≤I limit4 <0, Among them, V + Represents the voltage across the positive bus capacitor, V - represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit1 Represents the preset first voltage threshold, V limit2 represents the preset second voltage threshold, I limit1 Represents the preset first current threshold, I limit2 Represents the preset second current threshold, I limit3 represents the preset third current threshold, I limit4 Indicates a preset fourth current threshold.
3. The power converter according to claim 2, characterized in that: In the first modulation mode, t1>t2, and t3 <t4, Among them, t1 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 1 is met, t2 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 2 is met, t3 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 3 is met, and t4 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 4 is met.
4. The power converter according to claim 1, characterized in that: The control circuit is specifically used for: In response to a preset condition being met, controlling the bridge arm to switch from the second modulation mode to the first modulation mode; The preset condition includes any of the following conditions: Condition 5: V + -V - ≥V limit3 >0 and 0 limit5 ≤I≤I limit6 ; Condition 6: V + -V - ≤V limit4 <0 and I limit7 ≤I≤I limit8 <0, Among them, V + Represents the voltage across the positive bus capacitor, V - represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit3 represents the preset third voltage threshold, V limit4 represents a preset fourth voltage threshold, I limit5 represents the preset fifth current threshold, I limit6 represents the preset sixth current threshold, I limit7 Indicates the preset seventh current threshold, I limit8 Indicates the preset eighth current threshold.
5. The power converter according to any one of claims 1 to 4, characterized in that: The power converter further comprises: A detection circuit is used to detect the voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor and the output current of the bridge arm.
6. A control method, applied to a power converter, wherein the positive electrode of the DC side of the power converter is used to connect to a positive DC bus, and the negative electrode of the DC side is used to connect to a negative DC bus, and the power converter comprises a power conversion circuit, a filter circuit and a control circuit; the power conversion circuit comprises an inverter circuit and a DC bus capacitor, the DC bus capacitor is connected between the positive DC bus and the negative DC bus, and the DC bus capacitor comprises a positive bus capacitor and a negative bus capacitor connected in series; the inverter circuit comprises a bridge arm, an output end of the bridge arm is electrically connected to the filter circuit, the bridge arm comprises a plurality of switch tubes, and the bridge arm is used to convert input DC power into AC power; The method comprises: Obtaining the voltage across the positive bus capacitor, the voltage across the negative bus capacitor, and the output current of the bridge arm; The bridge arm is controlled to switch between the first modulation mode and the second modulation mode based on the voltage across the positive bus capacitor, the voltage across the negative bus capacitor and the output current of the bridge arm, wherein In the first modulation mode, the level output by the bridge arm in one switching cycle includes a same-direction level, a zero level and a reverse level. In the second modulation mode, the level output by the bridge arm in one switching cycle includes the same direction level and the zero level. The same-direction level is a level in the same direction as the equivalent voltage output by the inverter circuit, and the reverse-direction level is a level in the opposite direction to the equivalent voltage output by the inverter circuit.
7. The control method according to claim 6, characterized in that: The method comprises: In response to a preset condition being met, controlling the bridge arm to switch from the second modulation mode to the first modulation mode; The preset condition includes any of the following conditions: Condition 1: V + -V - ≥V limit1 >0 and 0 limit1 ≤I≤I limit2 ; Condition 2: V + -V - ≥V limit1 >0 and I limit3 ≤I≤I limit4 <0; Condition 3: V + -V - ≤V limit2 <0 and 0 limit1 ≤I≤I limit2 ; Condition 4: V + -V - ≤V limit2 <0 and I limit3 ≤I≤I limit4 <0, Among them, V + Represents the voltage across the positive bus capacitor, V - represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit1 Represents the preset first voltage threshold, V limit2 represents the preset second voltage threshold, I limit1 Represents the preset first current threshold, I limit2 Represents the preset second current threshold, I limit3 represents the preset third current threshold, I limit4 Indicates a preset fourth current threshold.
8. The control method according to claim 7, characterized in that: In the first modulation mode, t1>t2, and t3 <t4, Among them, t1 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 1 is met, t2 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 2 is met, t3 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 3 is met, and t4 represents the duration of the bridge arm outputting the reverse level within one switching cycle when condition 4 is met.
9. The control method according to claim 6, characterized in that: The method comprises: In response to a preset condition being met, controlling the bridge arm to switch from the second modulation mode to the first modulation mode; The preset condition includes any of the following conditions: Condition 5: V + -V - ≥V limit3 >0 and 0 limit5 ≤I≤I limit6 ; Condition 6: V + -V - ≤V limit4 <0 and I limit7 ≤I≤I limit8 <0, Among them, V + Represents the voltage across the positive bus capacitor, V - represents the voltage across the negative bus capacitor, I represents the output current of the bridge arm, V limit3 represents the preset third voltage threshold, V limit4 represents a preset fourth voltage threshold, I limit5 represents the preset fifth current threshold, I limit6 represents the preset sixth current threshold, I limit7 Indicates the preset seventh current threshold, I limit8 Indicates the preset eighth current threshold.
10. The control method according to any one of claims 6 to 9, characterized in that: The power converter further includes a detection circuit, and the method further includes: The voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor and the output current of the bridge arm are obtained from the detection circuit, and the detection circuit is used to detect the voltage on both sides of the positive bus capacitor, the voltage on both sides of the negative bus capacitor and the output current of the bridge arm.
11. A power supply system, characterized in that: include: A power supply, a positive bus, a negative bus and at least one power converter as claimed in any one of claims 1 to 5; The power supply is connected to the positive input terminal of the power converter through the positive bus, and is connected to the negative input terminal of the power converter through the negative bus; The power converter is used to convert the direct current input by the power supply into alternating current and output it to the load.
12. The power supply system according to claim 11, characterized in that: The power source includes: photovoltaic components and / or energy storage equipment.
Citation Information
Patent Citations
Power converter and power supply system
CN117955355B
Three-level DC-DC converter-based wind storage bipolar DC microgrid and control method thereof
CN107147145A
Power conversion circuit, control method, power conversion device and photovoltaic power supply system
CN116418245A
Inverter and balance circuit control method
CN116647097A
Power conversion device, control method therefor, and power
CN116827081A
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