Process diagnosing system, process monitoring system, and wafer

Abstract

In the present invention, a manufacturing process includes a plurality of measurement steps. In a measurement step, the electrical or material characteristics of a measurement region which is on a wafer and in which a device is to be produced is measured before starting processing of a process step that follows after the completion of the processing of any of multiple process steps. A characteristic history management unit accumulates measurement data of the electrical or material characteristics of the measurement region measured in a plurality of measurement steps. A process defect diagnosis unit identifies a candidate for a process step that has caused a defect in the device characteristics, such identification performed on the basis of: a change in the electrical or material characteristics of the measurement region accompanying the progression of the plurality of process steps; and the results of determining the device characteristics of the produced device.

Description

Process diagnostic system, process monitoring system and wafer

[0001] The present invention relates to a system for diagnosing and monitoring a manufacturing process by monitoring the transition of electrical or material properties of a measurement area in the manufacturing process, and also to a wafer suitable for monitoring the transition of electrical or material properties.

[0002] Charged particle beam devices, such as scanning electron microscopes (SEMs), can identify nanometer-order fine patterns using a focused electron beam. By identifying these fine patterns, they are used in in-line inspection and measurement to monitor the shape of semiconductor devices (hereinafter referred to as devices) during the manufacturing process and identify device defects and the manufacturing process that causes them.

[0003] On the other hand, Patent Document 1 discloses an inspection device that measures the dimensions of a pattern on a sample and electrical or material properties by irradiating the sample with a charged particle beam under predetermined conditions and acquiring an image.

[0004] International Publication No. 2022 / 059202

[0005] A device is composed of one or more elements. Elements broadly include active and passive elements formed on a wafer, such as transistors, memory elements, capacitors, resistors, wiring, and plugs. Their structures include stacked layers including semiconductor substrates, semiconductor layers, insulating layers, and metal layers, as well as interlayer insulating films that insulate the stacked layers. Defects that occur during the device manufacturing process are not limited to the shapes of the elements that make up the device. For example, defects can be caused by the electrical or material characteristics of the elements. Examples of electrical characteristics include the element's resistance, capacitance, electrical tolerance, and transistor threshold voltage. Examples of material characteristics include the element's dielectric constant, dopant concentration, fixed and mobile defect density, interface state, material energy level, and strain. Defects in these electrical or material characteristics can affect the stability and reliability of the operation of the element, and ultimately of devices that include the elements.

[0006] However, the electrical or material properties of a device are not determined solely by the manufacturing process of the device itself. Generally, a wafer contains many different devices, which are fabricated in parallel, and therefore may be affected by processes not necessary for the device's fabrication. For example, processes such as heat treatments (e.g., annealing), plasma treatments (e.g., etching), and film quality improvement processes (e.g., ultraviolet light irradiation) can unintentionally affect other devices (or their intermediate products) and alter their electrical or material properties. Therefore, when a device is found to be defective in a device characteristic test after fabrication, it is difficult to identify which element in the device structure is responsible for the defective electrical or material properties and which process caused the defect.

[0007] A process diagnosis system according to one embodiment of the present invention is a process diagnosis system that, in a manufacturing process having a plurality of process steps for performing processing to fabricate devices on a wafer and an inspection step for inspecting the device characteristics of the fabricated devices, identifies the process step that caused the defect when a device characteristic is determined to be defective in the inspection step, the manufacturing process having a plurality of measurement steps, in which the measurement step measures the electrical or material characteristics of a measurement area on the wafer where the device is fabricated after processing of one of the plurality of process steps is completed and before processing of the subsequent process step is started, and the system has a characteristic history management unit that accumulates measurement data of the electrical or material characteristics of the measurement area measured in the plurality of measurement steps, and a process defect diagnosis unit that identifies candidate process steps that caused the defect in the device characteristics based on the transition of the electrical or material characteristics of the measurement area as the plurality of process steps progress and the determination results of the device characteristics in the inspection step.

[0008] The present invention provides a method for manufacturing a device using a semiconductor device, comprising: monitoring a change in electrical or material properties of a measurement area on a wafer during the device manufacturing process; and diagnosing or monitoring the manufacturing process. Other objects and novel features will become apparent from the description of this specification and the accompanying drawings.

[0009] 1 is a hardware configuration example of a semiconductor process diagnosis system; FIG. 2 is a hardware configuration example of an information processing device; FIG. 3 is a processing flow of a semiconductor process diagnosis system according to a first embodiment; FIG. 4 is an example of a manufacturing process of devices fabricated on a wafer; FIG. 5 is a configuration example of an in-line measurement device; FIG. 6 is a diagram for explaining a method for estimating a cause process; FIG. 7 is a diagram for explaining a method for estimating a cause process; FIG. 8 is an example of a performance trace / analysis screen; FIG. 9 is a processing flow of a semiconductor process diagnosis system according to a second embodiment; FIG. 10 is an example of a calibration element; FIG. 11 is an example of a calibration element; FIG. 12 is a diagram for explaining the effect of calibration; FIG. 13 is a processing flow of a semiconductor process diagnosis system according to a modified example; FIG. 14 is a processing flow of a semiconductor process monitoring system according to a third embodiment; FIG. 15 is a diagram for explaining a data configuration of a characteristic transition database; FIG. 16 is a diagram for explaining an anomaly detection method; FIG. 17 is an example of an in-line measurement element;

[0010] Hereinafter, embodiments will be described with reference to the drawings. In the drawings, identical parts are given the same reference numerals, and duplicate explanations will be omitted where appropriate. Please note that the attached drawings are intended to explain and facilitate understanding of the invention, and that the shapes, dimensions, ratios, etc. in each drawing may differ from those of the actual device.

[0011] In the following examples, an example is shown in which an SEM is used as an in-line measurement device for measuring the electrical or material properties of elements (or intermediate products) that constitute a device in-line. However, the present invention is not limited to an SEM as long as the device can measure the electrical or material properties of elements non-destructively.

[0012] 1A shows an example of the hardware configuration of a semiconductor process diagnosis system 1. The semiconductor process diagnosis system 1 includes, as its main components, a characteristic history management device 50 and a process defect diagnosis device 60, and monitors the device manufacturing process in a production line (or prototype line) including a processing device 10, an in-line measurement device 20, and a device inspection device 30. The control device 21 of the in-line measurement device 20, the control device 31 of the device inspection device 30, the characteristic history management device 50, and the process defect diagnosis device 60 are connected to each other via a network 40 so as to be able to communicate with each other.

[0013] The processing device 10 performs a predetermined process on the wafer 5 as one step in device manufacturing. The processing device 10 includes various semiconductor manufacturing devices, such as lithography devices, film deposition devices, pattern processing devices, ion implantation devices, heating devices, and cleaning devices. The inline metrology device 20 measures the electrical or material properties of the wafer 5 after the predetermined process has been performed by the processing device 10. Although not shown in FIG. 1A , the wafer 5 measured by the inline metrology device 20 is sent to a processing device that performs the next process, and the processed wafer 5 is then measured by an inline inspection device. After all manufacturing processes are completed by repeating this process and inline measurement on the wafer 5, a device is fabricated on the wafer 5. The device inspection device 30 inspects the device characteristics on the wafer 5.

[0014] When there is a defect in the characteristics of a device fabricated on a wafer 5 by the above-described manufacturing process, the characteristic history management device 50 and the process defect diagnosis device 60 perform process diagnosis to identify the cause of the defect and the process that caused the defect. Details of these will be described later.

[0015] The characteristic history management device 50, the process defect diagnosis device 60, the control device 21 of the inline measurement device 20, and the control device 31 of the device inspection device 30 are each realized by an information processing device 70 including, as shown in FIG. 1B , a processor (Central Processing Unit: CPU) 71, a memory 72, a storage device 73, an input interface (I / F) 74, an output I / F 75, a communication I / F 76, and a bus 77 as its main components. The processor 71 functions as a functional unit that provides a predetermined function by executing processing in accordance with a program loaded into the memory 72. The storage device 73 stores data and programs used by the functional unit. The input I / F 74 is connected to input devices such as a keyboard, a pointing device, and an operation panel, and the output I / F 75 is connected to a display device. The communication device I / F 76 enables communication with other information processing devices via a network. These are connected to each other via the bus 77 so that they can communicate with each other.

[0016] In the following description, when describing processing by a program, the program, functional units, etc. may be described as the main components, but the main hardware components are a processor or an information processing device configured to include the processor. The information processing device executes processing according to a program loaded into memory using resources such as memory and a communication interface as appropriate through the processor. While FIG. 1B shows an example of a CPU as the processor, a GPU (Graphical Processing Unit) or the like may also be used. Furthermore, processing to realize a function is not limited to software program processing, and can also be implemented using a dedicated circuit. Examples of the dedicated circuit include a field programmable gate array (FPGA) and an application specific integrated circuit (ASIC).

[0017] While FIG. 1A illustrates an example of a hardware configuration in which the characteristic history management device 50 and the process failure diagnosis device 60 are implemented as functional units (characteristic history management unit and process failure diagnosis unit) of different information processing devices, these functions may be implemented as functional units (characteristic history management unit and process failure diagnosis unit) of a single information processing device. Alternatively, some or all of these functions may be implemented as applications on a cloud computing system. Alternatively, some or all of the functions may be provided in either the control device 21 or the control device 31. For example, by implementing the characteristic history management unit and the process failure diagnosis unit in the control device 21, it is possible to easily build a system in which wafers in the manufacturing process are repeatedly measured by the inline measurement device 20, the measurement data is accumulated, and failure diagnosis is performed. This configuration is suitable for the process development stage in which small-scale prototyping is repeatedly performed.

[0018] 1C shows a process flow of the semiconductor process diagnosis system 1 according to the first embodiment. The process flow of the first embodiment includes a manufacturing process 100 shown in the upper part for fabricating devices on a wafer, and a diagnosis process 110 shown in the lower part for diagnosing the manufacturing process based on measurements and inspections performed in the manufacturing process. Note that the manufacturing process here may be a manufacturing process in a manufacturing line for mass-producing devices, or a manufacturing process in a prototype line in the process development stage.

[0019] The manufacturing process 100 includes a process step 101 in which processing is performed on a wafer by a processing device, a measurement step 102 in which the wafer processed by the processing device is measured by an in-line measurement device, and an inspection step 103 in which the device characteristics of the fabricated device are inspected by a device inspection device.

[0020] FIG. 2 illustrates the manufacturing process of a gate plug element, one of the components of a transistor, as an example of a manufacturing process for a device fabricated on a wafer. The gate plug has a layered structure in which a gate insulating film 202, a metal electrode 203, and plug wirings 205 and 206 are stacked on a semiconductor substrate 201. The manufacturing process shown here does not include all processes, but rather shows the state of the element after five processes, processes A to E, which are only a part of the process. After process A, a gate insulating film 202 is formed on the semiconductor substrate 201. After process B, a metal electrode 203 and plug wirings 205 are formed on the gate insulating film 202. This stack is electrically insulated from other components by an interlayer insulating film 204. Process C is an etching process for processing portions of the wafer not shown, and does not change the shape of the stack shown in the figure. After process D, a plug wiring 206 is further formed on the stack to extend the plug wiring. Process E is an annealing process in which the entire wafer is heat-treated. In the inspection step, a probe 207 is brought into contact with the fabricated gate plug element, and device characteristics such as capacitance and leakage current that flows when a voltage is applied are measured to determine whether the element is good or bad.

[0021] Returning to the explanation of FIG. 1C , if the device characteristics are insufficient relative to the design values ​​in inspection step 103, not only is the device discarded as defective, but improvements in process step 101 are also required. However, based solely on the inspection results of inspection step 103, it is difficult to estimate the location and cause of the device characteristic defects, for example, what kind of abnormality in the electrical or material characteristics is occurring in which layer of the gate plug. It is also difficult to identify the process in which the characteristic defects occurred from processes A to E. For example, there may have been a problem in the process of forming the layer in question, or the problem may have occurred after the layer was formed due to exposure to plasma or high heat.

[0022] Therefore, the manufacturing process of this system includes measurement steps 102 at key points between processes to measure the electrical or material properties of the wafer. In each measurement step 102, an inline metrology device measures a measurement area on the wafer. The measurement area is the area on the wafer where elements that constitute the device to be inspected are fabricated. This makes it possible to monitor changes in the electrical or material properties of the same element on the wafer as it passes through various process steps 101. In the example of FIG. 1C, the effects of Process A (101A) are monitored in Measurement 1 (102-1), the effects of Process B (101B) in Measurement 2 (102-2), and the effects of Process C (101C) in Measurement 3 (102-3).

[0023] The diagnostic process 110 is a process for identifying the process causing the device characteristic failure based on the monitoring results of the manufacturing process. The measurement data of the electrical or material characteristics measured in each measurement step 102 is transmitted from the control device 21 of the inline measurement device 20 to the characteristic history management device 50 (see FIG. 1A ). The characteristic history management device 50 accumulates the measurement data of one or more measurement areas on the wafer 5 measured by the inline measurement device 20 (step 111). The process failure diagnostic device 60 refers to the device characteristic evaluation data evaluated in the inspection step 103 and the measurement data accumulated by the characteristic history management device 50, compares the device characteristics with the transitions in the electrical or material characteristics during the process of fabricating the elements that make up the device, and identifies the process causing the failure by performing correlation analysis or the like (step 112).

[0024] 2 , a leakage current defect occurs in the gate plug. In this case, various causes are assumed, such as a defect in the gate insulating film 202 due to a film formation defect in process A, damage to the gate insulating film 202 caused during the formation of the plug wiring in process B or D, damage to the gate insulating film 202 caused by charging the plug wiring 205 with plasma during etching in process C, or alteration of the gate insulating film 202 caused by annealing in process F. Even if the cause is the gate insulating film 202, the causative process could be any of processes A to E. Therefore, the quality of the gate insulating film 202 is defined as a defect of interest (DOI), and to identify the cause of the defect, a measurement step 102 is incorporated into the manufacturing process 100 using the gate plug as a measurement region, and the causative process is identified in a diagnosis step 110.

[0025] The measurement step 102 may be incorporated at any point in the manufacturing process 100. It may be inserted before or after each process step 101, or, for example, it may be inserted only before or after an annealing step or an etching step that is thought to have a particular effect on electrical or material properties. Since in-line measurement takes time, the measurement step 102 may be selectively inserted so as to minimize a decrease in the throughput of the manufacturing process 100.

[0026] FIG. 3 shows an example of the configuration of the inline measurement device 20. In this embodiment, an SEM is used to evaluate a wafer using a charged particle beam. The SEM irradiates a sample with a charged particle beam and evaluates the response of the potential on the sample to the beam. This makes the SEM suitable for in-line, non-contact evaluation of electrical or material properties that do not appear in the device structure. The inline measurement device 20 includes a charged particle optical system (here, an electron optical system), a stage mechanism system, an irradiation optical system, and a control device 21. Furthermore, FIG. 3 shows the functions executed by the control device 21 using functional blocks, and includes a device control unit 321, a signal processing unit 322, and a memory unit 323. The hardware configuration of the control device 21 is as shown in FIG. 1B.

[0027] The electron optical system mainly comprises an electron source 302, a blanker 303 that pulses an electron beam 306 from the electron source 302, a deflector 304 that controls the irradiation position of the electron beam 306 on a sample 307, an electron lens 305 that focuses the electron beam 306 on the sample 307, and a detector 310 that detects signal electrons 309 emitted when the electron beam 306 is irradiated onto the sample (wafer) 307. The stage mechanism system includes an XY stage (sample stage) 308 on which the sample 307 to be inspected is placed. The irradiation optical system includes a laser 311 that irradiates light 312 to control the sample potential of the sample 307. The electron optical system and the stage mechanism system are arranged in a vacuum environment.

[0028] The electron optical system, stage mechanism system, and irradiation optical system are controlled by a device control unit 321 of the control device 21. An output signal indicating the intensity of the signal electrons detected by the detector 310 is input to a signal processing unit 322 of the control device 21. The signal processing unit 322 calculates the electrical or material properties of the sample 307 from the dependency between the intensity of the signal electrons and the irradiation conditions of the electron beam 306 and / or light 312, and stores the calculated electrical or material properties in a storage unit 323. For example, a calculation method disclosed in Patent Document 1 can be applied to calculate the electrical or material properties, and therefore a detailed description of the calculation method will be omitted here.

[0029] Below, we will explain a method for estimating the causal process using the quality of the gate insulating film 202 as the DOI, using the example in Figure 2 . Figure 4A shows measurements of the reciprocal of the resistance value of the gate insulating film 202 (characteristic α) after each of processes A to F. The transition of characteristic α stored in the characteristic history management device 50 is shown as a graph with the process name on the horizontal axis and the characteristic value of characteristic α on the vertical axis. While the characteristic value of characteristic α can be seen to increase as the process progresses, the data in Figure 4A alone cannot determine whether the characteristic value is normal or abnormal. To determine whether the electrical or material characteristic value is normal or abnormal, it is ultimately necessary to compare it with the pass / fail judgment of the device characteristics. Furthermore, measuring a single gate plug is usually insufficient to obtain a correlation between electrical or material characteristics and device pass / fail judgment. In this case, it is necessary to collect measurement results of the electrical or material characteristics of multiple gate plugs fabricated through the same manufacturing process on the same wafer.

[0030] FIG. 4B shows the results of inline measurement of the inverse of the resistance of the gate insulating film 202 (characteristic α) and the dielectric constant of the gate insulating film 202 (characteristic β) as well as the device characteristic inspection results, displayed in the form of heat maps. Heat maps 401 to 406 each show the average value of the characteristic α or characteristic β measured in the measurement area for each chip, converted into grayscale. This makes it possible to grasp the transition of characteristic α or characteristic β as the process progresses as a distribution on the wafer. Heat map 411 also shows the evaluation values ​​of the device characteristics inspected for each chip, converted into grayscale. The evaluation value can be, for example, the yield rate of the gate plug in the chip. Alternatively, the average value of values ​​indicating device characteristics measured by a device inspection system, such as the leakage current value of the gate plug, can be used. In the latter case, the device characteristic to be used as the evaluation value can be selected depending on the device being inspected. For example, for a transistor, the evaluation value can be the threshold value or the operating speed.

[0031] The process failure diagnosis device 60 estimates electrical or material characteristics and processes that are correlated with device characteristic failures by determining the correlation between the characteristic values ​​of the characteristic α shown in the heat maps 401 to 403 and the characteristic values ​​of the characteristic β shown in the heat maps 404 to 406, and the evaluation values ​​of the device characteristics shown in the heat map 411. In the example of Fig. 4B, when the heat maps 401 to 406 are compared with the heat map 411, none of them match, but the existence of similar distributions, i.e., a correlation, is recognized.

[0032] Assume that the correlation values ​​between the distributions of the characteristic values ​​of the characteristics α and β and the distributions of the evaluation values ​​of the device characteristics for processes A through F are calculated using the least squares method, and the results shown in FIG. 5A are obtained. FIG. 5A is a graph with the process names on the horizontal axis and the correlation values ​​of the distributions on the vertical axis. In particular, processes that give electrical or material characteristics with high correlation values ​​and processes that give electrical or material characteristics with large changes in correlation values ​​are likely to be the cause of device failures, and therefore should be prioritized for process improvement. In the example of FIG. 5A , it can be seen that in process A, the correlation value 501 between the distribution of the characteristic value of the characteristic β and the distribution of the evaluation values ​​of the device characteristics shows a high value. Furthermore, in process D, the correlation value 502 between the distribution of the characteristic value of the characteristic α and the distribution of the evaluation values ​​of the device characteristics increases sharply from the correlation value 503 for the previous process C. In this case, the process failure diagnosis device 60 presents processes A and D to the user as processes for which improvement should be prioritized.

[0033] 5B shows an example of a characteristic tracing and analysis screen displayed on the display device by the process fault diagnosis apparatus 60. The characteristic tracing and analysis screen 510 includes an inline measurement data display section 520, a device characteristic evaluation data display section 530, and a correlation analysis section 540. The user selects and displays the measurement data accumulated by the characteristic history management apparatus 50 in the inline measurement data display section 520, and the device characteristic evaluation data evaluated by the inspection step in the device characteristic evaluation data display section 530.

[0034] When the user selects measurement data to be displayed from a data selection section 521 of the inline measurement data display section 520, a wafer name 522 and a data summary (measured characteristic item name and process name) 523 for the selected measurement data are displayed. The user can also check the measurement results on a preview screen 524. In this example, the distribution of characteristic values ​​on the wafer for a specified characteristic item in a specified process is displayed as a heat map.

[0035] When the user selects device characteristic evaluation data to be displayed from a data selection section 531 in a device characteristic evaluation data display section 530, a wafer name 532 and a data summary (the names of the evaluation items inspected and the process names) 533 for the selected device characteristic evaluation data are displayed. The user can also check the evaluation results on a preview screen 534. In this example, the distribution of characteristic values ​​on the wafer for the specified evaluation items in the specified process is displayed as a heat map.

[0036] When a user selects an evaluation item in the evaluation item selection section 541 of the correlation analysis section 540 and presses the analysis start button 542, the correlation analysis section 540 calculates a correlation value between the distribution of each characteristic item in each process and the distribution of evaluation values ​​of the device characteristics corresponding to the selected evaluation item, calculates a score indicating the priority described with reference to FIG. 5A, and displays it as a correlation analysis result 543. The correlation analysis result 543 indicates the score, the name of the characteristic item for which the score was calculated, and the name of the process. In calculating the score, the degree of influence of each process on electrical or material characteristics is calculated by weighting the correlation value and the amount of change in the correlation value. In this example, the user can consider countermeasures for the defect, assuming that the main causes are an abnormality in characteristic β (dielectric constant) during film formation (process A) and an abnormality in characteristic α (resistance value) during plug wiring fabrication (process D).

[0037] The user may further change the evaluation items selected in the evaluation item selection section 541 to analyze the same manufacturing process, and then combine these to select a process for which measures should be taken.

[0038] The semiconductor process diagnostic system 1 monitors changes in the electrical or material properties of the same element on a wafer as it passes through various process steps. However, as illustrated in FIG. 2 , the shape of the element being measured changes as the process progresses. Therefore, the electrical or material properties measured by the inline measurement device 20 include not only changes in the element itself but also changes in properties due to parasitic components such as resistance and capacitance, reducing the accuracy of comparison of characteristic values. Furthermore, changes in the shape or the elements and their surrounding materials degrade the measurement accuracy or precision of the inline measurement device 20, making comparisons between different processes difficult. Example 2 suppresses the reduction in accuracy of comparison of characteristic values ​​due to these parasitic properties.

[0039] 6 shows a processing flow of the semiconductor process diagnosis system 1 according to the second embodiment. The diagnosis process 110b of the second embodiment includes a calibration step 601 in which the measurement data acquired in the measurement step 102 is calibrated to improve the comparison accuracy of the measurement data. In the second embodiment, for the calibration, a calibration element for acquiring calibration data is formed on the wafer, and in the measurement step 102, in addition to acquiring the measurement data, the calibration data is acquired by measuring the parasitic characteristics of the calibration element. In the calibration step 601, the measurement data is calibrated using the calibration data, and the characteristic history management device 50 stores the calibrated measurement data (step 111).

[0040] The calibration elements formed on the wafer are elements corresponding to the parasitic characteristics to be measured. An example is shown in FIG. 7A. Measurement region 701 is the region where the gate plug to be measured, as shown in FIG. 2, is formed, and calibration region 702 is the region where the calibration elements are formed. The calibration elements formed in FIG. 7A have a structure for removing the influence of parasitic components caused by the extension of the plug wiring in process D (see FIG. 2) from the measurement data of the gate plug to be measured.

[0041] 7B shows another example of a calibration element. For example, when a new material is used as a gate insulating film, an insulating film made of the material to be measured (the new material) is formed in the measurement region 711, while an insulating film made of a known material is formed in the calibration region 712. This makes it possible to separate and extract changes in characteristics that depend on the material from changes in characteristics that depend on other factors.

[0042] In this way, in the calibration step 601, the measurement data is calibrated according to the content of the acquired calibration data. The processing of the calibration step 601 can be executed by a program in which the control device 21 of the inline measurement device 20 performs calibration according to the calibration method. Alternatively, the measurement data may be calibrated by executing a calibration program corresponding to the measurement data and calibration data in the characteristic history management device 50. An example of the processing of the calibration program includes a process of subtracting the measurement value of the calibration area from the measurement value of the measurement area.

[0043] As shown in FIG. 8 , by calibrating the measurement data using a calibration unit, which is a functional unit implemented in the control device 21 of the inline measurement device 20 or the characteristic history management device 50, it is possible to reduce the influence of parasitic components and improve the accuracy of comparison of the characteristic values ​​of the electrical or material characteristics of the element being measured.

[0044] In the second embodiment, a calibration area is provided on a wafer and a calibration element is actually measured to improve the accuracy of the transition of the characteristic value of the electrical or material characteristic to be monitored. However, if there is no space to provide a calibration area on the wafer, it may be difficult to create another calibration area.

[0045] In this modification, when it is difficult to obtain calibration data by actual measurement, calibration is performed based on a simulation based on design data of the element in measurement step 102. Fig. 9 shows a processing flow of the semiconductor process diagnosis system 1 according to the modification. A diagnosis process 110c of the modification has a simulation step 901 in which calibration data is calculated based on the design data, and in calibration step 601, the measurement data is calibrated using the calibration data calculated in simulation step 901. CAD, SPICE models, etc. can be used as the design data.

[0046] The processing of the simulation step 901 can be executed by a program that causes the characteristic history management device 50 to calculate calibration data according to the calibration method. Alternatively, the calibration data can be calculated in advance by a simulation unit, which is a functional unit of the characteristic history management device 50, and the calibration data can be stored in the control device 21 of the in-line measuring device 20, so that the control device 21 of the in-line measuring device 20 can calibrate the measurement data, as in the second embodiment. Alternatively, the control device 21 may perform a simulation to calculate the calibration data.

[0047] In a manufacturing line for mass-producing devices, the conditions for each process step are optimized, and it is rare that it is necessary to identify defective processes as described in Examples 1 and 2. However, there may occur events in which the yield temporarily drops for some reason. Even in such cases, it is desirable to be able to detect abnormalities early before the inspection in the inspection step 103.

[0048] FIG. 10A shows a process flow of a semiconductor process monitoring system according to a third embodiment. The process flow of the third embodiment includes a manufacturing process 100 for fabricating devices on a wafer, shown in the upper part, and a monitoring process 1000 for monitoring the presence or absence of abnormalities in the manufacturing process based on measurements performed in the manufacturing process, shown in the lower part. The hardware configuration of the semiconductor process monitoring system is the same as the configuration shown in FIG. 1A, and includes a process monitoring device that performs process monitoring instead of the process defect diagnosis device 60. The process monitoring device is an information processing device that functions as a process monitoring unit by executing a program that performs process monitoring processing. Note that the characteristic history management device 50 may be implemented as an application on an information processing device or a cloud computing system.

[0049] Step 1001 of the monitoring process 1000 is the same as step 111 in Examples 1 and 2. The process monitoring device references the characteristic transition database and compares it with measurement data to detect abnormalities in the manufacturing process at an early stage. FIG. 10B shows the data structure of the characteristic transition database. The characteristic transition database 1010 stores electrical or material characteristic values ​​(i.e., past measurement data) for each process of the device manufacturing process, which have been accumulated by the characteristic history management device 50, and the pass / fail judgment of the device. The pass / fail judgment is a judgment result based on the inspection results of the device inspection device 30. The characteristic values ​​may be registered as raw data or as feature values ​​such as mean values ​​and variances. Furthermore, the database may include not only characteristic transition data from the mass production line itself but also characteristic transition data from the prototype line.

[0050] The process monitoring unit compares the measurement data with past measurement data registered in the characteristic transition database (step 1002). This process is shown schematically in FIG. 10C . In FIG. 10C , open and closed circles indicate characteristic transitions of wafers determined to be non-defective, crosses and pluses indicate characteristic transitions of wafers determined to be defective, and triangles indicate characteristic transitions of wafers being monitored, which have completed inline measurement after process E. The process monitoring unit detects anomalies based on, for example, whether the characteristic transition pattern of the measurement data is similar to the characteristic transition pattern of wafers determined to be non-defective or to the characteristic transition pattern of wafers determined to be defective. In the example of FIG. 10C , if the process monitoring unit determines that the characteristic transition pattern of the wafer being monitored is similar to the characteristic transition pattern of a wafer determined to be defective, it issues an alert without waiting for the completion of the manufacturing process (step 1003). This allows users to detect abnormalities in the manufacturing line early and initiate countermeasures.

[0051] <TEG Wafer Configuration> In the above embodiment, an example using an SEM as an inline measurement device has been described. When using an SEM as an inline measurement device, measuring electrical or material characteristics may be difficult depending on the device structure. Specifically, in the inspection step using the device inspection device 30, characteristics that require contacting a probe with each of the anode and cathode are difficult to measure using an inline measurement device using an SEM. Similarly, inline measurement of characteristic values ​​that require three probes, such as transistor characteristics, is also difficult. This is because inline measurement using an SEM is equivalent to measurement using an electron beam (charged particle beam) as a single probe. Thus, some characteristics can be inspected in the inspection step 103 but cannot be measured in the inline measurement step 102. However, particularly during the process development stage, it is desirable to measure as many characteristics as possible using an inline measurement device.

[0052] Therefore, in a wafer used for process development (hereinafter referred to as a TEG wafer), when a device characteristic evaluation element requires two or more measurement electrodes, an inline measurement element having a modified structure in which all but one of the electrodes are connected to the semiconductor substrate of the wafer is fabricated in an alternative measurement area near the device characteristic evaluation element, and the electrical or material characteristics of the alternative measurement area are measured in place of the device characteristic evaluation element.

[0053] 11 and 12 show examples of the structure of a device characteristic evaluation element and a corresponding in-line measurement element. Fig. 11 shows an example of an element for inspecting capacitance and wiring defects, in which the device characteristic evaluation element includes a first comb-shaped electrode 1102A connected to a first pad 1101A and a second comb-shaped electrode 1102B arranged opposite the first comb-shaped electrode 1102A and connected to a second pad 1101B. The comb-shaped electrodes 1102 are formed in a wiring layer and are insulated from each other by an interlayer insulating film 1103. In contrast, the corresponding in-line measurement element has the comb-shaped electrode 1102 of the same shape as the device characteristic evaluation element, but the first comb-shaped electrode 1102A is connected to the first pad 1101A, while the second comb-shaped electrode 1102B is connected to a semiconductor layer 1104 by a plug 1105. As a result, in the measurement step 102, the second comb electrode 1102B can be set to the ground potential, and the first comb electrode 1102A can be given an arbitrary potential that depends on the irradiated electron beam, making it possible to measure the capacitance characteristics of the element.

[0054] 12 shows an example of a device characteristic evaluation element that is a resistive element having an electrode 1202 whose both ends are connected to a first pad 1201A and a second pad 1201B, respectively. The electrode 1202 is formed in a wiring layer and is insulated from other elements by an interlayer insulating film 1103. In contrast, the corresponding in-line measurement element has an electrode 1202 that has the same shape as the device characteristic evaluation element, but one end is connected to a first pad 1201A and the other end is connected to a semiconductor layer 1204 by a plug 1205. This makes it possible to apply an arbitrary voltage between both ends of the electrode 1202 in the measurement step 102, thereby enabling the resistance characteristics of the element to be measured.

[0055] The present invention is not limited to the above-described embodiments and includes various modifications. For example, the above-described embodiments have been described in detail to make the present invention easier to understand, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment or modification with the configuration of another embodiment or modification, and it is also possible to add the configuration of another embodiment or modification to the configuration of one embodiment or modification. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment or modification with other configurations.

[0056] 1: Semiconductor process diagnosis system, 5: Wafer, 10: Processing device, 20: Inline measurement device, 21: Control device, 30: Device inspection device, 31: Control device, 40: Network, 50: Characteristics history management device, 60: Process defect diagnosis device, 70: Information processing device, 71: Processor (CPU), 72: Memory, 73: Storage device, 74: Input interface, 75: Output interface, 76: Communication interface, 77: Bus, 100 : Manufacturing process, 101: Process step, 102: Measurement step, 103: Inspection step, 110: Diagnostic step, 201: Semiconductor substrate, 202: Gate insulating film, 203: Metal electrode, 204: Interlayer insulating film, 205, 206: Plug wiring, 207: Probe, 302: Electron source, 303: Blanker, 304: Deflector, 305: Electron lens, 306: Electron beam, 307: Sample, 308: XY stage, 309: Signal electron, 310: Detector, 311: Laser the device, 312: light, 321: device control unit, 322: signal processing unit, 323: storage unit, 401 to 406, 411: heat map, 501 to 503: correlation value, 510: characteristic trace / analysis screen, 520: inline measurement data display unit, 521, 531: data selection unit, 522, 532: wafer name, 523, 533: data summary, 524, 534: preview screen, 530: device characteristic evaluation data display unit, 540: correlation analysis unit, 541: evaluation item Selection section, 542: analysis start button, 543: correlation analysis results, 601: calibration step, 701, 711: measurement area, 702, 712: calibration area, 901: simulation step, 1000: monitoring process, 1010: characteristic transition database, 1101, 1201: pad, 1102: comb-shaped electrode, 1103, 1203: interlayer insulating film, 1104, 1204: semiconductor layer, 1105, 1205: plug, 1202: electrode.

Claims

1. A process diagnosis system for a manufacturing process having a plurality of process steps for performing processing for manufacturing a device on a wafer and an inspection step for inspecting device characteristics of the manufactured device, the process diagnosis system identifying a process step that caused a defect when a defect determination is made for the device characteristics in the inspection step, wherein the manufacturing process has a plurality of measurement steps, the measurement steps measuring electrical or material characteristics of a measurement region on the wafer where the device is manufactured after a process of any one of the plurality of process steps is completed and before starting a process of a subsequent process step, a characteristic history management unit accumulating measurement data of the electrical or material characteristics of the measurement region measured in the plurality of measurement steps, and a process defect diagnosis unit identifying candidates for the process step that caused a defect in the device characteristics based on transitions of the electrical or material characteristics of the measurement region as the plurality of process steps progress and a determination result of the device characteristics in the inspection step.

2. The process diagnosis system according to claim 1, wherein the measurement step uses an in-line measurement device that irradiates a charged particle beam as a probe to the measurement region of the wafer to non-destructively measure electrical or material characteristics of the measurement region.

3. The process diagnosis system according to claim 1, wherein a laminate constituting the device is formed in the measurement region of the wafer through the plurality of process steps, the plurality of process steps including a first process step that changes the shape of any one of the layers constituting the laminate and a second process step that does not change the shape of any of the layers constituting the laminate, and the plurality of measurement steps including a measurement step of measuring electrical or material characteristics of the measurement region after the process of the first process step is completed and before starting a process of a subsequent process step and a measurement step of measuring electrical or material characteristics of the measurement region after the process of the second process step is completed and before starting a process of a subsequent process step.

4. In claim 1, a plurality of the measurement regions exist on the wafer, and the process defect diagnosis unit is a process diagnosis system that identifies candidates for process steps that have caused defects in the device characteristics based on the correlation between the distribution of characteristic values of predetermined electrical or material characteristics measured in the measurement step and the distribution of evaluation values of predetermined device characteristics inspected in the inspection step.

5. In claim 4, the process defect diagnosis unit calculates a correlation value between the distribution of characteristic values of the predetermined electrical or material characteristics and the distribution of evaluation values of the predetermined device characteristics for each of the plurality of measurement steps, and identifies, as candidates for process steps that have caused defects in the device characteristics, the process step corresponding to the measurement step showing a high correlation value or the process step corresponding to the measurement step having a large change amount of the correlation value with respect to the correlation value of the preceding measurement step.

6. In claim 4, the process defect diagnosis unit is a process diagnosis system that displays, on a display device, a screen for selecting the predetermined electrical or material characteristics and the predetermined device characteristics for obtaining the correlation.

7. In claim 1, the wafer includes a calibration region where a calibration element is fabricated, the measurement step measures the electrical or material characteristics of the measurement region and the calibration region on the wafer, and the characteristic history management unit calibrates the measurement data of the electrical or material characteristics of the measurement region measured in the plurality of measurement steps using the calibration data of the electrical or material characteristics of the calibration region measured in the plurality of measurement steps, and accumulates the calibrated measurement data.

8. In claim 7, the calibration element is an element corresponding to the parasitic characteristics of the device.

9. In claim 1, having a simulation unit that performs a simulation of the parasitic characteristics of the device based on the design data of the device to calculate calibration data, and the characteristic history management unit calibrates the measurement data of the electrical or material characteristics of the measurement region measured in the plurality of measurement steps using the calibration data, and accumulates the calibrated measurement data.

10. In claim 2, the wafer includes an alternative measurement region where in-line measurement elements corresponding to the device are fabricated. The measurement step measures the electrical or material characteristics of the alternative measurement region instead of those of the measurement region on the wafer. The characteristic history management unit accumulates measurement data of the electrical or material characteristics of the alternative measurement region as the electrical or material characteristics of the measurement region measured in the plurality of measurement steps. The device has a structure in which a plurality of pads are exposed on the surface of the wafer, and the in-line measurement element has a structure modified from the structure of the device such that one of the plurality of pads is exposed on the surface of the wafer and the other pads are connected to the semiconductor layer of the wafer. A process diagnostic system.

11. In claim 10, the device is a capacitance element or a resistance element. A process diagnostic system.

12. In claim 2, the in-line measurement device includes a control device in which a device control unit for controlling measurement of the electrical or material characteristics of the measurement region is implemented. A process diagnostic system in which the characteristic history management unit and the process defect diagnostic unit are further implemented in the control device.

13. A process monitoring system for monitoring a manufacturing process having a plurality of process steps for fabricating a device on a wafer and an inspection step for inspecting device characteristics of the fabricated device. The manufacturing process has a plurality of measurement steps. The measurement step measures the electrical or material characteristics of the measurement region where the device is fabricated on the wafer after any one of the plurality of process steps is completed and before the processing of the subsequent process step is started. A characteristic history management unit that accumulates by associating the measurement data of the electrical or material characteristics of the measurement region measured in the plurality of measurement steps with the pass / fail determination result of the device inspected in the inspection step. A process monitoring unit that detects the occurrence of an abnormality in the manufacturing process by comparing the transition of the electrical or material characteristics of the measurement region accompanying the progress of the plurality of process steps collected through the plurality of measurement steps with the transition of the electrical or material characteristics of the measurement region accompanying the progress of the plurality of process steps accumulated in the characteristic history management unit. A process monitoring system.

14. The process monitoring system according to claim 13, wherein the process monitoring unit detects the occurrence of an abnormality in the manufacturing process based on whether the transition of the electrical or material characteristics of the measurement region accompanying the progress of the plurality of process steps is similar to the transition of the electrical or material characteristics of the measurement region of a good device accumulated in the characteristic history management unit or the transition of the electrical or material characteristics of the measurement region of a defective device.

15. The process monitoring system according to claim 13, wherein the measurement step uses an in-line measurement device that irradiates a charged particle beam as a probe onto the measurement region of the wafer to non-destructively measure the electrical or material characteristics of the measurement region.

16. A wafer on which a device is fabricated through a manufacturing process including a plurality of process steps, the wafer having a measurement region where a device characteristic evaluation element for evaluating device characteristics is fabricated and an alternative measurement region where an in-line measurement element is fabricated, the device characteristic evaluation element having a structure in which a plurality of pads are exposed on the surface of the wafer, and the in-line measurement element having a structure modified from the structure of the device characteristic evaluation element such that one of the plurality of pads is exposed on the surface of the wafer and the other pads are connected to a semiconductor substrate of the wafer.

17. The wafer according to claim 16, wherein the manufacturing process includes a plurality of measurement steps and an inspection step of inspecting the device characteristics of the device characteristic evaluation element, the measurement step measuring the electrical or material characteristics of the alternative measurement region instead of the measurement region after any one of the plurality of process steps is completed and before starting the processing of a subsequent process step, and in the measurement step, an in-line measurement device that irradiates a charged particle beam as a probe onto the alternative measurement region of the wafer to non-destructively measure the electrical or material characteristics of the alternative measurement region is used.

18. The wafer according to claim 16, wherein the device characteristic evaluation element is a capacitance element or a resistance element.

Images