Power amplifier circuit, chip and transmitter

Abstract

The present application provides a power amplifier circuit, a chip, and a transmitter. The power amplifier circuit comprises: a splitter, a control branch, a first balance branch, a second balance branch and a first directional coupler; the control branch comprises a third power amplifier; the first balance branch comprises a first power amplifier; the second balance branch comprises a second power amplifier and a first phase shifter, the bias voltage of the first power amplifier and / or the bias voltage of the second power amplifier being adjustable; the splitter is used for distributing a first signal to the three branches; the first balance branch, the second balance branch and the control branch are respectively used for inputting amplified signals to a first port, a fourth port and a second port of the first directional coupler; and the first directional coupler is used for coupling the amplified signals from the three ports, and outputting same to a load via a third port. The technical solution provided by the embodiments of the present application can be applied to different load impedance mismatch conditions to improve the efficiency under load impedance mismatch conditions.

Description

Power amplifier circuits, chips, and transmitters

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 8, 2023, with application number 202311682874.5 and application name “Power Amplifier Circuit, Chip and Transmitter”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communications, and more specifically, to a power amplifier circuit, chip, and transmitter. Background Art

[0003] A power amplifier (PA) is an electronic device that amplifies signal power. In the field of communications, PAs are widely used to amplify the power of information waiting to be transmitted by mobile communication base stations and communication systems.

[0004] A Doherty power amplifier can improve the efficiency of a power amplifier in a power back-off state. However, the Doherty power amplifier is only applicable to load mismatch in specific circumstances and has limited load mismatch resistance capability.

[0005] Summary of the Invention

[0006] The present application provides a power amplifier circuit, chip and transmitter, which can be applied to different load impedance mismatch situations and improve the efficiency under load impedance mismatch conditions.

[0007] In a first aspect, a power amplifier circuit is provided, comprising: a splitter, a control branch, a first balanced branch, a second balanced branch, and a first directional coupler; the control branch comprises a third power amplifier; the first balanced branch comprises a first power amplifier, the second balanced branch comprises a second power amplifier and a first phase shifter, the first phase shifter is used to change the phase of the second balanced branch, the bias voltage of the first power amplifier and / or the bias voltage of the second power amplifier is adjustable, the bias voltage of the first power amplifier and the bias voltage of the second power amplifier are respectively the drain voltage or collector voltage of the transistors of the first power amplifier and the second power amplifier; the splitter is used to distribute a first signal input to the splitter to the control branch, the first balanced branch, and the second balanced branch; the first balanced branch, the second balanced branch, and the control branch are respectively used to input amplified signals to a first port, a fourth port, and a second port of the first directional coupler, the second port being an isolation port of the first directional coupler; the first directional coupler is used to couple the amplified signals from the first port, the fourth port, and the second port, and output them to a load from the third port of the first directional coupler.

[0008] Alternatively, the power amplifier circuit may include: a splitter, a control branch, a first balanced branch, a second balanced branch, and a first directional coupler; the control branch includes a third power amplifier and a second phase shifter; the first balanced branch includes a first power amplifier, the second balanced branch includes a second power amplifier, the bias voltage of the first power amplifier and / or the second power amplifier is adjustable, and the bias voltages of the first power amplifier and the second power amplifier are respectively the drain voltage or collector voltage of the transistors of the first power amplifier and the second power amplifier; the splitter is used to split a first signal input to the splitter into three paths and input them to the control branch, the first balanced branch, and the second balanced branch; the first balanced branch, the second balanced branch, and the control branch are respectively used to input amplified signals to the first port, the fourth port, and the second port of the first directional coupler, and the second port is the isolation port of the first directional coupler; the first directional coupler is used to couple the signals from the first port, the fourth port, and the second port, and output them to a load from the third port of the first directional coupler.

[0009] In this embodiment, a phase shifter can be provided in the control branch or the second balancing branch, and the bias voltage of the power amplifier in at least one of the two balancing branches can be adjusted. Therefore, when there is a load impedance mismatch, the effect of the impedance mismatch on output efficiency can be reduced by adjusting the phase shifter and the power amplifier bias voltage.

[0010] In combination with the first aspect, in some implementations of the first aspect, the power amplifier circuit further includes an impedance detector; the impedance detector is used to detect the impedance of the load so that the bias voltage of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter are adjusted according to the impedance of the load.

[0011] In this embodiment, the impedance detector can detect the load impedance, thereby facilitating adjustment of the adjustable parameter according to the load impedance, thereby increasing the adjustment speed.

[0012] In combination with the first aspect, in some implementations of the first aspect, a difference in input power among the control branch, the first balancing branch, and the second balancing branch is less than 20 percentage points.

[0013] Assuming the total input power of the three branches is 1, the difference in input power of the three branches is less than 20 percentage points, which means that the difference in percentage of any two input powers to the total input power is less than 20 percentage points. For example, the input power of the three branches can be equal.

[0014] In combination with the first aspect, in some implementations of the first aspect, the splitter includes a first power splitter, and the first power splitter is used to distribute the first signal to the control branch, the first balancing branch, and the second balancing branch.

[0015] The first power splitter may be a three-way power splitter, thereby splitting the input signal into three paths.

[0016] In combination with the first aspect, in some implementations of the first aspect, the splitter includes a second power splitter and a second directional coupler, and the second power splitter is used to split the first signal into two paths, one of which is used to input the control branch, and the other is used to input the second directional coupler, and output to the first balanced branch and the second balanced branch through two ports of the second directional coupler.

[0017] The second power splitter may be a two-way power splitter, which splits the input signal into two ways, one of which is further split into two ways by the second directional coupler, so that the input signal can be split into three ways.

[0018] In combination with the first aspect, in some implementations of the first aspect, the control branch includes a second phase shifter, and the second phase shifter is located at an input end or an output end of the third power amplifier.

[0019] The phase shifter can be set at the input end or the output end of the power amplifier, and can adjust the phase (current phase, voltage phase) of the signal input from the branch to the first directional coupler port.

[0020] In combination with the first aspect, in some implementations of the first aspect, the first phase shifter is located at the input end or the output end of the second power amplifier.

[0021] In combination with the first aspect, in some implementations of the first aspect, the first balancing branch includes a third phase shifter, and the third phase shifter is located at the input end or the output end of the first power amplifier.

[0022] In combination with the first aspect, in some implementations of the first aspect, the first port is a coupling port of the first directional coupler.

[0023] In combination with the first aspect, in some implementations of the first aspect, the first power amplifier, the second power amplifier, and the third power amplifier are class B power amplifiers.

[0024] Any one of the three power amplifiers may also be a class AB power amplifier, which is not limited in this application.

[0025] In combination with the first aspect, in some implementations of the first aspect, the bias voltage of the third power amplifier is adjustable, and the bias voltage of the third power amplifier is the drain voltage or the collector voltage of the transistor of the third power amplifier.

[0026] The bias voltage of the power amplifier can adjust the current amplitude of the branch, thereby reducing the impact of impedance mismatch.

[0027] In combination with the first aspect, in some implementations of the first aspect, the power amplifier circuit includes a controller, which is used to: obtain a first mapping relationship, where the first mapping relationship is used to indicate the target bias voltage of the first power amplifier and / or the target bias voltage of the second power amplifier and the target phase of the first phase shifter corresponding to different load impedances; and adjust the bias voltage of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter according to the first mapping relationship.

[0028] In a second aspect, a power amplifier circuit is provided, comprising: a splitter, a first amplifier circuit and a combiner; the first amplifier circuit, the first amplifier circuit comprising a main power amplifier branch and an auxiliary power amplifier branch, the main power amplifier branch and the auxiliary power amplifier branch respectively comprising a main power amplifier and an auxiliary power amplifier, the bias voltage of the main power amplifier being adjustable, the bias voltage of the main power amplifier being the drain voltage or collector voltage of the transistor of the main power amplifier, the main power amplifier branch and / or the auxiliary power amplifier branch comprising a phase shifter; the main power amplifier branch being configured to output an amplified signal to the output end of the main power amplifier branch; the auxiliary power amplifier branch being configured to output an amplified signal to the output end of the auxiliary power amplifier branch when the output power of the main power amplifier reaches a threshold value; the splitter being configured to distribute the signal input to the splitter to the main power amplifier branch and the auxiliary power amplifier branch; and a combiner, the combiner being configured to perform impedance transformation on the first amplifier circuit and couple the output ends of the main power amplifier branch and the auxiliary power amplifier branch to a load.

[0029] In combination with the second aspect, in some implementations of the second aspect, the power amplifier circuit may further include an impedance detector, thereby facilitating purposeful adjustment of various adjustable parameters in the circuit according to impedance mismatch conditions.

[0030] In conjunction with the second aspect, in some implementations of the second aspect, the first amplification circuit further includes multiple stages of auxiliary power amplifier branches, such as a second auxiliary power amplifier branch configured to output an amplified signal to an output end of the second auxiliary power amplifier branch when the output power of the main power amplifier reaches a second threshold. The first amplification circuit may further include a third auxiliary power amplifier branch, a fourth auxiliary power amplifier branch, and the like, each configured to output an amplified signal to the output end of the branch when the output power of the main power amplifier reaches a corresponding threshold.

[0031] In combination with the second aspect, in some implementations of the second aspect, the bias voltage of at least one auxiliary power amplifier branch is also adjustable, so that there are more adjustment parameters when impedance mismatch occurs, thereby improving the adjustment speed.

[0032] In a third aspect, a chip is provided, comprising: a splitter, a control branch, a first balanced branch, a second balanced branch and a first directional coupler; the control branch comprises a third power amplifier; the first balanced branch comprises a first power amplifier, the second balanced branch comprises a second power amplifier and a first phase shifter, the first phase shifter is used to change the phase of the second balanced branch, the bias voltage of the first power amplifier and / or the bias voltage of the second power amplifier is adjustable, the bias voltage of the first power amplifier and the bias voltage of the second power amplifier are respectively the drain voltage or collector voltage of the transistors of the first power amplifier and the second power amplifier; the splitter is used to distribute the first signal input into the splitter to the control branch, the first balanced branch and the second balanced branch; the first balanced branch, the second balanced branch and the control branch are respectively used to input amplified signals to the first port, the fourth port and the second port of the first directional coupler, the second port being the isolation port of the first directional coupler; the first directional coupler is used to couple the amplified signals from the first port, the fourth port and the second port, and output them to the load from the third port of the first directional coupler.

[0033] Alternatively, the chip may include: a splitter, a control branch, a first balanced branch, a second balanced branch and a first directional coupler; the control branch includes a third power amplifier and a second phase shifter; the first balanced branch includes a first power amplifier, the second balanced branch includes a second power amplifier, the bias voltage of the first power amplifier and / or the second power amplifier is adjustable, and the bias voltages of the first power amplifier and the second power amplifier are respectively the drain voltage or collector voltage of the transistors of the first power amplifier and the second power amplifier; the splitter is used to divide the first signal input to the splitter into three inputs to the control branch, the first balanced branch and the second balanced branch; the first balanced branch, the second balanced branch and the control branch are respectively used to input the amplified signal to the first port, the fourth port and the second port of the first directional coupler, and the second port is the isolation port of the first directional coupler; the first directional coupler is used to couple the signals from the first port, the fourth port and the second port, and output them to the load from the third port of the first directional coupler.

[0034] In combination with the third aspect, in some implementations of the third aspect, the chip further includes an impedance detector; the impedance detector is used to detect the impedance of the load so that the bias voltage of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter are adjusted according to the impedance of the load.

[0035] In combination with the third aspect, in some implementations of the third aspect, a difference in input power among the control branch, the first balancing branch, and the second balancing branch is less than 20 percentage points.

[0036] In combination with the third aspect, in some implementations of the third aspect, the splitter includes a first power splitter, and the first power splitter is used to distribute the first signal to the control branch, the first balancing branch, and the second balancing branch.

[0037] In combination with the third aspect, in some implementations of the third aspect, the splitter includes a second power splitter and a second directional coupler, and the second power splitter is used to split the first signal into two paths, one of which is used to input the control branch, and the other is used to input the second directional coupler, and output to the first balanced branch and the second balanced branch through two ports of the second directional coupler.

[0038] In combination with the third aspect, in some implementations of the third aspect, the control branch includes a second phase shifter, and the second phase shifter is located at the input end or the output end of the third power amplifier.

[0039] In combination with the third aspect, in some implementations of the third aspect, the first phase shifter is located at the input end or the output end of the second power amplifier.

[0040] In combination with the third aspect, in some implementations of the third aspect, the first balancing branch includes a third phase shifter, and the third phase shifter is located at the input end or the output end of the first power amplifier.

[0041] In combination with the third aspect, in some implementations of the third aspect, the first port is a coupling port of the first directional coupler.

[0042] In combination with the third aspect, in some implementations of the third aspect, the first power amplifier, the second power amplifier, and the third power amplifier are class B power amplifiers.

[0043] In combination with the third aspect, in some implementations of the third aspect, the bias voltage of the third power amplifier is adjustable, and the bias voltage of the third power amplifier is the drain voltage or collector voltage of the transistor of the third power amplifier.

[0044] In combination with the third aspect, in some implementations of the third aspect, the chip includes a controller, which is used to: obtain a first mapping relationship, where the first mapping relationship is used to indicate the target bias voltage of the first power amplifier and / or the target bias voltage of the second power amplifier and the target phase of the first phase shifter corresponding to different load impedances; and adjust the bias voltage of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter according to the first mapping relationship.

[0045] In a fourth aspect, a transmitter is provided, comprising the power amplifier circuit as described in the first aspect or any one of the implementations of the first aspect or the second aspect or any one of the implementations of the second aspect, or the chip of the third aspect or any one of the implementations of the third aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] FIG1 is a schematic block diagram of a radio frequency front-end module.

[0047] FIG2 is a schematic structural diagram of a Doherty power amplifier circuit.

[0048] FIG3 is a schematic structural diagram of a power amplifier circuit provided in an embodiment of the present application.

[0049] FIG4 is a schematic structural diagram of a splitter provided in an embodiment of the present application.

[0050] FIG5 is a schematic structural diagram of a power amplifier circuit provided in an embodiment of the present application.

[0051] FIG6 is a schematic diagram of the port current and voltage of a directional coupler.

[0052] FIG. 7 is a heat map showing the efficiency of the power amplifier circuit shown in FIG. 5 .

[0053] FIG8 is a simulation diagram of efficiency and gain of the power amplifier circuit shown in FIG5 under different mismatch phases.

[0054] FIG9 is a schematic structural diagram of another power amplifier circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0055] The technical solution in this application will be described below with reference to the accompanying drawings.

[0056] The following describes embodiments of the present application in detail, and examples of the embodiments of the present application are shown in the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present application and are not to be construed as limiting the present application.

[0057] In the description of this application, it should be understood that the terms "first," "second," and "third" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of the described features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0058] The power amplifier circuit provided in the embodiment of the present application can be applied to a radio frequency front-end module for power amplification of radio frequency signals. Figure 1 shows a schematic block diagram of a radio frequency front-end module. As shown in Figure 1, the radio frequency front-end module can be set on a terminal device such as a mobile phone. The radio frequency front-end module includes a PA, a low noise amplifier (LNA), a filter, a duplexer, a radio frequency switch and an antenna. The radio frequency front-end module is coupled with a transceiver and a baseband. The baseband is used to perform baseband processing on data. The transceiver is used to perform signal frequency conversion and channel selection. The PA and LNA are components of the transmitting channel and the receiving channel respectively. The PA is used to amplify the radio frequency signal after the transceiver frequency conversion. The LNA is used to amplify the signal of the receiving channel. The filter is used to filter the signal. The duplexer is used for duplex switching of the frequency division duplex system and filtering of radio frequency signals of the receiving / transmitting channel. The radio frequency switch is used for switching the receiving / transmitting channel. The antenna is used to transmit or receive radio frequency signals.

[0059] Signal modulation technologies such as multiplexing, multi-carrier aggregation, and multiple-input multiple-output (MIMO) that utilize differences in frequency, time, and coding sequences have improved spectrum utilization, increased system bandwidth, and expanded communication capacity. However, the drastic fluctuations in the envelope of the modulated signal result in a large gap between the peak power and average power of the signal. To improve the efficiency of the power amplifier under power-backoff conditions, the Doherty power amplifier was proposed.

[0060] Figure 2 shows a schematic structural diagram of a Doherty power amplifier circuit. As shown in Figure 2, the Doherty power amplifier includes a bridge 1, an amplifier 1, an amplifier 2 and corresponding 1 / 4 wavelength transmission lines, a bridge 2, a switch, and an impedance detector. Amplifier 1 and the 1 / 4 wavelength transmission line connected to the output of amplifier 1 constitute a main power amplifier branch, while amplifier 2 and the 1 / 4 wavelength transmission line connected to the output of amplifier 2 constitute an auxiliary power amplifier branch, which can also be called a peak power amplifier branch. When the power of the input signal is low, only the main power amplifier branch is turned on. When the power of the input signal reaches a threshold, the auxiliary power amplifier branch is turned on and acts as an active load pull for the main power amplifier branch. The switch can switch the state of the isolation port of bridge 2 based on the impedance detection result of the impedance detector, causing the isolation port connected to the switch to be short-circuited or open-circuited, thereby reducing the impact of impedance mismatch.

[0061] However, short-circuiting or opening the isolation port of the output bridge can only cope with impedance mismatch in specific circumstances, and the ability to resist impedance mismatch is limited.

[0062] An embodiment of the present application provides a power amplifier circuit that can be applied to different load impedance mismatch conditions to improve efficiency under load impedance mismatch conditions.

[0063] FIG3 shows a schematic structural diagram of a power amplifier circuit provided by an embodiment of the present application. As shown in FIG3 , the power amplifier circuit includes: a splitter 1, a control branch 2, a first balanced branch 3, a second balanced branch 4, and a first directional coupler 5. The control branch 2 includes a third power amplifier 21; the first balanced branch 3 includes a first power amplifier 31; the second balanced branch 4 includes a second power amplifier 41 and a first phase shifter 42. The bias voltage of the first power amplifier 31 and / or the bias voltage of the second power amplifier 41 are adjustable. The bias voltage of the first power amplifier 31 and the bias voltage of the second power amplifier 41 are respectively the drain voltage or collector voltage of the transistors of the first power amplifier 31 and the second power amplifier 41. The splitter 1 is used to distribute the first signal input to the splitter 1 to the control branch 2, the first balanced branch 3, and the second balanced branch 4. The first balanced branch 3, the second balanced branch 4, and the control branch 2 are respectively used to input the amplified signal to the first port 51, the fourth port 54, and the second port 52 of the first directional coupler 5. The second port 52 is the isolation port of the first directional coupler 5. The first directional coupler 5 is used to couple the amplified signals from the first port 51 , the fourth port 54 and the second port 52 , and output the amplified signals from the third port 53 of the first directional coupler 5 to the load.

[0064] The control branch 2, the first balanced branch 3, and the second balanced branch 4 collectively constitute the amplifier circuit of the power amplifier circuit, wherein the first balanced branch 3 and the second balanced branch 4 form the balanced path. The amplifier circuit amplifies the signal distributed by the splitter 1 to the three branches according to power. The amplified signal is input to the first directional coupler 5. The signal amplified by the control branch 2 is input to the isolation port 52 of the first directional coupler 5 for active load modulation of the balanced path signal, thereby changing the impedance presented to the balanced path transistors, thereby achieving impedance matching in the balanced path without the need for a matching network.

[0065] The first directional coupler 5 is a directional coupler, for example, a 3dB directional coupler or other widely used coupler. A directional coupler is a directional power coupling element, typically consisting of two transmission lines called a through line (main line) and a coupled line (sub-line). The through line and the coupled line couple part or all of the through line power to the coupled line through a certain coupling mechanism (such as a gap, a hole, a coupled line segment, etc.). The directional coupler has four ports, namely, an input port (corresponding to the fourth port 54 in FIG. 3 ), a coupled port (corresponding to the first port 51 in FIG. 3 ), a through port (corresponding to the third port 53 in FIG. 3 ), and an isolation port (corresponding to the second port 52 in FIG. 3 ).

[0066] The power amplifier circuit shown in FIG3 uses an active load-modulated balanced amplifier (LMBA) architecture to modulate two balanced branches through a control branch.

[0067] In the second balanced branch 4, the first phase shifter 42 can be set at the input end of the second power amplifier 41 or at the output end of the second power amplifier 41, so as to adjust the phase of the signal before the signal is input to the second power amplifier 41 or when the signal is output from the second power amplifier 41.

[0068] The power amplifiers of the control branch 2, the first balancing branch 3, and the second balancing branch 4 can each include at least one transistor. The transistor can be a bipolar transistor or a field-effect transistor. The bipolar transistor and the field-effect transistor can be connected to a DC power supply at their collector and drain, respectively.

[0069] It should be understood that in FIG3 , the branch connected to the first port 51 of the first directional coupler is referred to as a first balanced branch, and the branch connected to the fourth port 54 is referred to as a second balanced branch. In some embodiments, the branch connected to the fourth port 54 may also be referred to as a first balanced branch, and the branch connected to the first port 51 may be referred to as a second balanced branch. In this way, the first phase shifter 42 may be provided on the branch connected to the input port 54 or the coupling port 51 of the first directional coupler 5, and this application does not limit this.

[0070] In the embodiment of the present application, the bias voltage of the power amplifier of at least one of the two balanced branches is adjustable. This allows the transistor voltage drop of at least one of the power amplifiers in the first balanced branch 3 and the second balanced branch 4 to be adjusted, thereby making the output current (drain current or collector current) of at least one of the first balanced branch 3 and the second balanced branch 4 adjustable, and the output power of the first balanced branch 3 and the second balanced branch 4 also varies accordingly. Furthermore, the second balanced branch 4 includes a first phase shifter 42 to adjust the current and voltage phases in the second balanced branch 4. When there is a load impedance mismatch, these parameters can be adjusted to reduce the impact of the impedance mismatch on the output efficiency of the entire power amplifier circuit.

[0071] In the embodiment of the present application, the power amplifier circuit may further include an impedance detector 6 for detecting the impedance of a load connected to the output end of the third port 53, so that the bias voltage of the first power amplifier 31 and / or the second power amplifier 41 and the phase of the first phase shifter 42 can be adjusted according to the impedance of the load. The adjustment of various parameters can be performed by a controller of the power amplifier circuit.

[0072] The load impedance can be expressed by a complex number, such as a+bj, where a represents resistance and bj represents reactance; it can also be expressed by amplitude and phase, such as Where A is the magnitude of the load impedance, is the phase of the load impedance, and can also be represented by, for example, a reflection coefficient, etc. The impedance detector can detect the load impedance in the above-mentioned different forms, which is not limited in this application.

[0073] In this way, if the impedance detector 6 does not exist, when the impedance mismatch occurs (for example, whether it is in an impedance mismatch state is determined by the output efficiency), appropriate parameter values ​​can be selected by blind scanning of the adjustable parameters (bias and phase), thereby improving the output efficiency of the entire circuit.

[0074] If the impedance detector 6 is present, the values ​​of the various adjustable parameters can be directionally adjusted according to the current impedance mismatch situation, thereby improving the output efficiency of the entire circuit.

[0075] Of course, the power amplifier circuit can also be pre-tested to obtain the preferred parameter values ​​under different impedance mismatch conditions (the preferred bias voltage of the first power amplifier 31 and / or the second power amplifier and the preferred phase of the first phase shifter 42). The preferred parameter value can be a parameter value that makes the efficiency of the entire power amplifier circuit the highest or the efficiency higher than a certain threshold under a certain impedance mismatch. For example, the corresponding mapping relationship can be pre-stored, and the mapping relationship can be represented by a table, a function, a formula, etc. When the impedance mismatch occurs, the bias and phase are adjusted using the preferred parameter value as the target parameter value according to the mapping relationship, thereby improving the output efficiency of the circuit. Alternatively, the preferred current phase value of each port of the first directional coupler 5 under different impedance mismatch conditions is obtained, and when the impedance mismatch occurs, the various parameters are adjusted so that the current phase of each port of the first directional coupler 5 reaches the preferred current phase value.

[0076] The splitter 1 may also be referred to as a splitting module or unit, and may be a power splitter. The power splitter may be in the form of a Wilson gold splitter, a hybrid bridge, a ring bridge, or a directional coupler.

[0077] In an embodiment of the present application, in the signal distributed to the three branches by the splitter 1, the difference in power distributed between any two branches may be less than a certain threshold, for example, less than 20 percentage points; for example, the power distributed between any two of the three branches may be equal.

[0078] Alternatively, the power allocated to the two balancing branches may be greater than the power allocated to the control branch.

[0079] Alternatively, the power allocated to different branches can also be set according to actual conditions, and this application does not limit this.

[0080] Taking the example of equal input power of the three branches, the splitter 1 can include a first power splitter, which is an equal-dividing power splitter, thereby equally dividing the input signal input to the power splitter into the control branch 2, the first balancing branch 3 and the second balancing branch 4 according to power.

[0081] The splitter 1 may also include a power splitter and a directional coupler. The power splitter may be in the form of the aforementioned Wilson gold power splitter, hybrid bridge, ring bridge, or directional coupler, and is used to split the input first signal into two paths, and then the directional coupler splits one of the paths into two paths, thereby forming a three-path signal. As shown in FIG4 , the splitter 1 includes a second power splitter 12 and a second directional coupler 13. The second power splitter 12 splits the input signal into two paths, one of which is input to the control branch 2 and the other is input to the port of the second directional coupler 13, and is output from the two ports to the first balanced branch 3 and the second balanced branch 4, respectively. To ensure that the power distributed to the three branches is equal or approximately equal, the second power splitter 12 can distribute power to the control branch 2 and the other path in a ratio of 1:2. Therefore, the power from the other path of the power splitter input to the second directional coupler 13 can be evenly distributed to the first balanced branch 3 and the second balanced branch 4, so that the input power of the three branches is equal or approximately equal.

[0082] In some embodiments, the control branch 2 also includes a second phase shifter, which can be set at the input end of the third power amplifier 21 or at the output end of the third power amplifier 21. In addition to the second balancing branch 4, the voltage phase and current phase of the control branch 2 can also be adjusted, increasing the number of adjustable parameters when impedance mismatch occurs, thereby coping with more impedance mismatch situations.

[0083] In some embodiments, a phase shifter may also be provided in the first balancing branch 3, and the phase shifter may be provided at the input or output of the first power amplifier 31, thereby increasing the number of adjustable parameters so that after impedance mismatch, the efficiency may be adjusted to a value close to that before the mismatch.

[0084] In some embodiments, the bias voltage of the third power amplifier 21 in the control branch 2 may also be set to be adjustable, thereby further increasing the number of adjustable parameters.

[0085] In the embodiment of the present application, any one of the power amplifiers used in the control branch 2 , the first balancing branch 3 , and the second balancing branch 4 may be a class B power amplifier or a class AB power amplifier.

[0086] Amplifiers mainly include Class A power amplifiers, Class B power amplifiers, Class AB power amplifiers and other categories of power amplifiers.

[0087] Among them, the Class A power amplifier can also be called Class A power amplifier. It is fully turned on throughout the entire cycle. The Class A power amplifier has good linearity, but a high static operating point and a theoretical maximum efficiency of 50%.

[0088] A Class B power amplifier, also known as a Class B power amplifier, has a conduction angle of 180°. The Class B operating point is set so that the quiescent current is zero. Typically, two complementary transistors are used, each amplifying the positive and negative half-cycles of the input signal, creating a push-pull structure. The theoretical maximum efficiency of a Class B power amplifier is 78.5%. However, because the quiescent operating point is zero, the transistors cannot conduct when the signal is small, resulting in crossover distortion.

[0089] Class AB power amplifiers, also known as Class AB power amplifiers, have a conduction angle between Class A and Class B power amplifiers. Each of the two complementary transistors conducts for between 50% and 100% of the time. The operating point is set so that the quiescent current of the power amplifier is slightly greater than zero, keeping the transistors in a constant on state and avoiding the crossover distortion issues common in Class B power amplifiers. The theoretical maximum efficiency of a Class AB power amplifier lies between those of Class A and Class B.

[0090] In FIG3 , the second balanced branch 4 includes a first phase shifter 42. In some embodiments, a phase shifter may be provided only in the control branch 2 without providing a phase shifter in the second balanced branch 4. In addition, at least one bias voltage of the power amplifiers of the two balanced branches may be adjustable. Thus, when an impedance mismatch occurs, the bias voltage and the phase of the phase shifter may be adjusted to reduce the impact of the impedance mismatch.

[0091] Optionally, an impedance detector 6 may be provided so that the adjustable parameter can be directionally adjusted according to the impedance phase detected by the impedance detector 6 , or a mapping relationship may be pre-stored and the adjustable parameter can be directly adjusted through the mapping relationship.

[0092] Optionally, the bias voltage of the control branch may also be set to be adjustable, thereby increasing the number of adjustable parameters.

[0093] Optionally, a phase shifter may be provided in the first balancing branch 3 to increase the number of adjustable parameters.

[0094] For specific details, please refer to the previous introduction and will not be repeated here.

[0095] Based on Figure 3, Figure 5 shows a schematic structural diagram of a power amplifier circuit provided by an embodiment of the present application. The splitter 1 includes a first power divider 11, the control branch 2 includes a second phase shifter 22, and the bias voltages of the first balancing branch 3 and the second balancing branch 4 are adjustable. In this way, when the impedance detector 6 detects a load impedance mismatch, the bias voltages of the first phase shifter 42, the second phase shifter 22, the first power amplifier 31, and the second power amplifier 41 can be adjusted to reduce the impact of the impedance mismatch on the output efficiency of the entire power amplifier circuit.

[0096] Taking the power amplifier circuit shown in Figure 5 as an example, in order to further illustrate that the technical solution of the embodiment of the present application can adjust the efficiency by adjusting the phase of the phase shifter and the bias of the power amplifier when the impedance mismatch occurs, the technical principle of the embodiment of the present application is explained through calculation below.

[0097] As shown in FIG6 , it is assumed that the equivalent voltages of the first port 51 , the second port 52 , the third port 53 and the fourth port 54 are: V b1 、V c 、V o and V b2 , the equivalent currents are: I b1 , I c , I o and I b2 , Z0 is the characteristic impedance of the first directional coupler 5, j is the sign of the imaginary part, and the scattering parameter matrix of the first directional coupler 5 is:

[0098] The following assumes that each power amplifier in the circuit is a Class B power amplifier, and assumes that x, r, are the normalized current amplitudes or current coefficients of the first balancing branch 3, the second balancing branch 4 and the control branch 2, respectively, is the maximum fundamental current under a certain drain voltage (or collector voltage), x, r, It is related to the bias voltage of the first balancing branch, the second balancing branch 4 and the control branch. Ω and θ are I b2 and I c Relative to I b1 The current phase difference, Ω and θ, are determined by the phases of the first phase shifter 42 and the second phase shifter 22, respectively (affected by the phases of the phase shifters and the power amplifier). The currents of the first port 51, the second port 52, and the fourth port 54 satisfy the following formula:

[0099] Assume that the magnitude and phase of the load impedance are A and The equivalent current and equivalent voltage of the third port 53 satisfy the following formula:

[0100] Substituting the above formulas (2) to (4) into the above formula (1), combined with Euler's formula and formula (5), the power of each port of the architecture can be calculated to satisfy the following formula:

[0101] The backoff point is defined as the voltage saturation of the first balancing branch 3. Assuming that x = β at the backoff point, according to the above formula (1) and by substituting formula (2) into formula (4), we can obtain:

[0102] For ease of calculation and simplification, assume that Ω and θ are equal.

[0103] The above formula (10) can be simplified as:

[0104] In other words, the normalized current amplitude of control branch 2 needs to satisfy:

[0105] Substituting the above formula (12) into formula (6) to formula (9), we can obtain the power expressions of the low power area and the back-off area:

[0106] According to the above formula, it can be seen that in the low power area, the control branch 2 has no output power, that is, the control branch 2 can be turned on after the power of the circuit reaches the threshold, thereby modulating the power amplifier of the balanced circuit.

[0107] According to formula (16), the output power back-off amount OBO can be calculated by the following formula:

[0108] r max is the normalized current amplitude of the second balancing branch 4 when the entire power amplifier circuit has the maximum output power, r OBO is the normalized current amplitude of the second balancing branch 4 when the entire power amplifier circuit is at the back-off point.

[0109] Assumptions Let the ratio of the normalized current amplitudes of the two balanced branches be The load impedance mismatch amplitude A satisfies the following relationship: A=m 2 (18)

[0110] Substituting the above formula (18) into formula (16), the output power of the entire power amplifier circuit can be expressed as:

[0111] In formula (19), let A = 1 and The non-mismatched power P1 is obtained as:

[0112] Divide formula (19) by the non-mismatched power formula (20) to normalize it and get:

[0113] In order to facilitate calculation and reduce the impact of load impedance mismatch, let I c Relative to I b1 The current phase difference θ and the load impedance phase The following relations are satisfied:

[0114] The DC voltage amplitude in the load modulation interval is as follows:

[0115] The DC power consumption in the load modulation range is as follows:

[0116] Combined with the output power, the efficiency expression is obtained:

[0117] It can be seen from formula (27) that the efficiency η is related to m, where m is the ratio of the normalized current amplitudes of the two balanced branches (that is, the current ratio of the two balanced branches), which can be changed by adjusting the bias voltage.

[0118] In addition, the above equation 27 is the phase of θ and load impedance. difference Under the assumption of , the obtained output efficiency expression will change. Therefore, the output efficiency value can be changed by adjusting the phase of the current through the phase shifter.

[0119] For the sake of simplicity, various assumptions are used in the above calculations. However, those skilled in the art will know that when the power amplifier is not operating in Class B and the ratio of the normalized current amplitudes of the two balanced branches is When the load impedance mismatch amplitude A is not equal, the impact of the impedance mismatch on the output efficiency can also be reduced by adjusting the phase and bias in the power amplifier circuit having the structure of Figure 3 or Figure 5 or other structures described above.

[0120] FIG7 shows a heat map of the output efficiency at the saturation point and the 6 dB back-off point of the power amplifier circuit of the structure shown in FIG5 . The phase deviation value can refer to the difference between the phase of the signal input to the second port 52 and the fourth port 54 of the first directional coupler 5 and the optimal signal phase, or it can refer to the deviation between the phase of the phase shifter of the second balanced branch 4 and the control branch 2 and the optimal phase shifter phase. Still assuming that the phases of the signals input to the first directional coupler 5 by the second balanced branch 4 and the control branch 2 are equal, when the load impedance mismatch phase changes, the signals input to the first directional coupler 5 by the control branch 2 and the second balanced branch 4 have the corresponding optimal phase, that is, the phase shifters of the two branches have the optimal phase. As shown in Figure 7(a), at the output power saturation point, the output efficiency changes significantly with changes in the phase deviation value and the balance branch current. This can be achieved by adjusting the bias voltage of the first balance branch 3 and / or the second balance branch 4 to change the balance branch current ratio. By adjusting the phase of the first phase shifter 42 of the second balance branch 4 and the phase of the second phase shifter 22 of the control branch 2, the phase deviation value can be changed, thereby improving the output efficiency of the power amplifier circuit. Similarly, according to the output efficiency heat map shown in Figure 7(b), at the 6dB back-off point, the output efficiency can also be adjusted by adjusting the bias voltage of the balance branch and the phase of the phase shifter.

[0121] FIG8 shows a simulation diagram of the efficiency (DE) and gain (Gain) as a function of the output power (Pout) under different load mismatch phases when the voltage standing wave ratio (VSWR) is constant (the load mismatch amplitude is constant). As can be seen from FIG8 , when the load mismatch phase changes from 0° to 315° in steps of 45°, the efficiency is basically significantly improved after the load mismatch is debugged using the technical solution provided in the embodiment of the present application. Among them, when the load mismatch phase is 0°, the efficiency improvement is not obvious, but under other load mismatch phases, the output efficiency is significantly improved after debugging. Under each load mismatch phase, the average efficiency drops by 11% after the 6dB back-off point load mismatch before debugging, while the average efficiency drops by 3.5% to 10% after debugging the 6dB back-off point. After debugging, the efficiency drop is significantly improved.

[0122] In addition, the debugging solution provided in the embodiment of the present application has no obvious impact on the gain.

[0123] As previously described, preferred parameter values ​​under different impedance mismatch conditions can be obtained through pre-testing. Still taking the example of equal current phases at the second port 52 and the fourth port 54 (the phases of the first phase shifter 42 and the second phase shifter 22 have a corresponding relationship), Table 1 shows an example of preferred parameter values ​​under different load mismatch phases for the power amplifier circuit shown in FIG5 when VSVR is constant.

[0124] Table 1

[0125] Table 1 shows that when the impedance mismatch phase is 45°, the preferred bias voltages for the first power amplifier 31 and the second power amplifier 41 are 20V and 28V, respectively, and the preferred phase of the second phase shifter 22 is 80°. Therefore, when there is an impedance mismatch, the bias voltage and phase shifter values ​​can be adjusted directly according to the mismatch phase according to the table, thereby improving the control speed under impedance mismatch conditions.

[0126] Alternatively, various parameters may be purposefully adjusted based on the calculation formula and the impedance mismatch condition, thereby increasing the adjustment speed.

[0127] Figure 9 shows a block diagram of another power amplifier circuit provided by an embodiment of the present application. As shown in Figure 9, the power amplifier circuit includes a splitter 91, an amplifier circuit, and a combiner 94. The amplifier circuit includes a main power amplifier branch 92 and an auxiliary power amplifier branch 93. The main power amplifier branch 92 and the auxiliary power amplifier branch 93 respectively include a main power amplifier 921 and an auxiliary power amplifier branch 931. The bias voltage of the main power amplifier 921 is adjustable. The main power amplifier branch 92 and / or the auxiliary power amplifier branch 93 include phase shifters 922 and / or 932. The main power amplifier branch 92 is used to output an amplified signal to the output end of the main power amplifier branch; the auxiliary power amplifier branch 93 is used to output an amplified signal to the output end of the auxiliary power amplifier branch 93 when the output power of the main power amplifier 921 reaches a threshold; the splitter 91 is used to distribute the signal input to the splitter 91 to the main power amplifier branch 92 and the auxiliary power amplifier branch 93; the combiner 94 is used to perform impedance transformation on the first amplifier circuit and couple the output ends of the main power amplifier branch and the auxiliary power amplifier branch to the load.

[0128] The power amplifier circuit shown in FIG9 is a Doherty-type amplifier circuit.

[0129] As mentioned above, the splitter can be a device capable of power distribution, such as a Wilson gold power splitter, a hybrid bridge or a directional coupler.

[0130] In some embodiments, the power amplifier circuit may further include an impedance detector, thereby facilitating targeted adjustment of various adjustable parameters in the circuit according to impedance mismatch conditions.

[0131] In some embodiments, the amplifier circuit further includes multiple stages of auxiliary power amplifier branches, such as a second auxiliary power amplifier branch configured to output an amplified signal to an output terminal of the second auxiliary power amplifier branch when the output power of the main power amplifier 921 reaches a second threshold. The amplifier circuit may further include a third auxiliary power amplifier branch, a fourth auxiliary power amplifier branch, and the like, each configured to output an amplified signal to an output terminal of the branch when the output power of the main power amplifier 921 reaches a corresponding threshold.

[0132] In some embodiments, the bias voltage of at least one auxiliary power amplifier branch is also adjustable, so that more adjustment parameters can be provided when impedance mismatch occurs, thereby improving the adjustment speed.

[0133] For specific details, please refer to the previous introduction and will not be repeated here.

[0134] The technical solution of the embodiment of the present application for adjusting impedance mismatch by changing the power amplifier bias and the phase of each branch current can be applied not only to the active LMBA amplifier or Doherty amplifier circuit mentioned above, but also to other types of amplifier circuits, and the present application does not limit this.

[0135] An embodiment of the present application also provides a chip, including the power amplifier circuit described in FIG. 3 , FIG. 5 or FIG. 9 above.

[0136] An embodiment of the present application further provides a transmitter, including the power amplifier circuit described in FIG. 3 , FIG. 5 or FIG. 9 above, or including the above-mentioned chip.

[0137] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A power amplifier circuit, characterized in that: include: A splitter (1), a control branch (2), a first balanced branch (3), a second balanced branch (4) and a first directional coupler (5); the control branch (2) comprises a third power amplifier (21); the first balanced branch (3) comprises a first power amplifier (31); the second balanced branch (4) comprises a second power amplifier (41) and a first phase shifter (42); the first phase shifter (42) is used to change the phase of the second balanced branch (4); the bias voltage of the first power amplifier (31) and / or the bias voltage of the second power amplifier (41) are adjustable; the bias voltage of the first power amplifier (31) and the bias voltage of the second power amplifier (41) are respectively the drain voltage or collector voltage of the transistors of the first power amplifier (31) and the second power amplifier (32); The splitter (1) is used to distribute the first signal input into the splitter (1) to the control branch (2), the first balancing branch (3) and the second balancing branch (4); The first balancing branch (3), the second balancing branch (4) and the control branch (2) are respectively used to input amplified signals to the first port (51), the fourth port (54) and the second port (52) of the first directional coupler (5), and the second port (52) is an isolation port of the first directional coupler (5); The first directional coupler (5) is used to couple the amplified signals from the first port (51), the fourth port (54) and the second port (52), and output the amplified signals from the third port (53) of the first directional coupler (5) to a load.

2. The power amplifier circuit according to claim 1, characterized in that: The power amplifier circuit also includes an impedance detector (6); The impedance detector (6) is used to detect the impedance of the load, so that the bias voltage of the first power amplifier (31) and / or the second power amplifier (41) and the phase of the first phase shifter (42) are adjusted according to the impedance of the load.

3. The power amplifier circuit according to claim 1 or 2, characterized in that: The input power difference of the control branch (2), the first balancing branch (3) and the second balancing branch (4) is less than 20 percentage points.

4. The power amplifier circuit according to any one of claims 1 to 3, characterized in that: The splitter (1) comprises a first power divider (11), wherein the first power divider (11) is used to distribute the first signal to the control branch (2), the first balancing branch (3) and the second balancing branch (4).

5. The power amplifier circuit according to any one of claims 1 to 3, characterized in that: The splitter (1) comprises a second power divider (12) and a second directional coupler (13), wherein the second power divider (12) is used to divide the first signal into two paths, one of which is used to input the control branch (2), and the other is used to input the second directional coupler (13), and output to the first balanced branch (3) and the second balanced branch (4) through two ports of the second directional coupler (13).

6. The power amplifier circuit according to any one of claims 1 to 5, characterized in that: The control branch (2) comprises a second phase shifter (22), and the second phase shifter (22) is located at the input end or the output end of the third power amplifier (21).

7. The power amplifier circuit according to any one of claims 1 to 6, characterized in that: The first phase shifter (42) is located at the input end or the output end of the second power amplifier (41).

8. The power amplifier circuit according to any one of claims 1 to 7, characterized in that: The first balancing branch (3) comprises a third phase shifter (32), and the third phase shifter (32) is located at the input end or the output end of the first power amplifier (31).

9. The power amplifier circuit according to any one of claims 1 to 8, characterized in that: The first port (51) is a coupling port of the first directional coupler (5).

10. The power amplifier circuit according to any one of claims 1 to 9, characterized in that: The first power amplifier (31), the second power amplifier (41) and the third power amplifier (21) are class B power amplifiers.

11. The power amplifier circuit according to any one of claims 1 to 10, characterized in that: The bias voltage of the third power amplifier (21) is adjustable, and the bias voltage of the third power amplifier is the drain voltage or collector voltage of the transistor of the third power amplifier.

12. The power amplifier circuit according to any one of claims 1 to 11, characterized in that: The power amplifier circuit includes a controller, wherein the controller is configured to: Acquire a first mapping relationship, wherein the first mapping relationship is used to indicate a target bias voltage of the first power amplifier (31) and / or a target bias voltage of the second power amplifier and a target phase of the first phase shifter corresponding to different load impedances; According to the first mapping relationship, the bias voltage of the first power amplifier (31) and / or the second power amplifier (41) is adjusted to and the phase of the first phase shifter (42).

13. A power amplifier circuit, characterized in that: include: A splitter (1), a control branch (2), a first balanced branch (3), a second balanced branch (4) and a first directional coupler (5); the control branch (2) comprises a third power amplifier (21) and a second phase shifter (22); the first balanced branch (3) comprises a first power amplifier (31), the second balanced branch (4) comprises a second power amplifier (41), the bias voltage of the first power amplifier (31) and / or the second power amplifier (41) is adjustable, and the bias voltages of the first power amplifier (31) and the second power amplifier (41) are respectively the drain voltage or the collector voltage of the transistors of the first power amplifier (31) and the second power amplifier (41); The splitter (1) is used to split the first signal input into three paths and input them into the control branch (2), the first balancing branch (3) and the second balancing branch (4); The first balancing branch (3), the second balancing branch (4) and the control branch (2) are respectively used to input the amplified signal to the first port (51), the fourth port (54) and the second port (52) of the first directional coupler (5), and the second port (52) is an isolation port of the first directional coupler (5); The first directional coupler (5) is used to couple signals from the first port (51), the fourth port (54) and the second port (52), and output the signals from the third port (53) of the first directional coupler (5) to a load.

14. A chip comprising the power amplifier circuit according to any one of claims 1 to 13. 15 . A transmitter, comprising the power amplifier circuit according to claim 1 , or the chip according to claim 14 .

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