Power inverter linearization

By applying predistortion functions to the input DC current in power inverters, the method addresses inefficiencies caused by non-linear DC voltage, enhancing the conversion efficiency and reducing energy waste in AC output.

WO2025129075A1PCT designated stage expired Publication Date: 2025-06-19ANALOG DEVICES INC
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Patent Information

Application Number
PCT/US2024/060137
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-14
Filing Date
2024-12-13
Publication Date
2025-06-19

AI Technical Summary

Technical Problem

Power inverters used in electric vehicle drive trains and other applications face inefficiencies due to non-linear DC voltage, leading to harmonic distortions and wasted energy in AC output.

Method used

The method involves identifying distortions in DC to AC power inversion, determining a set of predistortion functions to linearize the output AC current, and applying these predistortion functions to the input DC current to achieve a linearized output.

Benefits of technology

This approach mitigates DC link power loss, providing additional AC energy to electric components and improving the efficiency of DC to AC power conversion.

✦ Generated by Eureka AI based on patent content.

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Abstract

Techniques for power inversion linearization are described. Specifically, in an example, a power inverter may identify a distortion in direct current (DC) to alternating current (AC) a power inversion. The power inverter may further determine a set of predistortion functions that linearizes an output AC current. The power inverter may further include apply the predistortion function to an input DC current to obtain the linearized output AC current.
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Description

POWER INVERTER LINEARIZATION PRIORITY DATA AND RELATED APPLICATIONS

[0001] This patent application claims priority to U.S. Provisional Application No.63 / 610,127, entitled POWER INVERTER LINEARIZATION, filed on December 14, 2023, which is incorporated by reference in its entirety. TECHNICAL FIELD

[0002] The present disclosure generally relates to power inverters, and in particular linearization of direct current (DC) to alternating current (AC) conversion by power inverters. BACKGROUND

[0003] Power inverters may be used to convert direct current (DC) to alternating current (AC) power. Applications include electric vehicle drive trains, grid based renewable energy and storage, variable speed industrial motors and many more. For example, vehicles having electric drive trains are becoming increasingly in use. However, their performance can be limited by the finite battery storage and associated electrical circuitry such as power inverters. Inefficient conversion of DC to AC power can present many challenges during vehicle operation. As such, improvements in DC to AC power conversion are desired. SUMMARY OF THE DISCLOSURE

[0004] Techniques of the present disclosure relate to linearizing direct current (DC) to alternating current (AC) power inversion.

[0005] According to one aspect of the disclosure, a method of power inversion linearization includes identifying a distortion in DC to AC a power inversion. The method further includes determining a set of predistortion functions that linearizes an output AC current. The method further includes applying at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

[0006] According to another aspect of the disclosure, a power inverter includes one or more memories configured to store data, one or more processors coupled with the one or more memories. The one or more processors, individually or in combination, configured to identify a distortion in DC to AC a power inversion. The nonlinear actuator is configured to determine a predistortion function that linearizes an output AC current. A switching component is 1 AFSDOCS:301021662.1configured to apply at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

[0007] According to a further aspect of the disclosure, a non-transitory computer readable medium including one or more computer readable instructions is provided for power inversion linearization. The computer readable medium includes identifying a distortion in DC to AC a power inversion. The computer readable medium includes determining a set of predistortion functions that linearizes an output AC current. The computer readable medium includes applying at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

[0008] Further areas of applicability will become apparent from the description provided herein. It should be understood that the description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] To provide a more complete understanding of the present disclosure and features and advantages thereof, reference is made to the following description, taken in conjunction with the accompanying figures, wherein like reference numerals represent like parts, in which:

[0010] FIG. 1 is an example electric vehicle drive train including a power inverter in accordance with some aspects of the present disclosure;

[0011] FIG. 2A is a conceptual diagram of digital predistortion in accordance with some aspects of the present disclosure;

[0012] FIG.2B is a series of graph diagrams of one relative voltage versus another voltage for a predistorter, an amplifier, and a linearized amplifier in accordance with some aspects of the present disclosure;

[0013] FIG. 3 is a block diagram of a power inverter in an electric vehicle application in accordance with some aspects of the present disclosure;

[0014] FIG.4 is a schematic diagram of nonlinear transfer functions in accordance with some aspects of the present disclosure; and

[0015] FIG.5 is a flow diagram of a method for power inversion linearization in accordance with some aspects of the present disclosure. 2 AFSDOCS:301021662.1DETAILED DESCRIPTION

[0016] The systems, methods and devices of this disclosure each have several innovative aspects, no single one of which is solely responsible for all of the desirable attributes disclosed herein. Details of one or more implementations of the subject matter described in this specification are set forth in the description below and the accompanying drawings.

[0017] The present aspects relate to linearizing direct current (DC) to alternating current (AC) power inversion. Specifically, power inverters convert a DC voltage input to one or more AC voltage outputs such as for a variety of applications including, but not limited to, electric vehicle drive trains, motor control, solar power inverters, or uninterruptable power supplies. For example, electric vehicles may include one or more high-voltage electric drive trains in the form of an electric motor unit. The electric drive trains draw power from a rechargeable DC battery pack to power the AC driven electric motor unit. The energized electric drive trains modify torques of the various gear sets to achieve desired system efficiency. The electric drive trains may further include a power inverter having switches that are controlled via pulse-width modulation or other switching control signals for converting the DC battery output voltage to an AC output voltage. The AC output voltage from the power inverter may be transmitted to the individual phase windings of the electric motor to propel the vehicle.

[0018] However, in practice, the battery DC voltage, which can also be referred to as the DC link, may not be perfectly DC. That is, the DC voltage may exhibit non-linearity during operation and not maintain a stable or relatively constant voltage and corresponding current. Because of imperfections in the motor, there may be currents at harmonics of a desired frequency flowing into the impedance of the battery DC link, resulting in voltages at harmonics of the desired frequency on the DC link. Hence, the non-linearity may result in wasted energy as the distorted AC output cannot be used by an electric component.

[0019] Accordingly, the present aspects provide techniques for linearizing DC to AC power inversion by identifying a distortion in DC to AC a power inversion, determining a set of predistortion functions that linearizes an output AC current, and applying at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current. In other words, in the present aspects, the distortion is measured and canceled via digital predistortion. By doing so, the DC link power loss may be mitigated, which in turn may provide, in a finite DC battery powered environment, additional AC energy to an AC electric component, such as but not limited to an electric vehicle motor.

[0020] FIG. 1 is an example electric vehicle drive train 100 including a power inverter 102 configured to linearize DC to AC power inversion in accordance with some aspects of the 3 AFSDOCS:301021662.1present disclosure. The electric vehicle drive train 100 may include a battery 104 including a conducting wire bus component for establishing a voltage and facilitating transmission of current. The battery 104 voltage may be referred to as a DC link. In one example, which should not be construed as limiting, the DC link may correspond to 400 or 800 volts, and provide a relatively steady voltage to the power inverter 102 via conducting wire bus. The electric vehicle drive train 100 may also include a motor 106, as represented by a plurality of inductors (referred to herein as motor / inductors 106), for receiving AC power output by the power inverter 102. That is, the motor / inductors 106 may be driven by AC power provided by the power inverter 102.

[0021] The power inverter 102 may include a number of electrical components to not only convert DC power (i.e., DC link 104) to AC power (i.e., for the motor / inductors 106), but also implement digital predistortion to linearize the output current so that wasted power as a result of harmonic distortion is minimized. That is, the DC link 104 may exhibit a periodic or aperiodic distortion of the DC voltage in the form of a non-linear DC voltage. As noted herein, the distortion may result in inefficient battery utilization in that a portion of the available DC energy, which may be non-linear, is not converted to usable AC energy.

[0022] The power inverter 102 may include at least one capacitor 116, and may be referred to as a DC link capacitor. A size of the capacitor 102 may be sufficiently large to absorb AC currents. The power inverter 102 may include a pulse width modulation (PWM) controller 108 configured to generate or create waveforms that control a power and torque of the motor / inductors 106. In some implementations, the motor / inductors 106 may be controlled by three sinusoidal currents that are, for example, 120 degrees out of phase at a steady state. Further, in some implementation, however, generating sinusoids directly may be too power intensive. Instead, the sinusoidal current may be produced by hard-switched power transistors driven by a pulse-width modulated binary signal.

[0023] For example, to produce the sinusoidal AC current for the motor / inductors 106, the power inverter 102 may include a first half bridge 110, a second half bridge 112, and a third half bridge 114. Specifically, each of the half bridges 110, 112, 114 may be configured to output a sinusoidal AC current to drive the motor / inductors 106. Each of the half bridges 110, 112, 114 may be a combination of two power transistors across the DC link 104 voltage. Either a high-side transistor or a low-side transistor may be conducting at any time (i.e., not including a brief dead time during cross-over).

[0024] The voltage waveforms of each of the half bridges 110, 112, 114 measured at each corresponding inductor of the motor / inductors 106 may be associated with a distinct or 4 AFSDOCS:301021662.1different phase such that when combined or smoothed together, a sinusoidal current results. In other words, the voltages across the load inductors (i.e., motor / inductors 106) may induce an AC current. The binary voltages may be smoothed into a roughly sinusoidal current by energy storage of the motor / inductors 106. The output current, which may be referred to as the phase current, may be proportional to the DC link voltage 104 divided by the load impedance. The sum of the three phase currents at the desired motor rotation frequency may be zero. The voltage and / or current of motor / inductors 106 may be fed or looped into the PWM controller 108 as feedback to adjust the linearizing parameters as further described herein with reference to FIG.4. The power inverter 102 may further include resistors 118, 120, and 122, and each of which may be associated with one of the half bridges 110, 112, 114, respectively. The power inverter 102 may further include an analog-to-digital converter (ADC) 124 configured to sample motor currents, indicating to the PWM controller 108 when the respective currents flow in a high and / or low-side half bridge portion. The power inverter 102 may further include gate drivers 126, 128, and 130 to configured to receive a low power input from the PWM controller 108 and provide a high current gate drive, for instance, for each of the half bridges 110, 112, 114.

[0025] FIGS. 2A and 2B depict linearizing a voltage in a digital predistortion system according to one or more aspects of the present disclosure. Specifically, FIG. 2A is a conceptual diagram of the digital predistortion system 200 including an input voltage, V1, received by a predistorter 202, which generates an output voltage, V2, which is received by a power amplifier 204, which generates output voltage, V0. Further, FIG. 2B includes corresponding graph diagrams of voltage changes in the predistortion system 200, including a first graph 210 of V2versus V1for the predistorter 202, a second graph 214 of V0versus V2for the amplifier 204, which when combined result in the third graph 216 of V0 versus V1 for a linearized amplifier, in accordance with some aspects of the present disclosure. In practice, the DC link 104 voltage may not be perfectly DC or linear during operation or activity. Because of imperfections in the motor / inductors 106, there may be currents at harmonics of the desired frequency flowing into an impedance of the DC link 104, resulting in voltages at harmonics of the desired frequency on the DC link 104. Such harmonics corresponding to sinusoidal waves having frequencies at a multiple of the target frequency may result in a distortion of the DC link voltage and, hence, a nonlinear DC supply voltage while providing a load at the output side (i.e., to an electric motor).

[0026] The output current of the power inverter 102, Iout, may be proportional to the DC link voltage 104, Vdc. The power inverter 102 may be considered as a multiplier: 5 AFSDOCS:301021662.1^^^௨௧ ൌ ^^ ∙ ^^^ௗ^^where S is the desired sinusoidal signal. Multiplying sinusoids and frequencies F1 and F2 may results in new frequencies at F1+ / - F2. Any power going into or otherwise being provided to undesired frequency components is wasted power. That is, the frequency mismatch may result in wasted energy due to the periods of nonlinearity of the DC link 104. As an example, in a 300kW drivetrain (i.e., typical for a high-end electric vehicle), each 1% of distortion may correspond to 3kW of wasted energy. As such, in a typical case of a total harmonic distortion of around 5%, this would result in 15kW of wasted energy that is converted to heat to be dissipated. If the distortion is eliminated or otherwise mitigated, as described herein, the drive train could be smaller and lighter, as well as more reliable, and the battery could have, for instance, 5% less capacity for the same range. Alternatively, a similar size battery can provide extended range by linearizing the distortion as described herein.

[0027] Specifically, digital predistortion may be implemented by the digital predistorter 202 in conjunction with the power amplifier 204 to linearize a distorted voltage. For example, if the power amplifier 204 has a non-linearity, the desired signal can be digitally predistorted such that the combined response is linear. As depicted in FIG.2B, the input V1 may initially be predistorted into V2. The power amplifier 204 non-linearities distort V2into V0. The power amplifier 204 output V0may be an amplifier version of V1.

[0028] Similarly, the power inverter 102 may linearize the distorted voltage so as to mitigate harmonic influence on the supply DC link 104. For instance, if a small AC voltage v is added to the DC link 104 voltage Vdc, then the output current may be proportional to the product of the desired signal S and the DC link 104 voltage plus the small AC voltage, as represented by the formula below. ^^~^^ ∙ ^^^ௗ^ ^ ^^^

[0029] One example technique to create or otherwise generate the digitally predistorted signal may be to measure the DC link 104 voltage and modify the desired signal S as shown below. ^^ ∙ ^^^^ → ௗ^^^ௗ^ ^ ^^

[0030] Thus, the resulting output current, which may not include the undesired components, may be represented as follows: ^^~^^ ∙ ^^6 AFSDOCS:301021662.1

[0031] FIG.3 is a block diagram of a power inverter 102 in an electric vehicle application in accordance with some aspects of the present disclosure. The power inverter 102 may include one or more processors 310 configured to process data or signals received from any one or more of the components of the power inverter 102, and may be configured to receive and process a two-dimensional voltage request or three-dimensional voltage request. The one or more processors 310 may further include or may be coupled with one or more memories storing instructions or data. The power inverter 102 may further include control loop 302 configured to receive a torque request320 from a higher layer of the system, as well as convertedcurrent values ^^^^^^^,340, which may be discrete-time sampled versions of thecurrent seen at motor 316, i.e., ^^^^^^^from the ADC 318 and output two or three dimensional based voltage commands 322 to the nonlinear actuator 304 via pulse encoder 342. The pulse encoder 342 may be configured to determine and output duty cycle commands 324 to the nonlinear actuator 304. The control loop may be configured to periodically or continuously determine target voltage values based at least on the existing output currents^^^^^^^ 414 , ^^^^^^^ 416, ^^^^^^^ 418.

[0032] The nonlinear actuator 304 may be configured to determine predistorted commands of the output current , , and 344, which may be discrete-time input values such as duty cycles, pulse widths, or average voltage levels to the PWM 108. The PWM 108 may be configured to receive the projected values of the output current , , and 324,determine the desired or target signals ^^^^^^^, ^^^^^^^, ^^^^^^^ 326, and output to the switchingcomponent 308. In addition to the desired or target signals ^^^^^^^, ^^^^^^^, ^^^^^^^ 326, theswitching component 308 may receive the DC voltage values 328 and set or establish at least one switching sequence to provide linearized output voltagesand 330 to the motor 316.

[0033] The output rotor angle 332 and output currents ^^^^^^^ , ^^^^^^^ , ^^^^^^^ 334 measured at themotor 316 may be provided to ADC 318 for conversion to DC values and output as discrete rotor angle 338 and discrete current values 340. Similarly, the linearized output voltages , , and 330 may be received by an ADC 124 for conversion to DC form , , and 336, which may represent the output voltage achieved by the inverter for output to the correlation component 312. The correlation component 312 may be configured to determine relationships or correlations between the voltages , , and 336 and updated voltages322, such as comparing the voltage requests with the actual 7 AFSDOCS:301021662.1voltage outputs, and provide the statistics to the one or more processors 310, which may in turn provide coefficients to the nonlinear actuator 304.

[0034] FIG.4 is a schematic diagram of a nonlinear transfer function system 400 in accordance with some aspects of the present disclosure. The digital predistortion techniques of the present disclosure may be configured to control the switching states of the three half bridges 110, 112,114 so that the output currents ^^^^^^^ 414 , ^^^^^^^ 416, ^^^^^^^ 418 match the desired or targetsignals ^^^^^^^, ^^^^^^^, ^^^^^^^ 326, while also minimizing the power consumption of the switches308. The binary signals ^^^^^^^ 402, ^^^^^^^ 404, ^^^^^^^ 406 may represent the states of the threehalf bridges 110, 112, 114. As such, the nonlinear transfer function system 400 includes a first nonlinear transfer function 408, a second nonlinear transfer function 410, and a third nonlinear transfer function 412 to set a switching state such that the outputs^^^^^^^ 414, ^^^^^^^ 416, ^^^^^^^ 418 are based on inputs ^^^^^^^ 402, ^^^^^^^ 404, ^^^^^^^ 406.

[0035] The digital predistortion techniques of the power inverter 102 may include at least an estimation technique (i.e., performed via processor(s) 310) and an actuation technique (i.e., performed via nonlinear actuator 304). The estimation technique of the present disclosure may be configured to learn a parameterized estimate of each nonlinear transfer function^^^ 408, ^^^ 410,^^^ 412 from time-aligned observations of the sensed output currents^^^^^^^ 414, ^^^^^^^ 416, ^^^^^^^ 418 induced by the half bridge switching sequences. In someimplementations, for some motor configurations, each nonlinear transfer function^^^ 408, ^^^ 410,^^^ 412 may depend on the switching sequences of all half bridges 110, 112,114. In further implementations, the nonlinear transfer functions ^^^ 408, ^^^ 410, ^^^ 412 mayhave memory such that any instantaneous value of the output current^^^^^^^ 414, ^^^^^^^ 416, ^^^^^^^ 418 depends on both current and past values of the inputs. In otherwords, the estimation technique may determine, for each nonlinear transfer function^^^ 408, ^^^ 410,^^^ 412, a future or new output current based on one or both of the existing andpast values of the inputs ^^^^^^^ 402, ^^^^^^^ 404, ^^^^^^^ 406.

[0036] Once the nonlinear transfer functions 408-412 are learned, the actuation technique (i.e., performed via nonlinear actuator 304) of the power inverter 102 may use the nonlinear transfer functions 408, 410, 412 to predict or estimate future values of the output currents 414, 416, 418 from determined switching sequences. Because the three switching signals of the nonlinear transfer functions 408, 410, 412 are each binary, there may be eight possibilities or permutations for the switching signals at each point in time. For example, the actuation technique may select the optimum option for the next switching states from the set of eight 8 AFSDOCS:301021662.1possibilities such that the error between the output currents ^^^^^^^ 414, ^^^^^^^ 416, ^^^^^^^ 418 andthe desired or target signals ^^^^^^^, ^^^^^^^, ^^^^^^^ 326 is minimized, while also minimizing powerconsumption due to switching losses.

[0037] FIG. 5 is a flow diagram of a method 500 for power inversion linearization in accordance with some aspects of the present disclosure. The method 500 may identify a distortion in DC to AC power inversion. For example, the one or more processors 310, in conjunction with one or more additional components of the power inverter 102, may measure the distortion of the DC link 104 during a DC to AC power inversion. The method 500 may further determine a set of predistortion functions that linearizes an output AC current. For instance, the nonlinear actuator 304, in conjunction with one or more additional components of the power inverter 102, may learn a parameterized estimate of each nonlinear transfer function.

[0038] In one implementation of determining the set of predistortion functions, the power inverter 102 may identify a parameterized estimate of the set of predistortion functions each corresponding to a nonlinear transfer function from time-aligned sensing of each corresponding output current. Further, the time-aligned sensing of each corresponding output current of the nonlinear transfer function may be induced by a switching sequence of a half bridge (i.e., half bridge 110, 112, or 114) corresponding to at least two power transistors across a DC link voltage. Additionally, each nonlinear transfer function is dependent upon a switching sequence of all of a plurality of half bridges 110, 112, 114.

[0039] In another implementation of determining the set of predistortion functions, the power inverter 102 may select a switching state of at least one half bridge from a set of switching states having less than a threshold difference between the output AC current and a target output AC current.

[0040] The method 500 may further apply at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current. In one implementation of applying at least one predistortion function to the input DC current to control the switching states of all half bridges, the power inverter 102 may manage the switching states of the at least one half bridge such that the output AC current matches or is the same as a target output AC current.

[0041] In some implementations, the transfer functions may include a form of memory such that any instantaneous value of the output voltage and / or current depends on both current and past values of the input voltage and / or current. For example, the output AC current may be 9 AFSDOCS:301021662.1linearized based on the input DC current corresponding to an existing input DC current and a past input DC current.

[0042] In a further implementation, a small AC voltage may be added to the DC link 104 voltage such that the set of predistortion function corresponds to a nonlinear transfer function associated with a correcting AC voltage associated with a target output AC current.

[0043] Thus, the present disclosure may include one or any combination of the following examples.

[0044] Example 1 provides a method of power inversion linearization, comprising identifying a distortion in DC to AC a power inversion, determining a set of predistortion functions that linearizes an output AC current, applying at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

[0045] Example 2 provides determining the set of predistortion functions that linearizes the output AC current includes identifying a parameterized estimate of the set of predistortion functions each corresponding to a nonlinear transfer function from time-aligned sensing of each corresponding output current.

[0046] Example 3 provides that the time-aligned sensing of each corresponding output current of the nonlinear transfer function is induced by a switching sequence of a half bridge corresponding to at least two power transistors across a DC link voltage.

[0047] Example 4 provides that each nonlinear transfer function is dependent upon a switching sequence of all of a plurality of half bridges.

[0048] Example 5 provides that the output AC current is linearized based on the input DC current corresponding to an existing input DC current and a past input DC current.

[0049] Example 6 provides determining the set of predistortion functions that linearizes the output AC current includes selecting a switching state of at least one half bridge from a set of switching states having less than a threshold difference between the output AC current and a target output AC current.

[0050] Example 7 provides applying at least one predistortion function from the set of predistortion functions to the input DC current includes controlling the switching states of the at least one half bridge such that the output AC current matches a target output AC current.

[0051] Example 8 provides that the set of predistortion function corresponds to a nonlinear transfer function associated with a correcting AC voltage associated with a target output AC current.

[0052] Example 9 provides that the input DC current is received from an electric storage battery of a vehicle. 10 AFSDOCS:301021662.1

[0053] Example 10 provides that the output AC current drives a motor of an electric vehicle.

[0054] Example 11 provides a power inverter, comprising one or more memories configured to store data, one or more processors coupled with the one or more memories, the one or more processors, individually or in combination, configured to identify a distortion in DC to AC a power inversion, a nonlinear actuator configured to determine a set of predistortion functions that linearizes an output AC current, and a switching component configured to apply at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

[0055] Example 12 provides that to determine the set of predistortion functions that linearizes the output AC current, the nonlinear actuator is further configured to identify a parameterized estimate of the set of predistortion functions each corresponding to a nonlinear transfer function from time-aligned sensing of each corresponding output current.

[0056] Example 13 provides that the time-aligned sensing of each corresponding output current of the nonlinear transfer function is induced by a switching sequence of a half bridge corresponding to at least two power transistors across a DC link voltage.

[0057] Example 14 provides that each nonlinear transfer function is dependent upon a switching sequence of all of a plurality of half bridges.

[0058] Example 15 provides that the output AC current is linearized based on the input DC current corresponding to an existing input DC current and a past input DC current.

[0059] Example 16 provides that to determine the set of predistortion functions that linearizes the output AC current, the nonlinear actuator is configured to select a switching state of at least one half bridge from a set of switching states having a minimal difference between the output AC current and a target output AC current.

[0060] Example 17 provides that to apply the predistortion function to the input DC current, the switching component is configured to control the switching states of the at least one half bridge such that the output AC current matches a target output AC current.

[0061] Example 18 provides that the set of predistortion functions corresponds to a nonlinear transfer function associated with a correcting AC voltage associated with a target output AC current.

[0062] Example 19 provides that the input DC current is received from an electric storage battery of a vehicle, and wherein the output AC current drives a motor of an electric vehicle.

[0063] Example 20 provides a non-transitory computer readable medium including one or more computer readable instructions for power inversion linearization, comprising identifying a distortion in DC to AC a power inversion, determining a set of predistortion functions that 11 AFSDOCS:301021662.1linearizes an output AC current, and applying at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

[0064]

[0065] Principles and advantages discussed herein can be used in any device or system to implement linearizing direct current (DC) to alternating current (AC) power inversion. It is to be understood that not necessarily all objects or advantages mentioned herein may be achieved in accordance with any aspect described herein. Thus, for example, those skilled in the art will recognize that certain aspects may be configured to operate in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other objects or advantages as may be taught or suggested herein.

[0066] In one example aspect, any number of electrical circuits of the present drawings may be implemented on a board of an associated electronic device. The board can be a general circuit board that can hold various components of the internal electronic system of the electronic device and, further, provide connectors for other peripherals. More specifically, the board can provide the electrical connections by which the other components of the system can communicate electrically. Any suitable processors (inclusive of DSPs, microprocessors, supporting chipsets, etc.), computer-readable non-transitory memory elements, etc. can be suitably coupled to the board based on configuration needs, processing demands, computer designs, etc. Other components such as external storage, additional sensors, controllers for audio / video display, and peripheral devices may be attached to the board as plug-in cards, via cables, or integrated into the board itself. In various aspects, the functionalities described herein may be implemented in emulation form as software or firmware running within one or more configurable (e.g., programmable) elements arranged in a structure that supports these functions. The software or firmware providing the emulation may be provided on non- transitory computer-readable storage medium comprising instructions to allow a processor to carry out those functionalities.

[0067] In another example aspect, the electrical circuits of the present drawings may be implemented as stand-alone modules (e.g., a device with associated components and circuitry configured to perform a specific application or function) or implemented as plug-in modules into application specific hardware of electronic devices. Note that particular aspects of the present disclosure may be readily included in a system on chip (SOC) package, either in part, or in whole. An SOC represents an IC that integrates components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio frequency functions: all of which may be provided on a single chip substrate. Other 12 AFSDOCS:301021662.1aspects may include a multi-chip-module (MCM), with a plurality of separate ICs located within a single electronic package and configured to interact closely with each other through the electronic package. In various other aspects, the digital filters may be implemented in one or more silicon cores in Application Specific Integrated Circuits (ASICs), FPGAs, and other semiconductor chips.

[0068] It is also imperative to note that all of the specifications, dimensions, and relationships outlined herein (e.g., the number of processors, logic operations, etc.) have only been offered for purposes of example and teaching only. Such information may be varied considerably without departing from the spirit of the present disclosure, or the scope of the appended claims. The specifications apply only to one non-limiting example and, accordingly, they should be construed as such. In the foregoing description, example aspects have been described with reference to particular arrangements of components. Various modifications and changes may be made to such aspects without departing from the scope of the appended claims. The description and drawings are, accordingly, to be regarded in an illustrative rather than in a restrictive sense.

[0069] Note that with the numerous examples provided herein, interaction may be described in terms of two, three, four, or more electrical components. However, this has been done for purposes of clarity and example only. It should be appreciated that the system can be distributed or consolidated in any suitable manner. Along similar design alternatives, any of the illustrated components, modules, and elements of the present drawings may be combined in various possible configurations, all of which are clearly within the broad scope of the present disclosure. In certain cases, it may be easier to describe one or more of the functionalities of a given set of flows by only referencing a limited number of electrical elements. It should be appreciated that the electrical circuits of the figures and its teachings are readily scalable and can accommodate a large number of components, as well as more complicated / sophisticated arrangements and configurations. Accordingly, the examples provided should not limit the scope or inhibit the broad teachings of the electrical circuits as potentially applied to a myriad of other architectures.

[0070] Note that in the present disclosure references to various features (e.g., elements, structures, modules, components, steps, operations, characteristics, etc.) included in “one aspect,” “example aspect,” “an aspect,” “another aspect,” “some aspects,” “various aspects,” “other aspects,” “alternative aspect,” and the like are intended to mean that any such features are included in one or more aspects of the present disclosure, but may or may not necessarily be combined in the same aspects. 13 AFSDOCS:301021662.1

[0071] Numerous other changes, substitutions, variations, alterations, and modifications may be ascertained to one skilled in the art and it is intended that the present disclosure encompass all such changes, substitutions, variations, alterations, and modifications as falling within the scope of the appended claims. Note that all optional features of any of the apparatus, device, or system described above may also be implemented with respect to the method or processes of using or operating said apparatus device, or system, and specifics in the examples provided for any of the apparatus, device, or system described herein may be used anywhere in corresponding methods or processes, and vice versa. 14 AFSDOCS:301021662.1

Claims

CLAIMS 1. A method of power inversion linearization, comprising: identifying a distortion in direct current (DC) to alternating current (AC) a power inversion; determining a set of predistortion functions that linearizes an output AC current; and applying at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

2. The method of claim 1, wherein determining the set of predistortion functions that linearizes the output AC current includes identifying a parameterized estimate of the set of predistortion functions each corresponding to a nonlinear transfer function from time-aligned sensing of each corresponding output current.

3. The method of claim 2, wherein the time-aligned sensing of each corresponding output current of the nonlinear transfer function is induced by a switching sequence of a half bridge corresponding to at least two power transistors across a DC link voltage.

4. The method of claim 2, wherein each nonlinear transfer function is dependent upon a switching sequence of all of a plurality of half bridges.

5. The method of claim 1, wherein the output AC current is linearized based on the input DC current corresponding to an existing input DC current and a past input DC current.

6. The method of claim 1, wherein determining the set of predistortion functions that linearizes the output AC current includes selecting a switching state of at least one half bridge from a set of switching states having less than a threshold difference between the output AC current and a target output AC current.

7. The method of claim 6, wherein applying at least one predistortion function from the set of predistortion functions to the input DC current includes controlling the switching states of the at least one half bridge such that the output AC current matches a target output AC current. 15 AFSDOCS:301021662.

18. The method of claim 1, wherein the set of predistortion function corresponds to a nonlinear transfer function associated with a correcting AC voltage associated with a target output AC current.

9. The method of claim 1, wherein the input DC current is received from an electric storage battery of a vehicle.

10. The method of claim 1, wherein the output AC current drives a motor of an electric vehicle.

11. A power inverter, comprising: one or more memories configured to store data; one or more processors coupled with the one or more memories, the one or more processors, individually or in combination, configured to: identify a distortion in direct current (DC) to alternating current (AC) a power inversion; a nonlinear actuator configured to: determine a set of predistortion functions that linearizes an output AC current; and a switching component configured to: apply at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current.

12. The power inverter of claim 11, wherein to determine the set of predistortion functions that linearizes the output AC current, the nonlinear actuator is further configured to identify a parameterized estimate of the set of predistortion functions each corresponding to a nonlinear transfer function from time-aligned sensing of each corresponding output current.

13. The power inverter of claim 12, wherein the time-aligned sensing of each corresponding output current of the nonlinear transfer function is induced by a switching sequence of a half bridge corresponding to at least two power transistors across a DC link voltage. 16 AFSDOCS:301021662.

114. The power inverter of claim 12, wherein each nonlinear transfer function is dependent upon a switching sequence of all of a plurality of half bridges.

15. The power inverter of claim 11, wherein the output AC current is linearized based on the input DC current corresponding to an existing input DC current and a past input DC current.

16. The power inverter of claim 11, wherein to determine the set of predistortion functions that linearizes the output AC current, the nonlinear actuator is configured to select a switching state of at least one half bridge from a set of switching states having a minimal difference between the output AC current and a target output AC current.

17. The power inverter of claim 11, wherein to apply the predistortion function to the input DC current, the switching component is configured to control the switching states of the at least one half bridge such that the output AC current matches a target output AC current.

18. The power inverter of claim 11, wherein the set of predistortion functions corresponds to a nonlinear transfer function associated with a correcting AC voltage associated with a target output AC current.

19. The power inverter of claim 11, wherein the input DC current is received from an electric storage battery of a vehicle, and wherein the output AC current drives a motor of an electric vehicle.

20. A non-transitory computer readable medium including one or more computer readable instructions for power inversion linearization, comprising: identifying a distortion in direct current (DC) to alternating current (AC) a power inversion; determining a set of predistortion functions that linearizes an output AC current; and applying at least one predistortion function from the set of predistortion functions to an input DC current to obtain a linearized output AC current. 17 AFSDOCS:301021662.1

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