Signal readout circuit and signal readout method for reading signal of detector array, and lidar

Abstract

A circuit and method for reading a signal of a detector array, and a LiDAR. The circuit comprises a primary bus (11) and a secondary bus (12). A detector array (2, 200) comprises a plurality of detectors (20) arranged in an array in a first direction and a second direction. The primary bus (11) comprises a plurality of sets (30) of first signal paths. The sets (30) of first signal paths each comprise a plurality of first signal paths (31). The first signal paths (31) are connected to the plurality of detectors (20) and are configured to receive electrical signals output by the plurality of detectors (20). The secondary bus (12) comprises one or more sets (40) of second signal paths. The sets (40) of second signal paths each comprise a plurality of second signal paths (41). The second signal paths (41) are connected to the plurality of sets (30) of first signal paths and are configured to receive electrical signals output by the plurality of sets (30) of first signal paths. By providing a primary bus and a secondary bus, independent reading of electrical signals of a plurality of detectors can be realized, the design complexity of a signal reading circuit for a detector array is reduced, and the integration of the circuit is improved.

Description

Signal readout circuit, signal readout method and laser radar for reading signals from detector array

[0001] This disclosure claims priority to the Chinese patent application entitled “Signal Readout Circuit, Signal Readout Method and LiDAR” filed on December 21, 2023, with application number 202311780190.9. The contents of the priority application are incorporated herein by reference in their entirety. Technical Field

[0002] The present disclosure relates to the field of photoelectric detection, and in particular to a signal readout circuit, a signal readout method, and a laser radar for reading signals from a detector array. Background Art

[0003] LiDAR (LiDAR) is a radar system that uses laser beams to detect target characteristics such as position and velocity. It is an advanced detection method that combines laser technology with photoelectric detection technology. Due to its advantages such as high resolution, good concealment, strong resistance to active interference, excellent low-altitude detection performance, small size, and light weight, LiDAR is widely used in autonomous driving, transportation communications, drones, intelligent robots, resource exploration, and other fields.

[0004] To achieve a larger field of view and higher spatial resolution, the number of detectors included in a LiDAR detector array is increasing. Each time the emitter emits light, it illuminates some or all of the detectors in the array. To achieve more flexible field-of-view scanning, independent gating and data output of individual detectors is an option. Independent gating of individual detectors can be achieved by routing the data from each detector through separate lines. However, as the detector array grows, this approach significantly increases the routing complexity of the signal readout circuitry, occupies a larger layout area, and hinders circuit integration and miniaturization. Summary of the Invention

[0005] To at least overcome the aforementioned technical problems and possible other technical problems, the present disclosure provides a signal readout circuit, a signal readout method, and a laser radar for reading signals from a detector array. These circuits can independently read out electrical signals from multiple detectors, reduce the routing complexity of the detector array's signal readout circuit, improve circuit integration, and achieve circuit miniaturization. According to an exemplary embodiment of the present disclosure, a signal readout circuit for reading signals from a detector array is provided. The detector array includes a plurality of detectors arranged in an array along a first direction and a second direction. The plurality of detectors include detectors. The signal readout circuit includes a primary bus and a secondary bus. The primary bus includes a plurality of first signal path sets. The plurality of first signal path sets include a first signal path set. The first signal path set includes a plurality of first signal paths. The plurality of first signal paths include a first signal path. The first signal path is connected to the plurality of detectors and is configured to receive the exemplary electrical signals output by the plurality of detectors. The secondary bus includes one or more second signal path sets. The one or more second signal path sets include a second signal path set. The second signal path set includes a plurality of second signal paths. The plurality of second signal paths include a second signal path. The second signal path is connected to a plurality of sets of the first signal paths and is configured to receive the electrical signals output by the plurality of sets of the first signal paths.

[0006] Optionally, the detector array has a photosensitive surface, the primary bus is arranged on a side of the detector array away from the photosensitive surface, and the secondary bus is arranged on a side of the primary bus away from the detector.

[0007] Optionally, the signal readout circuit is configured to receive a first control signal and select one or more detectors to output the electrical signal via the first signal path according to the first control signal.

[0008] Optionally, the signal readout circuit is configured to receive a second control signal and select one or more sets of the first signal paths to output the electrical signal via the second signal path according to the second control signal.

[0009] Optionally, the detector array includes multiple groups of detectors, one group of detectors in the multiple groups of detectors includes multiple detectors; the first signal path is respectively connected to multiple detectors in different groups of detectors, and multiple detectors in the same group of detectors are respectively connected to multiple first signal paths.

[0010] Optionally, the signal readout circuit includes multiple groups of first signal path sets, one group of the multiple groups of first signal path sets includes multiple first signal path sets, the second signal path is respectively connected to multiple first signal path sets in different groups of first signal path sets, and multiple first signal path sets in the same group of first signal path sets are respectively connected to multiple second signal paths.

[0011] Optionally, the signal readout circuit includes at least one of the following configurations:

[0012] The number of detectors in a set of detectors is determined based on the size of the irradiated area;

[0013] The number of first signal path sets in a group of first signal path sets is determined according to the size of the irradiation area.

[0014] Optionally, the detector is connected to multiple first signal paths; the signal readout circuit is configured to receive a first control signal and select one or more first signal paths from the multiple first signal paths to output the electrical signal of the detector based on the first control signal.

[0015] Optionally, the number of the plurality of first signal paths connected to the detector is greater than or equal to the number of irradiation areas along the first direction or the second direction.

[0016] Optionally, the multiple first signal paths connected to the detector are respectively connected to different sets of the second signal paths.

[0017] According to an exemplary embodiment of the present disclosure, a signal readout method for reading a signal from a detector array is also provided. The detector array includes a plurality of detectors arranged in an array along a first direction and a second direction. The plurality of detectors include a detector.

[0018] The signal readout method includes the following steps.

[0019] Using a plurality of first signal path sets to read the electrical signals output by the plurality of detectors; wherein the plurality of first signal path sets include a plurality of first signal paths, and the plurality of first signal paths include a first signal path; the first signal path is connected to the plurality of detectors and is configured to receive the electrical signals output by the plurality of detectors; and

[0020] Utilize one or more second signal path sets to read the electrical signals output by the multiple first signal path sets; wherein, the one or more second signal path sets include multiple second signal paths, the multiple second signal paths include a second signal path, the second signal path is connected to the multiple first signal path sets, and is configured to receive the electrical signals output by the multiple first signal path sets.

[0021] Optionally, the signal readout method further includes, in response to receiving a first control signal, selecting one or more of the detectors to output the electrical signal via the first signal path according to the first control signal.

[0022] Optionally, the signal readout method further includes, in response to receiving a second control signal, selecting one or more sets of the first signal paths according to the second control signal to output the electrical signal via the second signal path.

[0023] Optionally, in the above signal readout method, the plurality of detectors in the detector array may include multiple groups of detectors, the first signal pathways are respectively connected to the plurality of detectors in different groups of detectors, and the plurality of detectors in the same group of detectors are respectively connected to multiple first signal pathways.

[0024] Optionally, in the signal readout method, the plurality of first signal pathway sets include a plurality of groups of first signal pathway sets. The second signal pathway is respectively connected to a plurality of first signal pathway sets in different groups of first signal pathway sets. The plurality of first signal pathway sets in the same group of first signal pathway sets are respectively connected to a plurality of second signal pathways.

[0025] Optionally, the above-mentioned signal readout method includes at least one of the following settings: the number of detectors in a group of detectors is determined according to the size of the irradiation area; the number of first signal path sets in a group of first signal path sets is determined according to the size of the irradiation area.

[0026] Optionally, in the above signal readout method, the detector is connected to a plurality of the first signal pathways. The signal readout method further comprises, in response to receiving a first control signal, selecting one or more of the plurality of the first signal pathways according to the first control signal to output the electrical signal of the detector.

[0027] Optionally, in the above signal readout method, the number of the multiple first signal paths connected to the detector is greater than or equal to the number of irradiation areas along the first direction or the second direction.

[0028] Optionally, in the above signal readout method, the multiple first signal pathways connected to the detector are respectively connected to different sets of the second signal pathways.

[0029] According to an exemplary embodiment of the present disclosure, a laser radar is also provided. The laser radar includes: a light emitter array, a detector array, a signal readout circuit, and a signal processing circuit. The light emitter array is configured to emit a detection beam to detect an object. The detector array includes a plurality of detectors arrayed along a first direction and a second direction. The plurality of detectors include a detector. The signal readout circuit is connected to the detector array and is configured to read out the electrical signal output by the detector array. The signal processing circuit is configured to process the signal output by the signal readout circuit. The signal readout circuit includes a primary bus and a secondary bus. The primary bus includes a plurality of first signal path sets. The plurality of first signal path sets include a first signal path set. The first signal path set includes a plurality of first signal paths. The plurality of first signal paths include a first signal path. The first signal path is connected to the plurality of detectors and is configured to receive the electrical signals output by the plurality of detectors. The secondary bus includes one or more second signal path sets, the one or more second signal path sets include a second signal path set, the second signal path set includes multiple second signal paths, the multiple second signal paths include a second signal path, the second signal path is connected to the multiple first signal path sets, and is configured to receive the electrical signals output by the multiple first signal path sets.

[0030] Through the signal readout circuit, signal readout method and laser radar involved in the present disclosure, independent readout of electrical signals of multiple detectors can be achieved, and the design complexity of the signal readout circuit of the detector array can be reduced, thereby improving the circuit integration. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will provide an exemplary introduction to the drawings required for the description of the embodiments. The drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without creative work. The drawings are used to provide a further understanding of the present disclosure and constitute part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. Figure 1 shows a schematic structural framework diagram of an exemplary signal readout circuit consistent with some embodiments of the present disclosure.

[0032] FIG2 illustrates a schematic diagram of an exemplary detector array consistent with some embodiments of the present disclosure.

[0033] FIG3 is a schematic diagram illustrating an exemplary primary bus connection structure and a secondary bus connection structure consistent with some embodiments of the present disclosure.

[0034] FIG. 4 shows a schematic diagram of path selection for an exemplary primary bus consistent with some embodiments of the present disclosure.

[0035] FIG5 shows a schematic diagram of path selection for an exemplary secondary bus consistent with some embodiments of the present disclosure.

[0036] FIG6 is a schematic diagram showing an exemplary connection structure of a primary bus consistent with some embodiments of the present disclosure.

[0037] FIG. 7 is a schematic diagram showing another exemplary primary bus connection structure consistent with some embodiments of the present disclosure.

[0038] FIG8 is a schematic diagram illustrating an exemplary primary bus connection structure and a secondary bus connection structure consistent with some embodiments of the present disclosure.

[0039] FIG9 is a schematic diagram illustrating a circuit connection structure of an exemplary primary bus consistent with some embodiments of the present disclosure.

[0040] FIG. 10 is a schematic diagram illustrating a circuit connection structure of an exemplary secondary bus consistent with some embodiments of the present disclosure.

[0041] FIG. 11 is a schematic diagram illustrating a connection structure between an exemplary secondary bus and a signal processing circuit consistent with some embodiments of the present disclosure.

[0042] FIG. 12 illustrates a schematic diagram of path selection for an exemplary primary bus consistent with some embodiments of the present disclosure.

[0043] FIG. 13 is a schematic diagram illustrating a connection structure of an exemplary primary bus consistent with some embodiments of the present disclosure.

[0044] FIG. 14 illustrates a schematic diagram of an exemplary detector array including multiple illumination regions, consistent with some embodiments of the present disclosure.

[0045] FIG. 15 illustrates a schematic diagram of signal flow for an exemplary primary bus consistent with some embodiments of the present disclosure.

[0046] 16 shows a schematic diagram of control circuitry for an exemplary detector, consistent with some embodiments of the present disclosure.

[0047] FIG17 shows a flow chart of an exemplary signal readout method consistent with some embodiments of the present disclosure. DETAILED DESCRIPTION

[0048] The following describes specific embodiments of the present disclosure. It should be noted that, in the context of describing these embodiments, for the sake of clarity and brevity, this specification does not exhaustively describe all features of the actual embodiments. It should be understood that, during the actual implementation of any embodiment, variations may occur from one embodiment to another in order to achieve specific goals. Furthermore, it should be understood that, while the development effort involved may be complex and lengthy, for those skilled in the art relevant to the present disclosure, modifications to the design, manufacturing, or production based on the technical content disclosed herein are routine technical procedures and should not be construed as constituting a lack of sufficient understanding of the present disclosure. Unless otherwise defined, technical or scientific terms used in the claims and description should have the same meaning as those of ordinary skill in the art to which the present disclosure pertains. The use of "first," "second," and similar terms in the patent application specification and claims of this disclosure does not denote any order, quantity, or importance, but rather serves to distinguish between different components. "A" or "an," and similar terms do not denote a limitation on quantity, but rather denote the presence of at least one. Words such as "include" or "comprising" mean that the elements or objects listed before "include" or "comprising" include the elements or objects listed after "include" or "comprising" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, nor are they limited to direct or indirect connections.

[0049] In the present disclosure, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature includes the first feature being directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0050] In the present disclosure, the terms "or" and "and / or" describe the association relationship between related objects and represent a non-exclusive inclusion. For example, "A and / or B" and "A or B" may include: only "A" exists, only "B" exists, and "A" and "B" exist at the same time, where "A" and "B" can be singular or plural. For another example, "A, B and / or C" and "A, B or C" may include: only "A" exists, only "B" exists, only "C" exists, "A" and "B" exist at the same time, "A" and "C" exist at the same time, "B" and "C" exist at the same time, and "A", "B" and "C" exist at the same time, where "A", "B" and "C" can be singular or plural. In addition, the symbol " / " in the present disclosure indicates that there is an "or" relationship between the related objects before and after the symbol. In the present disclosure, the term "at least one A or B" has the same meaning as the above-mentioned "A or B". The term "at least one A, B or C" has the same meaning as the above-mentioned "A, B or C".

[0051] In the present disclosure, unless otherwise specified, all embodiments mentioned herein can be combined with each other to form a new technical solution. In the present disclosure, unless otherwise specified, all technical features and preferred features mentioned herein can be combined with each other to form a new technical solution.

[0052] The embodiments of the present disclosure are described below in conjunction with the accompanying drawings. It should be understood that the embodiments described herein are only used to illustrate and explain the present disclosure, and are not used to limit the present disclosure.

[0053] LiDAR (Light Detection and Ranging) is a radar system that uses a laser beam to detect the position, speed, and other characteristic quantities of an object. LiDAR is also called laser radar or LADAR. The working principle of LiDAR is to transmit a detection signal (such as a laser beam) to an object, compare the received signal reflected from the object (such as an echo) with the detection signal, and obtain relevant information about the object after appropriate processing. For example, parameters such as the object's distance, direction, height, speed, attitude, and even shape. LiDAR can include a transmitter and a receiver. The transmitter can collimate and shape the detection beam emitted by the transmitter through a transmitting optical system and then project it into the detection field of view. The receiver can receive the echo reflected by the detection beam from the object through a receiving optical system and a receiver. The transmitter can be deployed on a transmitting circuit board or a transmitting chip. The detector can be deployed on a receiving circuit board or a receiving chip. In the present disclosure, LiDAR can be replaced by other active detection devices that measure the position, speed, and other information of an object by transmitting a signal to an object and receiving a signal reflected from the object.

[0054] In response to the problems described in the background technology section, the present disclosure proposes a signal readout circuit for reading signals from a detector array. The signal readout circuit may include: a primary bus and a secondary bus. The primary bus may include multiple first signal path sets. The first signal path set may include multiple first signal paths. The first signal path may be connected to multiple detectors for receiving electrical signals output by multiple detectors. The secondary bus may include one or more second signal path sets. The second signal path set may include multiple second signal paths. The second signal path may be connected to multiple first signal path sets. The second signal path may receive electrical signals output by multiple first signal path sets.

[0055] According to the signal readout circuit disclosed herein, by setting a primary bus and a secondary bus, independent readout of electrical signals of multiple detectors can be achieved, and the design complexity of the signal readout circuit of the detector array can be reduced, thereby improving the circuit integration.

[0056] See Figure 1, which shows a schematic diagram of the structural framework of an exemplary signal readout circuit consistent with some embodiments of the present disclosure. As shown in Figure 1, the receiving end of the lidar includes a signal readout circuit 1, a detector array 2, and a signal processing circuit 3. The detector array 2, the signal readout circuit 1, and the signal processing circuit 3 can be electrically connected to each other to enable signal transmission between them.

[0057] In some embodiments, the detector array, signal readout circuit, and signal processing circuit can be arranged flat or stacked. For example, the detector array has a photosensitive surface. The signal readout circuit and signal processing circuit can be arranged on the side of the detector array parallel to the photosensitive surface. For another example, the detector array, signal readout circuit, and signal processing circuit can be stacked in sequence perpendicular to the photosensitive surface. This stacked arrangement can reduce wiring area and ease packaging difficulty. For example, referring to FIG1 , the signal readout circuit 1 is arranged on the side of the detector array 2 facing away from its photosensitive surface. The signal processing circuit 3 is arranged on the side of the signal readout circuit 1 facing away from the detector array 2. In some embodiments, the signal processing circuit can also be arranged on the same layer as the signal readout circuit, for example, both the signal readout circuit and the signal processing circuit are arranged on the side of the detector array 2 facing away from its photosensitive surface. In some embodiments, the detector array can be arranged on a detector chip or a detector circuit board. The detector array can include multiple detectors arranged in an array along a first direction and a second direction. The first direction and the second direction can be orthogonal directions (for example, referring to FIG2 , the x direction and the y direction in a rectangular coordinate system, respectively). Alternatively, the first direction and the second direction can be non-orthogonal directions. Multiple detectors can be arranged in a two-dimensional array. The arrangement of multiple detectors can include a matrix array, a hexagonal array, a triangular array, or other arrangements. Different detectors in the detector array can correspond to different spatial fields of view. A two-dimensional detector array can cover a two-dimensional spatial field of view. The detector can receive the echo beam and convert the echo beam into an electrical signal. The echo beam can be generated when the detection beam emitted by the transmitting end of the lidar is reflected from an object.

[0058] In some embodiments, the detector may include a light sensor. The light sensor may include a light detection circuit, a single photon avalanche diode (SPAD), an avalanche photodiode (APD), a silicon photomultiplier (SiPM) or a similar sensing element. In some embodiments, the detector may include one or more light sensors. For example, a detector may include multiple (e.g., several to hundreds) light sensors. Multiple light sensors in a detector may be enabled at the same time. Multiple light sensors in a detector may share an output interface. For example, the electrical signals (e.g., digital signals or analog signals) generated by multiple light sensors may be accumulated and outputted to a signal readout circuit by the output interface.

[0059] FIG2 illustrates a schematic diagram of an exemplary detector array consistent with some embodiments of the present disclosure. As shown in FIG2 , detector array 200 includes a plurality of detectors 20. The plurality of detectors 20 are arranged in a two-dimensional array along a first direction (e.g., the x-direction in FIG2 ) and a second direction (e.g., the y-direction in FIG2 ). FIG2 illustrates an M*N two-dimensional array comprising M rows and N columns of detectors 20.

[0060] The signal readout circuit can be electrically connected to the detector array and the signal processing circuit. The signal readout circuit can read the electrical signals from the detector array and transmit the read electrical signals to the signal processing circuit. The signal processing circuit may include, for example, a processor and a memory.

[0061] The signal readout circuit may include a primary bus and a secondary bus. The primary bus may be electrically connected to the detector array to receive the electrical signal output by the detector. The secondary bus may be electrically connected to the primary bus to receive the electrical signal transmitted by the primary bus. The secondary bus may be electrically connected to the signal processing circuit to transmit the electrical signal to the signal processing circuit. In some embodiments, the secondary bus and the primary bus may be stacked. For example, referring to Figure 1, the secondary bus 12 is arranged on the side of the primary bus 11 away from the detector array 2. In some embodiments, the secondary bus and the primary bus may be arranged in a tiled manner. For example, on a plane parallel to the detector array, the secondary bus may be arranged on one side or both sides of the primary bus.

[0062] In some embodiments, a primary bus may include multiple first signal path sets. The multiple first signal path sets include a first signal path set. The first signal path set may be used to transmit electrical signals from a row, column, or group of detectors in a detector array. The number of first signal path sets may correspond to the number of rows, columns, or groups of detectors in the detector array. In some embodiments, different columns, rows, or groups in the detector array may correspond to the same number of first signal path sets. For example, the number of first signal path sets may be an integer multiple of the number of rows, columns, or groups of detectors in the detector array, or the number of first signal path sets may be a fraction of the number of rows, columns, or groups of detectors in the detector array. For example, if the detectors in the detector array are arranged in M ​​rows and N columns, the number of first signal path sets may be 1 / 2M, 1 / 3M, 1 / 4M, M, 2M, 3M, 4M, etc., or 1 / 2N, 1 / 3N, 1 / 4N, N, 2N, 3N, 4N, etc. In some embodiments, different columns, rows, or groups in the detector array may correspond to different numbers of first signal path sets. For example, the number of first signal path sets can be a non-integer multiple of the number of rows, columns, or groups of detectors in the detector array, or the number of rows, columns, or groups of detectors in the detector array can be a non-integer multiple of the number of first signal path sets. The following description uses the example of a first signal path set being used to transmit electrical signals from one or more columns of detectors in a detector array.

[0063] In some embodiments, the first signal path set may include multiple first signal paths. For example, each first signal path set in the multiple first signal path sets may include multiple first signal paths. For another example, some first signal path sets in the multiple first signal path sets may include multiple first signal paths, and some first signal path sets may also include one first signal path. In some embodiments, the number of first signal paths included in different first signal path sets may be the same or different.

[0064] In some embodiments, a first signal path can be connected to multiple detectors. The first signal path can be directly connected to the detectors, or the first signal path can be indirectly connected to the detectors. For example, the first signal path can be connected to the detectors through devices such as interface circuits, logic elements, and resistors. For example, among the multiple first signal paths in the first signal path set, some can be connected to multiple detectors, while others can be connected to a single detector. As another example, each first signal path in the first signal path set can be connected to multiple detectors. The number of detectors connected to different first signal paths can be the same or different. The first signal path can receive electrical signals output by multiple detectors. The electrical signals generated by the detectors can be transmitted via the first signal path. The electrical signals generated by multiple detectors connected to the same first signal path can be transmitted via the first signal path in a time-sharing manner. For example, if the first, fourth, and seventh detectors are connected to the first first signal path, the electrical signal generated by the first detector can be transmitted via the first first signal path at a first time, the electrical signal generated by the fourth detector can be transmitted via the first first signal path at a second time, and the electrical signal generated by the seventh detector can be transmitted via the first first signal path at a third time. The electrical signals generated by multiple detectors connected to different first signal pathways can be transmitted in parallel via these first signal pathways. For example, a first detector is connected to a first first signal pathway, and a second detector is connected to a second first signal pathway. The electrical signal generated by the first detector can be transmitted via the first first signal pathway at a first time, and the electrical signal generated by the second detector can also be transmitted via the second first signal pathway at a first time. By setting up multiple first signal pathways and connecting the first signal pathways to multiple detectors, it is possible to reduce the number of first signal pathways while ensuring that the electrical signal generated by each detector can be transmitted via the first signal pathway, and it is possible to support the electrical signals generated by multiple detectors to be output in parallel via the first signal pathways.

[0065] In some embodiments, the number of first signal pathways included in the first signal pathway set is related to the number of detectors in one or more columns of detectors corresponding to the first signal pathway set, and the number of detectors connected to one first signal pathway. For example, the number of first signal pathways and the number of detectors connected to the first signal pathways are such that at least each detector has a first signal pathway connected thereto, so that the electrical signal of each detector can be read out. For example, the first signal pathway set corresponds to a column of detectors including 8 detectors, one first signal pathway is connected to 4 detectors, and the number of first signal pathways is at least 2.

[0066] In some embodiments, the number of first signal pathways in the first signal pathway set can be determined based on the number of detectors to be simultaneously enabled. For example, multiple detectors that need to be simultaneously enabled can be connected to different first signal pathways, while multiple detectors that do not need to be simultaneously enabled can be connected to the same first signal pathway or different first signal pathways. For example, the first signal pathway set corresponds to a column of eight detectors, two of which are simultaneously enabled. For example, at a first time, the first and second detectors are simultaneously enabled. At a second time, the third and fourth detectors are simultaneously enabled. At a third time, the fifth and sixth detectors are simultaneously enabled. At a fourth time, the seventh and eighth detectors are simultaneously enabled. In this case, the first signal pathway set can include at least two first signal pathways. For example, the first signal pathway set can include two first signal pathways. Each first signal pathway can be connected to four detectors, receiving electrical signals output by these four detectors. For example, the first first signal pathway can be connected to the first, third, fifth, and seventh detectors. The second first signal pathway can be connected to the second, fourth, sixth, and eighth detectors. For another example, the first signal path set may include three first signal paths, wherein the first first signal path may be connected to the first detector, the fourth detector, and the seventh detector, the second first signal path may be connected to the second detector, the fifth detector, and the eighth detector, and the third first signal path may be connected to the third detector and the sixth detector. The above connection methods can achieve simultaneous gating of the first and second detectors, the third and fourth detectors, the fifth and sixth detectors, and the seventh and eighth detectors.

[0067] In some embodiments, the secondary bus may include one or more second signal path sets. The number of second signal path sets may be determined based on the performance and pattern design requirements of the laser radar. For example, the number of second signal path sets may be determined based on the scanning pattern of the laser radar. For another example, the number of second signal path sets may be determined based on one or more performance requirements of the laser radar, such as cost, wiring space, and computing power. In some embodiments, the number of second signal path sets may be determined based on the size or number of illumination areas of parallel strobing.

[0068] In some embodiments, the second signal path set may include multiple second signal paths. When the number of second signal path sets is one, the second signal path set may include multiple second signal paths. When the number of second signal path sets is multiple, some second signal path sets may also include one second signal path. For example, each second signal path set in the multiple second signal path sets may include multiple second signal paths. For another example, some second signal path sets in the multiple second signal path sets may include multiple second signal paths. In some embodiments, the number of second signal paths included in different second signal path sets may be the same or different. For example, the first second signal path set may include 4 second signal paths. The second second signal path set may include 4 second signal paths. The third second signal path set may include 1 second signal path.

[0069] In some embodiments, the second signal path can be connected to multiple sets of first signal paths. For example, the second signal path can be directly connected to the set of first signal paths. In another example, the second signal path can be indirectly connected to the set of first signal paths. For example, the second signal path can be connected to multiple sets of first signal paths via devices such as interface circuits, logic elements, and resistors. The second signal path can receive electrical signals output by multiple sets of first signal paths.

[0070] In some embodiments, the second signal path can receive the electrical signal output by the first signal path set and transmit the electrical signal to the signal processing circuit. For example, among the multiple second signal paths in the second signal path set, some of the second signal paths can be connected to multiple first signal path sets, and some of the second signal paths can also be connected to one first signal path set. For another example, each second signal path in the second signal path set can be connected to multiple first signal path sets. For example, the number of first signal path sets connected to different second signal paths can be the same or different. The electrical signals transmitted by the first signal path set connected to the same second signal path can be transmitted via the second signal path in a time-sharing manner. For example, the first signal path set and the third signal path set are both connected to the first second signal path. The electrical signal transmitted in the first first signal path set can be transmitted via the second signal path at a first time, and the electrical signal transmitted in the third first signal path set can be transmitted via the second signal path at a second time. The electrical signals transmitted by multiple first signal path sets connected to different second signal paths can be transmitted in parallel via these second signal paths. For example, the first first signal path set is connected to the first second signal path, and the second first signal path set is connected to the second second signal path. The electrical signal transmitted by the first first signal path set can be transmitted through the first second signal path at the first time, and the electrical signal transmitted by the second first signal path set can also be transmitted through the second second signal path at the first time.

[0071] By setting the second signal path set to include multiple second signal paths, and the second signal path is connected to multiple first signal path sets, it is possible to reduce the number of second signal paths while ensuring that the electrical signals transmitted by each first signal path set can be transmitted via the second signal path, and it can support that the electrical signals transmitted by multiple first signal path sets can also be output in parallel via the second signal path.

[0072] Figure 3 shows a schematic diagram of the connection structure of an exemplary primary bus and a secondary bus consistent with some embodiments of the present disclosure. Referring to Figure 3, the primary bus 11 includes a plurality of first signal path sets 30. Taking the example of one column of detectors corresponding to one first signal path set 30, the number of first signal path sets 30 corresponds to the number of columns of detectors 20 in the detector array. The first signal path set 30 includes a plurality of first signal paths 31. The first signal path 31 is connected to the plurality of detectors 20 and can receive electrical signals output by the plurality of detectors 20.

[0073] 3 , the secondary bus 12 may include one or more second signal path sets 40. The second signal path set 40 includes multiple second signal paths 41. The second signal paths 41 are connected to the multiple first signal path sets 30 and may receive electrical signals output by the multiple first signal path sets 30.

[0074] In some embodiments, the signal readout circuit can receive a first control signal and select one or more detectors based on the first control signal, with the selected detectors outputting electrical signals via a first signal path. The first control signal can be issued by a controller and transmitted to the signal readout circuit. The controller may include a control circuit, a processor, etc. The processor can be implemented, for example, by a processing chip such as a central processing unit (CPU), a microprocessor, or a field programmable gate array (FPGA), or by an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present disclosure. For example, the controller can send the first control signal according to a preset timing. For another example, the controller can send the first control signal upon receiving an instruction. For example, the controller can send the first control signal upon receiving information about the time when the light emitter emits a light beam, or a period of time after receiving information about the time when the light emitter emits a light beam. For example, the controller can send the first control signal upon receiving a detection instruction. The first control signal can include a digital signal or an analog signal (e.g., current, voltage, etc.). The first control signal can be received by hardware in the signal readout circuit, which can be, for example, electronic components such as switches, logic gates, and selectors.

[0075] In some embodiments, the signal readout circuit can receive a first control signal to perform an action. For example, the hardware in the signal readout circuit can respond to the first control signal to perform an action of disconnecting or connecting the first signal path. For another example, the hardware in the signal readout circuit can respond to the first control signal to perform an action of transmitting or not transmitting the electrical signal generated by the detector (hereinafter also referred to as the detector signal) through the first signal path. For another example, the hardware in the signal readout circuit can respond to the first control signal to perform an action of transmitting or not transmitting the electrical signal generated by the detector through which one or more first signal paths. In some embodiments, the detector can be connected to a first signal path, and the signal readout circuit can, based on the received first control signal, cause the first signal path to transmit the electrical signal generated by the detector, or cause the first signal path to not transmit the electrical signal generated by the detector. In some embodiments, the detector can be connected to multiple first signal paths, and the signal readout circuit can, based on the received first control signal, cause some or all of the multiple first signal paths to transmit the electrical signal generated by the detector, or cause some or all of the multiple first signal paths to not transmit the electrical signal generated by the detector. In some embodiments, the first signal path is connected to multiple detectors, and the signal readout circuit may include multiple hardware components that respectively control the connection or disconnection between the multiple detectors and the first signal path, or respectively control whether the first signal path transmits the electrical signals generated by the multiple detectors. In some embodiments, the aforementioned hardware components may be connected to the detectors, and the number of hardware components may correspond to the number of detectors.

[0076] FIG4 shows a schematic diagram of path selection for an exemplary primary bus consistent with some embodiments of the present disclosure. As shown in FIG4 , the signal readout circuit includes a first selector 401, the detector 20 is connected to the first selector 401, and the first selector 401 is connected to the first signal path 31, or in other words, the first selector 401 is arranged on the first signal path 31. The electrical signal generated by the detector 20 can be output to the first selector 401. In some embodiments, the first selector can be connected to one or more detectors. The control logic in the first selector 401 can be shown as the logic circuit on the right side of FIG4 . The first selector 401 can receive a first control signal 11C. The first selector 401 can enable the electrical signal 20_out generated by the detector 20 to be output via the first signal path 31 according to the first control signal 11C. The first selector 401 can also prevent the electrical signal 20_out generated by the detector 20 from being output via the first signal path 31 according to the first control signal 11C.

[0077] In some embodiments, the signal readout circuit can receive a second control signal and, based on the second control signal, select one or more of the first signal pathways to output an electrical signal via a second signal pathway. The second control signal can be issued by a controller and transmitted to the signal readout circuit. For example, the controller can send the second control signal according to a preset timing. In another example, the controller can send the second control signal upon receiving an instruction. For example, the controller can send the second control signal upon receiving information about the time when the emitter emitted a light beam, or a period of time after receiving information about the time when the emitter emitted a light beam. For example, the controller can send the second control signal upon receiving a detection instruction. The second control signal can include a digital signal or an analog signal (e.g., a current, a voltage, etc.). The second control signal can be received by hardware in the signal readout circuit, such as electronic components such as switches, logic gates, and selectors. The signal readout circuit can receive the second control signal to select the second signal pathway. For example, the hardware in the signal readout circuit can, in response to the second control signal, execute an action to disconnect or connect the second signal pathway. In another example, the hardware in the signal readout circuit can, in response to the second control signal, execute an action to transmit or not transmit the electrical signal output by the first signal pathway. For another example, the hardware in the signal readout circuit can, in response to a second control signal, execute an action to determine which second signal path or paths the electrical signal output by the first signal path set is transmitted through. In some embodiments, the first signal path set can be connected to a second signal path, and the signal readout circuit can, based on the received second control signal, cause the second signal path to transmit the electrical signal output by the first signal path set, or cause the second signal path to not transmit the electrical signal output by the first signal path set. In some embodiments, the first signal path set can be connected to multiple second signal paths, and the signal readout circuit can, based on the received second control signal, cause some or all of the multiple second signal paths to transmit the electrical signal output by the first signal path set, or cause some or all of the multiple second signal paths to not transmit the electrical signal output by the first signal path set. In some embodiments, the second signal path is connected to multiple first signal path sets, and the signal readout circuit can include multiple hardware components to respectively control the conduction or disconnection between the multiple first signal path sets and the second signal path, or to respectively control whether the second signal path transmits the electrical signal transmitted by the multiple first signal path sets.

[0078] Figure 5 shows a schematic diagram of path selection for an exemplary secondary bus consistent with some embodiments of the present disclosure. As shown in Figure 5, the signal readout circuit includes a second selector 501. The first signal path set 30 is connected to the second selector 501. The second selector 501 is connected to the second signal path 41, or it can be said that the second selector 501 is arranged on the second signal path 41. The electrical signal transmitted by the first signal path set 30 can be output to the second selector 501. In some embodiments, the second selector can be connected to one or more first signal path sets. The control logic in the second selector 501 can be shown as the logic circuit on the right side of Figure 5. The second selector 501 can receive a second control signal 12C. The second selector 501 can enable the electrical signal 30_out transmitted by the first signal path set 30 to be output via the second signal path 41 according to the second control signal 12C (for example, the first signal path set 30 is selected). The second selector 501 can also prevent the electrical signal 30_out transmitted by the first signal path set 30 from being output via the second signal path 41 according to the second control signal 12C.

[0079] In some embodiments, whether to send a second control signal to a second selector can be determined based on whether the first signal path set needs to be enabled, wherein the second selector is a second selector on a second signal path connected to the first signal path set. For example, in the case where a column of detectors corresponds to a first signal path set as shown in FIG3 , one or more first signal path sets corresponding to the column or columns of detectors can be determined based on the column or columns of detectors that need to be enabled, and then a second control signal can be sent to one or more second selectors connected to the one or more first signal path sets. The one or more second selectors can, in response to receiving the second control signal, enable the electrical signals transmitted by the one or more first signal path sets to be output via the corresponding second signal paths.

[0080] In some embodiments, a second signal path set includes multiple second signal paths connected to different first signal path sets. The second selector can realize the gating of multiple first signal path sets according to the second control signal. Taking a first signal path set corresponding to a column of detectors as an example, a second signal path set can correspond to multiple columns of detectors. The first selector can realize the gating of multiple detectors in a column of detectors according to the first control signal. The second selector can realize the gating of multiple columns of detectors according to the second control signal. The combination of the first selector and the second selector can realize the gating of a two-dimensional irradiation area.

[0081] In some embodiments, a lidar may have an overall field of view. After the lidar design is complete, the scope of the overall field of view can be determined. For example, after determining the number of lasers, installation location, scanning method, and other parameters of the lidar, the overall field of view of the lidar can be determined. For example, a lidar's horizontal field of view may be 120°, and its vertical field of view may be 30°. This overall field of view can be divided into multiple sub-fields of view. The lidar can scan these sub-fields independently. For example, the scanning of multiple sub-fields of view can be performed in a time-sharing manner, such as scanning the first sub-field of view at a first time and the second sub-field of view at a second time. For example, some of the multiple sub-fields of view can be scanned in parallel, such as scanning the first sub-field of view and the second sub-field of view at a first time. For example, the multiple sub-fields of view can be grouped, with parallel detection of the same group of sub-fields of view and time-sharing detection of different groups of sub-fields of view. For example, scanning the first and second sub-fields of view at a first time, and then scanning the third and fourth sub-fields at a second time.

[0082] In some embodiments, a sub-field of view can correspond to an illumination area on the detector array, and different sub-fields of view can correspond to different illumination areas of the detector array. An illumination area of ​​a detector array can cover a certain range of the detector array. For example, an illumination area can cover a 2*3 detector array, and the size of this illumination area can be considered to be the size of 6 detector arrays. The sizes of different illumination areas of the detector array can be the same or different. The total illumination area generally covers at least the entire field of view.

[0083] For an object within a sub-field of view, the echo reflected by the object can be incident on a detector within a specific illumination area. The lidar can select the detectors within this illumination area. For example, the lidar can provide appropriate bias voltages to the detectors within the illumination area, enabling them to respond to light signals. It can also control the signal readout circuits connected to these detectors so that the electrical signals generated by these detectors in response to the light signals can be transmitted to the signal processing circuit via the signal readout circuit. Based on this electrical signal, the signal processing circuit can obtain information about the objects within the sub-field of view, enabling detection within that sub-field of view. During lidar operation, multiple sub-fields of view can be scanned independently. One sub-field of view can be detected at a time, multiple sub-fields can be detected simultaneously, or multiple sub-fields can be detected in groups and time-sharing. The lidar can select only the detectors within one illumination area at a time (hereinafter referred to as the selected illumination area), or it can select the detectors within multiple illumination areas at the same time.

[0084] By scanning these sub-fields of view, the lidar can detect the entire field of view. For example, the lidar can scan all sub-fields of view sequentially. During this scanning process, the detectors in the illuminated area of ​​the detector array are sequentially activated until all detectors in the illuminated area have detected the return beam. This can be considered a complete detection of the lidar's entire field of view. The lidar can output a frame of point cloud based on the electrical signals output by the detectors. In some embodiments, a frame of point cloud can be generated for the lidar's entire field of view or for a portion of the overall field of view. For example, when detecting a region of interest, one or more sub-fields of view corresponding to the region of interest can be scanned to generate a frame of point cloud. The region of interest can be a fixed field of view, such as a forward field of view with a horizontal field of view range of -60° to 60° and a vertical field of view range of -5° to 5°, or a side field of view with a horizontal field of view range of 20° to 60° and a vertical field of view range of -5° to 10°. The region of interest may also be a non-fixed field of view area, for example, a dynamic region of interest that may be determined based on detected objects.

[0085] In some embodiments, an irradiation area can cover a certain range of a detector array. For example, an irradiation area can cover m*n detectors, where m and n are integers greater than or equal to 1. The size of the irradiation area can be considered to be the size of an m*n detector array. During the operation of the laser radar to scan the entire field of view, the detectors covered by an irradiation area will be simultaneously selected to receive the echo beam and generate a response signal. When reading the electrical signal output by the detector array, an irradiation area can be regarded as a minimum unit. The multiple detectors covered by an irradiation area can have independent signal paths. In this way, the electrical signals of the multiple detectors covered by an irradiation area can be output independently of each other, as well as simultaneously. Multiple irradiation areas that are not selected simultaneously can share a signal path. In this way, the effect of reducing the number of signal paths can be achieved. For example, the first irradiation area is selected at the first time, and the second irradiation area is selected at the second time. The first irradiation area and the second irradiation area can share the same signal path. The signal output through the shared signal path at the first time can be determined as the electrical signal generated by the detector in the first irradiation area, and the signal output through the shared signal path at the second time can be determined as the electrical signal generated by the detector in the second irradiation area without causing confusion.

[0086] In some embodiments, the detector array includes multiple groups of detectors, each of which may include multiple detectors. In some embodiments, a group of detectors may include multiple adjacent detectors or multiple non-adjacent detectors. In some embodiments, for a two-dimensional detector array arranged along a first direction and a second direction, the multiple detectors covered by an illumination area along the first and second directions can be considered the minimum group selected in that direction. For example, when an illumination area covers m rows and n columns of detectors, a column of detectors can be divided into groups by m, such as detectors 0 to m-1 forming a first group, and detectors m to 2m-1 forming a second group. For example, when an illumination area covers m rows and n columns of detectors, a column of the detector array can be divided into groups by a number greater than m, such as detectors 0 to m+1 forming a first group, and detectors m+2 to 2m+3 forming a second group. For example, each of the multiple groups of detectors can include multiple detectors. For another example, some of the multiple groups of detectors can include multiple detectors, while others can include a single detector. In some embodiments, the number of detectors included in different groups of detectors can be the same or different. It is understandable that the division of detector groups may be a virtual division, and it is not required to separate different groups in terms of hardware structure and software processing.

[0087] In some embodiments, the first signal path is respectively connected to multiple detectors in different groups of detectors. Multiple detectors in the same group of detectors are respectively connected to multiple first signal paths. As an example, when an irradiation area can cover m rows and n columns of detectors, a group of detectors can include m detectors in a column of detectors, so that different irradiation areas can correspond to different groups of detectors. In this case, the m detectors in the same group are respectively connected to m first signal paths, and each of the m first signal paths can be connected to multiple detectors in multiple different groups of detectors. In this way, multiple detectors in the same irradiation area can be connected to different first signal paths, and the detectors in the same irradiation area can output electrical signals in parallel via these first signal paths. Moreover, multiple detectors in different irradiation areas can be connected to the same first signal path, and multiple detectors in different irradiation areas can output electrical signals via the same first signal path at different times. In some embodiments of the present disclosure, by connecting the first signal path to multiple detectors in different groups of detectors, and connecting multiple detectors in the same group of detectors to multiple first signal paths, a gating unit based on the irradiation area can be implemented, so that multiple detectors within the irradiation area can be simultaneously strobed to output electrical signals without causing data confusion. At the same time, the number of first signal paths can be reduced, the design complexity of the signal readout circuit can be reduced, and the demand for narrow wiring space of the integrated chip can be better adapted. In addition, when the detectors in a column are divided into groups of m, a scanning method for the irradiation area with a number of rows of detectors less than m can also be supported. For example, when a group of detectors includes 8 detectors, the laser radar can also support a scanning method for the irradiation area with a size of p rows * q columns (where p≤8, p and q are positive integers).

[0088] The following describes an example of the connection structure of a primary bus with reference to FIG6 and FIG7 .

[0089] FIG6 shows a schematic diagram of an exemplary primary bus connection structure consistent with some embodiments of the present disclosure. As shown in FIG6 , in this example, for multiple detectors 20 in the same column (e.g., column i), they are grouped vertically with m detectors 20 each. For ease of explanation, the detectors 20 within a group are numbered 1 to m in FIG6 . For the M-row*N-column detector array shown in FIG2 , i∈[0, N-1). It will be understood that the numbering of the detectors is merely an example, and in actual applications, it is not necessarily required to number the detectors. The numbering here is merely for ease of explanation and does not limit the scope of the present disclosure.

[0090] In some embodiments, detectors at the same position in different groups of detectors can be set to the same number, and multiple detectors with the same number in different groups can also be considered to have the same position in these different groups. Detectors with the same number in each group of detectors can be connected to the same first signal path. In other words, detectors at the same position in different groups of detectors can be connected to the same first signal path. Detectors with different numbers in the same group of detectors can be connected to different first signal paths. Multiple groups of detectors can be arranged sequentially along the first direction and / or the second direction, for example, the first group of detectors, the second group of detectors, and the third group of detectors shown in Figure 6 are arranged sequentially along the second direction. In some embodiments, each group of detectors can also be a small detector array of one column, one row, or m rows * n columns.

[0091] Referring to Figure 6, taking a group of detectors including m rows and 1 column as an example, for the detector 20 in the i-th column, the detector numbers of the same position in different groups can be the same. For example, the first detector in the k-th group and the k+1-th group from top to bottom is numbered 1, the second detector is numbered 2, ..., the j-th detector is numbered j, ..., and the m-th detector is numbered m. The detector 20 numbered 1 in the k-th group and the detector 20 numbered 1 in the k+1-th group are both connected to the first signal path 31[i][1], the detector 20 numbered 2 in the k-th group and the detector 20 numbered 2 in the k+1-th group are both connected to the first signal path 31[i][2], ..., the detector 20 numbered j in the k-th group and the detector 20 numbered j in the k+1-th group are both connected to the first signal path 31[i][j], ..., the detector 20 numbered m in the k-th group and the detector 20 numbered m in the k+1-th group are both connected to the first signal path 31[i][m]. The same group of detectors, such as multiple detectors 20 in the kth group and the k+1th group, can be connected to multiple first signal paths 31[i][1], 31[i][2], ... 31[i][j], ... 31[i][m], respectively. In this way, multiple detectors in the same group of detectors can output electrical signals in parallel via multiple first signal paths. For the detectors 20 in the i-th column, the first signal path set 30 includes first signal paths 31[i][1], 31[i][2], ... 31[i][j], ... 31[i][m]. Similarly, detectors in different columns can correspond to different first signal path sets 30, and multiple first signal path sets 30 can be obtained.

[0092] It should be noted that the grouping method of the detectors in the above-mentioned primary bus is only an example, and the present disclosure is not limited to this grouping method. As long as the first signal path is respectively connected to multiple detectors in different groups of detectors, and multiple detectors in the same group of detectors are respectively connected to multiple first signal paths, any other grouping method can also be used. In some embodiments, for the detectors in the same column, only a part of the detectors can be grouped, without grouping all the detectors in the same column. In some embodiments, the detectors in the same row can also be grouped. In some embodiments, the detectors in each column or each row in the detector array can be grouped (for example, the detectors in all columns or rows can be grouped), or only the detectors in some columns or rows can be grouped. In some embodiments, it is not limited to grouping one column or one row, but a group of detectors containing multiple detectors in the row and column directions can be regarded as a group.

[0093] In some embodiments, the number of detectors in each group of detectors may be determined according to the size of the irradiation area.

[0094] In some embodiments, the number of first signal path sets in each group of first signal path sets can be determined according to the size of the irradiation area.

[0095] For example, FIG7 shows a schematic diagram of an exemplary connection structure of another primary bus consistent with some embodiments of the present disclosure. As shown in FIG7 , a group of detectors including multiple (e.g., 2 rows * 2 columns) detectors in the row and column directions is regarded as a group. The corresponding detectors in different groups are connected to the first signal path 31. In FIG7 , the detectors 20A in the upper left corner of different groups are all connected to the first signal path 31A, the detectors 20B in the lower left corner are all connected to the first signal path 31B, the detectors 20C in the upper right corner are all connected to the first signal path 31C, and the detectors 20D in the lower right corner are all connected to the first signal path 31D. The four detectors in the same group are respectively connected to the four first signal paths 31A, 31B, 31C, and 31D. The first signal path set 30 corresponding to the two columns of detectors includes four first signal paths 31A, 31B, 31C, and 31D. The remaining detectors in the detector array can also be connected to the first signal path in the manner shown in the example, and multiple first signal path sets constitute a primary bus connected to the detector array.

[0096] The connection structure of the primary bus in FIG. 6 and FIG. 7 is merely an example, and other connection structures of the primary bus that meet the concept of the present disclosure are also within the scope of the present disclosure.

[0097] In some embodiments, the signal readout circuit includes multiple groups of first signal path sets, and one group of the multiple groups of first signal path sets includes multiple first signal path sets. In some embodiments, a group of first signal path sets may include multiple adjacent first signal path sets, or may include multiple non-adjacent first signal path sets. The second signal path is respectively connected to multiple first signal path sets in different groups of first signal path sets, and multiple first signal path sets in the same group of first signal path sets are respectively connected to multiple second signal paths. As an example, when an irradiation area can cover m rows and n columns of detectors, a group of first signal path sets may include n first signal path sets, and different irradiation areas may correspond to different groups of first signal path sets. In this case, the n first signal path sets in the same group are respectively connected to n second signal paths, and each of the n second signal paths can be connected to multiple first signal path sets in multiple different groups of first signal path sets. In this way, multiple first signal path sets corresponding to multiple columns of detectors in the same irradiation area can be connected to different second signal paths, and multiple first signal path sets corresponding to the same irradiation area can output electrical signals in parallel via these second signal paths. Furthermore, multiple first signal path sets corresponding to different irradiation areas can be connected to the same second signal path, and multiple first signal path sets corresponding to different irradiation areas can output electrical signals via the same second signal path at different times.

[0098] In some embodiments of the present disclosure, by connecting the second signal path to multiple first signal path sets in different groups of first signal path sets, and connecting multiple first signal path sets in the same group of first signal path sets to multiple second signal paths, a gating unit based on the irradiation area can be implemented, so that multiple detectors within the range of the irradiation area can be simultaneously gated to output electrical signals without causing data confusion. At the same time, the number of second signal paths can also be reduced, reducing the design complexity and wiring difficulty of the signal readout circuit. In addition, when n first signal path sets are divided into a group, a scanning method for an irradiation area in which the number of columns of the covered detector is less than n can also be supported. For example, when a group of first signal path sets includes 6 first signal path sets, the laser radar can also support a scanning method for an irradiation area with a size of p rows * q columns (where q≤6, p and q are positive integers).

[0099] In some embodiments, the signal readout circuit can realize scanning modes of two-dimensional illumination areas and one-dimensional illumination areas, and can also simultaneously support scanning modes of illumination areas of different sizes, so that the laser radar can achieve more flexible detection methods to adapt to different application scenarios and customer customization needs.

[0100] An example of an exemplary primary bus connection structure and a secondary bus connection structure consistent with some embodiments of the present disclosure is shown in Figure 8. This is illustrated by taking the case where the detector array includes 8 rows and 8 columns of detectors, and an illumination area can cover 2 rows and 2 columns of detectors as an example.

[0101] In the example of FIG8 , the eight detectors in the first column can be divided into four groups of detectors 20G1, 20G2, 20G3, and 20G4, with two detectors forming a group. The first detectors in the four groups of detectors 20G1, 20G2, 20G3, and 20G4 are all connected to the first signal path 31[0][1], and the second detectors in the four groups of detectors 20G1, 20G2, 20G3, and 20G4 are all connected to the first signal path 31[0][2]. The two detectors in the same group of detectors are connected to the first signal paths 31[0][1] and 31[0][2], respectively. The first signal path set 30 includes the first signal paths 31[0][1] and 31[0][2]. The same connection is performed for the other columns. The eight columns of detectors can correspond to eight first signal path sets 30.

[0102] Continuing with reference to FIG8 , the eight first signal path sets 30 are divided into four groups of first signal path sets 30G1, 30G2, 30G3, and 30G4, with two of each group. The first signal path set 30 in the four groups of first signal path sets 30G1, 30G2, 30G3, and 30G4 is connected to the second signal path 41[1], and the second signal path set 30 in the four groups of first signal path sets 30G1, 30G2, 30G3, and 30G4 is connected to the second signal path 41[2]. The two first signal path sets in the same group of first signal path sets can be connected to the second signal paths 41[1] and 41[2], respectively. The second signal path set 40 includes the second signal paths 41[1] and 41[2].

[0103] Furthermore, the aforementioned grouping of the first signal path sets in the signal readout circuit is merely an example, and the present disclosure is not limited to this grouping. Any other grouping method may be employed as long as the second signal paths are connected to multiple first signal path sets in different groups of first signal path sets, and multiple first signal path sets in the same group of first signal path sets are connected to multiple second signal paths.

[0104] The examples of the primary bus connection structure and the secondary bus connection structure shown in Figures 6 to 8 above are only schematic illustrations of the connection relationship. Next, in conjunction with Figures 9 and 10, an exemplary circuit connection structure of the primary bus and the secondary bus in some embodiments of the present disclosure is described.

[0105] FIG9 shows a schematic diagram of the circuit connection structure of an exemplary primary bus consistent with some embodiments of the present disclosure. As shown in FIG9 , in the primary bus, the detector 20 is connected to the first selector 401. In some embodiments, the first selector 401 can adopt any of the aforementioned first selector structures, such as the first selector 401 shown in FIG4 . The detector array includes multiple groups of detectors. FIG9 shows the kth group and the k+1th group of detectors. The detectors 20 in different groups (e.g., the kth group and the k+1th group) of the multiple groups of detectors are connected to the first signal path 31 after passing through their respective first selectors 401. Detectors with the same position (or the same number) in different groups of detectors can be connected to the same first signal path. For example, in FIG9 , the first detector of the kth group and the first detector of the k+1th group are connected to the same first signal path 31. In some embodiments, multiple detectors can be connected to the same first signal path using a logic operator, so that one first signal path can transmit electrical signals from different detectors in a time-sharing manner. For example, as shown in FIG9 , the logic operator can be a logic OR gate. The first selector is combined with a logic operator so that when any detector is selected, the data transmitted to the second signal path via the first signal path is the electrical signal generated by the selected detector. Multiple detectors in the same group of detectors are respectively connected to different first signal paths. The first signal path set includes multiple first signal paths connected to multiple detectors in the same group of detectors. The first signal path set can realize the parallel output of the electrical signals of multiple detectors in a group of detectors and realize the simultaneous selection of multiple detectors. The number of detectors that can be selected simultaneously is less than or equal to the number of detectors in a group of detectors. By configuring the first control signal corresponding to the movement timing of the irradiation area and utilizing the first-level bus circuit structure as shown in FIG9 , it is possible to realize that as the irradiation area moves on the detector array, the electrical signals of the detectors covered by the irradiation area are output by the first signal path set. By adopting the circuit structure as shown in FIG9 , the number of logic gates passed by different detectors is consistent, so that the delay between the electrical signal transmission of different detectors can be basically consistent.

[0106] Figure 10 shows a schematic diagram of the circuit connection structure of an exemplary secondary bus consistent with some embodiments of the present disclosure. As shown in Figure 10, in the secondary bus, the first signal path set 30 is connected to the second selector 501. In some embodiments, the second selector 501 can adopt the structure of any of the aforementioned second selectors, such as the second selector 501 shown in Figure 5. Multiple first signal path sets 30 can be divided into multiple groups, and Figure 10 illustrates the first signal path sets of the jth group and the j+1th group. The first signal path sets 30 in different groups of first signal path sets (for example, the jth group and the j+1th group) are connected to the second signal path 41 after passing through their respective second selectors 501. The first signal path sets with the same position (or the same number) in different groups of first signal path sets can be connected to the same second signal path. For example, in Figure 10, the first first signal path set of the jth group and the first first signal path set of the j+1th group are connected to the same second signal path 41. In some embodiments, multiple first signal path sets can be connected to the same second signal path using a logic operator to achieve a second signal path that can transmit electrical signals of different first signal path sets in a time-sharing manner. For example, as shown in FIG10 , the logic operator can be a logic OR gate. The second selector is combined with the logic operator so that when any first signal path set is selected, the data transmitted to the signal processing circuit via the second signal path is the electrical signal transmitted by the selected first signal path set. In this way, the independent selection of multiple first signal path sets is achieved. Since the first signal path can achieve independent selection of a single detector, combined with the second signal path to independently select the first signal path set, the independent selection of any detector in the two-dimensional detector array can be achieved. The electrical signal generated by each detector can be transmitted to the signal processing circuit independently and without interference via the signal readout circuit.

[0107] In some embodiments, multiple first signal path sets in the same group of first signal path sets can be connected to different second signal paths. The second signal path set includes multiple second signal paths, which are respectively connected to multiple first signal path sets in the same group of first signal path sets. The second signal path set can realize the parallel output of electrical signals of multiple first signal path sets in a group of first signal path sets, and realize the simultaneous gating of multiple first signal path sets. The number of first signal path sets that are simultaneously gated is less than or equal to the number of first signal path sets in a group of first signal path sets. The first signal path set can realize the simultaneous gating of multiple detectors (for example, m), and the second signal path set can realize the simultaneous gating of multiple first signal path sets (for example, n). The embodiments of the present disclosure can realize the simultaneous gating of multiple detectors distributed in two dimensions, such as a detector array of m rows * n columns (wherein m and n are positive integers); it can also realize the simultaneous gating of multiple detectors distributed in one dimension, such as the simultaneous gating of multiple detectors of m rows * 1 column or 1 row * n columns. In addition, by adopting the structure of the signal readout circuit shown in Figures 9 and 10, the number of logic gates through which data passes between different detectors and the signal processing circuit is consistent, so that the delay between the electrical signal transmission of different detectors can be basically consistent.

[0108] In some embodiments, when it is necessary to enable gating of a larger illumination area or multiple discrete illumination areas, multiple second signal path sets can be provided. A set of first signal path sets connects multiple second signal paths in a second signal path set. For example, if a first signal path set corresponds to a column of detectors, multiple columns of detectors can be enabled through a single second signal path set. For example, a second signal path set comprising four second signal paths can enable gating of four columns of detectors. For example, if an illumination area covers eight columns of detectors, one second signal path set can enable gating of four of those columns, while another second signal path set can enable gating of the remaining four columns, enabling gating of detectors across the illumination area covering all eight columns. For another example, if a detector array has two discrete illumination areas, each covering four columns of detectors, one second signal path set can enable gating of the four columns of the first illumination area, while another second signal path set can enable gating of the four columns of the second illumination area, enabling gating of detectors across both discrete illumination areas. The number of second signal path sets can be determined based on parameters such as the number of detectors covered by the illumination area, the number of second signal paths in a second signal path set, and the number of illumination areas.

[0109] In some embodiments, data from a first signal path set can be sent to multiple second signal path sets. For example, the electrical signals transmitted by multiple first signal paths are sent to the second signal paths of multiple second signal path sets. For example, the electrical signals transmitted by the first signal path can be simultaneously sent to the second signal paths of multiple second signal path sets. For example, the electrical signals sent to the second signal paths of multiple second signal path sets can be the same data. This can reduce the number of wirings in the first signal path in the primary bus.

[0110] In some embodiments, multiple second signal path sets may adopt the same structure or some second signal path sets may adopt different structures from other second signal path sets. For example, the number of second signal paths included in different second signal path sets is the same or partially different. For another example, in different second signal path sets, the connection structure of the second signal path is the same or partially different from that of the first signal path set. For another example, the number of first signal path sets that can be selected in parallel in different second signal path sets is the same or partially different. In some embodiments, the lines connecting multiple second signal path sets to the signal processing circuit may be distributed in different directions of the signal readout circuit. For example, the first second signal path set is connected to the signal processing circuit along a first direction, and the second second signal path set is connected to the signal processing circuit in the opposite direction of the first direction. For another example, the first second signal path set is connected to the signal processing circuit along a first direction, and the second second signal path set is connected to the signal processing circuit along a second direction.

[0111] Figure 11 shows a schematic diagram of the connection structure between an exemplary secondary bus and a signal processing circuit consistent with some embodiments of the present disclosure. Referring to Figure 11, the secondary bus 12 includes a plurality of second signal path sets 40_1, 40_2, 40_3, and 40_4. The second signal path sets 40_1 and 40_3 are connected to the signal processing circuit 3 along the routing direction on the left side of the current view of Figure 11, and the second signal path sets 40_2 and 40_4 are connected to the signal processing circuit 3 along the routing direction on the right side of the current view of Figure 11. In some embodiments, physically adjacent second signal path sets can be connected to the signal processing circuit along different directions. This can reduce routing density and processing difficulty. Of course, the present disclosure is not limited to this, and the second signal path sets 40_1 to 40_n can be routed along any different directions or along the same direction.

[0112] The aforementioned embodiments illustrate that a detector can be connected to a first signal path, with a first control signal determining whether the detector's electrical signal is transmitted through the first signal path. In some optional embodiments, a detector can be connected to multiple first signal paths. A signal readout circuit can receive the first control signal and, based on the received first control signal, select one or more of the multiple first signal paths to output the detector's electrical signal. A detector can have multiple independent output paths.

[0113] Figure 12 shows a schematic diagram of path selection for an exemplary primary bus consistent with some embodiments of the present disclosure. As shown in Figure 12, the signal readout circuit includes a first selector 401, the detector 20 is connected to the first selector 401, and the first selector 401 is connected to the first signal path 31_S1 and the first signal path 31_S2, or it can be said that the first selector 401 is set on the first signal path 31_S1 and the first signal path 31_S2. The first selector 401 shown in Figure 12 is a two-way selector implemented by two logic AND gates. In other embodiments, the first selector 401 may also include a switch or other logic gate circuit. The electrical signal generated by the detector 20 can be output to the first selector 401. The control logic in the first selector 401 can be shown as the logic circuit on the right side of Figure 12. The first selector 401 can receive the first control signal 11C_S1 and the first control signal 11C_S2. In other embodiments, the first control signal 11C_S1 and the first control signal 11C_S2 can also be implemented by a single first control signal. For example, the first control signal can carry a signal that controls the outputs of two logic gates, such as when the first control signal includes multiple bits of data. The first selector 401 can enable the electrical signal 20_out generated by the detector 20 to be output via the first signal path 31_S1 based on the first control signal 11C_S1. The first selector 401 can also prevent the electrical signal 20_out generated by the detector 20 from being output via the first signal path 31_S1 based on the first control signal 11C_S1. The first selector 401 can enable the electrical signal 20_out generated by the detector 20 to be output via the first signal path 31_S2 based on the first control signal 11C_S2. The first selector 401 can also prevent the electrical signal 20_out generated by the detector 20 from being output via the first signal path 31_S2 based on the first control signal 11C_S2.

[0114] After the structure shown in FIG. 12 , by configuring the first control signal, the data transmission of the detector signal 20_out to the first signal path 31 may include the following four optional methods.

[0115] Method 1): Neither the first signal path 31_S1 nor the first signal path 31_S2 may transmit the detector signal 20_out.

[0116] Method 2): The first signal path 31_S1 controlled by the first control signal 11C_S1 can transmit the detector signal 20_out.

[0117] Method 3): The first signal path 31_S2 controlled by the first control signal 11C_S2 can transmit the detector signal 20_out.

[0118] Mode 4): The first signal path 31_S1 and the first signal path 31_S2 may both transmit the detector signal 20_out.

[0119] FIG13 shows a schematic diagram of the connection structure of an exemplary primary bus consistent with some embodiments of the present disclosure. Referring to FIG13 , the signal of the detector 20 is simultaneously sent to two first signal paths 31_S1 and 31_S2. For ease of explanation, the two first signal paths 31_S1 and 31_S2 are split and displayed separately, as shown in the left and right parts of FIG13 . The first signal path set 30_S1 includes multiple first signal paths 31_S1, and the first signal path set 30_S1 controls the gating of the detector through the first control signal 11C_S1. The first signal path set 30_S2 includes multiple first signal paths 31_S2. The first signal path set 30_S2 can control the gating of the detector through the first control signal 11C_S2. The two first signal path sets 30_S1 and 30_S2 can support the readout of electrical signals of the detectors covered by the two irradiation areas. For example, the detectors of the kth group in Figure 13 can output electrical signals via the first signal path set 30_S1, and the detectors of the k+1th group can output electrical signals via the first signal path set 30_S2. The first signal path set 30_S1 and the first signal path set 30_S2 are independent of each other, and the detectors of the kth group and the k+1th group can output electrical signals in parallel. In some embodiments, the detectors of the kth group and the k+1th group can be distributed continuously or discretely. In some embodiments, a detector can also be connected to more than two first signal paths, for example, 3 or 4 or more. Accordingly, more first signal path sets are set in the signal readout circuit. By connecting a detector to multiple first signal paths, the gating of a larger irradiation area or the parallel gating of multiple discrete irradiation areas can be achieved.

[0120] FIG14 shows an example of an exemplary detector array consistent with some embodiments of the present disclosure including multiple irradiation areas. As shown in FIG14 , irradiation area Q1 and irradiation area Q2 are adjacently arranged. In some embodiments, irradiation area Q1 and irradiation area Q2 may also be non-adjacently arranged. Taking the case shown in FIG14 as an example, it is assumed that the size of irradiation area Q1 and irradiation area Q2 in the first direction corresponds to the number of detectors in a group of detectors. For example, a group of detectors includes m detectors, and irradiation area Q1 and irradiation area Q2 also include m rows of detectors respectively. Take the example of irradiation area Q1 corresponding to the kth group of detectors and irradiation area Q2 corresponding to the k+1th group of detectors.

[0121] FIG15 is a schematic diagram of the signal flow of an exemplary primary bus consistent with some embodiments of the present disclosure. Referring to FIG14 and FIG15 , the kth group of detectors corresponding to the irradiation area Q1 transmits electrical signals via the first signal path set 30_S2, and the k+1th group of detectors corresponding to the irradiation area Q2 transmits electrical signals via the first signal path set 30_S1. By configuring the first control signal supplied to the first selector 401, simultaneous gating of the two groups of detectors covering the irradiation area Q1 and the irradiation area Q2 can be achieved. In some embodiments, by configuring the first control signal, the two groups of detectors covering the irradiation area Q1 and the irradiation area Q2 can also be enabled at different times.

[0122] In some embodiments, the number of multiple first signal paths connected to the detector is greater than or equal to the number of irradiation areas along the first direction or the second direction. When multiple detectors in the first direction correspond to a set of first signal paths, the number of multiple first signal paths connected to the detector is greater than or equal to the number of irradiation areas along the first direction. When multiple detectors in the second direction correspond to a set of first signal paths, the number of multiple first signal paths connected to the detector is greater than or equal to the number of irradiation areas along the second direction. For example, referring to Figure 13, one detector is connected to two first signal paths, which can realize the gating of two irradiation areas along the first direction as shown in Figure 14, or it can realize one irradiation area along the first direction. In the design of the laser radar, the number of multiple first signal paths connected to the detector can be set according to the number of parallel scans of the irradiation areas.

[0123] In some embodiments, multiple first signal paths connected to the detector can be connected to different sets of second signal paths, respectively. For example, as shown in FIG13 , the first signal path 31_S1 connected to a certain detector 20 can be connected to the second signal path in the first set of second signal paths, and the first signal path 31_S2 connected to the detector 20 can be connected to the second signal path in the second set of second signal paths. The gating of two two-dimensional irradiation areas can be further achieved through these two different sets of second signal paths. In some embodiments, the gating of each two-dimensional irradiation area can refer to the method described above with respect to FIG1 to FIG10.

[0124] In some embodiments, multiple first signal pathways connected to the detectors can be routed in different directions. Different second signal pathways connected to the multiple first signal pathways can be arranged at different locations in the detector array. For example, referring to FIG13 , two first signal pathways 31_S1 and 31_S2 connected to the detectors are connected to the second signal pathways below and above the current view of FIG13 , respectively. In some embodiments, multiple first signal pathways connected to the detectors can be routed in the same direction. Accordingly, different second signal pathways connected to the multiple first signal pathways can be arranged at the same location in the detector array.

[0125] In some embodiments, the detectors in the detector array can be controlled to turn on to detect the echo beam. For example, in response to the light emitter emitting a probe beam, the controller can control the detectors to begin detecting the echo beam. In another example, the controller can control the detectors to begin detecting the echo beam according to preset time configuration information. In some embodiments, the detectors in the detector array can be turned on continuously or only during their corresponding detection time windows. For example, the detectors can be turned on continuously during the time period when the lidar is detecting the entire field of view. This can reduce the design difficulty and complexity of the detector control circuitry and control algorithms. Alternatively, the detectors can be turned on when covered by the illuminated area and turned off when not covered by the illuminated area. This can reduce interference and improve the signal-to-noise ratio. In some embodiments, the detectors can be turned on by applying an appropriate bias voltage to the detectors. When turned on, the detectors can receive light signals and generate electrical signals in response to the light signals. In some embodiments, the controller can turn on the detectors based on a selection signal. In some embodiments, the selection signal can include row and column information indicating the detector's location. In some embodiments, the selection signal can include the detector's number.

[0126] FIG16 shows a schematic diagram of an exemplary detector control circuit consistent with some embodiments of the present disclosure. Referring to FIG16 , the detector control circuit may include a power supply HV, a resistor R, a ground terminal, and a controller 301. In response to a strobe signal, the controller 301 may control the switch SW to close, causing the voltage difference across the detector 20 to reach its desired bias voltage, thereby turning on the detector 20.

[0127] According to another exemplary embodiment of the present disclosure, a signal readout method for reading signals from a detector array is also provided. This signal readout method can be applied to the signal readout circuit of any embodiment of the present disclosure. FIG17 shows a flow chart of an exemplary signal readout method consistent with some embodiments of the present disclosure. As shown in FIG17 , the signal readout method may include steps S1 and S2.

[0128] Step S1: Utilizing a plurality of first signal pathway sets, the electrical signals output by the plurality of detectors can be read. The one or more first signal pathway sets can include a plurality of first signal pathways. The plurality of first signal pathways can include a first signal pathway. The first signal pathway can be connected to the plurality of detectors and can receive the electrical signals output by the plurality of detectors.

[0129] Step S2: One or more second signal pathways may be used to read the electrical signals output by the plurality of first signal pathways. The one or more second signal pathways may include a plurality of second signal pathways. The plurality of second signal pathways may include a second signal pathway. The second signal pathway may be connected to the plurality of first signal pathways and may receive the electrical signals output by the plurality of first signal pathways.

[0130] In some embodiments, the signal readout method may further include, in response to receiving a first control signal, enabling one or more detectors to output electrical signals via a first signal path according to the first control signal.

[0131] In some embodiments, the signal readout method may further include, in response to receiving a second control signal, enabling one or more first signal path sets to output the electrical signal via a second signal path according to the second control signal.

[0132] In some embodiments, the detector may be connected to a plurality of first signal pathways. The signal readout method may further include, in response to receiving a first control signal, selecting one or more first signal pathways from the plurality of first signal pathways according to the first control signal to output the electrical signal of the detector.

[0133] According to the signal readout method disclosed herein, the electrical signals output by multiple detectors can be read by utilizing multiple first signal pathways. The electrical signals output by multiple first signal pathways can be read by utilizing one or more second signal pathways. The electrical signals of multiple detectors can be read in both the first and second directions, thereby improving the signal readout speed of the detector array.

[0134] According to another exemplary embodiment of the present disclosure, a laser radar is also provided, comprising a light emitter array, a detector array, a signal readout circuit, and a signal processing circuit. The light emitter array can emit a detection beam to detect an object. The detector array includes a plurality of detectors arranged in an array along a first direction and a second direction. The detector can receive an echo beam and convert it into an electrical signal, wherein the echo beam is generated after the detection beam emitted by the light emitter array is reflected on an object. The signal readout circuit is connected to the detector array and can read out the electrical signal output by the detector array. The signal readout circuit can adopt the signal readout circuit in any embodiment of the present disclosure. The signal processing circuit can process the signal output by the signal readout circuit, for example, it can accumulate and store the electrical signal output by the detector, analyze the waveform information of the electrical signal, calculate the arrival time of the echo beam, the reflectivity information of the object, etc., or generate point cloud data. The signal processing circuit can, for example, include a processor and a memory.

[0135] According to the laser radar disclosed in the present invention, by adopting the structure of the signal readout circuit disclosed in the present invention, the signal readout speed of the detector array in the laser radar can be improved, and the integration of the laser radar can be improved, thereby realizing the miniaturization of the laser radar.

[0136] In some embodiments, the light emitter array may include one or more light emitters. The light emitters may include laser emitting circuits, vertical-cavity surface-emitting lasers (VCSELs), edge-emitting lasers (EELs), distributed feedback lasers (DFBs), fiber lasers, or similar devices.

[0137] In some embodiments, the processor can be implemented by a processing chip such as a central processing unit (CPU) or a microprocessor, an FPGA (field programmable gate array), or by an application specific integrated circuit (ASIC) or one or more integrated circuits configured to implement the embodiments of the present disclosure.

[0138] In some embodiments, the memory may include a memory within the system or a memory outside the system. In some embodiments, the memory may include a random access memory (RAM) or a non-volatile memory (NVM). In some embodiments, the memory may include at least one of a phase-change random access memory (PRAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a read-only memory (ROM), and an electrically erasable programmable read-only memory (EEPROM).

[0139] The present disclosure has been described in detail, but the above embodiments are merely examples of all embodiments and the present disclosure is not limited thereto. The present disclosure may freely combine the various embodiments within the scope of the invention, or modify or omit any constituent elements of the various embodiments.

Claims

1. A signal readout circuit for reading a signal from a detector array, the signal readout circuit comprising: A primary bus and a secondary bus; wherein the detector array comprises a plurality of detectors arranged in an array along a first direction and a second direction, and the plurality of detectors comprises detectors; The primary bus includes a plurality of first signal path sets, the plurality of first signal path sets include a first signal path set, the first signal path set includes a plurality of first signal paths, the plurality of first signal paths include a first signal path, the first signal path is connected to the plurality of detectors and is configured to receive electrical signals output by the plurality of detectors; The secondary bus includes one or more second signal path sets, the one or more second signal path sets include a second signal path set, the second signal path set includes multiple second signal paths, the multiple second signal paths include a second signal path, the second signal path is connected to the multiple first signal path sets, and is configured to receive the electrical signals output by the multiple first signal path sets.

2. The signal readout circuit according to claim 1, wherein: The detector array has a photosensitive surface, the primary bus is arranged on a side of the detector array away from the photosensitive surface, and the secondary bus is arranged on a side of the primary bus away from the detector array.

3. The signal readout circuit according to claim 1, wherein: The signal readout circuit is configured to receive a first control signal and select one or more of the detectors to output the electrical signal via the first signal path according to the first control signal.

4. The signal readout circuit according to claim 1 or 3, characterized in that: The signal readout circuit is configured to receive a second control signal and select one or more sets of the first signal paths to output the electrical signal via the second signal path according to the second control signal.

5. The signal readout circuit according to claim 1, wherein: The detector array includes a plurality of groups of detectors, and a group of detectors in the plurality of groups of detectors includes a plurality of the detectors; The first signal pathways are respectively connected to a plurality of detectors in different groups of detectors, and a plurality of detectors in the same group of detectors are respectively connected to a plurality of the first signal pathways.

6. The signal readout circuit according to claim 5, characterized in that: The signal readout circuit includes multiple groups of first signal path sets, one group of the multiple groups of first signal path sets includes multiple first signal path sets, the second signal path is respectively connected to multiple first signal path sets in different groups of first signal path sets, and multiple first signal path sets in the same group of first signal path sets are respectively connected to multiple second signal paths.

7. The signal readout circuit according to claim 6, characterized in that: Include at least one of the following settings: The number of detectors in a set of detectors is determined according to the size of the irradiated area; The number of first signal path sets in a group of first signal path sets is determined according to the size of the irradiation area.

8. The signal readout circuit according to claim 1, wherein: The detector is connected to a plurality of the first signal pathways; The signal readout circuit is configured to receive a first control signal and select one or more first signal paths from a plurality of first signal paths to output the electrical signal of the detector according to the first control signal.

9. The signal readout circuit according to claim 8, characterized in that: The number of the plurality of first signal paths connected to the detector is greater than or equal to the number of irradiation areas along the first direction or the second direction.

10. The signal readout circuit according to claim 8, wherein: The plurality of first signal paths connected to the detector are respectively connected to different sets of the second signal paths.

11. A signal readout method for reading a signal of a detector array, the signal readout method comprising: Using a plurality of first signal path sets, reading the electrical signals output by a plurality of detectors, wherein the detector array comprises the plurality of detectors arranged in an array along a first direction and a second direction, the plurality of detectors comprise detectors, the plurality of first signal path sets comprise a plurality of first signal paths, the plurality of first signal paths comprise a first signal path, the first signal path is connected to the plurality of detectors and is configured to receive the electrical signals output by the plurality of detectors; and The electrical signals output by the multiple first signal path sets are read using one or more second signal path sets, wherein the one or more second signal path sets include multiple second signal paths, the multiple second signal paths include a second signal path, the second signal path is connected to the multiple first signal path sets, and is configured to receive the electrical signals output by the multiple first signal path sets.

12. The signal reading method according to claim 11, characterized in that: Also includes: In response to receiving a first control signal, one or more of the detectors are selected to output the electrical signal via the first signal path according to the first control signal.

13. The signal reading method according to claim 11 or 12, characterized in that: Also includes: In response to receiving a second control signal, one or more of the first signal path sets are selected according to the second control signal to output the electrical signal via the second signal path.

14. A laser radar, comprising: an array of light emitters configured to emit a detection beam to detect an object; A detector array, the detector array comprising a plurality of detectors arranged in an array along a first direction and a second direction, the plurality of detectors comprising a detector; a signal readout circuit, the signal readout circuit being connected to the detector array and configured to read out the electrical signal output by the detector array; and a signal processing circuit configured to process a signal output by the signal readout circuit; Wherein, the signal readout circuit includes a primary bus and a secondary bus, wherein, The primary bus includes a plurality of first signal path sets, the plurality of first signal path sets include a first signal path set, the first signal path set includes a plurality of first signal paths, the plurality of first signal paths include a first signal path; the first signal path is connected to the plurality of detectors and is configured to receive the electrical signals output by the plurality of detectors; The secondary bus includes one or more second signal path sets, the one or more second signal path sets include a second signal path set, the second signal path set includes multiple second signal paths, the multiple second signal paths include a second signal path, the second signal path is connected to the multiple first signal path sets, and is configured to receive the electrical signals output by the multiple first signal path sets.

Images