Device configuration method and apparatus, server, and computer readable storage medium

Abstract

A device configuration method and apparatus, a server, and a computer-readable storage medium. The method comprises: receiving a first input from a user, and on the basis of the first input, setting a first working mode, wherein the first working mode comprises an economy mode, a balance mode, and a performance mode, and for the same chip, the power consumption of the economy mode, the power consumption of the balance mode, and the power consumption of the performance mode increase successively, and the computing power of the economy mode, the computing power of the balance mode, and the computing power of the performance mode increase successively; reading a chip type of a device; on the basis of the first working mode and the chip type, determining a device computing power requirement and setting the working voltage and working frequency of the device; detecting whether the computing power of the device satisfies the device computing power requirement; and when the device computing power requirement is not satisfied, adjusting the working voltage and / or working frequency of the device, wherein the adjusted voltage and working frequency satisfy at least one of the following: the adjusted working voltage is greater than the working voltage before adjustment, or the adjusted working frequency is lower than the working frequency before adjustment.

Description

Device configuration method and apparatus, server, and computer-readable storage medium Technical Field

[0001] The present disclosure relates to, but is not limited to, the field of chip technology, and in particular to a device configuration method and apparatus, a server, and a computer-readable storage medium. Background Art

[0002] With the development of semiconductor technology, the integration of chips is getting higher and higher, and the cost of a single chip is also increasing. Each chip can contain multiple arithmetic and logic units (ALUs) and memory blocks (banks) for data storage and calculation. The computing power of a chip refers to the chip's ability to process data per unit time. The higher the computing power, the greater the amount of data processed per unit time. Therefore, the computing power of the chip has become one of the core evaluation indicators of the chip. For example, Proof of Work (POW) refers to the user performing some appropriately time-consuming complex calculations and obtaining answers, and the answers can be quickly verified by the service provider.

[0003] Summary of the Invention

[0004] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0005] An embodiment of the present disclosure provides a device configuration method, the method comprising: receiving a first input from a user, setting a first working mode of the device according to the first input, the first working mode comprising an economic mode, a balanced mode and a performance mode, the power consumption of the economic mode, the power consumption of the balanced mode and the power consumption of the performance mode of the same chip increasing in sequence, and the computing power of the economic mode, the computing power of the balanced mode and the computing power of the performance mode of the same chip increasing in sequence; reading a chip type of the device; determining a device computing power requirement and setting an operating voltage and an operating frequency of the device according to the first working mode and the chip type; detecting whether the device computing power meets the device computing power requirement; when the device computing power does not meet the device computing power requirement, adjusting the operating voltage and / or operating frequency of the device so that the device computing power meets the device computing power requirement or is close to meeting the device computing power requirement, and the adjusted operating voltage and the adjusted operating frequency meet at least one of the following: the adjusted operating voltage is greater than the operating voltage before adjustment, and the adjusted operating frequency is less than the operating frequency before adjustment.

[0006] An embodiment of the present disclosure also provides a device configuration apparatus, comprising a memory; and a processor connected to the memory, wherein the memory is used to store instructions, and the processor is configured to execute the steps of the device configuration method as described in any embodiment of the present disclosure based on the instructions stored in the memory.

[0007] An embodiment of the present disclosure further provides a server, comprising the device configuration apparatus as described in any embodiment of the present disclosure and at least one device, wherein the device configuration apparatus and the device are connected.

[0008] An embodiment of the present disclosure further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the device configuration method as described in any embodiment of the present disclosure.

[0009] The device configuration method and apparatus, server, and computer-readable storage medium of the embodiments of the present disclosure detect whether the device computing power meets the device computing power requirements. When the device computing power does not meet the device computing power requirements, the operating voltage and / or operating frequency of the device are adjusted so that the computing power of the device meets the device computing power requirements or is close to meeting the device computing power requirements. The adjusted operating voltage and the adjusted operating frequency meet at least one of the following: the adjusted operating voltage is greater than the operating voltage before adjustment, and the adjusted operating frequency is less than the operating frequency before adjustment. This adjusts the working environment of the device and ensures the computing power of the device.

[0010] Other features and advantages of the present application will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present application. Other advantages of the present application can be realized and obtained by the solutions described in the description and the drawings.

[0011] Other aspects will become apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The accompanying drawings are used to provide an understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation to the technical solution of the present disclosure.

[0013] FIG1 is a flow chart of a device configuration method according to an exemplary embodiment of the present disclosure;

[0014] FIG2 is a flow chart of another device configuration method according to an exemplary embodiment of the present disclosure;

[0015] FIG3 is a schematic structural diagram of a device configuration apparatus according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0016] This application describes multiple embodiments, but this description is exemplary rather than restrictive, and it will be apparent to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described herein. Although many possible feature combinations are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

[0017] This application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features, and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive solution defined by the claims. Any features or elements of any embodiment may also be combined with features or elements from other inventive solutions to form another unique inventive solution defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the appended claims and their equivalents, the embodiments are not subject to other limitations. In addition, various modifications and changes may be made within the scope of protection of the appended claims.

[0018] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps in the specific order described. As will be understood by those skilled in the art, other orders of steps are also possible. Therefore, the specific order of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and / or process should not be limited to performing their steps in the order written, and those skilled in the art can readily understand that these orders can be changed and still remain within the spirit and scope of the embodiments of the present application.

[0019] Unless otherwise defined, the technical or scientific terms used in the embodiments of the present disclosure should have the ordinary meaning understood by people with ordinary skills in the field to which the present disclosure belongs. The words "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. The words "include" or "comprising" and similar words mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0020] As shown in FIG1 , an embodiment of the present disclosure provides a device configuration method, including:

[0021] Step 101: Receive a first input from a user, and set a first operating mode of the device according to the first input of the user. The first operating mode includes an efficiency mode, a balance mode, and a performance mode. The power consumption of the efficiency mode of the same chip is less than that of the balance mode, and the power consumption of the balance mode is less than that of the performance mode. The computing power of the efficiency mode of the same chip is less than that of the balance mode, and the computing power of the balance mode is less than that of the performance mode. That is, the power consumption of the efficiency mode, the power consumption of the balance mode, and the power consumption of the performance mode of the same chip increase in sequence, and the computing power of the efficiency mode, the computing power of the balance mode, and the computing power of the performance mode of the same chip increase in sequence.

[0022] Step 102: Read the chip type of the device;

[0023] Step 103: Determine the computing power requirement of the device and set the operating voltage and frequency of the device based on the first operating mode and the chip type;

[0024] Step 104: Check whether the computing power of the device meets the computing power requirements;

[0025] Step 105: When the computing power of the device does not meet the computing power requirement, adjust the operating voltage and / or operating frequency of the device so that the computing power of the device meets the computing power requirement or nearly meets the computing power requirement, and the adjusted operating voltage and the adjusted operating frequency meet at least one of the following: the adjusted operating voltage is greater than the operating voltage before adjustment, and the adjusted operating frequency is less than the operating frequency before adjustment.

[0026] The device configuration method of the embodiment of the present disclosure determines the device computing power requirements and sets the device's operating voltage and operating frequency according to the first operating mode and chip type, detects whether the device computing power meets the device computing power requirements, and when the device computing power does not meet the device computing power requirements, adjusts the device's operating voltage and / or operating frequency, and the adjusted operating voltage and the adjusted operating frequency meet at least one of the following: the adjusted operating voltage is greater than the operating voltage before adjustment, and the adjusted operating frequency is less than the operating frequency before adjustment, so that the device computing power meets the device computing power requirements or is close to meeting the device computing power requirements, thereby adjusting the device's working environment and ensuring the device's computing power.

[0027] In some exemplary embodiments, the device may be a computing chip, however, the present disclosure is not limited thereto. For example, the computing chip may be a proof-of-work chip.

[0028] Many blockchain platforms currently require proof-of-work (PoW) to create valid blocks. Because the computational complexity of PoW can be enormous, a related technology provides a PoW system in which a central node issues PoW tasks, and multiple PoW nodes in the system each perform their own portion of the PoW calculations. Valid results are then aggregated to the central node. During a PoW task cycle, the PoW system sequentially completes the following four steps: 1) Receives a new task from the central node; 2) The control chip distributes the task data to all PoW chips; 3) Each PoW chip begins its own calculations; 4) The control chip obtains valid result data from the PoW chips and, if available, submits it to the central node. Successful submission generates a new block.

[0029] The device configuration method of the disclosed embodiment can be run on a control chip connected to each computing chip. A control chip can be connected to multiple computing chips via a serial peripheral interface (SPI) bus. SPI is a full-duplex, synchronous communication bus that operates in a master-slave mode, typically with one master device and at least one slave device. In the context of a proof-of-work system, the control chip used to send task data and obtain result data can be used as the master device, and each computing chip can be used as a slave device.

[0030] In the embodiment of the present disclosure, the chip type can be classified according to the results of the chip test. In the chip testing link, the chip is classified according to the test computing power of the chip, and the classification results are written into the chip. For example, it is assumed that according to the results of the chip test, the chips are divided into multiple types such as BIN1, BIN2, BIN3, and the test computing power of the BIN1 chip is better than the test computing power of the BIN2 chip, and the test computing power of the BIN2 chip is better than the test computing power of the BIN3 chip... The embodiment of the present disclosure is explained by taking the chip types including the following three categories as an example: BIN1: 600MH / s<computing power<670MH / s; BIN2: 500MH / s<computing power<600MH / s; BIN3: 400MH / s<computing power<500MH / s; however, the embodiment of the present disclosure does not limit this. In the chip testing link, how to classify the chips and how many categories they are divided into can be set as needed.

[0031] In the embodiments of the present disclosure, when the read chip type is BIN1, the determined device computing power requirement is 600 MH / s; when the read chip type is BIN2, the determined device computing power requirement is 500 MH / s; when the read chip type is BIN3, the determined device computing power requirement is 400 MH / s. In other examples, the device computing power requirement can also be determined according to other types, and the embodiments of the present disclosure do not limit this.

[0032] In the embodiments of the present disclosure, the first input can be implemented by the user selecting from a drop-down menu. In the embodiments of the present disclosure, the device sets three first working modes, namely the Efficiency mode, the Balance mode, and the Performance mode. The power consumption comparison of the three modes for the same chip is: the power consumption of the Efficiency mode < the power consumption of the Balance mode < the power consumption of the Performance mode; the computing power comparison of the three modes for the same chip is: the computing power of the Efficiency mode < the computing power of the Balance mode < the computing power of the Performance mode. Through the configuration of different modes, customers can select a suitable mode to work according to their own power consumption and computing power requirements.

[0033] Exemplarily, in the Efficiency mode, the working voltage set for chips of various chip types is 850 mv, and the set working frequency is 500 MHz;

[0034] In the Balance mode, the working voltage set for BIN1 type chips is 860 mv, and the set working frequency is 520 MHz; the working voltage set for BIN2 type chips is 890 mv, and the set working frequency is 530 MHz; the working voltage set for BIN3 type chips is 890 mv, and the set working frequency is 530 MHz;

[0035] In the Performance mode, the working voltage set for chips of various chip types is 900 mv, and the set working frequency is 530 MHz.

[0036] To ensure product consistency, in the Balance mode, the working voltage and working frequency of BIN2 chips ( / BIN3 chips) are higher than those of BIN1 chips. With the development of technology, the complexity and functional requirements of computing power devices are also growing rapidly. The working modes of traditional computing power devices are relatively single, and the efficiency often does not reach the best adaptation, and resources cannot be fully utilized. Therefore, it is of great significance to improve the working efficiency of computing power devices, adapt to the environment, and make computing power devices work more economically.

[0037] In some exemplary embodiments, the method further includes:

[0038] A second input from the user is received, and a second operating mode of the device is set according to the second input from the user, where the second operating mode includes a manual mode and an automatic mode.

[0039] In the disclosed embodiment, the second input can be implemented by the user selecting from a drop-down menu, and the first and second inputs can be implemented through a two-level drop-down menu or a single-level drop-down menu. The automatic mode is more intelligent than the manual mode. When the device operates in automatic mode, it can intelligently select the most appropriate operating voltage and / or operating frequency based on its computing power requirements, automatically achieving the most appropriate operating state.

[0040] The control chip can determine the computing power requirements of the device based on the chip type of the device (or based on the chip type of the device and the first working mode), and judge whether the device meets the computing power requirements based on the current computing power of the device. If not, in automatic mode, the operating voltage and / or operating frequency of the device are adjusted within a preset operating voltage adjustment range and / or operating voltage adjustment range, so that it automatically reaches the most suitable working state and can operate at the lowest power consumption while meeting performance; in manual mode, the operating voltage and / or operating frequency of the device are directly adjusted to a preset adjusted operating voltage and / or adjusted operating frequency (the adjusted operating voltage and / or adjusted operating frequency can be pre-specified).

[0041] In some exemplary embodiments, when the device operates in manual mode, adjusting the operating voltage and / or operating frequency of the device includes:

[0042] Determine the corresponding adjusted operating voltage and / or adjusted operating frequency of the device according to the chip type;

[0043] Adjust the operating voltage of the device to a corresponding adjusted operating voltage, and / or adjust the operating frequency of the device to a corresponding adjusted operating frequency.

[0044] For example, when the device is working in manual balancing mode, different working environments are set according to different chip types as follows:

[0045] If the hashrate of the BIN1 chip is less than 600MH / s, adjust the operating voltage of the BIN1 chip to 890mv and the operating frequency to 510MHz (increase the operating voltage by 30mv and reduce the operating frequency by 10MHz).

[0046] If the hashrate of the BIN2 chip is less than 500MH / s, adjust the operating voltage of the BIN2 chip to 890mv and the operating frequency to 510MHz (the operating voltage remains unchanged, but the operating frequency is reduced by 20MHz);

[0047] If the computing power of the BIN3 chip is less than 400MH / s, adjust the operating voltage of the BIN3 chip to 890mv and the operating frequency to 510MHz (the operating voltage remains unchanged, and the operating frequency is reduced by 20MHz).

[0048] In the disclosed embodiment, when the chip computing power is low, its voltage is increased and / or its frequency is decreased to create better chip working conditions and save the chip computing power.

[0049] In the embodiment of the present disclosure, the automatic mode mainly determines whether the chip meets the computing power requirements based on the type and computing power of the chip. If the computing power requirements are not met, the operating voltage and / or operating frequency are automatically adjusted to achieve a suitable working state (meeting or nearly meeting the computing power requirements and low power consumption).

[0050] When the chip is operating in automatic mode, within a certain range of operating voltage and operating frequency, on the premise that it reaches the computing power threshold of the chip type, the lowest operating voltage and / or operating frequency value that meets the computing power requirements is found, so that it operates at the minimum operating voltage and / or operating frequency required for the computing power, achieving the most economical operating state.

[0051] In some exemplary embodiments, when the device operates in automatic mode, adjusting the operating voltage and / or operating frequency of the device includes:

[0052] Determining an operating voltage adjustment range according to the chip type (or the chip type and the first operating mode);

[0053] Within the operating voltage adjustment range, multiple test operating voltages are selected according to the preset voltage adjustment step size, and the device computing power is tested one by one at each test operating voltage and current operating frequency to see whether it meets the device computing power requirement, until it is detected that the device computing power corresponding to a test operating voltage meets the device computing power requirement or the device computing power corresponding to all test operating voltages does not meet the device computing power requirement;

[0054] When it is detected that the computing power of the device corresponding to the test working voltage meets the device computing power requirement, the working voltage of the device is adjusted to the detected test working voltage;

[0055] When the device computing power corresponding to all the test working voltages does not meet the device computing power requirement, the test working voltage corresponding to the maximum device computing power among the device computing power corresponding to all the test working voltages is selected, and the device operating voltage is adjusted to the selected test working voltage.

[0056] In the embodiment of the present disclosure, the operating voltage adjustment range can be determined according to the chip type, or can be determined according to the chip type and the first operating mode, and the present disclosure does not impose any restrictions on this.

[0057] In the disclosed embodiment, the operating voltage is adjusted so that the device computing power meets or nearly meets the device computing power requirement. In the disclosed embodiment, nearly meeting the device computing power requirement means that, when the device computing power corresponding to all test operating voltages does not meet the device computing power requirement, the device operating voltage is adjusted to the test operating voltage corresponding to the maximum device computing power among the device computing powers corresponding to all test operating voltages, that is, the test operating voltage that is closest to the device computing power requirement among the device computing powers corresponding to all test operating voltages.

[0058] In some other exemplary embodiments, when the device operates in automatic mode, adjusting the operating voltage and / or operating frequency of the device includes:

[0059] Determining an operating frequency adjustment range according to the chip type (or the chip type and the first operating mode);

[0060] Within the operating frequency adjustment range, multiple test operating frequencies are selected according to the preset frequency adjustment step size, and the device computing power is tested one by one at each test operating frequency and current operating voltage to see whether it meets the device computing power requirement, until it is detected that the device computing power corresponding to a test operating frequency meets the device computing power requirement or the device computing power corresponding to all test operating frequencies does not meet the device computing power requirement;

[0061] When it is detected that the computing power of the device corresponding to the test operating frequency meets the device computing power requirement, the operating frequency of the device is adjusted to the detected test operating frequency;

[0062] When the device computing power corresponding to all the test operating frequencies does not meet the device computing power requirement, the test operating frequency corresponding to the maximum device computing power among the device computing power corresponding to all the test operating frequencies is selected, and the device operating frequency is adjusted to the selected test operating frequency.

[0063] In the embodiment of the present disclosure, the operating frequency adjustment range can be determined according to the chip type, or according to the chip type and the first operating mode, and the present disclosure does not impose any restrictions on this.

[0064] In the disclosed embodiment, the operating frequency is adjusted so that the device computing power meets the device computing power requirement or nearly meets the device computing power requirement. In the disclosed embodiment, nearly meeting the device computing power requirement means that, when the device computing power corresponding to all the tested operating frequencies does not meet the device computing power requirement, the device operating frequency is adjusted to the test operating frequency corresponding to the maximum device computing power among the device computing powers corresponding to all the tested operating frequencies, that is, the test operating frequency that is closest to the device computing power requirement among the device computing powers corresponding to all the tested operating frequencies.

[0065] In some further exemplary embodiments, when the device operates in automatic mode, adjusting the operating voltage and / or operating frequency of the device includes:

[0066] Determining an operating voltage adjustment range and an operating frequency adjustment range according to the chip type (or the chip type and the first operating mode);

[0067] Within the operating voltage adjustment range and the operating frequency adjustment range, multiple sets of test operating voltages and test operating frequencies are selected according to the preset voltage adjustment step size and the preset frequency adjustment step size; and the device computing power is detected one by one in a preset order under each set of test operating voltages and test operating frequencies to determine whether the device computing power meets the device computing power requirement, until it is detected that the device computing power corresponding to one set of test operating voltages and test operating frequencies meets the device computing power requirement or the device computing power corresponding to all sets of test operating voltages and test operating frequencies does not meet the device computing power requirement;

[0068] When it is detected that the device computing power corresponding to a set of test operating voltage and test operating frequency meets the device computing power requirement, the device operating voltage is adjusted to the detected test operating voltage and the device operating frequency is adjusted to the detected test operating frequency;

[0069] When the device computing powers corresponding to all test operating voltages and test operating frequencies do not meet the device computing power requirements, select the test operating voltage and test operating frequency corresponding to the maximum device computing power among the device computing powers corresponding to all groups of test operating voltages and test operating frequencies, adjust the device's operating voltage to the selected test operating voltage, and adjust the device's operating frequency to the selected test operating frequency.

[0070] In the embodiment of the present disclosure, the operating voltage adjustment range and the operating frequency adjustment range can be determined according to the chip type, or can be determined according to the chip type and the first operating mode, and the present disclosure does not limit this.

[0071] In the embodiment of the present disclosure, the operating voltage and operating frequency are adjusted so that the device computing power meets the device computing power requirement or nearly meets the device computing power requirement. In the embodiment of the present disclosure, nearly meeting the device computing power requirement means that when the device computing power corresponding to all the test operating voltages and test operating frequencies does not meet the device computing power requirement, the device's operating voltage and operating frequency are adjusted to the test operating voltage and test operating frequency corresponding to the maximum device computing power among the device computing powers corresponding to all the test operating voltages and test operating frequencies, that is, the test operating voltage and test operating frequency that are closest to the device computing power requirement among the device computing powers corresponding to all the test operating voltages and test operating frequencies.

[0072] In some exemplary embodiments, within the operating voltage adjustment range and the operating frequency adjustment range, selecting multiple sets of test operating voltages and test operating frequencies according to a preset voltage adjustment step size and a preset frequency adjustment step size includes: starting from an initial setting voltage, selecting a test operating voltage at every preset voltage adjustment step size until the test operating voltage reaches a maximum adjustment voltage within the operating voltage adjustment range; at each test operating voltage, selecting multiple test operating frequencies within the operating frequency adjustment range according to the preset frequency adjustment step size;

[0073] The preset order is: the test working voltage is from small to large and under each test working voltage, the test working frequency is from high to low.

[0074] In the embodiment of the present disclosure, in automatic mode, the control chip first determines the type of computing chip, configures the initial voltage and frequency working environment according to different computing chip types, and then simulates the computing power of the computing system to obtain the computing power value. If the computing power value is not greater than the computing power threshold, the operating voltage and operating frequency are changed until they are greater than the computing power threshold, and the changed voltage and frequency are selected as the operating voltage and operating frequency of the automatic mode; when the operating voltage and operating frequency within all ranges are tried and the corresponding computing power is not greater than the computing power threshold, the operating voltage and operating frequency with the highest computing power are selected as the operating voltage and operating frequency of the automatic mode.

[0075] For example, as shown in Figure 2, in an application scenario, the user selects automatic mode configuration, the control chip reads the computing chip type, the computing chip types include BIN1, BIN2 and BIN3, and for each computing chip type, configures the corresponding initial operating voltage and initial operating frequency, simulates the computing power of the computing system, and detects whether the computing power meets the computing power requirements of the device. When the computing power requirements of the device are met, the automatic mode configuration is directly terminated and the operation is carried out according to the current parameters; when the computing power requirements of the device are not met, the voltage is stepped up within the set working voltage adjustment range and the frequency is stepped down within the set working frequency adjustment range to obtain multiple groups of test work. Voltage and test operating frequency. For each set of test operating voltage and test operating frequency, simulate the computing power of the system to detect whether the computing power meets the device computing power requirements. When a set of test operating voltage and test operating frequency corresponding to the device computing power that meets the device computing power requirements is found, the set of test operating voltage and test operating frequency found will be selected as the matching voltage and frequency; if no set of test operating voltage and test operating frequency corresponding to the device computing power that meets the device computing power requirements is found, the test operating voltage and test operating frequency with the highest computing power among all groups will be selected as the matching voltage and frequency, and the automatic mode configuration will end, and the system will operate according to the matching voltage and frequency.

[0076] In some exemplary embodiments, for BIN1 type chips, when the device computing power does not meet the device computing power requirements, the operating voltage or the operating frequency is adjusted so that the device computing power meets the device computing power requirements or is close to meeting the device computing power requirements; for BIN2 and BIN3 type chips, when the device computing power does not meet the device computing power requirements, the operating voltage and the operating frequency are adjusted so that the device computing power meets the device computing power requirements or is close to meeting the device computing power requirements.

[0077] Since BIN1 chips have the highest test hashrate, only the operating voltage or frequency is adjusted during adjustment to reduce the complexity of the adjustment process. Since BIN2 and BIN3 chips have lower test hashrate, both the operating voltage and frequency are adjusted during adjustment to find the most suitable operating voltage and frequency, thereby improving the device hashrate and ensuring that the device hashrate meets or nearly meets the device hashrate requirements.

[0078] In the disclosed embodiment, in automatic mode, the operating voltage and operating frequency are automatically adjusted to adjust the operating environment of the computing chip, thereby ensuring the computing power of the computing chip. In the disclosed embodiment, a control chip can be connected to multiple computing chips. The multiple computing chips can operate in different operating voltage and / or operating frequency environments based on their respective test results, so that they can operate at the lowest power consumption while meeting the computing power requirements.

[0079] An embodiment of the present disclosure also provides a device configuration apparatus, comprising a memory; and a processor connected to the memory, wherein the memory is used to store instructions, and the processor is configured to execute the steps of the device configuration method as described in any embodiment of the present disclosure based on the instructions stored in the memory.

[0080] As shown in FIG3 , in one example, the device configuration apparatus may include: a processor 310 , a memory 320 , and a bus system 330 , wherein the processor 310 and the memory 320 are connected via the bus system 330 , the memory 320 is used to store instructions, and the processor 310 is used to execute the instructions stored in the memory 320 . Specifically, the processor 310 receives a first input from a user, and sets a first working mode of the device according to the first input, wherein the first working mode includes an economic mode, a balanced mode, and a performance mode, and the power consumption of the economic mode, the power consumption of the balanced mode, and the power consumption of the performance mode of the same chip increase sequentially, and the computing power of the economic mode, the computing power of the balanced mode, and the computing power of the performance mode of the same chip increase sequentially; reads the chip type of the device; determines the device computing power requirements and sets the working voltage and working frequency of the device according to the first working mode and the chip type; detects whether the device computing power meets the device computing power requirements; when the device computing power does not meet the device computing power requirements, adjusts the device's working voltage and / or working frequency so that the device computing power meets the device computing power requirements or is close to meeting the device computing power requirements, and the adjusted working voltage and the adjusted working frequency meet at least one of the following: the adjusted working voltage is greater than the working voltage before adjustment, and the adjusted working frequency is less than the working frequency before adjustment.

[0081] It should be understood that the processor 310 may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0082] The memory 320 may include a read-only memory and a random access memory, and provides instructions and data to the processor 310. A portion of the memory 320 may also include a non-volatile random access memory. For example, the memory 320 may also store information about the device type.

[0083] In addition to the data bus, the bus system 330 may also include a power bus, a control bus, a status signal bus, etc. However, for the sake of clarity, various buses are labeled as the bus system 330 in FIG.

[0084] During implementation, the processing performed by the processing device can be completed by the hardware integrated logic circuit in the processor 310 or by instructions in the form of software. That is, the method steps of the embodiment of the present disclosure can be embodied as being executed by a hardware processor, or by a combination of hardware and software modules in the processor. The software module can be located in a storage medium such as random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers, etc. The storage medium is located in the memory 320, and the processor 310 reads the information in the memory 320 and completes the steps of the above method in combination with its hardware. To avoid repetition, it will not be described in detail here.

[0085] An embodiment of the present disclosure further provides a server, comprising the device configuration apparatus as described in any embodiment of the present disclosure and at least one device, wherein the device configuration apparatus and the device are connected.

[0086] Exemplarily, the device configuration apparatus may be a control chip, the device may be a computing chip, and the control chip is connected to one or more computing chips via a serial peripheral interface (SPI) bus.

[0087] The present disclosure also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the device configuration method described in any of the embodiments of the present disclosure. The method for driving device operating mode configuration by executing executable instructions is substantially the same as the device configuration method provided in the aforementioned embodiments of the present disclosure and is not further described here.

[0088] In some possible implementations, various aspects of the device configuration method provided by the present disclosure may also be implemented in the form of a program product, which includes program code. When the program product is run on a computer device, the program code is used to enable the computer device to execute the steps of the device configuration method according to the various exemplary embodiments of the present disclosure described above in this specification. For example, the computer device may execute the device configuration method recorded in the embodiments of the present disclosure.

[0089] The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or component, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0090] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As is well known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable, and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media generally embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0091] It should be noted that the above-described embodiments or implementations are merely illustrative and not restrictive. Therefore, the present disclosure is not limited to what is specifically shown and described herein. Various modifications, substitutions, or omissions may be made to the forms and details of the implementations without departing from the scope of the present disclosure.

Claims

1. A device configuration method, comprising: Receiving a first input from a user, and setting a first working mode of the device according to the first input, where the first working mode includes an economy mode, a balance mode, and a performance mode. The power consumption of the economy mode, the balance mode, and the performance mode of the same chip increases in sequence, and the computing power of the economy mode, the balance mode, and the performance mode of the same chip increases in sequence; Reading the chip type of the device; Determining the device computing power requirement according to the first working mode and the chip type, and setting the working voltage and working frequency of the device; Detecting whether the device computing power meets the device computing power requirement; When the device computing power does not meet the device computing power requirement, adjusting the working voltage and / or working frequency of the device so that the device computing power meets the device computing power requirement or is close to meeting the device computing power requirement. The adjusted working voltage and the adjusted working frequency satisfy at least one of the following: the adjusted working voltage is greater than the working voltage before adjustment, and the adjusted working frequency is less than the working frequency before adjustment.

2. The method according to claim 1, further comprising: Receiving a second input from a user, and setting a second working mode of the device according to the second input from the user, where the second working mode includes a manual mode and an automatic mode.

3. The method according to claim 2, wherein When the device operates in the automatic mode, the adjusting the working voltage and / or working frequency of the device includes: Determining a working voltage adjustment range according to the chip type; Within the working voltage adjustment range, selecting a plurality of test working voltages according to a preset voltage adjustment step, and detecting one by one whether the device computing power meets the device computing power requirement at each test working voltage and the current working frequency until it is detected that the device computing power corresponding to a test working voltage meets the device computing power requirement or the device computing power corresponding to all test working voltages does not meet the device computing power requirement; When it is detected that the device computing power corresponding to a test working voltage meets the device computing power requirement, adjusting the working voltage of the device to the detected test working voltage; When the device computing power corresponding to all test working voltages does not meet the device computing power requirement, selecting the test working voltage corresponding to the maximum device computing power among the device computing powers corresponding to all test working voltages, and adjusting the working voltage of the device to the selected test working voltage.

4. The method according to claim 2, wherein, When the device operates in the automatic mode, the adjusting the working voltage and / or working frequency of the device includes: Determining a working frequency adjustment range according to the chip type; Within the working frequency adjustment range, selecting a plurality of test working frequencies according to a preset frequency adjustment step, and detecting one by one whether the device computing power meets the device computing power requirement at each test working frequency and the current working voltage until it is detected that the device computing power corresponding to a test working frequency meets the device computing power requirement or the device computing power corresponding to all test working frequencies does not meet the device computing power requirement; When it is detected that the device computing power corresponding to a test working frequency meets the device computing power requirement, adjusting the working frequency of the device to the detected test working frequency; When the device computing power corresponding to all the test working frequencies does not meet the device computing power requirement, select the test working frequency corresponding to the maximum device computing power among the device computing powers corresponding to all the test working frequencies, and adjust the working frequency of the device to the selected test working frequency.

5. The method according to claim 2, wherein, When the device operates in the automatic mode, the adjustment of the working voltage and / or working frequency of the device includes: Determine the working voltage adjustment range and the working frequency adjustment range according to the chip type; Within the working voltage adjustment range and the working frequency adjustment range, select multiple groups of test working voltages and test working frequencies according to a preset voltage adjustment step and a preset frequency adjustment step; and sequentially detect whether the device computing power meets the device computing power requirement under each group of test working voltages and test working frequencies until it is detected that the device computing power corresponding to a group of test working voltages and test working frequencies meets the device computing power requirement or the device computing powers corresponding to all groups of test working voltages and test working frequencies do not meet the device computing power requirement; When it is detected that the device computing power corresponding to a group of test working voltages and test working frequencies meets the device computing power requirement, adjust the working voltage of the device to the detected test working voltage and adjust the working frequency of the device to the detected test working frequency; When the device computing powers corresponding to all the test working voltages and test working frequencies do not meet the device computing power requirement, select the test working voltage and test working frequency corresponding to the maximum device computing power among the device computing powers corresponding to all groups of test working voltages and test working frequencies, and adjust the working voltage of the device to the selected test working voltage and adjust the working frequency of the device to the selected test working frequency.

6. The method according to claim 5, wherein, The selection of multiple groups of test working voltages and test working frequencies according to a preset voltage adjustment step and a preset frequency adjustment step within the working voltage adjustment range and the working frequency adjustment range includes: starting from the initial set voltage, select a test working voltage every preset voltage adjustment step until the test working voltage reaches the maximum adjustment voltage within the working voltage adjustment range; at each test working voltage, select multiple test working frequencies within the working frequency adjustment range according to the preset frequency adjustment step; The preset order is: the order of the test working voltages from small to large and, under each test working voltage, the order of the test working frequencies from high to low.

7. The method according to claim 2, wherein When the device operates in the manual mode, the adjustment of the working voltage and / or working frequency of the device includes: Determine the corresponding adjusted working voltage and / or adjusted working frequency of the device according to the chip type; Adjust the working voltage of the device to the corresponding adjusted working voltage, and / or adjust the working frequency of the device to the corresponding adjusted working frequency.

8. A device configuration apparatus, including a memory; and a processor connected to the memory, the memory is used to store instructions, and the processor is configured to execute the steps of the device configuration method according to any one of claims 1 to 7 based on the instructions stored in the memory.

9. A server, comprising a device configuration device as described in claim 8 and at least one device, wherein the device configuration device is connected to the device.

10. A computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, it implements the device configuration method as described in any one of claims 1 to 7.

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