Fractional-order capacitor circuit having adjustable order, and control method

Abstract

Disclosed are a fractional-order capacitor circuit having an adjustable order, and a control method, the method comprising using an improved fractional differentiating circuit, and replacing a fixed-resistance resistor in a common differentiating circuit with a junction field effect transistor working in a variable resistance region to implement fractional-order differential operation. When the order of the fractional-order circuit is changed, the equivalent resistance of the junction field effect transistor can be adaptively changed by means of a feedback tracking circuit so as to meet order requirements. The phase value by which an output signal exceeds an input signal in the differentiating circuit can vary within a predetermined range, so as to implement flexible adjustment without changing any component parameters in the differentiating circuit.

Description

A fractional-order capacitor circuit with adjustable order and control method Technical Field

[0001] The present invention relates to the technical field of control of a fractional-order capacitor circuit with adjustable order, and in particular to a fractional-order capacitor circuit with adjustable order and a control method thereof. Background Art

[0002] In classical circuit theory, ideal capacitors that satisfy integer-order calculus volt-ampere characteristics are widely used in electrical engineering analysis. However, in the real world, integer-order capacitors do not exist and are only approximated using integer orders. Analyzing capacitive circuits using integer-order calculus is inherently inaccurate. Therefore, the application of fractional-order calculus can more accurately describe capacitors. It can also exploit the properties of fractional-order capacitors to improve circuit performance and discover new circuit characteristics.

[0003] Currently, the common methods of using operational amplifiers to construct fractional-order capacitor circuits include GIC impedance converter circuits, fractional-order differential phase shift circuits, etc. The circuits are composed of components such as resistors, capacitors, and operational amplifiers. The above methods have the following disadvantages: 1. If the order of fractional-order capacitors needs to be changed, circuit components need to be replaced; 2. The component parameters required to change to the corresponding order are sometimes difficult to find in reality.

[0004] Summary of the Invention

[0005] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the abstract and title of this application to avoid obscuring the purpose of this section, the abstract and the title of the invention, and such simplifications or omissions should not be used to limit the scope of the present invention.

[0006] In view of the above existing problems, the present invention is proposed.

[0007] Therefore, the present invention provides a fractional-order capacitor circuit with adjustable order and a control method, which can solve the problems mentioned in the background technology.

[0008] To solve the above technical problems, the present invention provides the following technical solution: a fractional-order capacitance circuit with adjustable order, comprising: a resistor R, a fractional-order differential circuit, a feedback tracking circuit, and a subtractor circuit;

[0009] One end of the input end of the fractional-order capacitor circuit with adjustable order is grounded, and the other end is connected to one end of the resistor R, and the other end of the resistor R is connected to the output end of the subtractor circuit;

[0010] The fractional-order differential circuit uses a junction field-effect transistor operating in a variable resistance region to replace the fixed resistance resistor in a conventional differential circuit to achieve differential operation;

[0011] The output of the feedback tracking circuit acts on the gate terminal of the junction field effect transistor in the fractional-order differential circuit, and the source terminal of the junction field effect transistor is grounded. The feedback tracking circuit controls the equivalent resistance value of the junction field effect transistor in real time by controlling the JFET gate-source voltage to achieve a fractional-order differential operation corresponding to the fractional order. By setting the digital reference comparison signal of the phase detector in the feedback tracking circuit, the desired fractional order is obtained;

[0012] The voltage difference between the input voltage and the output voltage of the fractional-order differential circuit controls the voltage on the resistor R, thereby controlling the input current on the resistor R.

[0013] As a preferred solution of the fractional-order capacitor circuit with adjustable order described in the present invention, wherein: the fractional-order differential circuit includes: an operational amplifier opa1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1 and a junction field effect transistor JFET, wherein the JFET works in the variable resistance region and is equivalent to a variable resistor R eq ;

[0014] In the complex frequency domain, and are the input voltage and input current of the fractional-order capacitor circuit respectively;

[0015] but and The following characteristics of fractional capacitors are satisfied:

[0016] Where s = jω represents the complex frequency, C α is the fractional capacitor, α is the fractional capacitor order, satisfying 0≤a≤2;

[0017] In the complex frequency domain, the voltage at the non-inverting input of the operational amplifier opa1 in the fractional-order operational circuit is The voltage at the inverting input is Let the input current of the operational amplifier opa1 be zero, then the voltage at the non-inverting input terminal and the voltage at the inverting input terminal of the operational amplifier opa1 in the fractional-order operational circuit are expressed as follows:

[0018] Let the differential input voltage of the operational amplifier opa1 be zero, and let R1 = R2, then:

[0019] Among them, R eq Indicates the equivalent resistance value of the junction field effect transistor JFET, represents the output voltage of the fractional-order differential circuit, represents the input voltage of the fractional-order differential circuit, C1 represents the capacitance value, a represents the real part, and b represents the imaginary part.

[0020] As a preferred solution of the fractional-order capacitance circuit with adjustable order according to the present invention, the fractional-order differential circuit further comprises:

[0021] Let the fractional-order differential circuit output voltage and input voltage Satisfies the fractional differential relationship:

[0022] Among them, the coefficient k is the gain of the fractional-order differential circuit, a is the fractional order, and in the fractional-order capacitor circuit, 0<α<2;

[0023] According to the correspondence between the real part and the imaginary part, the following results are obtained:

[0024] Among them, the output voltage of the fractional-order differential circuit is Leading fractional-order differential circuit input voltage The phase is equal to απ / 2.

[0025] As a preferred solution of the fractional-order capacitance circuit with adjustable order according to the present invention, the fractional-order differential circuit further comprises:

[0026] The resistors R3 and R4 are introduced into the circuit to reduce the nonlinearity of the JFET equivalent resistance through circuit compensation. The output current i D With the gate-source voltage v GS , drain-source voltage v DS Relationship satisfaction:

[0027] Among them, K is the constant corresponding to each field effect tube, v T is the approximate threshold voltage, the JFET equivalent resistance R DS for:

[0028] Among them, the JFET equivalent resistance R DS The value of the variable resistor R eq The value of R DS = = R eq .

[0029] As a preferred solution of the fractional-order capacitance circuit with adjustable order according to the present invention, the fractional-order differential circuit further comprises:

[0030] Resistors R3 and R4 are used to pass the V DSNegative feedback to suppress v DS to i D The influence of JFET gate-source voltage v GS With the feedback voltage v fd and drain-source voltage v DS satisfy:

[0031] Let the resistor R3 = R4, and we can get:

[0032] According to the JFET equivalent resistance expression:

[0033] Among them, K is the constant corresponding to each field effect tube, v T is the approximate threshold voltage.

[0034] As a preferred solution of the fractional-order capacitor circuit with adjustable order described in the present invention, the feedback tracking circuit includes four parts: a phase detector, an RC low-pass filter, an integrator and a voltage follower;

[0035] The phase detector includes a multiplier and a subtractor;

[0036] The RC low-pass filter is composed of a capacitor C2 and a resistor R9;

[0037] The integrator is composed of an operational amplifier opa2, a resistor R 10 、R 11 and capacitor C3;

[0038] The voltage follower is composed of an operational amplifier opa3, a resistor R 12 、R 13 constitute.

[0039] As a preferred solution of the fractional-order capacitor circuit with adjustable order according to the present invention, wherein: the subtractor circuit comprises: the subtractor circuit is composed of an operational amplifier opa4, resistors R5, R6, R7, and R8;

[0040] In the complex frequency domain, let the voltage at the non-inverting input of the operational amplifier opa4 be The voltage at the inverting input is Let the input current of operational amplifier opa4 be zero, and we get:

[0041] Let the differential input voltage of operational amplifier opa4 be zero, and let R5=R6=R7=R8, then:

[0042] The output voltage of the subtractor is:

[0043] According to Kirchhoff's voltage law, the voltage across resistor R is:

[0044] Then we can get the current flowing through the resistor R, that is, the input current:

[0045] Among them, the fractional capacitance is C α =1 / ω α R, represents the subtractor output voltage.

[0046] A method for controlling a fractional-order capacitor circuit with adjustable order, comprising:

[0047] The order of the fractional-order capacitor circuit is set according to system requirements, and a collective circuit consisting of a resistor, a fractional-order differential circuit, a feedback tracking circuit, and a subtractor circuit is designed according to the order of the fractional-order capacitor circuit;

[0048] The fractional-order differential circuit is used to perform differential operations. The output of the feedback tracking circuit acts on the fractional-order differential circuit. The feedback tracking circuit realizes the fractional-order differential operation corresponding to the fractional order by controlling the internal voltage. The desired fractional order is obtained by setting the digital reference comparison signal of the phase detector in the feedback tracking circuit.

[0049] The voltage on the resistor R is controlled according to the voltage difference between the input voltage and the output voltage of the fractional-order differential circuit, thereby realizing the control of the input current in the fractional-order capacitor circuit with adjustable order.

[0050] A computer device includes a memory and a processor, wherein the memory stores a computer program, and wherein the processor implements the steps of the above method when executing the computer program.

[0051] A computer-readable storage medium stores a computer program thereon, wherein the computer program implements the steps of the method described above when executed by a processor.

[0052] Beneficial effects of the present invention: The present invention provides a fractional-order capacitor circuit and control method with adjustable order. This circuit utilizes an improved fractional-order differential circuit, replacing the fixed-value resistors in conventional differential circuits with junction field-effect transistors (JFETs) operating in the variable resistance region to implement fractional-order differential operations. When the order of the fractional-order circuit changes, the JFET's equivalent resistance can be adaptively adjusted to meet the order requirement via a feedback tracking circuit. Without changing any component parameters in the differential circuit, the phase value of the differential circuit's output signal can be varied ahead of the input signal, providing flexible adjustment. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort. Among them:

[0054] FIG1 is a circuit model diagram of a fractional-order capacitor circuit with adjustable order and a control method thereof provided by one embodiment of the present invention;

[0055] FIG2 is a simulation schematic diagram of an adjustable-order fractional-order capacitor circuit and a control method thereof provided by an embodiment of the present invention;

[0056] FIG3 is a simulation diagram of the voltage and current across a fractional-order capacitor with an operating frequency of 10 kHz and an order of 0.5, according to an embodiment of the present invention;

[0057] FIG4 is a simulation diagram of the voltage and current across a fractional-order capacitor with an order of 1 and an operating frequency of 10 kHz, according to an embodiment of the present invention, in accordance with an adjustable-order fractional-order capacitor circuit and a control method;

[0058] FIG5 is a simulation diagram of the voltage and current across a fractional-order capacitor with an order of 1.5 and an operating frequency of 10 kHz, according to an embodiment of the present invention, in accordance with an adjustable-order fractional-order capacitor circuit and a control method;

[0059] FIG6 is an internal structure diagram of a computer device for a fractional-order capacitor circuit with adjustable order and a control method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0060] To make the above-mentioned objects, features, and advantages of the present invention more clearly understood, the following detailed description of the specific embodiments of the present invention is given in conjunction with the accompanying drawings. It is obvious that the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in this field without creative work should fall within the scope of protection of the present invention.

[0061] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0062] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive of other embodiments.

[0063] The present invention is described in detail with reference to schematic diagrams. For ease of illustration, cross-sectional views of device structures may be partially enlarged and not to scale when describing embodiments of the present invention. Furthermore, the schematic diagrams are merely illustrative and should not limit the scope of the present invention. Furthermore, in actual production, the three-dimensional dimensions of length, width, and depth should be included.

[0064] In the description of the present invention, it should be noted that the terms "upper, lower, inner, and outer" and other references to orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first, second, or third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0065] In this disclosure, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be interpreted broadly. For example, they may refer to fixed, removable, or integral connections. They may also refer to mechanical, electrical, or direct connections, indirect connections through an intermediary, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure.

[0066] Example 1

[0067] 1-6 , which are the first embodiment of the present invention, provide a fractional-order capacitor circuit with adjustable order and a control method thereof, including: a fractional-order capacitor circuit with adjustable order and a control method thereof, wherein the fractional-order capacitor circuit with adjustable order includes: a resistor R, a fractional-order differential circuit, a feedback tracking circuit, and a subtractor circuit;

[0068] Wherein, one end of the input end of the fractional-order capacitor circuit with adjustable order is grounded, and the other end is connected to one end of the resistor R, and the other end of the resistor R is connected to the output end of the subtractor circuit;

[0069] The fractional-order differential circuit uses a junction field-effect transistor working in the variable resistance region to replace the fixed resistance resistor in the ordinary differential circuit to realize differential operation;

[0070] The output of the feedback tracking circuit acts on the gate terminal of the junction field effect transistor in the fractional-order differential circuit, and the source terminal of the junction field effect transistor is grounded. The feedback tracking circuit controls the equivalent resistance value of the junction field effect transistor in real time by controlling the JFET gate-source voltage to achieve a fractional-order differential operation corresponding to the fractional order. By setting the digital reference comparison signal of the phase detector in the feedback tracking circuit, the desired fractional order is obtained.

[0071] The voltage difference between the input voltage and the output voltage of the fractional-order differential circuit controls the voltage on the resistor R, thereby controlling the input current on the resistor R.

[0072] It should be noted that the fractional-order differential circuit includes: operational amplifier opa1, resistors R1, R2, R3, R4, capacitor C1 and junction field effect transistor JFET, wherein JFET works in the variable resistance region and is equivalent to a variable resistor R eq ;

[0073] Furthermore, in the complex frequency domain, and are the input voltage and input current of the fractional-order capacitor circuit respectively;

[0074] but and The following characteristics of fractional capacitors are satisfied:

[0075] Where s = jω represents the complex frequency, C α is the fractional capacitor, α is the fractional capacitor order, satisfying 0≤a≤2;

[0076] Furthermore, in the complex frequency domain, the voltage at the non-inverting input of the operational amplifier opa1 in the fractional-order operational circuit is expressed as The voltage at the inverting input is Let the input current of the operational amplifier opa1 be zero, then the voltage at the non-inverting input terminal and the voltage at the inverting input terminal of the operational amplifier opa1 in the fractional-order operational circuit are expressed as follows:

[0077] Furthermore, let the differential input voltage of the operational amplifier opa1 be equal to zero, and let R1 = R2, then:

[0078] Among them, R eq Indicates the equivalent resistance value of the junction field effect transistor JFET, represents the output voltage of the fractional-order differential circuit, represents the input voltage of the fractional-order differential circuit, C1 represents the capacitance value, a represents the real part, and b represents the imaginary part.

[0079] It should be noted that the input current of the operational amplifier opa1 is set to zero because the input current of the ideal operational amplifier is equal to zero, that is, the "virtual off" state is considered; the differential mode input voltage of the operational amplifier opa1 is set to zero because the differential mode input voltage of the ideal operational amplifier is equal to zero, that is, the "virtual short" state is considered.

[0080] Furthermore, the fractional-order differential circuit also includes:

[0081] Let the fractional-order differential circuit output voltage and input voltage Satisfies the fractional differential relationship:

[0082] Among them, the coefficient k is the gain of the fractional-order differential circuit, a is the fractional order, and in the fractional-order capacitor circuit, 0<α<2;

[0083] According to the correspondence between the real part and the imaginary part, the following results are obtained:

[0084] Among them, the output voltage of the fractional-order differential circuit is Leading fractional-order differential circuit input voltage The phase is equal to απ / 2.

[0085] It should be noted that according to the corresponding relationship between the real part and the imaginary part, the values ​​of the components in the fractional-order differential circuit satisfy the equation (5) equal to the equation (7). Formula (6) is equal to formula (7)

[0086] Furthermore, the fractional-order differential circuit also includes:

[0087] The resistors R3 and R4 are introduced into the circuit to reduce the nonlinearity of the JFET equivalent resistance through circuit compensation. The output current i D With the gate-source voltage v GS , drain-source voltage v DS Relationship satisfaction:

[0088] Among them, K is the constant corresponding to each field effect tube, v T is the approximate threshold voltage, the JFET equivalent resistance R DS for:

[0089] Among them, the JFET equivalent resistance R DS The value of the variable resistor R eq The value of RDS = = R eq .

[0090] Furthermore, the fractional-order differential circuit also includes:

[0091] From formula (10), we can know that the JFET equivalent resistance is divided by V GS In addition to control, it also DS The nonlinearity of the equivalent resistance value is caused by the resistors R3 and R4. DS Negative feedback to suppress v DS to i D The influence of JFET gate-source voltage v GS With the feedback voltage v fd and drain-source voltage v DS satisfy:

[0092] Let the resistor R3 = R4, and we can get:

[0093] According to the JFET equivalent resistance expression:

[0094] Among them, K is the constant corresponding to each field effect tube, v T is the approximate threshold voltage.

[0095] Furthermore, from formula (14), we can see that after introducing negative feedback, the JFET equivalent resistance is proportional to v DS No relation, v DS The nonlinear effect on the JFET equivalent resistance is greatly weakened.

[0096] It should be noted that the feedback tracking circuit consists of four parts: phase detector, RC low-pass filter, integrator and voltage follower;

[0097] Among them, the phase detector includes a multiplier and a subtractor;

[0098] The RC low-pass filter is composed of capacitor C2 and resistor R9;

[0099] The integrator consists of the operational amplifier opa2, resistor R 10 、R 11 and capacitor C3;

[0100] The voltage follower consists of the operational amplifier opa3, resistor R 12 、R 13 constitute.

[0101] Furthermore, from formula (4), we can get that the gain of the fractional-order differential circuit is 1, so the amplitude of the input signal and the output signal of the fractional-order differential circuit remain equal.

[0102] Furthermore, let the input signal of the fractional-order differential circuit be v in =Asin(ωt+p i ), output signal v a =Asin(ωt+p o ) is multiplied, the phase detector will v in With v a Multiplying them, the result is:

[0103] It should be noted that the multiplication result of the two has a double frequency component and a DC component. If the fractional order differential circuit output voltage v a With input voltage v in Satisfying the relationship (7), v a With v in The phase difference should satisfy Then the DC component reference comparison value should be set to Set the order of the fractional capacitor circuit to α, and perform real-time calculation of v a With v in The DC component obtained by multiplication is compared with the expected DC component reference value to obtain the error between the current phase difference and the expected phase difference. The DC component error is extracted by RC low-pass filter, and then the error is integrated by integrator. If the error is not eliminated, the regulation effect is continuously enhanced. The output voltage is isolated by the voltage follower and acts on the gate terminal of the JFET. The JFET equivalent resistance value is changed in real time to meet the formula (8), so that the output voltage v of the fractional-order differential circuit is a Leading input voltage v in The phase meets the expected value απ / 2.

[0104] Furthermore, the subtractor circuit includes: the subtractor circuit is composed of an operational amplifier opa4, resistors R5, R6, R7, and R8;

[0105] Furthermore, in the complex frequency domain, let the voltage at the non-inverting input of the operational amplifier opa4 be The voltage at the inverting input is Let the input current of operational amplifier opa4 be zero, and we get:

[0106] Furthermore, let the differential input voltage of operational amplifier opa4 be zero, and let R5 = R6 = R7 = R8, then:

[0107] Furthermore, the output voltage of the subtractor is:

[0108] Furthermore, according to Kirchhoff's voltage law, the voltage across the resistor R is:

[0109] Furthermore, the current flowing through the resistor R, that is, the input current is obtained as:

[0110] Among them, the fractional capacitance is C α =1 / ω α R, represents the subtractor output voltage.

[0111] It should be noted that, from formula (21), it can be seen that the circuit composed of the fractional-order differential circuit, the feedback tracking circuit subtraction circuit and the resistor R meets the definition of a fractional-order capacitor.

[0112] The above-mentioned unit modules may be embedded in or independent of the processor in the computer device in the form of hardware, or may be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above-mentioned modules.

[0113] In a preferred embodiment, a method for controlling a fractional-order capacitor circuit with adjustable order includes:

[0114] The order of the fractional-order capacitor circuit is set according to system requirements, and a collective circuit consisting of a resistor, a fractional-order differential circuit, a feedback tracking circuit, and a subtractor circuit is designed according to the order of the fractional-order capacitor circuit;

[0115] The fractional-order differential circuit is used to perform differential operations. The output of the feedback tracking circuit acts on the fractional-order differential circuit. The feedback tracking circuit realizes the fractional-order differential operation corresponding to the fractional order by controlling the internal voltage. The desired fractional order is obtained by setting the digital reference comparison signal of the phase detector in the feedback tracking circuit.

[0116] The voltage on the resistor R is controlled according to the voltage difference between the input voltage and the output voltage of the fractional-order differential circuit, thereby realizing the control of the input current in the fractional-order capacitor circuit with adjustable order.

[0117] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be shown in Figure 6. The computer device includes a processor, a memory, a communication interface, a display screen, and an input device connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner may be achieved through WIFI, an operator network, NFC (near field communication), or other technologies. When the computer program is executed by the processor, a method for controlling a fractional-order capacitor circuit with adjustable order is implemented. The display screen of the computer device may be a liquid crystal display or an electronic ink display screen, and the input device of the computer device may be a touch layer covering the display screen, or a key, trackball, or touchpad provided on the computer device housing, or an external keyboard, touchpad, or mouse.

[0118] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented:

[0119] The order of the fractional-order capacitor circuit is set according to system requirements, and a collective circuit consisting of a resistor, a fractional-order differential circuit, a feedback tracking circuit, and a subtractor circuit is designed according to the order of the fractional-order capacitor circuit;

[0120] The fractional-order differential circuit is used to perform differential operations. The output of the feedback tracking circuit acts on the fractional-order differential circuit. The feedback tracking circuit realizes the fractional-order differential operation corresponding to the fractional order by controlling the internal voltage. The desired fractional order is obtained by setting the digital reference comparison signal of the phase detector in the feedback tracking circuit.

[0121] The voltage on the resistor R is controlled according to the voltage difference between the input voltage and the output voltage of the fractional-order differential circuit, thereby realizing the control of the input current in the fractional-order capacitor circuit with adjustable order.

[0122] Example 2

[0123] 1-5 , which illustrate an embodiment of the present invention, provide a fractional-order capacitor circuit with adjustable order and a control method. To verify the beneficial effects of the present invention, scientific demonstration is conducted through experiments.

[0124] The present embodiment is simulated and verified, and the parameters of each component are as follows:

[0125] According to formula (15), let the digital reference comparison signal in the feedback tracking circuit be 0.5cos(απ / 2), set the order of the fractional-order capacitor circuit to α=0.5, and select the input voltage v in is 1V / 10kHz to verify the model, that is, v in =V in sin2πft, where V in =1V, f=10kHz, the other circuit parameters are resistance R=2Ω, capacitance C1=1nF, C2=10μF, C3=1.2nF. In addition, R1=R2=4.3kΩ, R3=R4=47kΩ, R5=R6=R7=R8=R9=10kΩ, R 10 =4kΩ, R 11 =10MΩ, R 12 =R 13 =10kΩ. Substituting the above parameters into equation (21), the time domain expression of the fractional-order capacitor current can be obtained as:

[0126] The simulation waveform of the circuit is shown in Figure 3. From the simulation results in Figure 3, it can be seen that the peak current is 0.5A, and the current leads the voltage (12.5×10 -6 )×10000×360°=45°=0.25π, the simulation results are consistent with formula (22).

[0127] According to formula (15), let the digital reference comparison signal in the feedback tracking circuit be 0.5cos(απ / 2), set the order of the fractional-order capacitor circuit to α=1, and still select the input voltage v in =V in sin2πft, where V in =1V, f=10kHz AC voltage source is used to verify the model, and the parameters of all other components remain unchanged.

[0128] The simulation waveform of the circuit is shown in Figure 4. From the simulation results in Figure 5, it can be seen that the peak current is 1A, and the current leads the voltage (25×10 -6 )×10000×360°=90°=0.5π, the simulation results are consistent with the theoretical analysis.

[0129] According to formula (15), let the digital reference comparison signal in the feedback tracking circuit be 0.5cos(απ / 2), set the order of the fractional-order capacitor circuit to α=1.5, and still select the input voltage v in =V in sin2πft, where V in =1V, f=10kHz AC voltage source is used to verify the model, and the parameters of all other components remain unchanged.

[0130] The simulation waveform of the circuit is shown in Figure 5. From the simulation results in Figure 5, it can be seen that the peak current is 1A, and the current leads the voltage (37.5×10 -6 )×10000×360°=135°=0.75π. The simulation results are consistent with the theoretical analysis.

[0131] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

[0132] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code. The scheme in the embodiment of the present application can be implemented in various computer languages, for example, object-oriented programming language Java and literal translation scripting language JavaScript, etc.

[0133] The present application is described with reference to the flow chart and / or block diagram of the method, device (system), and computer program product according to the embodiment of the present application. It should be understood that each flow process and / or box in the flow chart and / or block diagram and the combination of the flow process and / or box in the flow chart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processing machine or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for realizing the function specified in one flow chart flow or multiple flows and / or one box or multiple boxes of the block diagram.

[0134] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0135] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0136] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0137] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A fractional-order capacitor circuit with adjustable order, characterized in that Comprising: A resistor R, a fractional-order differential circuit, a feedback tracking circuit, and a subtractor circuit; One end of the input terminal of the fractional-order capacitor circuit with adjustable order is grounded, and the other end is connected to one end of the resistor R. The other end of the resistor R is connected to the output terminal of the subtractor circuit; The fractional-order differential circuit uses a junction field-effect transistor operating in the variable resistance region to replace the fixed-value resistor in the ordinary differential circuit to achieve differential operation; The output of the feedback tracking circuit acts on the gate terminal of the junction field-effect transistor in the fractional-order differential circuit. The source terminal of the junction field-effect transistor is grounded. The feedback tracking circuit controls the equivalent resistance value of the junction field-effect transistor in real time by controlling the gate-source voltage of the JFET to achieve fractional-order differential operation of the corresponding fractional order. By setting the digital reference comparison signal of the phase discriminator in the feedback tracking circuit, the desired fractional order is obtained; The voltage difference between the input voltage and the output voltage of the fractional-order differential circuit controls the voltage across the resistor R, thereby achieving the control of the input current across the resistor R.

2. The adjustable-order fractional-order capacitive circuit according to claim 1, wherein The fractional-order differential circuit includes: an operational amplifier opa1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, and a junction field effect transistor JFET, where the JFET operates in the variable resistance region and is equivalent to a variable resistor R eq ; In the complex frequency domain, denote and are respectively the input voltage and input current of the fractional-order capacitor circuit; Then and Meet the characteristics of the following fractional-order capacitor: where s = jω represents the complex frequency, C α is a fractional-order capacitor, α is the order of the fractional-order capacitor, and 0 ≤ a ≤ 2 is satisfied; In the complex frequency domain, denote the voltage at the non-inverting input terminal of the operational amplifier opa1 in the fractional-order operational circuit as The voltage at the inverting input is Set the input current of operational amplifier opa1 to zero. Then, the voltages at the non-inverting input terminal and the inverting input terminal of operational amplifier opa1 in the fractional-order operational circuit are expressed as follows: Set the differential input voltage of operational amplifier opa1 to zero, and let R1 = R2, then we get: Among them, R eq represents the resistance value after the equivalent of the junction field effect transistor JFET, Represents the output voltage of the fractional-order differential circuit, represents the input voltage of the fractional-order differential circuit, C1 represents the capacitance value, a represents the real part, and b represents the imaginary part.

3. The adjustable-order fractional-order capacitive circuit according to claim 2, wherein The fractional-order differential circuit further includes: Let the output voltage of the fractional-order differential circuit and the input voltage Satisfy the fractional differential relationship: Wherein, the coefficient k is the gain of the fractional-order differential circuit, a is the fractional order, and in the fractional-order capacitor circuit, 0 < α < 2; According to the corresponding relationship between the real part and the imaginary part, the following results are obtained: wherein, the output voltage of the fractional-order differential circuit Input voltage of the advanced fractional-order differential circuit The phase is equal to απ / 2.

4. The order-adjustable fractional-order capacitive circuit according to claim 3, wherein The fractional-order differential circuit further includes: Additional resistors R3 and R4 are introduced into the circuit to reduce the non-linearity of the equivalent resistance of the JFET through circuit compensation. The output current i of the JFET D and the gate-source voltage v GS , drain-source voltage v DS are related as follows: where K is a constant corresponding to each field effect transistor, and v T is the approximate threshold voltage, and the equivalent resistance R of the JFET DS is: Among them, the equivalent resistance R of the JFET DS is the value of the variable resistor R eq , that is, R DS == R eq .

5. The order-adjustable fractional-order capacitance circuit according to claim 4, characterized in that, The fractional-order differential circuit further includes: Resistors R3 and R4 are used to suppress v DS through negative feedback on v DS to mitigate the impact on i D . The gate-source voltage v GS of the JFET, the feedback voltage v fd , and the drain-source voltage v DS satisfy: Let the resistance R3 = R4, and it can be deduced that: According to the JFET equivalent resistance expression, we have: where K is a constant corresponding to each field effect transistor, and v T is the approximate threshold voltage.

6. The order-adjustable fractional-order capacitance circuit according to claim 5, characterized in that The feedback tracking circuit includes: a phase discriminator, an RC low-pass filter, an integrator, and a voltage follower; The phase discriminator includes a multiplier and a subtractor; The RC low-pass filter is composed of a capacitor C2 and a resistor R9; The integrator is composed of an operational amplifier opa2, resistors R 10 , R 11 and a capacitor C3; The voltage follower is composed of operational amplifier opa3, resistor R 12 , R 13 .

7. The adjustable-order fractional-order capacitive circuit according to claim 6, wherein, The subtractor circuit includes: the subtractor circuit is composed of an operational amplifier opa4, resistors R5, R6, R7, and R8; In the complex frequency domain, let the voltage at the non-inverting input terminal of the operational amplifier opa4 be The voltage at the inverting input terminal is Set the input current of operational amplifier opa4 to zero, and we get: Set the differential input voltage of operational amplifier opa4 to zero, and let R5 = R6 = R7 = R8, then we get: The magnitude of the subtractor output voltage is: According to Kirchhoff's voltage law, the voltage across resistor R is: Furthermore, the current flowing through resistor R is obtained, that is, the input current is: wherein, the fractional-order capacitance value is C α = 1 / ω α R, represents the output voltage of the subtractor.

8. A control method for a fractional-order capacitance circuit with adjustable order, characterized in that, Comprising: Set the order of the fractional-order capacitor circuit according to the system requirements, and design a combined circuit composed of a resistor, a fractional-order differential circuit, a feedback tracking circuit, and a subtractor circuit according to the order of the fractional-order capacitor circuit; The fractional-order differential circuit is used for differential operation. The output of the feedback tracking circuit acts on the fractional-order differential circuit. The feedback tracking circuit controls the internal voltage to achieve fractional-order differential operation of the corresponding fractional order. By setting the digital reference comparison signal of the phase discriminator in the feedback tracking circuit, the desired fractional order is obtained; Control the voltage across the resistor R according to the voltage difference between the input voltage and the output voltage of the fractional-order differential circuit, thereby achieving the control of the input current in the fractional-order capacitor circuit with adjustable order.

9. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method described in claim 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method described in claim 8.

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