Semiconductor device, electronic device, ph sensor, biosensor, and method for producing semiconductor device
A low-temperature manufacturing process for IGZTO oxide semiconductor layers on resin substrates addresses the softening issue, achieving optimal conductivity and suitable performance for semiconductor devices.
Patent Information
- Application Number
- PCT/JP2023/046442
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-25
- Publication Date
- 2025-07-03
AI Technical Summary
Existing semiconductor devices using IGZTO oxide semiconductor layers require high temperatures exceeding 300°C for optimal conductivity, which can cause resin substrates to soften, limiting their application.
A manufacturing method involving a first reduction treatment and a heat treatment at 250°C or lower is employed to form an IGZTO oxide semiconductor layer on a resin substrate, optimizing conductivity without exceeding the resin's softening point.
The method enables the production of semiconductor devices with an oxide semiconductor layer conductivity of 10^-4 to 10^-2 S/cm, suitable for operation, even when using resin substrates, by maintaining process temperatures below 300°C.
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Figure JP2023046442_03072025_PF_FP_ABST
Abstract
Description
Semiconductor device, electronic device, pH sensor, biosensor, and method for manufacturing semiconductor device
[0001] The present invention relates to a semiconductor device, an electronic device, a pH sensor, a biosensor, and a method for manufacturing a semiconductor device.
[0002] As a semiconductor material used in semiconductor devices such as thin film transistors (TFTs), for example, an oxide consisting of In, Ga, Zn, and Sn (IGZTO; In-Ga-Zn-Sn-O) is used (see Patent Document 1). A semiconductor material including an IGZTO layer is expected to have an appropriate conductivity so that the semiconductor device can obtain good switching performance.
[0003] Japanese Patent Application Laid-Open No. 2022-077434
[0004] A first aspect of the present invention is a semiconductor device comprising: a resin substrate; a first electrode and a second electrode provided on the substrate; and an oxide semiconductor layer in contact with the first electrode and the second electrode and containing In, Ga, Zn, and Sn, wherein the oxide semiconductor layer has a conductivity of 10 -4 ~10 -2 The semiconductor device has a resistivity of 1.5 S / cm.
[0005] A second aspect of the present invention is a pH sensor including the semiconductor device of the first aspect.
[0006] A third aspect of the present invention is a biosensor including the semiconductor device of the first aspect.
[0007] A fourth aspect of the present invention is a method for manufacturing a semiconductor device, including the steps of: forming an oxide semiconductor layer containing In, Ga, Zn, and Sn on a resin substrate; performing a first reduction treatment on the oxide semiconductor layer; performing a heat treatment on the oxide semiconductor layer after the first reduction treatment at 250° C. or less; forming an insulating layer on the oxide semiconductor layer that has been subjected to the heat treatment; and forming a source electrode and a drain electrode in contact with parts of the oxide semiconductor layer exposed from the insulating layer.
[0008] A fifth aspect of the present invention is a method for manufacturing a semiconductor device, including the steps of forming a gate electrode on a resin substrate, forming an insulating layer on the gate electrode, forming an oxide semiconductor layer containing In, Ga, Zn, and Sn on the insulating layer, performing a first reduction treatment on the oxide semiconductor layer, performing a heat treatment on the oxide semiconductor layer after the first reduction treatment at 250° C. or less, and forming a source electrode and a drain electrode in contact with the oxide semiconductor layer after the heat treatment.
[0009] It is a conceptual diagram for explaining a manufacturing method of the semiconductor device according to the embodiment. It is a schematic diagram of a bottom gate type semiconductor device according to the embodiment. It is a schematic diagram of a pH sensor including the semiconductor device according to the embodiment. It is a diagram showing the transfer characteristics of a thin film transistor in this example.
[0010] Hereinafter, a detailed description will be given of an embodiment of the present invention (hereinafter simply referred to as "the present embodiment"). The present embodiment is an example for explaining the present invention, and is not intended to limit the present invention to the following content. Furthermore, in the following embodiment, when necessary for convenience, the description will be divided into individual embodiments, but unless otherwise specified, they are not unrelated to each other, and one is related to the other in terms of partial or full modification, details, supplementary explanation, etc.
[0011] Furthermore, in the following embodiments, when referring to the number of elements (including the number, numerical value, amount, range, etc.), the number is not limited to the specific number, and may be greater than or less than the specific number, unless otherwise specified or clearly limited in principle to a specific number. Furthermore, in the following embodiments, it goes without saying that the constituent elements (including element steps, etc.) are not necessarily essential, unless otherwise specified or clearly considered essential in principle.
[0012] Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of components, etc., it is intended to include those that are substantially similar or similar to those shapes, etc., unless otherwise specified or when it is considered that this is clearly not the case in principle. This also applies to the above numerical values and ranges.
[0013] Furthermore, in all the drawings for explaining the embodiments, the same components are generally designated by the same reference numerals, and repeated explanations thereof will be omitted. In addition, hatching may be used even in plan views to make the drawings easier to understand.
[0014] <Top-gate type semiconductor device> Fig. 1 is a conceptual diagram illustrating a method for manufacturing a semiconductor device according to this embodiment. A top-gate type semiconductor device A is manufactured by the manufacturing method shown in this drawing.
[0015] First, as shown in step A of FIG. 1, an oxide film (SiO 2 ) is formed on the substrate 11. The material of the substrate 11 is not particularly limited, and known materials can be used. For the substrate 11, resins such as polyacrylate, polycarbonate, polyurethane, polystyrene, cellulose polymer, polyolefin, polyamide, polyimide, polyester, polyphenylene, polyethylene, polyethylene terephthalate, polyethylene naphthalate, polypropylene, ethylene-vinyl copolymer, polyvinyl chloride, cycloolefin polymer, and triacetyl cellulose can be used. Note that the formation of an undercoat film 12 on the substrate 11 is optional.
[0016] If the substrate 11 is a flexible resin film substrate (sometimes called a "sheet substrate"), a roll-to-roll method or a roll-to-sheet method can be adopted, in which a film is continuously formed in a roll shape, which is expected to improve the efficiency and simplification of the manufacturing process and the yield.
[0017] The roll-to-roll method refers to a method in which a roll-shaped film substrate is unwound, a film is continuously formed, and then the film is wound up again into a roll. The roll-to-sheet method refers to a method in which a roll-shaped film substrate is unwound, a film is continuously formed, and then the film is cut into sheets. When using a flexible substrate 11 compatible with the roll-to-roll method or the roll-to-sheet method, the thickness and rigidity (Young's modulus) of the substrate 11 may be within a range that does not cause buckling-induced creases or irreversible wrinkles in the substrate 11 when passing through a transport path such as an exposure device. Therefore, it is preferable to use at least one of polyethylene terephthalate, polyethylene naphthalate, polyimide, cycloolefin polymer, and triacetyl cellulose as the material for the substrate 11.
[0018] Next, as shown in step B of FIG. 1 , an oxide semiconductor layer 13 is formed on the base film 12. The oxide semiconductor layer 13 is an oxide composed of In, Ga, Zn, and Sn (hereinafter referred to as "IGZTO"). The oxide semiconductor film is formed by sputtering. The sputtering may be performed by simultaneous sputtering using one type of material as a target, or by co-sputtering using multiple types of materials as targets. The oxide semiconductor film is patterned into a desired shape to form the oxide semiconductor layer 13. For example, the oxide semiconductor film is exposed to light in a predetermined pattern, developed, and etched to form the oxide semiconductor layer 13 in the desired shape.
[0019] Thereafter, a first reduction treatment is performed on the oxide semiconductor layer 13. The first reduction treatment may be performed by any method as long as it can reduce at least a portion of the oxide in the oxide semiconductor layer 13. For example, the first reduction treatment is performed by holding the oxide semiconductor layer 13 in an ammonia gas atmosphere for a predetermined time. The ammonia gas atmosphere may be changed to a mixed atmosphere of ammonia and nitrogen, or a mixed atmosphere of ammonia and hydrogen. In this case, the first reduction treatment is preferably performed at 150°C to 250°C for 10 minutes to 2 hours.
[0020] As another example, the first reduction treatment is performed by irradiating the oxide semiconductor layer 13 with ammonia plasma for a predetermined time in an ammonia gas atmosphere. In this example, the ammonia gas atmosphere may be changed to a mixed atmosphere of ammonia and nitrogen or a mixed atmosphere of ammonia and hydrogen. In this case, the first reduction treatment is preferably performed at 150° C. to 250° C. for 2 minutes to 0.5 hours.
[0021] As another example, the first reduction treatment is performed by holding the oxide semiconductor layer 13 in an atmosphere of an inert gas (e.g., helium gas, argon gas, nitrogen gas, or a mixture of two or more thereof) for a predetermined time. The inert gas atmosphere may be changed to a mixed atmosphere of an inert gas and hydrogen, or a mixed atmosphere of argon and nitrogen. In this case, the first reduction treatment is preferably performed at 150°C to 250°C for 10 minutes to 2 hours.
[0022] As another example, the first reduction treatment is performed by irradiating the oxide semiconductor layer 13 with plasma for a predetermined time in an inert gas atmosphere (e.g., helium gas, argon gas, nitrogen gas, or a mixture of two or more thereof). In this example, the inert gas atmosphere may be changed to a mixed atmosphere of an inert gas and hydrogen. In this case, the first reduction treatment is preferably performed at 150°C to 250°C for 2 minutes to 0.5 hours.
[0023] As another example, the first reduction treatment is performed by holding the oxide semiconductor layer 13 for a predetermined time in a mixed atmosphere of formic acid gas and water vapor. In this case, the first reduction treatment is preferably performed at 150° C. to 230° C. for 10 minutes to 2 hours.
[0024] Next, the substrate 11 that has been subjected to the first reduction treatment is subjected to a first heat treatment to oxidize the oxide semiconductor layer 13. The method of the first heat treatment is not limited, and it may be performed at a temperature equal to or lower than the softening point of the substrate 11 in the presence of oxygen (for example, in the atmosphere). When a resin is used for the substrate 11, the first heat treatment may be performed, for example, at 250°C or lower, 240°C or lower, or 230°C or lower. The time for the heat treatment may be, for example, 0.5 to 3 hours, 0.5 to 1.5 hours, or 0.7 to 1.2 hours.
[0025] Next, as shown in step C of FIG. 1 , an insulating layer 14 is formed on the oxide semiconductor layer 13 that has been subjected to the first heat treatment. The material of the insulating layer 14 is not particularly limited, and known materials can be used. Specific examples include SiO 2 , Si 3 N 4 , SiON, Al 2 O 3 , Ta 2 O 5 , HfO 2 or organic materials such as photocurable resins and thermosetting resins. The method for forming the insulating layer 14 is not particularly limited, and a suitable method can be adopted as appropriate, taking into consideration the materials of the substrate 11, the base film 12, and the oxide semiconductor layer 13, etc.
[0026] Next, as shown in step D of FIG. 1 , a gate electrode 15 is formed on the insulating layer 14. The method for forming the gate electrode 15 is not particularly limited, and any suitable method can be adopted as appropriate. For example, a metal film of Mo, W, Al, Cu, Au, Ni, Cu—Al alloy, Al—Si alloy, Al—Nd alloy, Mo—W alloy, Ni—P alloy, or the like is formed on the insulating layer 14, and the metal film is exposed to light in a predetermined pattern, developed, and etched to obtain the gate electrode 15 in the desired shape. Note that the resist formed on the gate electrode 15 may or may not be removed in this step.
[0027] 1, a portion of the insulating layer 14 is removed to expose a portion of the oxide semiconductor layer 13. For example, the insulating layer 14 is etched using the gate electrode 15 as a mask, thereby exposing a portion of the oxide semiconductor layer 13.
[0028] Next, as shown in step F of FIG. 1 , a second reduction treatment is performed on the exposed oxide semiconductor layer 13. The method of the second reduction treatment is not limited as long as it can reduce at least a portion of the oxide semiconductor layer 13 exposed from the insulating layer 14 after etching. For example, the second reduction treatment involves irradiating the oxide semiconductor layer 13 with plasma for a predetermined time in a rare gas (e.g., argon gas) atmosphere. As another example, the second reduction treatment involves irradiating the exposed oxide semiconductor layer 13 with plasma for a predetermined time in a nitrogen gas atmosphere or an ammonia gas atmosphere. In the second reduction treatment, the substrate 11 may be heated. When the substrate 11 is heated, the temperature is set to 250° C. or lower.
[0029] The second reduction treatment reduces the resistance of the exposed portion of the oxide semiconductor layer 13. Therefore, the exposed portion of the oxide semiconductor layer 13 becomes a low-resistance electrode region 13a, and the unexposed portion becomes a high-resistance channel region 13b.
[0030] 1, an interlayer insulating layer 16 is formed to cover the electrode region 13a, the insulating layer 14, and the gate electrode 15. The material of the interlayer insulating layer 16 is not particularly limited, and may be, for example, SiO 2 , Si 3 N 4 , SiON, Al 2 O 3 , Ta 2 O 5 , HfO 2 For example, inorganic materials such as silicon dioxide, silicon dioxide, and the like, or organic materials such as photocurable resins and thermosetting resins can be used. A suitable method can be used as the method for forming the interlayer insulating layer 16. Thereafter, the interlayer insulating layer 16 is patterned into a desired shape, and contact holes are formed so that the electrode regions 13a are exposed. The patterning method is not limited, and any known method can be used, such as exposing, developing, and etching the interlayer insulating layer 16 in a predetermined pattern.
[0031] 1 , a source electrode 17a and a drain electrode 17b are formed so as to be in contact with the oxide semiconductor layer 13 (i.e., the electrode region 13a) exposed through the contact hole in the interlayer insulating layer 16. The source electrode 17a and the drain electrode 17b may be made of a known material, such as Mo, W, Al, Cu, Au, Ni, a Cu—Al alloy, an Al—Si alloy, an Al—Nd alloy, a Mo—W alloy, or a Ni—P alloy. The source electrode 17a and the drain electrode 17b may be formed by a known method, such as forming an electrode layer by sputtering and then etching it into a predetermined shape.
[0032] Next, the substrate 11 is subjected to a second heat treatment. The second heat treatment in this step is performed at a temperature below the softening point of the substrate, similar to the first heat treatment after the first reduction treatment. For example, the second heat treatment may be performed at 250°C or below, or at 210°C to 240°C. The method of the second heat treatment is not limited, and it may be performed at a temperature below the softening point of the substrate 11 in the presence of oxygen (e.g., in the air). When a resin is used for the substrate 11, the second heat treatment may be performed at, for example, 250°C or below, 240°C or below, or 230°C or below. The heating time of the second heat treatment may be 10 minutes to 2 hours, or 30 minutes to 1 hour.
[0033] In this way, the semiconductor device A according to this embodiment can be manufactured. By performing the first reduction treatment, the electrical conductivity of the oxide semiconductor layer 13 can be expected to be optimized.
[0034] The oxide semiconductor layer 13 of the semiconductor device obtained by this manufacturing method has a conductivity of 10 -4 ~10 -2 Conventionally, the oxide semiconductor layer 13 containing IGZTO has this performance (i.e., the conductivity is 10 -4 ~10 -2 In order to achieve a high specific resistance (S / cm), it was necessary to heat the substrate 11 at a temperature exceeding 300° C. On the other hand, when a resin is used for the substrate 11, there is a possibility that the substrate 11 will soften if heated at a temperature exceeding 300° C.
[0035] According to this embodiment, the first reduction treatment and the first heat treatment do not require heating at a temperature exceeding 300° C. (the softening point of the resin), and therefore, an oxide semiconductor layer 13 with favorable performance can be obtained even when a resin is used for the substrate 11. That is, according to this embodiment, a transistor having an oxide semiconductor layer with favorable characteristics can be fabricated within a process temperature range of 250° C. or less by the first reduction treatment and the first heat treatment.
[0036] In this embodiment, the oxide semiconductor layer 13 is formed by patterning, and then the first reduction treatment and the first heat treatment are performed, but this is not limiting. The oxide semiconductor layer 13 may be formed by performing the first reduction treatment and the first heat treatment on the oxide semiconductor film, and then patterning.
[0037] 2 is a schematic diagram of a bottom-gate semiconductor device B according to this embodiment. To obtain the semiconductor device B, first, a gate electrode 15 is formed on a resin substrate 11. The material of the substrate 11, the material of the gate electrode 15, and the method of forming the gate electrode 15 are the same as those of the semiconductor device A described above. Next, an insulating layer 14 is formed so as to cover the gate electrode 15.
[0038] Next, the oxide semiconductor layer 13 containing In, Ga, Zn, and Sn is formed on the insulating layer 14. More specifically, IGZTO is sputtered on the insulating layer 14 and patterned to obtain the oxide semiconductor layer 13 in a desired shape.
[0039] The oxide semiconductor layer 13 having a desired shape is subjected to a first reduction treatment. After the first reduction treatment, a first heat treatment is performed in the presence of oxygen, for example, in the atmosphere, at a temperature equal to or lower than the softening point of the substrate 11. The purpose of the first heat treatment is to oxidize the oxide semiconductor layer 13. The first reduction treatment and the first heat treatment are similar to those in the method for manufacturing a top-gate semiconductor device. That is, the first heat treatment may be performed on the oxide semiconductor layer 13 after the first reduction treatment at 250° C. or lower, 240° C. or lower, or 230° C. or lower. Note that, similar to the method for manufacturing a top-gate semiconductor device, the oxide semiconductor layer 13 may be formed by patterning after the first reduction treatment and the first heat treatment are performed on the oxide semiconductor film.
[0040] Thereafter, a source electrode 17a and a drain electrode 17b are formed in contact with the oxide semiconductor layer 13 that has been subjected to the first heat treatment. The material and method of forming the source electrode 17a and the drain electrode 17b are the same as those of the semiconductor device A described above. After the semiconductor device B is manufactured, a second heat treatment may be performed. The second heat treatment is the same as that of the semiconductor device A.
[0041] As described above, in the bottom gate type semiconductor device B using a resin for the substrate 11, similarly to the semiconductor device A, the conductivity of the oxide semiconductor layer 13 is 10 -4 ~10 -2 A suitable performance of 0.25 S / cm can be obtained.
[0042] <pH Sensor> FIG. 3 is a schematic diagram of a pH sensor C including a semiconductor device according to this embodiment. The pH sensor C is, for example, a pH sensor (ion-sensitive field-effect transistor (FET)) using the semiconductor device according to this embodiment. The pH sensor C includes a semiconductor device having a resin substrate 11 on which an oxide film serving as an underlayer 12 is formed, an oxide semiconductor layer 13 provided on the substrate 11, and Ag electrodes 70a and 70b, a silicone rubber pool wall 80 provided on the semiconductor device, and a reference electrode 90 provided within the pool wall 80. In the manufacturing process, the oxide semiconductor layer 13 is subjected to a first reduction treatment and a first heat treatment (air annealing) for oxidizing the oxide semiconductor layer 13, as in the above example.
[0043] The solution S to be measured (for example, hydrochloric acid in the case of an acidic solution, or sodium hydroxide solution in the case of an alkaline solution) is filled into a pool formed by a pool wall 80, and the potential difference with the reference electrode 90 is measured. Since the pH of the solution S depends on the amount of protons in the solution, the measurement principle of a pH sensor is to electrically measure the amount of protons in the solution and calculate the pH value based on the measured amount of protons.
[0044] The semiconductor device according to this embodiment can be provided with high stability against strong acids and strong bases, and therefore, a pH sensor C using this semiconductor device exhibits high stability over a wide pH range, from pH 1 to 14, enabling rapid and accurate measurement even when the target sample is a strong acid or base.
[0045] <Biosensor> Although not shown, the semiconductor device according to this embodiment can also be used as a biosensor (sometimes called a biosensor chip). A biosensor is a chemical sensor that utilizes a molecular recognition mechanism of biological origin, and is used as a chemical recognition element for pH changes, oxidation-reduction reactions, etc. in a living body.
[0046] In this regard, the semiconductor device according to this embodiment has high stability over a wide pH range, and therefore can be used as a biosensor that can accurately sense even when the measurement target is strongly acidic or strongly basic. For example, a specific antibody can be modified on the semiconductor surface, and a biosensor can be used that measures the amount of protons when a specific detection target such as DNA is adsorbed onto the surface.
[0047] Example 1 According to the process shown in FIG. 1, a polyimide film was used as the substrate 11, and a 200 nm SiO 2 A film was formed by a chemical vapor deposition (CVD) method. An oxide semiconductor film with a thickness of 15 nm was formed on this substrate 11. The oxide semiconductor film was formed by RF sputtering using a 2-inch IGZTO sintered target (KOS-B03C manufactured by Kobelco Research Institute, Inc.). The substrate temperature during film formation was 105°C, and argon gas was used as the sputtering gas. Argon gas was mixed with 12 sccm of argon gas at a flow rate of 1.2 sccm, and the oxide semiconductor film was formed at a pressure of 0.07 Pa.
[0048] Next, the oxide semiconductor film was subjected to a first reduction treatment. The first reduction treatment was performed by mixing ammonia gas (50 sccm) and nitrogen gas (500 sccm) at a flow rate of 100 Pa and 210°C, and irradiating the oxide semiconductor film with RF plasma for 5 minutes. The first reduction treatment was then performed in air at 230°C for 1 hour. After the first heat treatment, the oxide semiconductor film was cooled to room temperature. A probe with four needles spaced 1 mm apart was placed in contact with the surface of the oxide semiconductor film, and the electrical resistance of the oxide semiconductor film was measured using a four-point probe digital multimeter. The electrical conductivity of the oxide semiconductor film was calculated from the measured electrical resistance. The results are shown in Table 1.
[0049] Example 2 A substrate 11 on which an oxide semiconductor film was formed was subjected to a first reduction treatment in the same manner as in Example 1. Thereafter, a first heat treatment (annealing treatment) was performed in the atmosphere at a temperature of 250° C. for 1 hour. Thereafter, the electrical conductivity of the oxide semiconductor film was calculated in the same manner as in Example 1. The results are shown in Table 1.
[0050] Example 3 A substrate 11 on which an oxide semiconductor film was formed was prepared in the same manner as in Example 1. In Example 3, a first reduction treatment was performed in a mixed atmosphere of argon and hydrogen. First, a gas in which argon gas and 4% hydrogen were mixed was supplied into a chamber until atmospheric pressure was reached. Then, the oxide semiconductor film was heated at a temperature of 210° C. for 1 hour in an argon gas atmosphere containing 4% hydrogen, thereby performing the first reduction treatment. Then, a first heat treatment was performed in the atmosphere at a temperature of 230° C. for 1 hour. Thereafter, the conductivity of the oxide semiconductor film was calculated in the same manner as in Example 1. The results are shown in Table 1.
[0051] Example 4 In Examples 1 to 3, the thickness of the oxide semiconductor film was 15 nm, but in Example 4, the thickness of the oxide semiconductor film was set to 20 nm. A substrate 11 on which an underlayer film 12 was formed was prepared in the same manner as in Example 1, except for the thickness of the oxide semiconductor layer. A 20-nm-thick oxide semiconductor film was formed on the underlayer film 12. Then, as in Example 1, a first reduction treatment was performed by mixing ammonia gas at a flow rate of 50 sccm and nitrogen gas at 500 sccm, and irradiating the oxide semiconductor film with RF plasma at a pressure of 100 Pa and a temperature of 210°C for 5 minutes. Then, as in Example 1, a first heat treatment was performed in the atmosphere at a temperature of 230°C for 1 hour. The conductivity of the oxide semiconductor film was then calculated in the same manner as in Example 1. The results are shown in Table 1.
[0052] Example 5 A substrate 11 on which an underlayer film 12 was formed was prepared in the same manner as in Example 1, except that the thickness of the oxide semiconductor film was set to 20 nm. An oxide semiconductor film having a thickness of 20 nm was formed on the underlayer film 12. After that, a first reduction treatment similar to that in Example 1 was performed, and then a first heat treatment was performed in the atmosphere at a temperature of 250° C. for 1 hour. Thereafter, the conductivity of the oxide semiconductor film was calculated in the same manner as in Example 1. The results are shown in Table 1.
[0053] Example 6 A substrate 11 on which an underlayer film 12 was formed was prepared in the same manner as in Example 1, except that the thickness of the oxide semiconductor film was set to 20 nm. A 20-nm-thick oxide semiconductor film was then formed on the underlayer film 12. Then, as in Example 3, the oxide semiconductor film was subjected to a first reduction treatment by being heated at 210° C. for 1 hour in an argon gas atmosphere containing 4% hydrogen. Then, a first heat treatment was performed at 230° C. for 1 hour. The conductivity of the oxide semiconductor film was then calculated in the same manner as in Example 1. The results are shown in Table 1.
[0054] <Reference Example> As in Example 1, an undercoat film 12 (SiO 2 A 15-nm-thick oxide semiconductor film was formed on the base film 12 by a CVD method. The oxide semiconductor film was subjected to only a first heat treatment at a temperature of 300° C. for 1 hour in the air without being subjected to a first reduction treatment. Thereafter, the electrical conductivity of the oxide semiconductor film was calculated in the same manner as in Example 1. The results are shown in Table 2.
[0055] Comparative Example 1 An oxide semiconductor film formed in the same manner as in Reference Example was subjected to only first heat treatment in the air at a temperature of 230° C. for 1 hour without being subjected to the first reduction treatment. Thereafter, the conductivity of the oxide semiconductor film was calculated in the same manner as in Example 1. The results are shown in Table 2.
[0056] Comparative Example 2 An oxide semiconductor layer formed in the same manner as in Reference Example was subjected to only first heat treatment in the air at a temperature of 250° C. for 1 hour without being subjected to the first reduction treatment. Thereafter, the conductivity of the oxide semiconductor film was calculated in the same manner as in Example 1. The results are shown in Table 2.
[0057] Comparative Example 3 A substrate 11 on which an oxide semiconductor film was formed was subjected to only the first heat treatment at a temperature of 275° C. for 1 hour in the atmosphere without the first reduction treatment, as in Example 1. Thereafter, the electrical conductivity of the oxide semiconductor film was calculated as in Example 1. The results are shown in Table 2.
[0058]
[0059]
[0060] <Evaluation> The semiconductor device having IGZTO in the oxide semiconductor layer 13 has a conductivity of 10 -4 ~10 -2 S / cm is preferable. Therefore, it was found that Examples 1 to 6 obtained good semiconductor properties. On the other hand, it was found that Comparative Examples 1 to 3 had conductivities outside the range and were not suitable as semiconductor devices. Note that although the semiconductor device manufactured by the process of the Reference Example obtained good semiconductor properties, the heating temperature exceeds 300°C, and therefore it cannot be applied to semiconductor devices using resin substrates. Therefore, when a resin substrate is used, it is possible to obtain a conductivity of 10 in a low-temperature process by performing the first reduction treatment and a heat treatment at a low temperature of 250°C or less after the first reduction treatment, as in Examples 1 to 6. -4 ~10 -2 It was found that a semiconductor device with a resistivity of 0.5 S / cm could be obtained.
[0061] Example 7 A substrate 11 on which an oxide semiconductor film was formed was prepared in the same manner as in Example 1, and the oxide semiconductor film was subjected to a first reduction treatment and a first heat treatment in the same manner as in Example 3. Next, the oxide semiconductor film was patterned to obtain an oxide semiconductor layer 13. Thereafter, a SiO 2 A 200 nm thick film was formed to obtain an insulating layer 14. Next, 15 nm of Mo was stacked on the insulating layer 14, and 80 nm of an Al—Nd alloy was stacked on the Mo, followed by photolithography and wet etching to obtain a gate electrode 15. Next, using the gate electrode 15 as a mask, the insulating layer 14 was dry-etched, and then a second reduction treatment was performed by flowing in 50 sccm of ammonia gas and 500 sccm of nitrogen gas and irradiating with RF plasma at a pressure of 60 Pa for 3 minutes.
[0062] Thereafter, as the interlayer insulating layer 16, SiO 2A 200 nm thick film was formed using CVD, and contact holes reaching the electrode region 13a were formed using photolithography and dry etching. Next, 15 nm of Mo was deposited, 80 nm of an Al—Nd alloy was deposited on the Mo, and 15 nm of Mo was deposited on the Al—Nd alloy. Subsequently, a source electrode 17a and a drain electrode 17b were formed using photolithography and wet etching. The resulting structure was then heated in air at 230°C for 1 hour to obtain a thin-film transistor. The solid line in Figure 4 shows the transfer characteristics of the thin-film transistor in this example. The transfer characteristics were measured using a semiconductor parameter analyzer (Keithley; 4200A-SCS).
[0063] Comparative Example 4 As in Comparative Example 1, a substrate 11 was prepared that had undergone a first heat treatment without undergoing a first reduction treatment. Thereafter, as in Example 7, the oxide semiconductor film was patterned to form an insulating layer 14, a gate electrode 15, an interlayer insulating layer 16, a source electrode 17a, and a drain electrode 17b. A heat treatment was then performed in the atmosphere at 230° C. for 1 hour to obtain a thin-film transistor. The dashed line in FIG. 4 shows the transfer characteristics of the thin-film transistor in this comparative example.
[0064] 4, it was found that good switching performance was obtained for the thin film transistor in Example 7. On the other hand, it was found that no switching performance was obtained for Comparative Example 4, and that it did not function as a thin film transistor.
[0065] 11: substrate, 12: undercoat film, 13: oxide semiconductor layer, 13a: electrode region, 14: insulating layer, 13b: channel region, 15: gate electrode, 16: interlayer insulating layer, 70a and 70b: Ag electrodes, 80: pool wall, 90: reference electrode, A and B: semiconductor device, C: pH sensor, S: solution
Claims
1. A semiconductor device comprising: a resin substrate; a first electrode and a second electrode provided on the substrate; and an oxide semiconductor layer in contact with the first electrode and the second electrode and containing In, Ga, Zn, and Sn, the oxide semiconductor layer having a conductivity of 10 -4 ~10 -2 The semiconductor device has a resistivity of 1.0 S / cm.
2. The semiconductor device according to claim 1, wherein the substrate includes at least one of polyimide, polyethylene terephthalate, and polyethylene naphthalate.
3. The semiconductor device according to claim 1 or 2, further comprising an insulating layer in contact with the oxide semiconductor layer and a third electrode provided to face the oxide semiconductor layer with the insulating layer therebetween, the semiconductor device constituting a transistor.
4. The semiconductor device according to claim 3, which constitutes a top-gate type transistor.
5. The semiconductor device according to claim 3, which constitutes a bottom-gate type transistor.
6. An electronic device including the semiconductor device according to any one of claims 1 to 5.
7. A pH sensor including the semiconductor device according to any one of claims 1 to 3.
8. A biosensor including the semiconductor device according to any one of claims 1 to 3.
9. A method of manufacturing a semiconductor device, including a step of forming an oxide semiconductor layer containing In, Ga, Zn, and Sn on a resin substrate, a step of performing a first reduction treatment on the oxide semiconductor layer, a step of performing a heat treatment on the oxide semiconductor layer after the first reduction treatment at 250°C or lower, a step of forming an insulating layer on the oxide semiconductor layer after the heat treatment, and a step of forming a source electrode and a drain electrode in contact with the oxide semiconductor layer exposed from the insulating layer.
10. The method of manufacturing a semiconductor device according to claim 9, including, between the step of forming the insulating layer and the step of forming the source electrode and the drain electrode, a step of forming a gate electrode on the insulating layer, a step of etching the insulating layer using the gate electrode as a mask to expose a part of the oxide semiconductor layer from the insulating layer, and a step of performing a second reduction treatment on the exposed part of the oxide semiconductor layer.
11. A step of forming a gate electrode on a resin substrate, a step of forming an insulating layer on the gate electrode, a step of forming an oxide semiconductor layer containing In, Ga, Zn, and Sn on the insulating layer, a step of performing a first reduction treatment on the oxide semiconductor layer, a step of performing a heat treatment on the oxide semiconductor layer after the first reduction treatment at 250° C. or lower, and a step of forming a source electrode and a drain electrode in contact with the oxide semiconductor layer after the heat treatment, a method for manufacturing a semiconductor device.
12. A method for manufacturing a semiconductor device according to claim 9 or claim 11, wherein the first reduction treatment is performed using ammonia plasma.
13. A method for manufacturing a semiconductor device according to claim 9 or claim 11, wherein the first reduction treatment is performed using hydrogen and argon gas.
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