Multilayer wiring base substrate, multilayer wiring board, and method for manufacturing multilayer wiring board

Abstract

The purpose of the present invention is to provide a technology that makes it possible to avoid peeling between resin and a core substrate and secure the reliability of a multilayer wiring board.　In this multilayer wiring base substrate, a plurality of multilayer wiring boards (1) are coupled to each other, each multilayer wiring board (1) comprising: a core substrate (10) having a first surface (10a), a second surface (10b) facing the first surface (10a), and a side surface part (10c) connecting the peripheral edge part of the first surface (10a) and the peripheral edge part of the second surface (10b); a first wiring layer (21) formed on the first surface (10a); and a second wiring layer (22) formed on the second surface (10b). In each of the multilayer wiring boards (1), at least the side surface part (10c) of the core substrate (10) is covered with a metal member (23) and an insulating resin (25) in this order from the center, and the multilayer wiring board (1) is coupled to at least one of the other multilayer wiring boards via the insulating resin (25).

Description

Multilayer wiring base material substrate, multilayer wiring board, and method for manufacturing multilayer wiring board

[0001] The present invention relates to a multilayer wiring base material substrate, a multilayer wiring board, and a method for manufacturing a multilayer wiring board.

[0002] As electronic devices become more sophisticated and smaller, there is a growing demand for higher density wiring boards that make up semiconductor devices. In response to the trend toward finer circuit wiring, there is also a demand for smaller passive components such as resistors, capacitors, and inductors. However, there are limits to further miniaturization through the miniaturization of these passive components and their high-density mounting on the surface of the board. Therefore, technologies for embedding passive elements in the mounting board have been proposed.

[0003] For example, Patent Document 1 (JP-A-2005-103523) describes a multilayer substrate and a manufacturing method thereof with embedded passive elements, which aims to provide a multilayer substrate and a manufacturing method thereof that can achieve high performance and high accuracy of the passive elements: "The ceramic multilayer substrate is divided into four blocks B1, B2, B3, and B4. Block B1 has two insulating layers made of AlN laminated therein. Block B2 has two insulating layers made of high-purity alumina laminated therein, with resistor elements R1 and R2 formed on the upper insulating layer. Block B3 has one insulating layer made of glass ceramic, with capacitors C1 and C2 formed on the insulating layer. Block B4 has four insulating layers made of zirconia laminated therein. These blocks B1, B2, B3, and B4 are mechanically and electrically bonded by insulating bonding material 11 and conductive bonding material 12 interposed between each block." This technology embeds passive elements in the multilayer substrate by forming them using printing, vacuum deposition, or the like. In addition to the miniaturization, the shortened wiring length also has the effect of reducing high frequency noise.

[0004] On the other hand, organic materials, such as glass epoxy resin, are commonly used as materials for wiring boards. Recent advances in glass drilling technology have made it possible, for example, to form small through-holes of 100 μm or less at a pitch of 150 μm or less in a 300 μm-thick glass substrate. For this reason, glass has attracted attention as a material for electronic circuit boards. Circuit boards using glass materials as core substrates (hereinafter referred to as "glass circuit boards") have a low coefficient of linear thermal expansion (CTE) of 2 ppm to 8 ppm, matching the CTE of silicon chips, resulting in high mounting reliability. Furthermore, excellent flatness allows for high-precision mounting, which also has a positive effect on the formation of fine wiring and high-speed transmission.

[0005] Japanese Patent Application Laid-Open No. 2000-151114

[0006] When attempting to form a multilayer wiring board by forming wiring layers on the top and bottom surfaces of a glass circuit board, stress in the wiring layer can cause peeling between the glass core substrate and the resin that makes up the wiring layer during singulation of the multilayer wiring board from the base substrate, resulting in fracture of the glass circuit board. One possible cause of fracture is the occurrence of microcracks (hereinafter also referred to as "μ-cracks") in the glass circuit board. This has made it difficult to ensure the reliability of multilayer wiring boards that use glass as a core substrate.

[0007] Therefore, an object of the present invention is to provide a technique that can prevent peeling between the resin and the core substrate and ensure the reliability of the multilayer wiring board.

[0008] In order to solve the above-mentioned problems, a typical multilayer wiring base material substrate of the present invention is characterized in that a plurality of multilayer wiring boards are bonded together, each of which has a core substrate having a first surface, a second surface opposite to the first surface, and a side surface connecting the peripheral edge of the first surface and the peripheral edge of the second surface, a first wiring layer which is a wiring layer formed on the first surface, and a second wiring layer which is a wiring layer formed on the second surface, and each of the multilayer wiring boards is characterized in that at least the side surface of the core substrate is covered from the center side with a metal member and then an insulating resin, and is bonded to at least one other multilayer wiring board via the insulating resin.

[0009] According to the present invention, it is possible to prevent peeling between the resin and the core substrate and ensure the reliability of the multilayer wiring board. Problems, configurations, and effects other than those described above will become clear from the description of the following embodiments.

[0010] FIG. 1 is a diagram showing a multilayer wiring substrate according to a first embodiment. FIG. 2 is a cross-sectional view showing the structure of a through electrode in the multilayer substrate wiring according to the first embodiment. FIG. 3 is a cross-sectional view illustrating a bonding step of a first support in the manufacturing method according to the first embodiment. FIG. 4 is a cross-sectional view illustrating a step of forming a laser-modified portion in the manufacturing method according to the first embodiment. FIG. 5 is a view illustrating a location where a laser-modified portion is formed in the manufacturing method according to the first embodiment. FIG. 6 is a cross-sectional view illustrating a step of forming a first wiring layer in the manufacturing method according to the first embodiment. FIG. 7 is a cross-sectional view illustrating a bonding step of a second support in the manufacturing method according to the first embodiment. FIG. 8 is a cross-sectional view illustrating a step of peeling off a first support in the manufacturing method according to the first embodiment. FIG. 9 is a cross-sectional view illustrating a step of forming a through hole by etching in the manufacturing method according to the first embodiment. FIG. 10 is a cross-sectional view illustrating a step of forming a second wiring layer in the manufacturing method according to the first embodiment. FIG. 11 is an enlarged view of the singulation line portion (separation groove) in FIG. 10. FIG. 12 is a view illustrating an example of a further enlargement of the boundary portion between the singulation line portion and the glass substrate in FIG. 11. FIG. 13 is a diagram showing another example in which the boundary portion between the singulation line portion and the glass substrate in FIG. 11 is further enlarged. FIG. 14 is a diagram showing a case in which no separation groove electrode is formed on the side surface of the glass substrate. FIG. 15 is a cross-sectional view illustrating a second support peeling step in the manufacturing method according to the first embodiment. FIG. 16 is a cross-sectional view showing the manufacturing method according to the first embodiment after the second support peeling step has been performed. FIG. 17 is a cross-sectional view illustrating a build-up layer formation step in the manufacturing method according to the first embodiment. FIG. 18 is a cross-sectional view illustrating a connection pad formation step in the manufacturing method according to the first embodiment. FIG. 19 is a perspective view of the structure shown in FIG. 18. FIG. 20 is a cross-sectional view illustrating a singulation step in the manufacturing method according to the first embodiment. FIG. 21 is a flowchart of the manufacturing method according to the first embodiment. FIG. 22 is a cross-sectional view illustrating a first wiring layer formation step in the manufacturing method according to the first modification. FIG. 23 is a cross-sectional view illustrating a laser modified portion formation step in the manufacturing method according to the first modification.Fig. 24 is a diagram showing a flowchart of a manufacturing method according to a first modified example. Fig. 25 is a cross-sectional view illustrating a bonding step of a second support in a manufacturing method according to a second modified example. Fig. 26 is a cross-sectional view illustrating a step of forming a laser modified portion in a manufacturing method according to a second modified example. Fig. 27 is a diagram showing a flowchart of a manufacturing method according to a second modified example. Fig. 28 is an enlarged view showing the boundary portion between the singulation line portion and the glass substrate of the prepared samples (Examples 1 to 5) and Comparative Examples 1 and 2.

[0011] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the following description relates to an example of the present invention, and the present invention is not limited thereto. In addition, in the drawings, identical parts are denoted by the same reference numerals. The position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc., in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0012] In this disclosure, the term "surface" may refer not only to the surface of a plate-shaped member, but also to the interface of a layer contained in the plate-shaped member that is approximately parallel to the surface of the plate-shaped member. Furthermore, the terms "upper surface" and "lower surface" refer to the surface shown at the top or bottom of a drawing of a plate-shaped member or a layer contained in the plate-shaped member. The "upper surface" and "lower surface" may also be referred to as the "first surface" and "second surface."

[0013] Furthermore, "side" refers to the surface or thickness of a layer of a plate-like member or a layer contained in a plate-like member. Furthermore, a portion of the surface and the side may be collectively referred to as the "end." Furthermore, "upper" refers to the direction vertically upward when the plate-like member or layer is placed horizontally. Furthermore, "upper" and its opposite, "lower," may be referred to as the "positive z-axis direction" and the "negative z-axis direction," and the horizontal direction may be referred to as the "x-axis direction" and the "y-axis direction." Furthermore, "bottom" may refer to the part in the direction perpendicular to the paper surface in a drawing.

[0014] First Embodiment (Structure of Multilayer Wiring Board) A multilayer wiring board according to a first embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 illustrates a multilayer wiring board according to the first embodiment. FIG. 1(a) illustrates a cross-sectional view of the multilayer wiring board, FIG. 1(b) illustrates a perspective view of the multilayer wiring board, and FIG. 1(c) illustrates a perspective view of a core substrate 10 included in the multilayer wiring board. For ease of understanding, FIGS. 1(b) and 1(c) illustrate the outlines of the core substrate 10, the first wiring layer 21, the second wiring layer 22, and the insulating resin layer 25. FIG. 2 illustrates an enlarged cross-sectional view of a through electrode structure in the multilayer wiring board 1 according to the first embodiment. As illustrated in FIGS. 1 and 2, the multilayer wiring board 1 includes a core substrate 10 made of glass. As illustrated in FIG. 1(b), the core substrate 10 is surrounded by the resin member of the insulating resin layer 25 in the x-axis and y-axis directions, and is surrounded by the first wiring layer 21 and the second wiring layer 22 in the z-axis direction. The core substrate 10 has a first wiring layer 21 formed on its upper surface (hereinafter also referred to as the "first surface 10a") in the positive direction of the z-axis, and a second wiring layer 22 formed on its lower surface (hereinafter also referred to as the "second surface 10b") in the negative direction of the z-axis.

[0015] As shown in FIG. 1C, the core substrate 10 has a first surface 10a, a second surface 10b facing the first surface 10a, and a side surface 10c consisting of four surfaces connecting the peripheral edge of the first surface 10a and the peripheral edge of the second surface 10b. In the example of FIG. 1C, the core substrate 10 has a truncated quadrangular pyramid shape that narrows in the negative z-axis direction. The first surface 10a and the second surface 10b are parallel surfaces, and are surrounded by a side surface 10c consisting of four surfaces connecting the outer periphery (periphery) of the first surface 10a and the outer periphery (periphery) of the second surface 10b. In FIG. 1C, the side surface 10c is depicted as flat, but since the side surface 10c includes a portion formed by etching a separation groove 17 (described later), the side surface 10c includes a non-flat portion. The core substrate 10 has through holes 11 formed therein that penetrate from the first surface 10a to the second surface 10b, in other words, that penetrate from the front to the back surfaces. A seed layer (seed metal layer) is formed on the inner wall surface of the through hole 11, thereby forming a through electrode 12 and providing electrical continuity between the first surface 10a and the second surface 10b of the core substrate 10. Also, as shown in FIG. 2 , a capacitor electrode 13 is disposed above the through electrode 12 in the first wiring layer 21. It is also possible to incorporate circuit elements other than capacitors, such as an inductor, in the first wiring layer 21.

[0016] Next, referring to FIG. 2 , the configuration of the first wiring layer 21, which is a wiring layer formed on the first surface 10a of the core substrate 10, will be described. The through-electrode connection portion 41 (hereinafter also referred to as the "first conductive portion") is an electrode disposed within the first wiring layer 21 and connected to the through-electrode 12 via the hydrofluoric acid-resistant metal layer 15. The dielectric layer 14, the capacitor electrode 13, and the conductive electrode 31 are provided on the through-electrode connection portion 41. The capacitor electrode 13, the dielectric layer 14, and the through-electrode connection portion 41 (and the hydrofluoric acid-resistant metal layer 15) form an MIM (Metal Insulator Metal) structure. The wiring 16 (see FIG. 1( a)) is a wiring disposed within the first wiring layer 21 and connected to the through-electrode 12, the conductive electrode 31, and the like. The through-electrode connection portion 41, the conductive electrode 31, the capacitor electrode 13, the dielectric layer 14, and the wiring 16 are all protected by an insulating resin layer 25. 1, when the multilayer wiring board 1 is used as a relay board for connecting multiple semiconductor elements, i.e., an interposer board, the semiconductor element bonding pads 51 are bumps used for mounting or connecting other semiconductor elements. The solder resist 55 is a film made of an insulating material for protecting the multilayer wiring board 1. Here, two conductive electrodes 31 are provided in a stacked manner within the first wiring layer 21. This indicates that the first wiring layer 21 is formed by stacking two wiring layers.

[0017] Next, referring to FIG. 2 , the configuration of the second wiring layer 22, which is a wiring layer formed on the second surface 10b of the core substrate 10, will be described. The through electrode connection portion 42 (hereinafter also referred to as the "second conductive portion") is an electrode disposed within the second wiring layer 22 and connected to the through electrode 12. The through electrode connection portion 42 is formed to match the shape of the opening end of the through electrode 12. The conductive electrode 32 (see FIG. 1( a)) is connected to the through electrode connection portion 42. The through electrode connection portion 42 disposed in the second wiring layer 22 and the through electrode connection portion 41 disposed in the first wiring layer 21 are electrically connected via the through electrode 12. The board bonding solder 54 is a bump used for connecting to a printed wiring board. As shown in FIG. 1 , the solder resist 55 is a film made of an insulating material for protecting the multilayer wiring substrate 1. Here, the conductive electrode 32 forms a conductive path within the second wiring layer 22, either overlapping or via another wiring layer. This indicates that the second wiring layer 22 is formed by overlapping two wiring layers.

[0018] Next, other configurations of the multilayer wiring board will be described with reference to FIG. 1( a). The first wiring layer 21 and the second wiring layer 22 include an insulating resin layer 25, and the side surface portion 10 c of the core substrate 10 is covered with the same type of insulating resin as the insulating resin constituting the insulating resin layer 25. A separation groove electrode 23 is formed on the side surface portion 10 c so as to cover the side surface portion. The separation groove electrode 23 is formed of a metal layer, similar to the through electrode 12. In the example shown in FIG. 1( a), the side surface portion 10 c is covered with at least a metal member and an insulating resin. While FIG. 1( a) illustrates a case in which the entire side surface portion 10 c of the core substrate 10 is covered with the separation groove electrode 23, the present disclosure is not limited to this case. It is desirable that 10% or more of the side surface portion 10 c of the core substrate 10 be covered with a metal member.

[0019] (Dimensions and composition of multilayer wiring board) The relationship between the opening diameter D1 on the first surface 10a side of the through electrode 12 and the opening diameter D2 on the second surface 10b side (first surface opening diameter D1 / second surface opening diameter D2) is preferably in the range of 0.35 to 0.65. By making the opening diameter on the first surface 10a side smaller than the opening diameter on the second surface 10b side, the capacitor electrode 13 can be stably formed on the through electrode 12.

[0020] The thickness of the core substrate 10 is preferably in the range of 50 μm to 150 μm, and can be set to match the characteristic values ​​of the capacitor electrodes 13, inductors, resistors, etc. formed in the first wiring layer 21. If the thickness of the core substrate 10 is 200 μm or more, the relationship between the opening diameter D1 on the first surface 10a side and the opening diameter D2 on the second surface 10b side (opening diameter D1 on the first surface 10a side / opening diameter D2 on the second surface 10b side) becomes 0.35 to 0.65, making it difficult to form the capacitor electrodes 13 on the through electrodes 12 and ensure the connection reliability of the through electrodes 12. More preferably, the thickness of the core substrate 10 is in the range of 100 μm to 150 μm. The thickness of the core substrate will be described later with reference to T2 in FIG. 9 . The relationship between the opening diameter D1 on the first surface 10a side and the opening diameter D2 on the second surface 10b side may be set as appropriate as long as it is within the above range.

[0021] The insulating resin layer 25 preferably has a relative dielectric constant in the range of 3.1 to 3.5, and a dielectric loss tangent in the range of 0.002 to 0.012. Such an insulating resin layer 25 can be made of a thermosetting resin. Examples of the thermosetting resin include epoxy resin, polyimide resin, polyamide resin, and composite materials thereof, and at least SiO ２ The filler material containing SiO in an amount of 65% to 80% can be used. ２ If the filling rate of the filler material is 65% or less, the relative permittivity and dielectric loss tangent will be outside the above ranges, which will cause a deterioration in transmission characteristics. ２ It is desirable that the filling rate of the filler material is 72% or more. ２A material highly filled with the filler material has a low coefficient of linear expansion of the insulating resin, which is close to the coefficient of linear expansion of the glass material. Therefore, by using such a material, it is possible to reduce the stress that may occur when a wiring layer is formed on the core substrate 10. In this way, the values ​​of the relative permittivity and dielectric loss tangent can be kept within the above ranges, and it is possible to avoid affecting the transmission characteristics.

[0022] On the side surfaces of the multilayer wiring board 1, portions of the insulating resin layer 25 in the first wiring layer 21 and the second wiring layer 22 and portions of the insulating resin formed on the side surface portion 10c of the core substrate 10 are exposed. For example, the thickness wi of the insulating resin on the side surface portion of the multilayer wiring board 1 (see FIG. 1(a)) is preferably at least 50 μm when measured in the x-axis or y-axis direction. Furthermore, when the angle θ1 between the z-axis direction and the side surface is defined as θ1, the side surface portion 10c of the core substrate 10 preferably reaches the second wiring layer 22 at an inclination of θ1 in the range of 21° to 35° from the end of the core substrate 10 at the first wiring layer 21. The side surface portion 10c of the core substrate 10 (the side surface of the multilayer wiring board 1) is covered with the insulating resin material. As a result, all of the side surfaces of the multilayer wiring board in the x-axis and y-axis directions are protected by the insulating resin material. This makes it possible to disperse stress generated in the first wiring layer 21 or the second wiring layer 22 formed on the top and bottom surfaces of the core substrate 10 to the other wiring layer through the insulating resin on the side surface of the core substrate 10. It also makes it possible to suppress μ-cracks and chipping at the end portions of the core substrate 10, thereby improving the reliability of the multilayer wiring board 1.

[0023] The capacitor formed in the first wiring layer 21 of the multilayer wiring substrate 1 has an MIM structure. From the viewpoints of insulation and dielectric constant, the dielectric layer 14 forming the capacitor can be made of at least one of alumina, silica, silicon nitride, tantalum oxide, titanium oxide, calcium titanate, barium titanate, and strontium titanate. Furthermore, the material used for the upper and lower electrodes of the MIM structure can be at least one of Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu. For example, Cu is a desirable material.

[0024] The core substrate 10 used in the multilayer wiring board 1 may be a transparent glass material having optical transparency. The glass components, the compounding ratio of the components contained in the glass, and the method for manufacturing the glass are not particularly limited. Examples of glass include alkali-free glass, alkali glass, borosilicate glass, quartz glass, sapphire glass, and photosensitive glass, but any glass material containing silicate as a main component may be used. Furthermore, other so-called glass materials may also be used. However, it is desirable to use alkali-free glass in the multilayer wiring board according to this embodiment.

[0025] The core substrate 10 can be made of glass manufactured by a float method, downdraw method, fusion method, updraw method, roll-out method, or the like, but any glass material manufactured by any method may be used. The linear expansion coefficient of the glass is preferably in the range of -1 ppm / K to 15.0 ppm / K. This is because selecting a glass material is difficult when the coefficient is -1 ppm / K or less. On the other hand, when the coefficient is 15.0 ppm / K or more, the difference in thermal expansion coefficient with other layers becomes large, which may reduce reliability when used in a multilayer wiring board. Furthermore, when a silicon chip is mounted on the multilayer wiring board 1 of this embodiment, the connection reliability with the silicon chip may be reduced. The linear expansion coefficient of the glass is more preferably in the range of 0.5 ppm / K to 8.0 ppm / K, and even more preferably in the range of 1.0 ppm / K to 4.0 ppm / K.

[0026] 3 to 15, a method for manufacturing a multilayer wiring substrate 1 according to a first embodiment will be described. Note that, for ease of understanding, the following figures illustrate only a portion of a glass substrate (described later) that includes one multilayer wiring substrate 1. A plurality of similar portions are arranged in the xy plane of the glass substrate, constituting a multilayer wiring substrate base material.

[0027] (Bonding of First Support) First, referring to FIG. 3 , a process for bonding a first support 61 to a glass substrate 60, which is a base substrate, will be described. FIG. 3 is a cross-sectional view illustrating the bonding process of the first support 61 in the manufacturing method according to the first embodiment. The glass substrate 60 has a first surface 60a and a second surface 60b. As shown in FIG. 3 , the first support 61 is bonded to the glass substrate 60 using a first adhesive layer 62, forming a laminated structure 63 consisting of the glass substrate 60, the first adhesive layer 62, and the first support 61. Note that because the first adhesive layer is extremely thin compared to the glass substrate 60 and the first support 61, it can also be described as the interface between the glass substrate 60 and the first support 61. However, in the drawings of the present disclosure, the first adhesive layer is illustrated as a layer having a thickness for ease of viewing. Furthermore, although the glass substrate 60 extends in the y-axis direction, only a portion of it is shown in the drawing, and therefore the ends in the x-axis and y-axis directions are shown as straight lines.

[0028] The first adhesive layer 62 is an adhesive layer for temporarily fixing the first support 61 to the glass substrate 60. The first adhesive layer 62 is a surface containing hydroxyl groups formed on the second surface 30 of the glass substrate 60. The adhesive interface may contain multiple other functional groups as long as it contains hydroxyl groups. Therefore, the material for the first adhesive layer 62 can be appropriately selected from resins that absorb light such as UV light and become peelable by generating heat, sublimating, or altering, resins that become peelable by foaming due to heat, or functional groups. To bond the first support 61 to the glass substrate 60, for example, a laminator, a vacuum pressure press, a vacuum bonding machine, or the like can be used. In this way, by forming an interface containing hydroxyl groups on the second surface 30 of the glass substrate 60, hydrogen bonds using the hydroxyl groups can be formed between the glass substrate 60 and the first support 61. The adhesive layer containing hydroxyl groups can also be formed on the first surface 20 of the glass substrate 60 .

[0029] The first support 61 is preferably made of the same material as the glass substrate 60. When the material of the glass substrate 60 is alkali-free glass, the material of the first support 61 is also preferably alkali-free glass. The thickness of the first support 61 can be set appropriately depending on the thickness T1 of the glass substrate 60. However, it is preferable that the thickness be such that it can be transported during the manufacturing process. For example, the thickness T1 of the glass substrate 60 can be set in the range of 75 μm to 200 μm, and the thickness of the first support 61 can be set in the range of 300 μm to 1,500 μm.

[0030] In this embodiment, the first support 61 is made of a glass material, and uses a hydroxyl group and a plurality of functional groups as an adhesive interface.

[0031] The adhesive strength between the glass substrate 60 and the first support 61 is 0.15 J / cm ２ 0.45J / cm or more ２It is desirable that the adhesive strength is within the following range. If the strength within the above range cannot be obtained, annealing treatment may be carried out after the formation of hydroxyl groups to improve the adhesive strength. The adhesive strength is 0.15 J / cm ２ Below this, there is a high possibility that the glass substrate 60 and the first support 61 will peel off at the interface during the process. ２ If the adhesion strength is more than 0.25 J / cm, problems may easily occur in the peeling step described separately. ２ 0.4J / cm or more ２ The range is as follows: The adhesion strength was measured using a crack open method, but the measurement method is not limited to this.

[0032] (Formation of laser modified portion) Next, with reference to FIG. 4, the step of forming the laser modified portion will be described. FIG. 4 is a cross-sectional view illustrating the step of forming the laser modified portion in the manufacturing method according to the first embodiment. In FIG. 4, the broken line indicates the laser modified portion 65. As shown in FIG. 4, a laser is irradiated from the first surface 60a side of the laminated structure 63 to form the laser modified portion 65. The laser modified portion 65 extends, for example, in a vertical direction with respect to the glass substrate 60, and can be formed at a desired position over almost the entire surface of the glass substrate 60. In this case, the laser modified portion 65 may be formed so as to reach the first adhesive layer 62 and the first support 61.

[0033] In this embodiment, by irradiating the glass substrate 60 with the first support 61 superimposed thereon with a laser, it is possible to widen the processing conditions (process window) for the laser irradiation, and it is also possible to form a laser-modified portion 65 at a desired position on the glass substrate 60.

[0034] Here, if an adhesive layer made of resin is used as the first adhesive layer 62, cracks may occur in the adhesive resin due to laser irradiation, and the adhesive resin may remain on the glass substrate 60 when the first support 61 is peeled off from the glass substrate 60. If such adhesive resin remains on the glass substrate 60, it may cause problems in the subsequent through-hole formation process using hydrofluoric acid etching. For example, this may lead to the occurrence of surface irregularities on the glass substrate 60. For this reason, it is preferable to use an interface containing hydroxyl groups rather than a resin adhesive layer to bond the glass substrate 60 and the first support 61.

[0035] FIG. 5 is a diagram illustrating the singulation line 64, which is the location where the laser-modified portion is formed, and the laser-modified portion 65, which is the through-hole formation portion in the multilayer wiring substrate, in the manufacturing method according to the first embodiment. FIG. 5( a) is a plan view of the glass substrate 60 as viewed from the positive z-axis direction, and FIG. 5( b) is an example showing an enlarged portion of the glass substrate 60. Here, the singulation line 64 is indicated by a dashed dotted line. The singulation line is the location where a separation groove is formed when separating the multilayer wiring substrate from the glass substrate 60, and a laser-modified portion is also formed at the location where this separation groove is formed. Furthermore, the laser-modified portion 65 in the multilayer wiring substrate is the location where the through-hole 11 starts and is indicated by a black circle. In other words, the laser modification is performed at the location where the through-hole 11 or the separation groove is formed.

[0036] 5(c) is an enlarged view of a portion of a glass substrate in another example. As shown in this example, when forming a laser-modified portion in a separation groove, it is also possible to form a plurality of laser-modified portions by shifting the laser irradiation position to form singulation lines 64.

[0037] (Formation of First Wiring Layer) Next, the process of forming the first wiring layer 21 will be described with reference to Fig. 6. Fig. 6 is a cross-sectional view illustrating the process of forming the first wiring layer in the manufacturing method according to the first embodiment. As shown in Fig. 6, the first wiring layer 21 including a conductive layer and an insulating layer is formed on the first surface 20 on the glass substrate 60 of the laminated structure 63.

[0038] First, a seed layer including a hydrofluoric acid resistant metal layer 15 is formed on a glass substrate 60. The hydrofluoric acid resistant metal layer 15 on the glass substrate 60 is an alloy layer containing at least one of chromium and nickel, and is formed by sputtering to a thickness of 10 nm to 1,000 nm. Then, a conductive metal film is formed on the hydrofluoric acid resistant metal layer 15 to a desired thickness. Examples of materials for the conductive metal film include Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, ITO, IZO, AZO, ZnO, PZT, TiN, and Cu. ３ N ４ can be set appropriately from

[0039] The electrode connection portion (electrode) and wiring can be formed, for example, by a semi-additive (SAP) process. In the semi-additive process, a photoresist is used to form the desired pattern. Generally, a dry film resist is used, but a liquid resist may also be used. After the resist is exposed and developed to form the desired pattern, a plating film having a thickness of 2 μm to 20 μm is formed by electroplating. The unnecessary resist pattern is peeled off, and the seed layer is etched to form wiring 16 located between the through electrode connection portion 41 located above the laser-modified portion and the laser-modified portion 65.

[0040] The dielectric layer 14 on the through-electrode connection portion 41 is formed using at least one of alumina, silica, silicon nitride, tantalum oxide, titanium oxide, calcium titanate, barium titanate, and strontium titanate, from the viewpoints of insulation and dielectric constant. The thickness of the dielectric layer 14 is preferably in the range of 10 nm to 5 μm. If the thickness of the dielectric layer 14 is 10 nm or less, insulation properties may not be maintained and the function of the capacitor may not be exhibited. If the thickness of the dielectric layer 14 is 5 μm or more, not only will the film formation take too long, making mass production unsuitable, but the process of removing unnecessary portions may also take additional time. Therefore, the thickness of the dielectric layer 14 is more preferably in the range of 50 nm to 1 μm.

[0041] The capacitor electrode 13 is formed by dividing it into a lower electrode layer and an upper electrode layer. From the viewpoints of adhesion and electrical conductivity, the lower electrode layer can be formed using at least one of Cu, Ni, Al, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu as its material. For example, Ti is excellent in terms of adhesion, electrical conductivity, ease of manufacturing, and cost.

[0042] A seed metal layer is formed on the upper electrode of the capacitor electrode 13, followed by an electrolytic plating layer. The seed metal layer may be made of at least one of Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, or Cu. Copper is preferred for ease of subsequent etching removal. The thickness of the seed metal layer is preferably in the range of 10 nm to 5 μm. If the seed metal layer is less than 100 nm, poor electrical conductivity may occur in the subsequent electrolytic plating process. If the seed metal layer is thicker than 5 μm, etching removal takes a long time. Therefore, the thickness of the seed metal layer 113 is more preferably in the range of 100 nm to 500 nm.

[0043] Thereafter, an electrolytic plating layer is formed as the upper electrode of the capacitor electrode 13. Electrolytic copper plating is simple, inexpensive, and has good electrical conductivity. In addition to electrolytic copper plating, electrolytic nickel plating, electrolytic chromium plating, electrolytic Pd plating, electrolytic gold plating, electrolytic rhodium plating, electrolytic iridium plating, etc. may also be used. After the upper electrode is formed, the seed metal layer is removed. The removal method can be selected appropriately depending on the application, such as wet etching or dry etching.

[0044] In conventional manufacturing methods for fabricating multilayer wiring substrates using substrates with pre-formed through-holes 11, it is not possible to deposit conductive materials over the through-holes, making it necessary to form an MIM structure that avoids the through-holes. In contrast, according to the manufacturing method of the present embodiment, the wiring and capacitor electrode formation processes are performed before the through-hole formation process. This allows the capacitor electrodes 13 to be formed near and above the through-holes, i.e., without being restricted by the location of the through-holes. For example, it is possible to form the capacitor electrodes 13 directly above the through-holes. This shortens the transmission distance to the capacitor and prevents degradation of transmission characteristics. Furthermore, by forming a lower electrode layer when forming the capacitor electrodes 13, it is possible to reduce variations in capacitor capacitance.

[0045] Finally, the insulating resin layer 25 is formed. The insulating resin layer 25 is made of a thermosetting resin, and the material thereof contains at least one of epoxy resin, polyimide resin, and polyamide resin, and SiO ２ It is desirable that the insulating resin layer 25 contains a filler material and is in a liquid or film form. In the case of a liquid resin, the insulating layer can be formed by a spin coating method, and in the case of a film resin, the insulating layer can be formed by heating and pressurizing under vacuum using a vacuum laminator. The material of the insulating resin layer 25 can be appropriately selected as needed. However, when a photosensitive insulating resin material is used, SiO ２ Since it is difficult to fill the filler material, the material is limited to non-photosensitive thermosetting resin.

[0046] (Adhesion of Second Support) Next, the step of adhering the second support will be described with reference to Fig. 7. Fig. 7 is a cross-sectional view illustrating the step of adhering the second support in the manufacturing method according to the first embodiment. As shown in Fig. 7, a second adhesive layer 71 is formed on the first wiring layer 21 of the laminated structure 63, and the second support 70 can be adhered to the second adhesive layer 71.

[0047] The second adhesive layer 71 can be appropriately selected from resins that absorb light such as UV light and become peelable by generating heat, sublimating, or changing properties, as with the first adhesive layer 62, resins that become peelable by foaming due to heat, or functional groups that temporarily fix the glass substrate 60 and the first support 61, etc., but it is preferable that the second adhesive layer 71 be formed from a material different from that of the first adhesive layer 62.

[0048] The second support 70 is preferably made of the same material as the glass substrate 60. When the glass substrate 60 is made of alkali-free glass, the first support 61 is preferably made of alkali-free glass as well. The thickness of the second support can be set appropriately depending on the thickness of the glass substrate 60. However, it is desirable that the thickness be such that it can be transported, and that it is desirable that the thickness be in the range of 300 μm to 1,500 μm.

[0049] (Removal of First Support) Next, the removal step of the first support will be described with reference to Fig. 8. Fig. 8 is a cross-sectional view illustrating the removal step of the first support 61 in the manufacturing method according to the first embodiment. As shown in Fig. 8, the interface between the glass substrate 60 and the first adhesive layer 62 can be peeled off, and the first adhesive layer 62 and the first support 61 can be separated from the glass substrate 60.

[0050] To separate the first support 61 from the glass substrate 60, physical force is applied to the side of the first adhesive layer 62 to form a peel initiation point, and force is applied starting from this peel initiation point to separate the interface of the first adhesive layer 62. More specifically, the glass substrate 60 and the first support 61 can be separated by using a portion of the side of the first adhesive layer 62 scribed with a cutter or the like as the peel initiation point and applying force in a direction to separate the first support 61 from the glass substrate. Note that performing the scribing process while applying force to separate the first support 61 from the glass substrate can smoothly perform the peeling process. Depending on the material used for the first adhesive layer 62, a peeling method appropriate for the material can be selected from UV light irradiation, heat treatment, physical peeling, etc. Furthermore, if residue of the first adhesive layer 62 remains on the glass substrate 60, plasma cleaning, ultrasonic cleaning, water washing, solvent cleaning using alcohol, etc. may be performed.

[0051] (Formation of Through Holes by Etching) Next, with reference to FIG. 9 , the process of forming through holes by etching will be described. FIG. 9 is a cross-sectional view illustrating the process of forming through holes by etching in the manufacturing method according to the first embodiment. FIG. 9 shows the shape of the glass substrate 60 after hydrofluoric acid etching. Hydrofluoric acid etching simultaneously forms through holes 11 and separation grooves 17, and the insulating resin layer 25 is exposed in the separation grooves 17 when viewed from the negative z-axis direction. That is, selectively removing the laser-modified portions 65 from the second surface 60b of the glass substrate 60 by etching forms the through holes 11 and separation grooves 17, and the glass substrate 60 is separated into individual multilayer wiring substrates by the separation grooves 17. However, the glass substrate 60 remains interconnected by the second support 70 and the first wiring layer. Therefore, as shown in FIG. 5( a), even though the singulation lines 64 are formed, the glass substrate 60 maintains its integrity as a multilayer wiring substrate base material. Note that in the following description, the separation grooves 17 may also be referred to as the singulation lines 64.

[0052] Wet etching using a hydrogen fluoride solution is suitable for this purpose. The amount of etching using the hydrogen fluoride solution is appropriately determined depending on the thickness of the glass multilayer wiring substrate. For example, if the thickness T1 of the glass substrate 60 is 200 μm, the amount of etching is preferably in the range of 50 μm to 175 μm. While the structure shown here exposes the insulating resin layer 25 when viewing the separation groove 17 from the negative z-axis direction, this structure is not limited to this. If a seed layer including the hydrofluoric acid-resistant metal layer 15 of the first wiring layer 27 is left in the separation groove 17, the seed layer of the first wiring layer 27 may remain on the singulation line 64. The thickness of the glass substrate 60 in the z-axis direction is also etched as the laser-modified portion 65 is etched. The thickness T2 of the glass substrate 60 after etching is preferably in the range of 25 μm to 150 μm. In conventional multilayer wiring substrates, the thickness of the core substrate was generally 300 μm to 400 μm. Therefore, the first embodiment achieves a thinner core substrate than conventional ones, thereby minimizing the impact on transmission characteristics.

[0053] The second surface 60b of the glass substrate 60 corresponds to the second surface 10b of the core substrate 10. Therefore, in the following description, it will also be referred to as the second surface 10b of the glass substrate 60. Furthermore, the first surface 60a of the glass substrate 60 corresponds to the first surface 10a of the core substrate 10, and therefore will also be referred to as the first surface 10a of the glass substrate 60. Furthermore, the portion of the glass substrate 60 facing the separation groove 17 will become the side surface portion 10c of the core substrate 10 after singulation, and is therefore denoted by the reference symbol 10c.

[0054] (Formation of Second Wiring Layer) Next, with reference to FIGS. 10 to 14 , the process of forming the second wiring layer and the process of forming a metal layer on the singulation line 64 will be described. FIG. 10 is a cross-sectional view illustrating the process of forming the second wiring layer in the manufacturing method according to the first embodiment. The metal member on the side surface 10c of the core substrate 10 includes a sputtered film member as a seed layer and a plated metal layer. Specifically, as shown here, a second wiring layer 22 consisting of a through electrode connection portion 42 and an insulating resin layer 25 is formed on the second surface 10b of the glass substrate 60. The formation of the through electrodes 12 and the through electrode connection portion 42 involves forming a power supply seed layer, forming a pattern using a resist (hereinafter also referred to as "patterning"), and then performing a plating process to form a plating thickness of 2 μm to 20 μm. The unnecessary resist pattern is then peeled off, the seed layer is removed, and the through electrodes 12 and the through electrode connection portion 42 are formed.

[0055] Here, a separation groove electrode 23 is formed in the separation groove 17. The separation groove electrode 23 will be described in detail with reference to FIGS.

[0056] Fig. 11 is an enlarged view of the singulation line 64 (separation groove 17) in Fig. 10. The separation groove electrode 23 can be composed of a seed layer and a metal layer formed thereon by plating.

[0057] 12 is a diagram showing an example of a further enlargement of the boundary portion between the singulation line 64 portion and the glass substrate 60 in FIG. 11. μ-cracks 24 caused by laser irradiation have occurred on the side surface 10c of the glass substrate 60. These μ-cracks 24 are also formed in the through electrodes 12 and the separation grooves 17, and as shown in FIG. 12, these μ-cracks 24 are covered with the metal layer of the separation groove electrodes 23 or filled with the insulating resin layer 25. This improves the adhesion between the insulating resin layer 25 (described later) and the glass substrate 60, making it possible to suppress peeling and cracking due to stress in the glass substrate 60 (core substrate 10).

[0058] 13 is a diagram showing another example in which the boundary portion between the singulation line 64 and the glass substrate 60 in FIG. 11 is further enlarged. The side surface 10c of the glass substrate 60 is covered with the metal member that constitutes the separation groove electrode 23, thereby filling the μ-cracks 24. Furthermore, after the metal member is formed, the excess surface of the metal member is removed, resulting in roughness on the surface of the metal member. This roughness further improves adhesion due to an anchor effect when the insulating resin layer 25 is formed.

[0059] 14 shows a case where no separation groove electrode 23 is formed on the side surface 10c of the glass substrate 60. Because the resin of the insulating resin layer 25 is not filled in the μ-crack 24, creating a cavity 24a, there is a possibility that peeling will occur due to insufficient adhesion between the resin of the insulating resin layer 25 and the core substrate 10. Furthermore, if the insulating resin layer 25 contains a filler, and the filler diameter is larger than the size of the μ-crack 24, the μ-crack 24 may be covered, preventing the resin from penetrating.

[0060] The patterning width (the portion where the metal member is disposed) on the side surface 10c of the glass substrate 60 determines the size of the separation groove electrode 23 and must be adjusted according to the processing width (e.g., the width corresponding to the blade width) during singulation. The processing width during singulation must be smaller than the non-patterning width (the portion where the metal member is not disposed). For example, when using blade dicing, it is desirable to create a non-patterning width that is sufficient relative to the blade width, which is the processing width. If the non-patterning width is smaller than the blade width, the processed portion of the blade may come into contact with the metal layer, causing damage to the blade. This is also true for laser and scribing processes, so it is desirable to adjust it so that the metal layer does not reach the disconnection surface.

[0061] After the through electrodes 12, the through electrode connecting portions 41, and the separation groove electrodes 23 are formed, an insulating resin layer 25 is formed, and then the second wiring layer 22 is formed. The insulating resin layer 25 is also filled inside the through electrodes 12. Note that in the example shown here, the insulating resin layers 25 formed on the first wiring layer 21 and the second wiring layer 22 are formed of the same material, but this is not limiting, and the insulating resin layers may be formed of different materials.

[0062] Furthermore, when the insulating resin layer 25 is filled by lamination pressing with a sheet, the μ-cracks 24 where no metal layer is formed are pressed, which may cause the cracks to expand. In the present invention, the μ-cracks are filled with metal, which also has the effect of suppressing the progression of the cracks. As a result, by arranging the separation groove electrode 23 in the separation groove 17 (singulation line 64), the μ-cracks 24 are filled with metal material. This prevents breakage of the glass substrate and peeling between the resin and the core substrate, preventing damage to the core substrate and ensuring the reliability of the multilayer wiring board.

[0063] For the second wiring layer 22, a material different from that of the hydrofluoric acid-resistant metal layer 15 can be used because no etching treatment with a hydrogen fluoride aqueous solution is performed in a subsequent process. In this case, a metal layer made of a material different from that of the hydrofluoric acid-resistant metal layer 15 is formed on the side surface of the through hole 11, thereby forming the through electrode connection portion 42. Examples of materials different from the hydrofluoric acid-resistant metal layer 15 include Ti and Cu, and at least one metal layer made of such a material is formed on the side surface of the through hole 11 and on the second surface 10b of the glass substrate 60. The materials, the number of layers, and the like are not limited to those disclosed in the embodiments and can be set appropriately as needed.

[0064] (Removal of Second Support) Next, the removal step of the second support 70 will be described with reference to FIGS. 15 and 16 . FIG. 15 is a diagram illustrating the removal step of the second support 70 in the manufacturing method according to the first embodiment. FIG. 16 is a diagram illustrating the state after the removal step of the second support 70 in the manufacturing method according to the embodiment of the present invention. As shown in FIG. 15 , the interface between the first wiring layer 21 and the second support 70 is removed, and the second support 70 and the second adhesive layer 71 are separated. As a result, as shown in FIG. 16 , a glass substrate 60 is obtained in which the first wiring layer 21 is formed on the first surface 10 a side of the glass substrate 60 and the second wiring layer 22 is formed on the second surface 10 b side. When separating the second support 70 from the second wiring layer 22, a removal method such as UV light irradiation, heat treatment, or physical peeling can be selected depending on the material used for the second adhesive layer 71. Furthermore, if residues of the second adhesive layer 71 remain on the bonding surface between the first wiring layer 21 and the second adhesive layer 71, plasma cleaning, ultrasonic cleaning, water washing, solvent cleaning using alcohol, or the like may be performed.

[0065] (Formation of Build-Up Layer) Next, with reference to FIG. 17 , a process for forming a build-up layer, in other words, a layer formed by stacking a first wiring layer 21 and a second wiring layer 22, will be described. FIG. 17 is a diagram illustrating the process for forming a build-up layer in the manufacturing method according to the first embodiment. As shown in FIG. 17 , a conductive electrode 31 for connecting the first wiring layer on the first surface 10 a of the glass substrate 60 and a conductive electrode 32 for connecting the second wiring layer on the second surface 10 b are formed on the first wiring layer 21 and the second wiring layer 22 on the second surface 10 b of the glass substrate 60. The conductive electrodes 31 and 32 can be formed by forming vias in the insulating resin layer 25 with a laser, forming a seed layer on the vias, and then using a semi-additive process (i.e., performing a series of processes including resist pattern formation, plating, resist stripping, seed layer removal, and insulating resin layer formation). The first wiring layer 21 and the second wiring layer 22 are stacked in at least one layer, and any number of layers can be set as needed. In FIG. 17, each of the first wiring layer 21 and the second wiring layer 22 is formed by stacking two layers.

[0066] The laser used to form the conductive electrodes 31 and 32 can be different from the laser used to form the laser modified portion 65. For example, it is desirable to use a pulsed laser such as a carbon dioxide laser or a UV-YAG laser, and a laser with a pulse width on the order of μs is suitable.

[0067] (Connection Pad Formation) Next, the formation of connection pads will be described with reference to FIG. 18 . FIG. 18 is a diagram illustrating the connection pad formation process in the manufacturing method according to the first embodiment. As shown in FIG. 18 , after forming an outer protective film such as solder resist 55 on the first wiring layer 21 and the second wiring layer 22, semiconductor element bond pads 51 are formed on the first wiring layer 21, and substrate bond pads 53 are formed on the second wiring layer 22. Surface treatments such as Ni / Au, Ni / Pd / Au, IT, and OSP (water-soluble preflux) are performed on the semiconductor element bond pads 51 and the substrate bond pads 53, and semiconductor element bond solder 52 and substrate bond solder 54 are formed as needed to complete the multilayer wiring board. Note that Ni / Au refers to the use of both Ni and Au, and Ni / Pd / Au refers to the use of all of Ni, Pd, and Au.

[0068] (Multilayer Wiring Base Material Substrate) Next, a multilayer wiring base material substrate will be described with reference to FIG. 19. The glass substrate 60 shown in FIG. 18 is separated into multiple multilayer wiring substrates, but the multiple multilayer wiring substrates 1 are connected and bonded together by an insulating resin layer 25, and can be referred to as a multilayer wiring base material substrate. That is, the multilayer wiring base material substrate is formed by bonding multiple multilayer wiring substrates, each having a core substrate 10 having a first surface 10a, a second surface 10b opposite the first surface 10a, and a side surface 10c connecting the peripheral edge of the first surface 10a with the peripheral edge of the second surface 10b, a first wiring layer formed on the first surface, and a second wiring layer formed on the second surface. Each multilayer wiring substrate is bonded to at least one other multilayer wiring substrate via the insulating resin, with at least the side surface 10c of the core substrate 10 covered, from the center, with a metal member and then with insulating resin. A detailed description will be given below.

[0069] 19 is a perspective view showing an overview of the structure shown in FIG. 18. For ease of understanding, FIG. 19 omits components such as connection pads. The figure shows three portions corresponding to the multilayer wiring board 1. The multilayer wiring board 1 corresponds to the portion surrounded by the dashed line, and a separation groove 17 is formed in the xy plane and the yz plane, dividing the multilayer wiring board 1 into the first wiring layer 21, the second wiring layer 22, and the core substrate 10 surrounded by this. Although FIG. 19 shows portions corresponding to three multilayer wiring boards 1, portions corresponding to multiple multilayer wiring boards are included across the xy plane.

[0070] 18 can also be said to be a multilayer wiring base material substrate as an intermediate product of multilayer wiring board 1. That is, the multilayer wiring base material substrate includes glass substrate 60 having first surface 10a and second surface 10b, a first wiring layer region which is a region including a wiring layer (first wiring layer 21) formed on first surface 10a, a second wiring layer region which is a region including a wiring layer (second wiring layer 22) formed on second surface 10b, separation groove 17 which penetrates from first surface 10a to second surface 10b and separates at least one multilayer wiring board 1 including the first wiring layer region and the second wiring layer region, separation groove electrode 23 formed on separation groove 17, and insulating resin layer 25 which is formed on separation groove electrode 23 and bonds adjacent multilayer wiring boards together.

[0071] (Singulation) Next, referring to FIG. 20 , the singulation of the multilayer wiring substrate will be described. FIG. 20 is a cross-sectional view illustrating the singulation step in the manufacturing method according to the first embodiment. The multilayer wiring substrate is singulated along the singulation lines as shown in FIG. 20 . While FIG. 20 illustrates a case where blade dicing using a dicing blade 72 is used, other methods such as laser and scribing may also be used. Furthermore, the singulation may be performed by combining blade dicing, laser, and scribing. Covering the side surface portion 10 c of the glass substrate 60 with metal prevents the dicing blade from dragging the resin during singulation.

[0072] (Flowchart of the manufacturing method according to the first embodiment) The steps described above are summarized in a flowchart. Fig. 21 is a diagram showing a flowchart of the manufacturing method according to the first embodiment.

[0073] Step S1 is a process for adhering the first support. The first support 61 is adhered to the base substrate (glass substrate 60). In the first embodiment, an adhesive layer containing hydroxyl groups is used as an example. Step S2 is a process for forming a laser-modified layer. A laser-modified portion is formed on the base substrate (glass substrate 60). A laser can be irradiated from the surface (e.g., second surface 60b) opposite to the surface (e.g., first surface 60a) to which the first support 61 is adhered. The laser-modified portion serves as the starting point for the through-holes 11 and the separation grooves 17. Step S3 is a process for forming the first wiring layer 21. Electrodes, wiring, capacitors, inductors, etc. can be formed on the first wiring layer 21. Step S4 is a process for adhering the second support 70. The second support 70 is adhered to the first wiring layer 21. Step S5 is a process for peeling off the first support 61. The base substrate (glass substrate 60) and the first support can be separated from each other at the adhesive layer. Step S6 is a process for forming the through holes 11 by etching. Etching is performed from the second surface 60b side of the base substrate (glass substrate 60) to remove the laser-modified portions. In the areas where the laser-modified portions have been removed, through holes 11 or separation grooves 17 (singulation lines 64) are formed. Step S7 is a process for forming the second wiring layer. A metal layer is formed in the through holes 11 and separation grooves 17, and an insulating resin is deposited on the second surface 60b side to form an insulating resin layer 25, thereby forming the second wiring layer. Specifically, a seed layer is formed and plated to form through electrodes in the through holes of the base substrate, and electrodes and wiring conductive with the through electrodes are formed. At the same time, a metal layer (separation groove electrodes 23) is also formed on the side surfaces 10c of the singulation lines 64. This is followed by a process for depositing the insulating resin. Step S8 is a process for peeling off the second support 70. The second support 70 is separated from the base substrate 60. Step S9 is a process for forming a build-up layer. Electrodes and wiring are formed on the first wiring layer 21 and the second wiring layer 22. Step S10 is a connection pad formation process. A protective film is formed on the first wiring layer 21 and the second wiring layer 22, and then the connection pads are formed. Step S11 is a singulation process. The base substrate (glass substrate 60) is diced or the like to separate the multilayer wiring substrate 1.

[0074] <First Modification> Next, a manufacturing method as a first modification will be described with reference to Figures 22 to 24. The first modification differs from the first embodiment in that the step of forming the laser modified portion is performed after the step of forming the first wiring layer. In the following description, components that are the same as or equivalent to those in the first embodiment described above are given the same reference numerals, and their description will be simplified or omitted.

[0075] 22 is a cross-sectional view illustrating the step of forming a first wiring layer in the manufacturing method according to the first modification. In the first modification, following the step of adhering the first support, a first wiring layer 21 is formed on the glass substrate 60 of the laminated structure 63. At this time, a seed layer including a hydrofluoric acid resistant metal layer 15 is formed on the glass substrate 60, and then the through electrode connection portion 41 and the wiring 16 are formed by a semi-additive (SAP) method. After removing the unnecessary seed layer, an insulating resin layer 25 is formed. Note that the materials and film formation methods for the hydrofluoric acid resistant metal layer and the through electrode connection portion are the same as those in the first embodiment.

[0076] (Formation of laser modified portion) Next, the step of forming the laser modified portion in the first modified example will be described with reference to Fig. 23. Fig. 23 is a cross-sectional view illustrating the step of forming the laser modified portion in the manufacturing method according to the first modified example. As shown in Fig. 23, a laser is irradiated onto the laminated structure 63 from the surface of the first support 61 to form the laser modified portion 65. In this step, the laser modified portion is also formed along the singulation line of the multilayer wiring substrate 1, making it possible to obtain a shape that is the same as the side shape of the multilayer wiring substrate 1 described in the first embodiment.

[0077] 24 is a flowchart of a manufacturing method according to the first modification. In the first modification, the manufacturing method is the same as that according to the first embodiment except for the step of forming the first wiring layer (step S12) and the step of forming the laser modified portion (step S13).

[0078] <Second Modification> Next, a manufacturing method as a second modification will be described with reference to Figures 25 to 27. The second modification differs from the first embodiment in that the laser modification step is performed after the bonding step of the second support. In the following description, components that are the same as or equivalent to those in the first embodiment and first modification described above will be assigned the same reference numerals, and their description will be simplified or omitted.

[0079] (Adhesion of the first support and formation of the first wiring layer) In the manufacturing method of the second modified example, the first steps of adhering the first support and forming the first wiring layer are the same as those in the first embodiment, so explanations will be omitted.

[0080] (Adhesion of Second Support) Next, the step of adhering the second support in the second modified example will be described with reference to Fig. 25. Fig. 25 is a cross-sectional view illustrating the step of adhering the second support in the manufacturing method according to the second modified example. In the second modified example, a second adhesive layer 71 and a second support 70 are formed on the first wiring layer 21 of the laminated structure 63.

[0081] 26 is a cross-sectional view illustrating the step of forming a laser-modified portion in the manufacturing method according to the second modified example. In the step of forming a laser-modified portion in the second modified example, a laser is irradiated onto the laminated structure 63 from the first support 61 side to form a laser-modified portion 65. In this step, the laser-modified portion is also formed along the singulation line of the multilayer wiring substrate 1, making it possible to obtain the same shape as the side shape of the multilayer wiring substrate 1 described in the first embodiment.

[0082] 27 is a flowchart of a manufacturing method according to a second modified example. In the second modified example, the manufacturing method is the same as that according to the first embodiment except that the order of the laser modified portion formation step (step S22) is different.

[0083] <Actions and Effects> According to the first embodiment, first modification, and second modification of the present invention, by protecting the side surface of the core substrate of the multilayer wiring board with resin and metal members, it is possible to fill μ-cracks that occur on the side surface of the glass, and it is possible to maintain sufficient adhesion between the resin and the core substrate, suppress peeling of the resin, and avoid damage to the core substrate. Below, detailed contents will be explained using examples and comparative examples. Note that each example shown below is an example of an example of the present invention, and the present invention should not be interpreted as being limited to these embodiments.

[0084] <Explanation of Examples> Samples of each level were produced with the opening width W1 of the separation groove 17 (singulation line 64) shown in FIG. 9 in the first embodiment set to 300 μm. The dicing process along the singulation line 64, the temperature cycle test conditions, and the evaluation method are as follows. <Dicing Process> Blade used: R07-SD600-BB200-75 54 x 0.15A2 x 40 Equipment used: DAD322 <Temperature Cycle Test> Test conditions: A change from -55°C, RT (room temperature), to 125°C constitutes one cycle, and each temperature was maintained for 30 minutes, followed by 1000 cycles. Observation method: The side of the substrate was observed with a metallurgical microscope at 100x and 500x magnification to evaluate the presence or absence of breakage in the glass substrate.

[0085] Next, each sample will be described with reference to Fig. 28. Fig. 28 is an enlarged view showing the boundary portion between the glass substrate 60 and the singulation line 64 of the prepared samples (Examples 1 to 5) and Comparative Examples 1 and 2.

[0086] Example 1 Example 1 was formed by the method of the first embodiment, and the coverage of the metal layer (separation groove electrode 23) on the side surface portion 10c was set to 100%, as shown in Fig. 28(a). The coverage indicates the proportion of the side surface portion 10c that is covered by the separation groove 17, and a coverage of 100% means that the side surface portion 10c is completely covered by the metal layer, or in other words, a state in which no part of the glass member of the side surface portion 10c is exposed to the separation groove 17.

[0087] Example 2 Example 2 was formed by the method of the first embodiment, and the coverage of the metal layer on the side surface was set to 50% as shown in FIG. 28(b).

[0088] Example 3 Example 3 was formed by the method of the first embodiment, and the coverage of the metal layer on the side surface was set to 20% as shown in FIG. 28(c).

[0089] Example 4 Example 4 was formed by the method of the first embodiment, and the coverage of the metal layer on the side surface was set to 10% as shown in FIG. 28(d).

[0090] Example 5 In Example 5, the metal layer was formed using the method of the first embodiment. As shown in FIG. 28( e), the metal layer coverage of the side surface portion 10 c was 100%. Furthermore, a gap G1 was also provided at the bottom of the separation groove 17 (the opening of the separation groove 17 on the first surface 10 a side). The gap G1 is a gap through which the dicing blade passes. When the dicing blade passes through the separation groove 17 (singulation line 64), it is desirable to make the width of the gap G1 larger than the width of the dicing blade (150 μm). In other words, it is desirable to form the metal layer so that the end of the metal layer is located outside the area where the dicing blade passes.

[0091] Comparative Example 1 Comparative Example 1 was formed using the method of the first embodiment, and in addition to the coverage rate of the metal layer on the side surface portion 10c being 100% as shown in Figure 28 (f), a metal layer was also formed on the entire surface of the bottom of the separation groove.

[0092] Comparative Example 2 Comparative Example 2 uses the method of the first embodiment, but has a structure in which the side surface portion 10c is exposed as shown in FIG. 28(g), and no metal layer is formed.

[0093] The evaluation results of the Examples and Comparative Examples are shown in Table 1. The overall evaluation was OK (marked "O" in the "Overall Evaluation" column) when there was no problem with the evaluation of core substrate cracking after more than 1000 temperature cycles (marked "O" in the "Evaluation" column) and when there was no damage to the dicing blade device during cutting (marked "O" in the "Overall Evaluation" column).

[0094] First, the results of checking whether or not the dicing blade was damaged during dicing will be described. As shown in Table 1, no blade damage was confirmed in Examples 1, 2, 3, 4, and 5 and Comparative Example 2. On the other hand, blade damage was confirmed in Comparative Example 1. It was confirmed that the presence of metal on the separation groove (singulation line) caused wear between the metal and the metallic dicing blade.

[0095] Next, the results of the temperature cycle test will be described. As shown in Table 1, Examples 1, 2, 3, 4, and 5 did not fail even after 1000 cycles. On the other hand, Comparative Example 1 failed after 400 cycles. Analysis of the failed samples revealed defects such as the occurrence of microcracks in the core material. It is believed that the microcracks were caused by stress due to chipping between the blade and the metal during dicing with the blade. Note that Comparative Example 2 failed after 1000 cycles. In the passing samples, separation grooves were formed in advance on the singulation line, and the edges of the separation grooves were protected with resin or the like, which prevented cracks from occurring in the core material.

[0096] <Functions and Effects> Peeling between the resin and the core substrate is prevented by protecting the side surface portion 10c of the core substrate 10 with insulating resin, which prevents damage to the core substrate and enables the multilayer wiring board to have high reliability.

[0097] The scope of the present invention is not limited to the exemplary embodiments shown and described, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and are not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations. Furthermore, the present invention also includes all embodiments that achieve effects equivalent to those intended by the present invention.

[0098] For example, although the present disclosure describes a method in which a first support is bonded to a glass substrate, a laser-modified portion is formed, and then the first support is peeled off, the present disclosure is not limited to this. For example, the laser-modified portion may be formed without using the first support, and the laser-modified portion may be etched to a desired thickness in the through-hole forming step.

[0099] The present invention is not limited to the following embodiments: (Aspect 1) A multilayer wiring base substrate comprising: a core substrate having a first surface, a second surface opposite the first surface, and a side surface connecting a peripheral edge of the first surface with a peripheral edge of the second surface; a first wiring layer formed on the first surface; and a second wiring layer formed on the second surface, wherein at least the side surface of the core substrate is covered with a metal member and then an insulating resin from the center, and the multilayer wiring base substrate is connected to at least one of the other multilayer wiring substrates via the insulating resin. (Aspect 2) A multilayer wiring board having a core substrate having a first surface, a second surface opposite the first surface, and a side surface connecting a peripheral edge of the first surface with a peripheral edge of the second surface, a first wiring layer that is a wiring layer formed on the first surface, and a second wiring layer that is a wiring layer formed on the second surface, wherein at least the side surface of the core substrate is covered with a metal member and then an insulating resin. (Aspect 3) The multilayer wiring board of Aspect 2, wherein 10% or more of the side surface of the core substrate is covered with the metal member. (Aspect 4) The multilayer wiring board of Aspect 2 or Aspect 3, wherein the metal member on the side surface of the core substrate includes a film-formed member formed by sputtering as a seed layer. (Aspect 5) The multilayer wiring board of any one of Aspects 2 to 4, wherein the metal member on the side surface of the core substrate includes a metal layer formed by plating. (Aspect 6) A method for manufacturing a multilayer wiring board, comprising: forming a laser-modified portion on a base substrate having a first surface and a second surface opposite the first surface; forming a first wiring layer on the first surface; etching from the second surface side to form through holes and separation grooves; forming a metal layer in the through holes and the separation grooves; depositing an insulating resin on the second surface side to form an insulating resin layer; and forming a second wiring layer. (Aspect 7) A method for manufacturing a multilayer wiring board according to Aspect 6, wherein in the step of forming the metal layer, a gap is formed in the metal layer to allow a dicing blade to pass through.(Aspect 8) An intermediate product of a multilayer wiring board comprising: a base substrate having a first surface and a second surface; at least one first wiring layer region which is a region including a wiring layer formed on the first surface; at least one second wiring layer region which is a region including a wiring layer formed on the second surface; a separation groove which penetrates from the first surface to the second surface and separates at least one multilayer wiring board including the first wiring layer region and the second wiring layer region; a separation groove electrode formed on the separation groove; and an insulating resin layer formed on the separation groove electrode and which bonds adjacent multilayer wiring boards together.

[0100] 1, 100: multilayer wiring substrate, 10: core substrate, 11: through hole, 12: through electrode, 13: capacitor electrode, 14: dielectric layer, 15: hydrofluoric acid resistant metal layer, 16: wiring, 17: separation groove, 17T: opening width of separation groove, 17B: processing width of bottom of separation groove, 21: first wiring layer, 22: second wiring layer, 23: separation groove electrode, 24: μ crack, 25: insulating resin layer, 31, 32: conductive electrode, 4 1, 42: Through electrode connection portion, 51: Semiconductor element bonding pad, 52: Semiconductor element bonding solder, 53: Substrate bonding pad, 54: Substrate bonding solder, 55: Solder resist, 60: Glass substrate, 61: First support, 62: First adhesive layer, 63: Laminated structure, 65: Laser modified portion, 65T: Transfer mark of laser modified portion, 70: Second support, 71: Second adhesive layer, 72: Blade

Claims

1. A multilayer wiring base substrate, comprising a plurality of multilayer wiring substrates each having a core substrate having a first surface, a second surface facing the first surface, and a side surface connecting a peripheral portion of the first surface and a peripheral portion of the second surface, a first wiring layer which is a wiring layer formed on the first surface, and a second wiring layer which is a wiring layer formed on the second surface, wherein at least the side surface portion of the core substrate is covered in order from its center side with a metal member and an insulating resin, and is bonded via the insulating resin to at least one of other multilayer wiring substrates.

2. A multilayer wiring substrate having a core substrate having a first surface, a second surface facing the first surface, and a side surface connecting a peripheral portion of the first surface and a peripheral portion of the second surface, a first wiring layer which is a wiring layer formed on the first surface, and a second wiring layer which is a wiring layer formed on the second surface, wherein at least the side surface portion of the core substrate is covered in order with a metal member and an insulating resin.

3. The multilayer wiring substrate according to claim 2, wherein 10% or more of the side surface portion of the core substrate is covered with the metal member.

4. The multilayer wiring substrate according to claim 2, wherein the metal member of the side surface portion of the core substrate includes a film-forming member by sputtering as a seed layer.

5. The multilayer wiring substrate according to claim 2, wherein the metal member of the side surface portion of the core substrate includes a metal layer by plating.

6. The multilayer wiring substrate according to claim 2, wherein the core substrate has one or more through electrodes penetrating from an opening formed in the first surface of the core substrate to an opening formed in the second surface, and the first wiring layer and the second wiring layer are electrically connected via the through electrodes, and the multilayer wiring substrate has one or more capacitors each including a lower electrode disposed in the first wiring layer, a dielectric layer, and an upper electrode laminated in order on the lower electrode.

7. The multilayer wiring substrate according to claim 6, wherein the through electrode closes the opening on the first surface side in the first wiring layer, and at least one lower electrode of the capacitors closes the through electrode in the first wiring layer.

8. The multilayer wiring board according to claim 6, wherein the thickness of the dielectric layer ranges from 10 nm to 5 μm, and the multilayer wiring board according to claim 6 is characterized by this.

9. The multilayer wiring board according to claim 6, wherein the multilayer wiring board has an inductor formed in the first wiring layer, and the multilayer wiring board according to claim 7 is characterized by this.

10. The multilayer wiring board according to claim 2, wherein the first wiring layer and the second wiring layer include an insulating resin layer, and the insulating resin layer is formed of the same type of resin as the insulating resin covering the side surface of the core substrate, and the multilayer wiring board according to claim 2 is characterized by this.

11. The multilayer wiring board according to claim 10, wherein the insulating resin layer has a relative permittivity in the range of 3.1 to 3.5 and a dielectric loss tangent in the range of 0.002 to 0.012, and the multilayer wiring board according to claim 10 is characterized by this.

12. A method for manufacturing a multilayer wiring board, comprising the steps of forming a laser modified portion on a base substrate having a first surface and a second surface opposite to the first surface, forming a first wiring layer on the first surface, performing etching from the second surface side to form a through hole and a separation groove, forming a metal layer in the through hole and the separation groove, depositing an insulating resin on the second surface side to form an insulating resin layer, and forming a second wiring layer.

13. In the step of forming the metal layer, a gap through which a dicing blade passes is formed in the metal layer, and the method for manufacturing a multilayer wiring board according to claim 12 is characterized by this.

14. A multilayer wiring base substrate comprising a base substrate having a first surface and a second surface, a first wiring layer region which is a region including a wiring layer formed on the first surface, a second wiring layer region which is a region including a wiring layer formed on the second surface, a separation groove penetrating from the first surface to the second surface and separating at least one multilayer wiring board including the first wiring layer region and the second wiring layer region, a separation groove portion electrode formed on the separation groove, and an insulating resin layer formed on the separation groove portion electrode and bonding adjacent multilayer wiring boards to each other.

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