Semiconductor laser element

Abstract

A semiconductor laser element (1) comprises: a semiconductor laminate (1S) that emits laser light and in which semiconductor layers are laminated, the semiconductor laminate (1S) having a ridge (50R); and a first p-side electrode (91) disposed over the semiconductor laminate (1S). The semiconductor laminate (1S) has an n-type cladding layer (30), an active layer (42), a p-type cladding layer (50), a p-type barrier relaxation layer (60), and a contact layer (70). The film thickness of the contact layer (70) is 0.1 μm or less, and the bandgap energy of the contact layer (70) is smaller than the energy corresponding to the peak wavelength of the laser light. The p-type barrier relaxation layer (60) has a first p-type barrier relaxation layer (60b) and a second p-type barrier relaxation layer (60t) disposed between the contact layer (70) and the first p-type barrier relaxation layer (60b). The second p-type barrier relaxation layer (60t) is an AlGaAs layer, and the bandgap energy of the second p-type barrier relaxation layer (60t) is greater than the energy corresponding to the peak wavelength.

Description

semiconductor laser element

[0001] The present disclosure relates to a semiconductor laser device.

[0002] Semiconductor laser elements have been known as compact, high-power light sources. For such semiconductor laser elements, there is a need to suppress the operating voltage. Known techniques for suppressing the operating voltage of semiconductor laser elements include inserting a layer to reduce the valence band barrier (discontinuity) between adjacent semiconductor layers (see Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2004-88054

[0004] However, as the output power of semiconductor laser devices increases, there is a demand for further suppression of the operating voltage.

[0005] The present disclosure has been made to solve such problems, and has an object to provide a semiconductor laser device that can suppress the operating voltage.

[0006] In order to achieve the above object, one aspect of the semiconductor laser element according to the present disclosure is a semiconductor laser element that emits laser light, comprising: a semiconductor laminate formed by stacking semiconductor layers and having a ridge; and a p-side electrode disposed above the semiconductor laminate, wherein the semiconductor laminate has an n-type cladding layer, an active layer disposed above the n-type cladding layer, a p-type cladding layer disposed above the active layer, a p-type barrier buffer layer disposed above the p-type cladding layer and having a film thickness of 0.06 μm or less, and a contact layer disposed above the p-type barrier buffer layer and in contact with the p-side electrode, is 0.1 μm or less, the band gap energy of the contact layer is smaller than the energy corresponding to the peak wavelength of the laser light, the p-type barrier buffer layer is a layer that buffers the barrier of the valence band between the p-type cladding layer and the contact layer, the p-type barrier buffer layer has a first p-type barrier buffer layer and a second p-type barrier buffer layer disposed between the contact layer and the first p-type barrier buffer layer, the second p-type barrier buffer layer is an AlGaAs layer, and the band gap energy of the second p-type barrier buffer layer is larger than the energy corresponding to the peak wavelength.

[0007] In order to achieve the above object, another aspect of the semiconductor laser element according to the present disclosure is a semiconductor laser element that emits laser light, comprising: a semiconductor laminate in which semiconductor layers are stacked and which has a ridge; and a p-side electrode that is disposed above the semiconductor laminate; the semiconductor laminate has an n-type cladding layer, an active layer that is disposed above the n-type cladding layer, a p-type cladding layer that is disposed above the active layer, a p-type barrier buffer layer that is disposed above the p-type cladding layer and has a film thickness of 0.06 μm or less, and a contact layer that is disposed above the p-type barrier buffer layer and in contact with the p-side electrode, the film thickness of the contact layer being 0.1 μm or less, and the band gap energy of the contact layer being 0.1 μm or less relative to the peak wavelength of the laser light. the p-type barrier buffer layer has a first p-type barrier buffer layer and a second p-type barrier buffer layer disposed between the contact layer and the first p-type barrier buffer layer, the band gap energy of the first p-type barrier buffer layer is smaller than the maximum band gap energy of the p-type cladding layer, the second p-type barrier buffer layer is an AlGaAs layer, the band gap energy of the second p-type barrier buffer layer is larger than the energy corresponding to the peak wavelength, the band gap energy of the second p-type barrier buffer layer is smaller than the maximum band gap energy of the p-type cladding layer, and the band gap energy of the first p-type barrier buffer layer is larger than the energy corresponding to the peak wavelength.

[0008] According to the present disclosure, it is possible to provide a semiconductor laser device capable of suppressing the operating voltage.

[0009] 1 is a schematic top view showing the configuration of a semiconductor laser element according to a first embodiment; FIG. 2 is a schematic cross-sectional view showing the configuration of a semiconductor laser element according to the first embodiment; FIG. 3 is a schematic cross-sectional view showing the configuration of an active layer included in the semiconductor laser element according to the first embodiment; FIG. 4 is a schematic cross-sectional view showing the configuration of a p-type barrier buffer layer included in the semiconductor laser element according to the first embodiment; FIG. 5 is a diagram showing the configuration of each layer in a semiconductor stack included in the semiconductor laser element according to the first embodiment; FIG. 6 is a diagram showing the energy distribution of a valence band and a conduction band between a p-type cladding layer and a contact layer of a semiconductor laser element of a comparative example; FIG. 7 is a diagram showing the energy distribution of a valence band and a conduction band between a p-type cladding layer and a contact layer of a semiconductor laser element according to the first embodiment; FIG. 8 is a graph showing the relationship between the Al composition ratio of AlGaAs, the band gap energy, and the wavelength of light having energy equal to the band gap energy; FIG. 9 is a first graph showing the relationship between the Al composition ratio of the second p-type barrier buffer layer and the operating voltage of the semiconductor laser element according to the first embodiment; 1 is a graph showing the relationship between the operating voltage of a semiconductor laser element and the difference in bandgap energy between the second p-type barrier buffer layer and a layer below the second p-type barrier buffer layer and in contact with the second p-type barrier buffer layer according to the first embodiment. FIG. 2 is a graph showing the relationship between the film thickness of the p-type barrier buffer layer according to the first embodiment and the waveguide loss of the semiconductor laser element. FIG. 3 is a graph showing the relationship between the Al composition ratio of the second p-type barrier buffer layer according to the first embodiment and the operating voltage of the semiconductor laser element. FIG. 4 is a diagram showing the results of a simulation of energy distribution when the Al composition ratio of the second p-type barrier buffer layer is set to 0.43, 0.60, and 0.80. FIG. 5 is a graph showing the relationship between the film thickness of the contact layer according to the first embodiment and the waveguide loss of the semiconductor laser element. FIG. 6 is a graph showing the relationship between the film thickness of the second p-type cladding layer according to the first embodiment and the waveguide loss of the semiconductor laser element. FIG. 7 is a diagram showing the configuration of each layer in a semiconductor stack included in a semiconductor laser element according to a fifth embodiment. FIG. 8 is a graph showing the relationship between the film thickness of the p-type barrier buffer layer according to the fifth embodiment and the waveguide loss of the semiconductor laser element.

[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that each of the embodiments described below represents a specific example of the present disclosure. Therefore, the numerical values, shapes, materials, components, arrangement and connection of the components, steps (processes), and order of steps shown in the following embodiments are merely examples and are not intended to limit the present disclosure.

[0011] Furthermore, each figure is a schematic diagram and is not necessarily an exact illustration. Therefore, the scales and the like do not necessarily match in each figure. In each figure, the same reference numerals are used to denote substantially the same components, and redundant explanations will be omitted or simplified.

[0012] In this specification, the terms "above" and "below" do not refer to vertically above and below in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. The terms "above" and "below" are used not only when two components are arranged with a gap between them and another component is present between them, but also when two components are arranged in contact with each other.

[0013] First Embodiment A semiconductor laser device according to a first embodiment will be described.

[0014] [1-1. Overall Configuration] The overall configuration of the semiconductor laser device according to this embodiment will be described with reference to FIGS. 1 to 5. FIG. 1 is a schematic top view showing the configuration of the semiconductor laser device 1 according to this embodiment. FIG. 2 is a schematic cross-sectional view showing the configuration of the semiconductor laser device 1 according to this embodiment. FIG. 2 shows a cross-section of the semiconductor laser device 1 taken along line II-II in FIG. 1. FIGS. 3 and 4 are schematic cross-sectional views showing the configuration of the active layer 42 and the p-type barrier buffer layer 60 included in the semiconductor laser device 1 according to this embodiment. FIGS. 3 and 4 show cross-sections of the active layer 42 and the p-type barrier buffer layer 60 taken along line II-II in FIG. 1. FIGS. 1 to 4 show mutually orthogonal X-, Y-, and Z-axes. The X-, Y-, and Z-axes are in a right-handed Cartesian coordinate system. The stacking direction of the semiconductor laser device 1 is parallel to the Z-axis, and the main emission direction of the laser light is parallel to the Y-axis. In other words, the resonance direction of the laser light is parallel to the Y-axis. 5 is a diagram showing the configuration of each layer in the semiconductor laminate 1S included in the semiconductor laser device 1 according to this embodiment, and shows the composition, film thickness, refractive index, band gap energy (Eg), and impurity concentration of each layer in the semiconductor laminate 1S.

[0015] The semiconductor laser device 1 according to this embodiment is a device that emits laser light. The semiconductor laser device 1 has a resonator in which laser light resonates in a first direction between a first end facet 1F on the front side and a second end facet 1R on the rear side (see FIG. 1 ). The laser light is mainly emitted from the first end facet 1F. The peak wavelength of the laser light is, for example, not less than 620 nm and not more than 860 nm. In this embodiment, the peak wavelength of the laser light is approximately 638 nm.

[0016] 2, the semiconductor laser device 1 includes a substrate 10, a semiconductor stack 1S disposed above the substrate 10, and a p-side electrode disposed above the semiconductor stack 1S. In this embodiment, the semiconductor laser device 1 includes, as the p-side electrodes, a first p-side electrode 91, a second p-side electrode 92, and a third p-side electrode 93. The semiconductor laser device 1 further includes a current blocking layer 80, an n-side electrode 94, and facet protective films 2F and 2R.

[0017] The substrate 10 is an n-type semiconductor substrate on which the semiconductor laminate 1S of the semiconductor laser device 1 is laminated. In this embodiment, the substrate 10 is an n-type semiconductor substrate containing GaAs, and more specifically, an n-type GaAs substrate.

[0018] The semiconductor laminate 1S is a laminate in which semiconductor layers are stacked. In this embodiment, as shown in FIGS. 1 and 2 , a ridge 50R protruding upward is formed in the semiconductor laminate 1S. The semiconductor laminate 1S also has a groove 50T arranged along the ridge 50R and extending in the Y-axis direction, and two protrusions 50P protruding upward. In this embodiment, the width (dimension in the X-axis direction) of the ridge 50R is 75 μm. The semiconductor laminate 1S includes, stacked in this order from the substrate 10 side, a buffer layer 21, an n-type barrier buffer layer 22, an n-type cladding layer 30, an n-side light guide layer 41, an active layer 42, a p-side light guide layer 43, a p-type cladding layer 50, a p-type barrier buffer layer 60, and a contact layer 70. The semiconductor laminate 1S has a first end facet 1F and a second end facet 1R located at the ends in a direction perpendicular to the stacking direction and constituting a resonator in which laser light resonates.

[0019] In this embodiment, the length L of the resonator (that is, the distance between the first end face 1F and the second end face 1R) is about 1500 μm.

[0020] The buffer layer 21 is a semiconductor layer disposed above the substrate 10. In this embodiment, as shown in FIG. 5, the buffer layer 21 has a concentration of 5.0×10 １７ cm －３ The n-type GaAs layer is 0.4 μm thick and is doped with an n-type impurity of . The n-type impurity is not particularly limited, and Si, Se, Te, etc. can be used. In this embodiment, Si is used as the n-type impurity.

[0021] The n-type barrier buffer layer 22 is a semiconductor layer disposed above the substrate 10. In this embodiment, the n-type barrier buffer layer 22 is disposed between the buffer layer 21 and the n-type cladding layer 30, and buffers the conduction band barrier between the buffer layer 21 and the n-type cladding layer 30. This reduces the barrier for electrons moving between the buffer layer 21 and the n-type cladding layer 30, thereby reducing the operating voltage of the semiconductor laser device 1. In this embodiment, the n-type barrier buffer layer 22 has a concentration of 7.5×10 １７ cm －３ n-type Al with a thickness of 0.075 μm doped with n-type impurities ｘｎａ Ga １－ｘｎａ The Al composition ratio of the n-type barrier buffer layer 22 increases with increasing distance from the substrate 10. The Al composition ratio of the n-type barrier buffer layer 22 is 0.05 at the end closer to the substrate 10 (i.e., the end farther from the n-type cladding layer 30) and is 0.63 at the end farther from the substrate 10 (i.e., the end closer to the n-type cladding layer 30).

[0022] The n-type cladding layer 30 is a semiconductor layer disposed above the substrate 10. In this embodiment, the n-type cladding layer 30 is disposed between the n-type barrier buffer layer 22 and the n-side optical guide layer 41, and is in contact with both the n-type barrier buffer layer 22 and the n-side optical guide layer 41. The average refractive index of the n-type cladding layer 30 is smaller than the average refractive index of the active layer 42. The n-type cladding layer 30 includes a first n-type cladding layer 31, a second n-type cladding layer 32, and a third n-type cladding layer 33.

[0023] In this disclosure, the average refractive index of each layer refers to the refractive index value obtained by integrating the magnitude of the refractive index at a certain position in the stacking direction of the layer from the position of the interface closer to the substrate 10 in the stacking direction of the layer to the position of the interface farther from the substrate 10, and dividing the result by the film thickness of the layer (the distance from the interface closer to the substrate 10 to the interface farther from the substrate 10).

[0024] The first n-type cladding layer 31 is disposed above the substrate 10. In this embodiment, the first n-type cladding layer 31 is disposed above the n-type barrier buffer layer 22 and is in contact with the n-type barrier buffer layer 22. In this embodiment, the first n-type cladding layer 31 has a concentration of 7.5×10 １７ cm －３ The n-type AlInP layer is doped with n-type impurities and has a thickness of 0.300 μm.

[0025] The second n-type cladding layer 32 is disposed above the first n-type cladding layer 31. In this embodiment, the second n-type cladding layer 32 is disposed between the first n-type cladding layer 31 and the third n-type cladding layer 33, and is in contact with both the first n-type cladding layer 31 and the third n-type cladding layer 33. In this embodiment, the second n-type cladding layer 32 has a concentration of 5.0×10 １７ cm －３ The n-type AlInP layer is doped with n-type impurities and has a thickness of 0.500 μm.

[0026] The third n-type cladding layer 33 is disposed above the second n-type cladding layer 32. In this embodiment, the third n-type cladding layer 33 is disposed between the second n-type cladding layer 32 and the n-side light guide layer 41, and is in contact with both the second n-type cladding layer 32 and the n-side light guide layer 41. In this embodiment, the third n-type cladding layer 33 has a concentration of 3.0×10 １７ cm －３ The n-type AlInP layer is doped with n-type impurities and has a thickness of 0.500 μm.

[0027] The n-side optical guide layer 41 is a semiconductor layer disposed above the n-type cladding layer 30. The n-side optical guide layer 41 is disposed between the n-type cladding layer 30 and the active layer 42, and is in contact with both the n-type cladding layer 30 and the active layer 42. The average refractive index of the n-side optical guide layer 41 is greater than the average refractive index of the n-type cladding layer 30. In this embodiment, the n-side optical guide layer 41 has a concentration of 3.0×10 １７ cm －３ n-type impurity doped with Al ０．６３ Ga ０．３７ ) ０．５１ In ０．４９ This is the P layer.

[0028] The active layer 42 is a light-emitting layer disposed above the n-type cladding layer 30. In this embodiment, the active layer 42 is disposed between the n-side optical guiding layer 41 and the p-side optical guiding layer 43, and is in contact with the n-side optical guiding layer 41 and the p-side optical guiding layer 43. The configuration of the active layer 42 is not particularly limited. In this embodiment, the active layer 42 has a quantum well structure including one or more well layers and two or more barrier layers, and each of the one or more well layers is an AlGaInP layer, a GaInP layer, a GaAsP layer, a GaAs layer, or an InGaAs layer. As shown in FIGS. 3 and 5 , the active layer 42 according to this embodiment has a barrier layer 42 a, a well layer 42 b, and a barrier layer 42 c.

[0029] The barrier layer 42a is disposed above the n-type cladding layer 30. In this embodiment, the barrier layer 42a is disposed above the n-side optical guide layer 41 and is in contact with the n-side optical guide layer 41. The barrier layer 42a is an undoped (Al ０．６３ Ga ０．３７ ) ０．５１ In ０．４９ This is the P layer.

[0030] The well layer 42b is disposed between the barrier layer 42a and the barrier layer 42c. In this embodiment, the well layer 42b is in contact with both the barrier layer 42a and the barrier layer 42c. The well layer 42b is an undoped GaInP layer with a thickness of 0.0125 μm.

[0031] The barrier layer 42c is disposed above the well layer 42b. In this embodiment, the barrier layer 42c is disposed between the well layer 42b and the p-side optical guiding layer 43, and is in contact with both the well layer 42b and the p-side optical guiding layer 43. The barrier layer 42c is an undoped (Al ０．６３ Ga ０．３７ ) ０．５１ In ０．４９ This is the P layer.

[0032] The p-side optical guide layer 43 is a semiconductor layer disposed above the active layer 42. The p-side optical guide layer 43 is disposed between the active layer 42 and the p-type cladding layer 50, and is in contact with both the active layer 42 and the p-type cladding layer 50. The average refractive index of the p-side optical guide layer 43 is greater than the average refractive index of the p-type cladding layer 50. In this embodiment, the p-side optical guide layer 43 has a concentration of 1.0×10１８ cm －３ p-type impurity doped with Al ０．６３ Ga ０．３７ ) ０．５１ In ０．４９ This is a P layer. The p-type impurity is not particularly limited, and Zn, Mg, or C can be used. In this embodiment, Mg is used as the p-type impurity.

[0033] The p-type cladding layer 50 is a semiconductor layer disposed above the active layer 42. In this embodiment, the p-type cladding layer 50 is disposed between the p-side optical guiding layer 43 and the p-type barrier buffer layer 60, and is in contact with both the p-side optical guiding layer 43 and the p-type barrier buffer layer 60. The average refractive index of the p-type cladding layer 50 is smaller than the average refractive index of the active layer 42. The p-type cladding layer 50 includes a first p-type cladding layer 51 and a second p-type cladding layer 52.

[0034] The first p-type cladding layer 51 is disposed above the active layer 42. In this embodiment, the first p-type cladding layer 51 is disposed above the p-side optical guide layer 43 and is in contact with the p-side optical guide layer 43. In this embodiment, the first p-type cladding layer 51 has a concentration of 1.0×10 １８ cm －３ The p-type AlInP layer is 0.290 μm thick and is doped with a p-type impurity of Mg. In this embodiment, Mg is used as the p-type impurity.

[0035] The second p-type cladding layer 52 is disposed above the first p-type cladding layer 51. In this embodiment, the second p-type cladding layer 52 is disposed between the first p-type cladding layer 51 and the p-type barrier buffer layer 60, and is in contact with both the first p-type cladding layer 51 and the p-type barrier buffer layer 60. In this embodiment, the second p-type cladding layer 52 has a dopant concentration of 1.2×10 １８ cm －３ In this embodiment, Mg is used as the p-type impurity.

[0036] The first p-type cladding layer 51 is a region of the p-type cladding layer 50 that is below the lower end of the ridge 50R. The second p-type cladding layer 52 includes a region of the p-type cladding layer 50 that is included in the ridge 50R. In this embodiment, the second p-type cladding layer 52 further includes a region that is included in the protruding portion 50P. In this manner, the lower end of the ridge 50R is located within the p-type cladding layer 50, and more specifically, at the interface between the first p-type cladding layer 51 and the second p-type cladding layer 52.

[0037] The first p-type cladding layer 51 may have an etching stop layer as its uppermost layer. This allows for improved control of the film thickness of the first p-type cladding layer 51 when forming the ridge 50R (and the protruding portion 50P). The etching stop layer may be a single layer made of a p-type GaInP layer or a p-type AlGaInP layer having a lower Al composition ratio than the layers of the first p-type cladding layer 51 located below the etching stop layer. Alternatively, the etching stop layer may have a multilayer periodic structure of GaInP layers and AlGaInP layers.

[0038] The p-type barrier buffer layer 60 is a semiconductor layer disposed above the p-type cladding layer 50. The p-type barrier buffer layer 60 buffers the valence band barrier between the p-type cladding layer 50 and the contact layer 70. Here, the function of the p-type barrier buffer layer 60 will be outlined with reference to FIGS. 6 and 7 . FIG. 6 is a diagram schematically showing the energy distributions of the valence band and conduction band between the p-type cladding layer and the contact layer of a semiconductor laser device of a comparative example. FIG. 7 is a diagram schematically showing the energy distributions of the valence band and the conduction band between the p-type cladding layer 50 and the contact layer 70 of the semiconductor laser device 1 according to this embodiment.

[0039] The semiconductor laser device of the comparative example shown in FIG. 6 differs from the semiconductor laser device 1 according to the present embodiment in that a p-type barrier buffer layer is not disposed between the p-type cladding layer and the contact layer, but is the same in other respects.

[0040] 6 and 7, when a voltage is applied to the semiconductor laser device, electrons in the conduction band move from the p-type cladding layer to the contact layer, and holes in the valence band move from the contact layer to the p-type cladding layer. As shown in Fig. 6, in the semiconductor laser device of the comparative example, a spike-shaped barrier (heterobarrier) is formed in the valence band at the boundary between the p-type cladding layer and the contact layer. This barrier prevents holes from moving between the p-type cladding layer and the contact layer, which increases the electrical resistance.

[0041] In contrast, in the semiconductor laser device 1 according to this embodiment, as shown in FIG. 7 , a p-type barrier buffer layer 60 is disposed between the p-type cladding layer 50 and the contact layer 70. The bandgap energy of the p-type barrier buffer layer 60 is larger than the bandgap energy of the contact layer 70 and smaller than the maximum bandgap energy of the p-type cladding layer 50. By disposing such a p-type barrier buffer layer 60 between the p-type cladding layer 50 and the contact layer 70, the barrier in the valence band is relaxed. In other words, the height of the barrier formed at the boundary between the p-type cladding layer 50 and the contact layer 70 is reduced. This makes it possible to suppress an increase in the electrical resistance of the semiconductor laser device 1 due to the barrier. Therefore, the operating voltage of the semiconductor laser device 1 can be reduced.

[0042] In this embodiment, the p-type barrier buffer layer 60 has a thickness of 0.06 μm or less. By reducing the thickness of the p-type barrier buffer layer 60 in this manner, the electrical resistance of the p-type barrier buffer layer 60 can be reduced, and therefore an increase in operating voltage caused by inserting the p-type barrier buffer layer 60 between the p-type cladding layer 50 and the contact layer 70 can be suppressed.

[0043] As shown in FIG. 4 , the p-type barrier buffer layer 60 includes a first p-type barrier buffer layer 60b and a second p-type barrier buffer layer 60t. The second p-type barrier buffer layer 60t is disposed between the contact layer 70 and the first p-type barrier buffer layer 60b. In this embodiment, the first p-type barrier buffer layer 60b contacts the p-type cladding layer 50, and the second p-type barrier buffer layer 60t contacts the contact layer 70 (see FIG. 2 ). In this embodiment, the p-type barrier buffer layer 60 includes an intermediate layer disposed between the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t, the intermediate layer having a different composition from each of the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t. As shown in FIG. 4 , the p-type barrier buffer layer 60 includes a first intermediate layer 61 and a second intermediate layer 62.

[0044] The first p-type barrier buffer layer 60b is disposed above the p-type cladding layer 50. The first p-type barrier buffer layer 60b is a layer disposed between the p-type cladding layer 50 and the second p-type barrier buffer layer 60t, and has a bandgap energy smaller than the maximum bandgap energy of the p-type cladding layer 50. The bandgap energy of the first p-type barrier buffer layer 60b is larger than the energy corresponding to the peak wavelength of the laser light emitted by the semiconductor laser device 1. This reduces the absorption of laser light in the first p-type barrier buffer layer 60b, thereby reducing waveguide loss in the semiconductor laser device 1.

[0045] In this embodiment, the first p-type barrier buffer layer 60b is disposed between the p-type cladding layer 50 and the first intermediate layer 61, and is in contact with both the p-type cladding layer 50 and the first intermediate layer 61. The first p-type barrier buffer layer 60b is, for example, an AlGaInP layer. In this embodiment, the first p-type barrier buffer layer 60b has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．７０ Ga ０．３０ ) ０．５１ In ０．４９ This is a P layer. In this embodiment, Mg is used as the p-type impurity.

[0046] The first intermediate layer 61 is disposed above the p-type cladding layer 50. In this embodiment, the first intermediate layer 61 is disposed between the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t, and is an example of an intermediate layer having a composition different from that of each of the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t. In this embodiment, the first intermediate layer 61 is disposed between the first p-type barrier buffer layer 60b and the second intermediate layer 62, and is in contact with each of the first p-type barrier buffer layer 60b and the second intermediate layer 62. The first intermediate layer 61 is, for example, an AlGaInP layer. In this embodiment, the first intermediate layer 61 has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．４０ Ga ０．６０ ) ０．５１ In ０．４９ This is a P layer. In this embodiment, Mg is used as the p-type impurity.

[0047] The second intermediate layer 62 is disposed above the p-type cladding layer 50. In this embodiment, the second intermediate layer 62 is disposed between the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t, and is an example of an intermediate layer having a composition different from that of each of the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t. In this embodiment, the second intermediate layer 62 is disposed between the first intermediate layer 61 and the second p-type barrier buffer layer 60t, and is in contact with each of the first intermediate layer 61 and the second p-type barrier buffer layer 60t. The second intermediate layer 62 is, for example, an AlGaInP layer. In this embodiment, the second intermediate layer 62 has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．１２ Ga ０．８８ ) ０．５１ In ０．４９ This is a P layer. In this embodiment, Mg is used as the p-type impurity.

[0048] The second p-type barrier buffer layer 60t is disposed above the p-type cladding layer 50. In this embodiment, the second p-type barrier buffer layer 60t is disposed between the second intermediate layer 62 and the contact layer 70, and is in contact with both the second intermediate layer 62 and the contact layer 70. The second p-type barrier buffer layer 60t is an AlGaAs layer. The bandgap energy of the second p-type barrier buffer layer 60t is greater than the energy corresponding to the peak wavelength of the laser light emitted by the semiconductor laser device 1. This reduces the absorption of laser light in the second p-type barrier buffer layer 60t, thereby reducing waveguide loss in the semiconductor laser device 1.

[0049] The bandgap energy of the second p-type barrier buffer layer 60 t is smaller than the maximum bandgap energy of the p-type cladding layer 50 .

[0050] The second p-type barrier buffer layer 60t is disposed between the first p-type barrier buffer layer 60b and the contact layer 70, and is a layer including the layer closest to the contact layer 70 among the AlGaAs layers having a band gap energy greater than the energy corresponding to the peak wavelength emitted by the semiconductor laser device 1.

[0051] The bandgap energy of the second p-type barrier buffer layer 60t may be larger than the bandgap energy of the well layer 42b, thereby more reliably reducing waveguide loss.

[0052] Here, the relationship between the Al composition ratio of the second p-type barrier buffer layer 60t and the bandgap energy when the second p-type barrier buffer layer 60t is an AlGaAs layer will be described with reference to FIG. 8 . FIG. 8 is a graph showing the relationship between the Al composition ratio of AlGaAs, the bandgap energy, and the wavelength of light having energy equal to the bandgap energy. As shown in FIG. 8 , as the Al composition ratio of AlGaAs increases, the bandgap energy of AlGaAs increases. Furthermore, as the Al composition ratio of AlGaAs increases, the wavelength of light having energy equal to the bandgap energy of AlGaAs shortens. When the Al composition ratio of AlGaAs is 0 (i.e., when AlGaAs is GaAs), the wavelength of light having energy equal to the bandgap energy of AlGaAs is 867 nm. Furthermore, when the Al composition ratio of AlGaAs is 1 (i.e., when AlGaAs is AlAs), the wavelength of light having energy equal to the bandgap energy of AlGaAs is 572 nm. When the peak wavelength of the laser light emitted by the semiconductor laser device 1 is 638 nm, the Al composition ratio of the second p-type barrier buffer layer 60t, which is an AlGaAs layer, only needs to be greater than 0.43 in order to make the bandgap energy of the second p-type barrier buffer layer 60t greater than the energy corresponding to the peak wavelength of the laser light emitted by the semiconductor laser device 1. In this embodiment, the second p-type barrier buffer layer 60t has a concentration of 1.2×10 １８ cm －３ p-type Al doped with p-type impurities of 0.030 μm in thickness ｘ Ga １－ｘ It is an As layer (0.43<x≦1). In this embodiment, C is used as the p-type impurity.

[0053] The contact layer 70 is a semiconductor layer disposed above the p-type barrier buffer layer 60 and in contact with the p-side electrode. In this embodiment, the contact layer 70 is in contact with the p-type barrier buffer layer 60 and the first p-side electrode 91. The thickness of the contact layer 70 is 0.1 μm or less. This reduces the electrical resistance in the contact layer 70, thereby reducing the operating voltage of the semiconductor laser device 1. In this embodiment, the contact layer 70 is a GaAs layer, and the bandgap energy of the contact layer 70 is smaller than the energy corresponding to the peak wavelength of the laser light emitted by the semiconductor laser device 1. This causes the laser light to be absorbed in the contact layer 70. However, since the thickness of the contact layer 70 is 0.1 μm or less, the absorption of the laser light in the contact layer 70 can be suppressed. This prevents an increase in waveguide loss in the semiconductor laser device 1.

[0054] When the contact layer 70 is a GaAs layer and the well layer 42b is a GaInP layer, as in the present embodiment, the difference in bandgap energy between the contact layer 70 and the well layer 42b is very large. Therefore, the absorption of laser light in the contact layer 70 has a significant effect on the waveguide loss. Therefore, in the present embodiment (and in the second to fourth embodiments described below), the effect of reducing the waveguide loss by setting the film thickness of the contact layer 70 to 0.1 μm or less is significant.

[0055] In this embodiment, the contact layer 70 has a concentration of 3.0×10 １９ cm －３ The contact layer 70 is a p-type GaAs layer having a thickness of 0.050 μm and doped with a p-type impurity of C. In this embodiment, C is used as the p-type impurity. In this embodiment, the contact layer 70 is a GaAs layer, but the configuration of the contact layer 70 is not limited to this. For example, the contact layer 70 may be a GaInAsP layer having a refractive index higher than that of the second p-type barrier buffer layer 60t and a band gap energy higher than that of a GaAs layer.

[0056] The current blocking layer 80 is disposed above the semiconductor laminate 1S and is a dielectric film made of an (electrical) insulating material. In this embodiment, the current blocking layer 80 has an opening 80a at a position corresponding to the top surface of the ridge 50R as shown in FIG. 2 . The current blocking layer 80 covers the entire top surface of the semiconductor laminate 1S except for the area corresponding to the opening 80a. Specifically, the current blocking layer 80 continuously covers from the right end of the top surface of the ridge 50R shown in FIG. 2 to the right side surface of the ridge 50R (i.e., the end surface on the positive side of the X-axis direction of the ridge 50R), the right groove 50T, the left side surface of the right protrusion 50P (i.e., the end surface on the negative side of the X-axis direction of the right protrusion 50P), and the top surface of the right protrusion 50P. 2, the current blocking layer 80 continuously covers the left side surface of the ridge 50R (i.e., the end surface of the ridge 50R on the negative side in the X-axis direction), the left groove 50T, the right side surface of the left protrusion 50P (i.e., the end surface of the left protrusion 50P on the positive side in the X-axis direction), and the top surface of the left protrusion 50P. The current blocking layer 80 is not particularly limited as long as it is a dielectric film, and may be made of any suitable material, such as SiN, SiO ２ , TiO ２ , ZrO ２ , Al ２ O ３ , Nb ２ O ５ , Ta ２ O ５ In this embodiment, the current blocking layer 80 is a SiN film with a thickness of about 180 nm.

[0057] The first p-side electrode 91 is an example of a p-side electrode disposed above the semiconductor laminate 1S. The first p-side electrode 91 is in ohmic contact with the contact layer 70. In this embodiment, the first p-side electrode 91 is disposed above the ridge 50R, as shown in FIG. 2 . More specifically, the first p-side electrode 91 is disposed on the upper surface of the ridge 50R at a position corresponding to the opening 80a in the current blocking layer 80. The first p-side electrode 91 may include an Ag film in contact with the contact layer 70. The first p-side electrode 91 is, for example, an Ag film with a thickness of 0.200 μm. The first p-side electrode 91 may also be a Ti film with a thickness of 0.200 μm.

[0058] The second p-side electrode 92 is an example of a p-side electrode disposed above the semiconductor laminate 1S. The second p-side electrode 92 is disposed above at least a portion of the first p-side electrode 91. In the present embodiment, as shown in FIG. 2 , the second p-side electrode 92 covers the entire upper surface of the semiconductor laminate 1S. That is, the second p-side electrode 92 is disposed above the current blocking layer 80, the first p-side electrode 91, and the contact layer 70. The second p-side electrode 92 is in contact with the first p-side electrode 91. The second p-side electrode 92 includes, for example, at least one of Pt, Pd, Mo, W, Ni, Cr, and Ti. For example, when the first p-side electrode 91 is an Ag film, the second p-side electrode 92 may be a laminate film including a 0.200 μm-thick Ti film disposed above the first p-side electrode 91 and a 0.150 μm-thick Pt film disposed above the Ti film. Furthermore, when the first p-side electrode 91 is a Ti film, the second p-side electrode 92 may be a Pt film with a film thickness of 0.150 μm.

[0059] The third p-side electrode 93 is an example of a p-side electrode arranged above the semiconductor laminate 1S. In the present embodiment, the third p-side electrode 93 is arranged above the second p-side electrode 92 and is in contact with the second p-side electrode 92. As shown in FIG. 2 , the third p-side electrode 93 covers the entire upper surface of the semiconductor laminate 1S. In other words, the third p-side electrode 93 covers the entire upper surface of the second p-side electrode 92. In the present embodiment, the third p-side electrode 93 is an Au film with a film thickness of 2.0 μm or more and 5.0 μm or less.

[0060] The n-side electrode 94 is a conductive layer disposed on the lower main surface of the substrate 10 (i.e., the main surface of the substrate 10 on the back side of the main surface on which the semiconductor laminate 1S is laminated). The configuration of the n-side electrode 94 is not particularly limited. In the present embodiment, the n-side electrode 94 includes, laminated in this order from the substrate 10 side, a 90-nm-thick AuGe film, a 20-nm-thick Ni film, a 50-nm-thick Au film, a 100-nm-thick Ti film, a 50-nm-thick Pt film, a 50-nm-thick Ti film, a 100-nm-thick Pt film, and a 500-nm-thick Au film.

[0061] [1-2. Effects, etc.] The effects of the semiconductor laser device 1 according to this embodiment will be described.

[0062] As described above, the semiconductor laser device 1 according to this embodiment includes the p-type barrier buffer layer 60 disposed between the p-type cladding layer 50 and the contact layer 70. This reduces the height of the barrier formed at the boundary between the p-type cladding layer 50 and the contact layer 70, thereby suppressing an increase in the electrical resistance of the semiconductor laser device 1 due to the barrier. This reduces the operating voltage of the semiconductor laser device 1. The p-type barrier buffer layer 60 includes, for example, a first p-type barrier buffer layer 60b and a second p-type barrier buffer layer 60t disposed between the contact layer 70 and the first p-type barrier buffer layer 60b. The bandgap energy of the first p-type barrier buffer layer 60b is smaller than the maximum bandgap energy of the p-type cladding layer 50. The second p-type barrier buffer layer 60t is an AlGaAs layer, and the bandgap energy of the second p-type barrier buffer layer 60t is greater than the energy corresponding to the peak wavelength.

[0063] The p-type barrier buffer layer 60 according to this embodiment includes a first p-type barrier buffer layer 60b in contact with the p-type cladding layer 50 and a second p-type barrier buffer layer 60t, which is an AlGaAs layer, disposed between the first p-type barrier buffer layer 60b and the contact layer 70. The bandgap energy of the second p-type barrier buffer layer 60t is greater than the energy corresponding to the peak wavelength of the laser light emitted by the semiconductor laser device 1. The p-type barrier buffer layer 60 also includes a first intermediate layer 61 and a second intermediate layer 62. The effect of the p-type barrier buffer layer 60 will be described with reference to FIGS. 9 and 10. FIGS. 9 and 10 are graphs showing the relationship between the Al composition ratio of the second p-type barrier buffer layer 60t according to this embodiment and the operating voltage of the semiconductor laser device 1. FIG. 9 shows simulation results of the operating voltage when a current of 0.5 A is injected when the number of p-type barrier buffer layers 60 is one, two, three, and four. FIG. 10 shows the results of a simulation of the operating voltage when a current of 0.5 A is injected when the number of layers of the p-type barrier buffer layer 60 is two, three, and four.

[0064] When the number of layers of the p-type barrier buffer layer 60 is 1 to 4, the p-type barrier buffer layer 60 has a concentration of 1.2×10 １８ cm －３p-type Al doped with p-type impurities of 0.010 μm in thickness ｘ Ga １－ｘ The second p-type barrier buffer layer 60t is an As layer.

[0065] When the number of layers of the p-type barrier buffer layer 60 is two, the p-type barrier buffer layer 60 has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．４０ Ga ０．６０ ) ０．５１ In ０．４９ It further includes a first p-type barrier buffer layer 60b which is a P layer.

[0066] When the number of layers of the p-type barrier buffer layer 60 is three, the p-type barrier buffer layer 60 has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．４０ Ga ０．６０ ) ０．５１ In ０．４９ the first p-type barrier buffer layer 60b, which is a P layer, and １８ cm －３ p-type impurity doped with Al ０．１２ Ga ０．８８ ) ０．５１ In ０．４９ The first intermediate layer 61 is a P layer.

[0067] When the number of layers of the p-type barrier buffer layer 60 is four, the p-type barrier buffer layer 60 has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．７０ Ga ０．３０ ) ０．５１ In ０．４９ the first p-type barrier buffer layer 60b, which is a P layer, and １８ cm －３ p-type impurity doped with Al ０．４０ Ga ０．６０ ) ０．５１ In ０．４９ The first intermediate layer 61 is a P layer, and the concentration is 1.2×10 １８ cm－３ p-type impurity doped with Al ０．１２ Ga ０．８８ ) ０．５１ In ０．４９ and a second intermediate layer 62 which is a P layer.

[0068] As shown in FIG. 5, the band gap energy of the second p-type barrier buffer layer 60t is 1.965 eV or more (approximately 2.100 eV or less), and the band gap energy of the second intermediate layer 62 ((Al ０．１２ Ga ０．８８ ) ０．５１ In ０．４９ The band gap energy of the first intermediate layer 61 (Al P layer) is 1.973 eV. ０．４０ Ga ０．６０ ) ０．５１ In ０．４９ The band gap energy of the first p-type barrier buffer layer 60b ((Al P layer) is 2.155 eV. ０．７０ Ga ０．３０ ) ０．５１ In ０．４９ The band gap energy of the P layer is 2.313 eV.

[0069] 9 , when the number of layers in the p-type barrier buffer layer 60 is only one, the operating voltage increases as the Al composition ratio of the second p-type barrier buffer layer 60t (i.e., the p-type barrier buffer layer 60) decreases. In contrast, when the p-type barrier buffer layer 60 includes at least two layers, the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t, as in the semiconductor laser device 1 according to the present embodiment, the increase in operating voltage can be suppressed even when the Al composition ratio of the second p-type barrier buffer layer 60t is small.

[0070] In this embodiment, the p-type barrier buffer layer 60 may further include, in addition to the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t, an intermediate layer disposed between the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t and having a composition different from that of the first p-type barrier buffer layer 60b and the second p-type barrier buffer layer 60t. Here, the difference between the maximum bandgap energy of the p-type cladding layer 50 and the bandgap energy of the first p-type barrier buffer layer 60b may be 0.25 eV or less. Furthermore, the difference in bandgap energy between the p-type cladding layer 50 and the first p-type barrier buffer layer 60b at the boundary between the p-type cladding layer 50 and the first p-type barrier buffer layer 60b may be 0.25 eV or less. In the semiconductor laser device 1 according to this embodiment having such a configuration, the increase in operating voltage can be further suppressed when the number of p-type barrier buffer layers 60 is three or four as shown in FIG. 10 compared to when the number of p-type barrier buffer layers 60 is two.

[0071] In the present disclosure, the difference between the maximum bandgap energy of the p-type cladding layer 50 and the bandgap energy of the first p-type barrier buffer layer 60b means, when the bandgap energy in the first p-type barrier buffer layer 60b is not uniform, the difference between the maximum bandgap energy of the p-type cladding layer 50 and the bandgap energy at any position in the first p-type barrier buffer layer 60b. In other words, the difference between the maximum bandgap energy of the p-type cladding layer 50 and the bandgap energy of the first p-type barrier buffer layer 60b being 0.25 eV or less means that the difference between the maximum bandgap energy of the p-type cladding layer 50 and the bandgap energy at all positions in the first p-type barrier buffer layer 60b is 0.25 eV or less.

[0072] Furthermore, in the semiconductor laser device 1 according to this embodiment, the difference in bandgap energy between the intermediate layer (first intermediate layer 61 or second intermediate layer 62) and the second p-type barrier buffer layer 60t at the boundary between the intermediate layer and the second p-type barrier buffer layer 60t may be 0.25 eV or less. The bandgap energy of the intermediate layer (first intermediate layer 61 or second intermediate layer 62) may be larger than the bandgap energy of the second p-type barrier buffer layer 60t. The difference in bandgap energy between the intermediate layer (first intermediate layer 61 or second intermediate layer 62) and the first p-type barrier buffer layer 60b at the boundary between the intermediate layer and the first p-type barrier buffer layer 60b may be 0.25 eV or less. The bandgap energy of the intermediate layer (first intermediate layer 61 or second intermediate layer 62) may be smaller than the bandgap energy of the first p-type barrier buffer layer 60b. The effect of this configuration will be described with reference to FIG. 11 . 11 is a graph showing the relationship between the difference in bandgap energy between the second p-type barrier buffer layer 60t according to this embodiment and a layer below the second p-type barrier buffer layer 60t in contact with the second p-type barrier buffer layer 60t, and the operating voltage of the semiconductor laser device 1. The horizontal axis of FIG. 11 represents the difference in bandgap energy between the second p-type barrier buffer layer 60t and a layer below the second p-type barrier buffer layer 60t in contact with the second p-type barrier buffer layer 60t. The graph shown in FIG. 11 shows the relationship between the difference in bandgap energy between the second p-type barrier buffer layer 60t and a layer below the second p-type barrier buffer layer 60t in contact with the second p-type barrier buffer layer 60t and the operating voltage of the semiconductor laser device 1. ｙ Ga １－ｙ ) ０．５１ In ０．４９ The first p-type barrier buffer layer 60b is a P layer, and the Al ０．５ Ga ０．５This is based on the results of a simulation performed on a configuration including a second p-type barrier buffer layer 60t, which is an As layer. In the simulation, the Al composition ratio of the first p-type barrier buffer layer 60b was varied from 0.05 to 0.7 to change the bandgap energy difference. As shown in FIG. 11 , by setting the bandgap energy difference between the second p-type barrier buffer layer 60t and the first p-type barrier buffer layer 60b to 0.25 eV or less, the barrier in the valence band can be further reduced, thereby suppressing the operating voltage as shown in FIG. 11 . This effect of suppressing the operating voltage can also be achieved by setting the bandgap energy difference between the second p-type barrier buffer layer 60t and the intermediate layer at the boundary between the second p-type barrier buffer layer 60t and the intermediate layer to 0.25 eV or less.

[0073] In this embodiment, the first p-type barrier buffer layer 60b and the intermediate layer are AlGaInP layers, and the Al composition ratio of the intermediate layer may be smaller than the Al composition ratio of the first p-type barrier buffer layer 60b. The p-type cladding layer may also be an AlInP layer. This configuration can reduce the valence band barrier between the second p-type barrier buffer layer 60t, which is an AlGaAs layer, and the p-type cladding layer 50, which is an AlInP layer or the like.

[0074] The thickness of the p-type barrier buffer layer 60 according to this embodiment is 0.06 μm or less. The effect of this configuration will be described with reference to FIG. 12 . FIG. 12 is a graph showing the relationship between the thickness of the p-type barrier buffer layer 60 according to this embodiment and the waveguide loss of the semiconductor laser device 1. FIG. 12 shows simulation results of the waveguide loss when the thickness of each layer of the p-type barrier buffer layer 60 is changed. When the thickness of the contact layer 70 is 0.050 μm, the simulation was performed under 12 conditions in which the thickness of the second p-type barrier buffer layer 60t was changed in increments of 0.010 μm from 0.010 μm to 0.120 μm. Simulations were also performed under the following conditions: a first condition in which the thicknesses of the first p-type barrier buffer layer 60b, the first intermediate layer 61, and the second intermediate layer 62 were 0.003 μm, 0.003 μm, and 0.004 μm, a second condition in which the thicknesses were 0.006 μm, 0.006 μm, and 0.007 μm, a third condition in which the thicknesses were 0.010 μm, 0.010 μm, and 0.015 μm, and a fourth condition in which the thicknesses were 0.020 μm, 0.020 μm, and 0.025 μm. Furthermore, simulations were performed under each condition in which an Ag film and a Ti film were used as the first p-side electrode 91.

[0075] 12 , in either the case where the first p-side electrode 91 is an Ag film or a Ti film, the waveguide loss can be suppressed by setting the film thickness of the p-type barrier buffer layer 60 to 0.06 μm or less. Similarly, the waveguide loss can be suppressed by setting the total film thickness of the p-type barrier buffer layer 60 and the contact layer 70 to 0.11 μm or less.

[0076] The thickness of the contact layer 70 may be smaller than the thickness of the p-type barrier buffer layer 60. This makes it possible to suppress absorption of laser light in the contact layer 70, thereby reducing waveguide loss.

[0077] In this embodiment, the total film thickness of the layers in the p-type barrier buffer layer 60 whose refractive index is greater than the effective refractive index in the semiconductor stack 1S (the refractive index felt by the laser light oscillated in the semiconductor laser device 1) may be 0.06 μm or less. In this embodiment, the effective refractive index is 3.248. As shown in FIG. 5 , the layers in the p-type barrier buffer layer 60 whose refractive index may be greater than the effective refractive index in the semiconductor stack 1S are the layers of the p-type barrier buffer layer 60. Note that the refractive index of the second p-type barrier buffer layer 60t is always greater than the effective refractive index.

[0078] In such a semiconductor laminate 1S, laser light is guided to a layer having a refractive index greater than the effective refractive index. If such a layer is located away from the active layer 42, it increases waveguide loss. By setting the total thickness of the layers having a refractive index greater than the effective refractive index to 0.06 μm or less, as in the present embodiment, waveguide loss can be suppressed (see FIG. 12 ). Furthermore, by setting the thickness of the p-type barrier buffer layer 60 to 0.06 μm or less, the electrical resistance of the p-type barrier buffer layer 60 can be reduced, thereby reducing the operating voltage of the semiconductor laser device 1.

[0079] Furthermore, the total thickness of the layers of the contact layer 70 and the p-type barrier buffer layer 60 that have a refractive index larger than the effective refractive index of the semiconductor laminate 1S may be 0.11 μm or less. This makes it possible to suppress waveguide loss and reduce the operating voltage of the semiconductor laser device 1, similar to the case where the total thickness of the layers of the p-type barrier buffer layer 60 that have a refractive index larger than the effective refractive index of the semiconductor laminate 1S is 0.06 μm or less.

[0080] The average refractive index of the second p-type barrier buffer layer 60t may be larger than the average refractive index of at least one of the p-side optical guiding layer 43 and the n-side optical guiding layer 41. In the present embodiment, the average refractive index of the second p-type barrier buffer layer 60t is larger than the average refractive index of the p-side optical guiding layer 43 and the n-side optical guiding layer 41. Furthermore, the average refractive index of the second p-type barrier buffer layer 60t may be larger than the average refractive index of the well layer 42b.

[0081] The bandgap energy of the second p-type barrier buffer layer 60t may be smaller than the bandgap energy of at least one of the p-side optical guiding layer 43 and the n-side optical guiding layer 41. In this embodiment, the bandgap energy of the second p-type barrier buffer layer 60t is smaller than the bandgap energy of the p-side optical guiding layer 43 and the n-side optical guiding layer 41.

[0082] Furthermore, the bandgap energy of the first p-type barrier buffer layer 60b may be larger than the bandgap energy of the second p-type barrier buffer layer 60t. Because the first p-type barrier buffer layer 60b is closer to the active layer 42 than the second p-type barrier buffer layer 60t, the intensity of the laser light in the first p-type barrier buffer layer 60b is larger than the intensity of the laser light in the second p-type barrier buffer layer 60t. By increasing the bandgap energy of the first p-type barrier buffer layer 60b in this manner, it is possible to reduce absorption of the laser light in the first p-type barrier buffer layer 60b. Therefore, it is possible to reduce the waveguide loss of the semiconductor laser device 1.

[0083] The Al composition ratio of the second p-type barrier buffer layer 60t according to this embodiment may be 0.6 or less. The effect of this configuration will be described with reference to FIGS. 13 and 14. FIG. 13 is a graph showing the relationship between the Al composition ratio of the second p-type barrier buffer layer 60t according to this embodiment and the operating voltage of the semiconductor laser device 1. FIG. 14 is a graph showing the results of a simulation of energy distribution when the Al composition ratio of the second p-type barrier buffer layer 60t is set to 0.43, 0.60, and 0.80.

[0084] 14 , the valence band energies of the p-type cladding layer 50, the p-type barrier buffer layer 60, and the contact layer 70 are distributed so that the Fermi levels of holes formed by doping with p-type impurities are the same. Even if the band gap energy is changed by changing the Al composition ratio of the second p-type barrier buffer layer 60t, the valence band energy of the second p-type barrier buffer layer 60t does not change, but the conduction band energy changes, because the second p-type barrier buffer layer 60t is doped with the same concentration of p-type impurities.

[0085] At the interface between the second p-type barrier buffer layer 60t and the second intermediate layer 62, increasing the Al composition ratio of the second p-type barrier buffer layer 60t increases the band gap energy difference between the second p-type barrier buffer layer 60t and the second intermediate layer 62. However, because the second p-type barrier buffer layer 60t and the second intermediate layer 62 contain different group V materials, As and P, the spike-shaped energy barrier in the valence band is reduced due to the band offset. When the Al composition ratio of the second p-type barrier buffer layer 60t is 0.43, the energy barrier in the valence band is highest.

[0086] On the other hand, at the interface between the second p-type barrier buffer layer 60t and the contact layer 70, because the second p-type barrier buffer layer 60t and the contact layer 70 are made of the same group V material, the band offset does not contribute, and the band gap energy difference is reflected in the height of the spike-shaped energy barrier at the interface. When the Al composition ratio of the second p-type barrier buffer layer 60t is 0.6, the energy barrier height formed at the interface between the second p-type barrier buffer layer 60t and the contact layer 70 is approximately equal to the energy barrier height formed at the interface between the second intermediate layer 62 and the second p-type barrier buffer layer 60t when the Al composition ratio is 0.43. When the Al composition ratio is higher than 0.6, the spike-shaped energy barrier becomes highest at the interface between the second p-type barrier buffer layer 60t and the contact layer 70.

[0087] Furthermore, the electrical resistance increases as the Al composition ratio of the second p-type barrier buffer layer 60t increases. Therefore, when the Al composition ratio of the second p-type barrier buffer layer 60t is greater than 0.6, the operating voltage increases. Therefore, as shown in FIG. 13 , the operating voltage of the semiconductor laser device 1 can be suppressed by setting the Al composition ratio of the second p-type barrier buffer layer 60t to 0.6 or less.

[0088] The contact layer 70 according to this embodiment is a GaAs layer having a thickness of 0.1 μm or less. The effect of this configuration will be described with reference to FIG. 15 . FIG. 15 is a graph showing the relationship between the thickness of the contact layer 70 according to this embodiment and the waveguide loss of the semiconductor laser device 1. As shown in FIG. 15 , by setting the thickness of the contact layer 70, which is a GaAs layer, to 0.1 μm or less, the waveguide loss of the semiconductor laser device 1 can be suppressed. The thickness of the contact layer 70, which is a GaAs layer, may also be set to 0.05 μm or less. This can further suppress the waveguide loss of the semiconductor laser device 1.

[0089] The impurity concentration of the contact layer 70 according to the present embodiment is higher than the impurity concentration of the second p-type barrier buffer layer 60t and is 2×10 １９ cm －３ In this way, by making the impurity concentration in the second p-type barrier buffer layer 60t, which is closer to the center of the light intensity distribution than the contact layer 70, lower than the impurity concentration in the contact layer 70, it is possible to reduce free carrier loss due to impurities in the second p-type barrier buffer layer 60t. Therefore, it is possible to reduce the waveguide loss of the semiconductor laser device 1. In addition, the impurity concentration in the contact layer 70 can be set to 2×10 １９ cm －３ This reduces the electrical resistance of the contact layer 70 and the contact resistance with the first p-side electrode 91. Therefore, the operating voltage of the semiconductor laser device 1 can be reduced.

[0090] The p-type cladding layer 50 according to this embodiment includes a first p-type cladding layer 51 and a second p-type cladding layer 52 disposed above the first p-type cladding layer 51 and having a higher impurity concentration than the first p-type cladding layer 51. The thickness of the second p-type cladding layer 52 may be 0.7 μm or less. The effect of this configuration will be described with reference to FIG. 16 . FIG. 16 is a graph showing the relationship between the thickness of the second p-type cladding layer 52 according to this embodiment and the waveguide loss of the semiconductor laser device 1. FIG. 16 shows the relationship between the first p-side electrode 91 being an Ag film and the first p-side electrode 91 being a Ti film.

[0091] As shown in FIG. 16, by setting the film thickness of the second p-type cladding layer 52 to 0.7 μm or more, the waveguide loss can be suppressed in both cases where the first p-side electrode 91 is an Ag film and where it is a Ti film.

[0092] In the present embodiment, the first p-side electrode 91 may be an Ag film. In other words, the p-side electrode may include an Ag film in contact with the contact layer 70. In this way, by using an Ag film, which has a refractive index smaller than that of a Ti film or the like and a reflectance at the peak wavelength of the laser light of the semiconductor laser device 1 larger than that of a Ti film or the like, as the first p-side electrode 91, it is possible to reduce the film thickness of the second p-type cladding layer 52 while suppressing waveguide loss. By reducing the film thickness of the second p-type cladding layer 52, it is possible to reduce the electrical resistance of the second p-type cladding layer 52, and therefore the operating voltage of the semiconductor laser device 1.

[0093] In this embodiment, the thickness of the p-type barrier buffer layer 60 may be greater than the thickness of the contact layer 70. This makes it possible to reduce waveguide loss caused by light absorption in the contact layer 70.

[0094] (Embodiment 2) A semiconductor laser device according to embodiment 2 will be described. The semiconductor laser device according to this embodiment differs from the semiconductor laser device according to embodiment 1 in the compositions of the n-type cladding layer 30, the n-side light guide layer 41, the active layer 42, and the p-side light guide layer 43, but is the same in other configurations. The semiconductor laser device according to this embodiment will be described below, focusing on the differences from the semiconductor laser device according to embodiment 1.

[0095] The n-type cladding layer 30 of the semiconductor laser device according to this embodiment is made of n-type (Al ０．８９ Ga ０．１１ ) ０．５１ In ０．４９ The n-side optical guide layer 41 is an n-type (Al ０．５２ Ga ０．４８ ) ０．５１ In ０．４９In this embodiment, the refractive index of the n-type cladding layer 30 is 3.244, and the band gap energy is 2.350 eV. The refractive index of the n-side optical guide layer 41 is 3.367, and the band gap energy is 2.233 eV.

[0096] Each of the barrier layers 42a and 42c of the active layer 42 of the semiconductor laser device according to this embodiment is undoped (Al ０．５２ Ga ０．４８ ) ０．５１ In ０．４９ The barrier layers according to this embodiment have a refractive index of 3.367 and a band gap energy of 2.233 eV.

[0097] The p-side optical guide layer 43 of the semiconductor laser device according to this embodiment is a p-type (Al ０．５２ Ga ０．４８ ) ０．５１ In ０．４９ The p-side optical guide layer 43 according to this embodiment has a refractive index of 3.367 and a band gap energy of 2.233 eV.

[0098] The effective refractive index of the semiconductor laminate 1S in the semiconductor laser device according to this embodiment having the above-described configuration is 3.265.

[0099] The semiconductor laser device according to this embodiment also provides the same effects as those of the semiconductor laser device 1 according to the first embodiment.

[0100] Furthermore, in this embodiment, the refractive index of each optical guide layer and the n-type cladding layer 30 can be increased by reducing the Al composition ratio of these layers. Accordingly, the peak position of the light intensity distribution in the semiconductor laser device can be shifted toward the substrate 10. Therefore, light absorption in the p-side electrode and each p-type semiconductor layer can be reduced, and thus waveguide loss can be further reduced.

[0101] (Embodiment 3) A semiconductor laser device according to embodiment 3 will be described. The semiconductor laser device according to this embodiment differs from the semiconductor laser device according to embodiment 2 in the In composition ratio in the n-side light guiding layer 41, the active layer 42, and the p-side light guiding layer 43, but is the same in other configurations. The semiconductor laser device according to this embodiment will be described below, focusing on the differences from the semiconductor laser device according to embodiment 2.

[0102] The n-side optical guide layer 41 of the semiconductor laser device according to this embodiment is an n-type (Al ０．５２ Ga ０．４８ ) ０．５０４ In ０．４９６ In this embodiment, the refractive index of the n-side optical guide layer 41 is 3.367, and the band gap energy is 2.228 eV.

[0103] Each of the barrier layers 42a and 42c of the active layer 42 of the semiconductor laser device according to this embodiment is undoped (Al ０．５２ Ga ０．４８ ) ０．５０４ In ０．４９６ The barrier layers according to this embodiment have a refractive index of 3.367 and a band gap energy of 2.228 eV.

[0104] The p-side optical guide layer 43 of the semiconductor laser device according to this embodiment is a p-type (Al ０．５２ Ga ０．４８ ) ０．５０４ In ０．４９６ The p-side optical guide layer 43 according to this embodiment has a refractive index of 3.367 and a band gap energy of 2.228 eV.

[0105] The effective refractive index of the semiconductor laminate 1S in the semiconductor laser device according to this embodiment having the above-described configuration is 3.248.

[0106] The semiconductor laser device according to this embodiment also provides the same effects as those of the semiconductor laser device according to the second embodiment.

[0107] Furthermore, in this embodiment, by reducing the In composition ratio of each optical guide layer and each barrier layer, the product of the thickness and the amount of strain of each optical guide layer and each barrier layer can be made equal to the product of the thickness and the amount of strain of the well layer 42b. This allows the strain of the well layer 42b relative to the substrate 10 to be offset by the strain of each optical guide layer and each barrier layer relative to the substrate 10. Therefore, in this embodiment, the strain in the active layer 42 can be reduced, and therefore the crystal defects in the active layer 42 can be reduced. By improving the crystal quality of the active layer 42 in this way, the reliability of the semiconductor laser device 1 can be increased.

[0108] (Fourth Embodiment) A semiconductor laser device according to a fourth embodiment will be described. The semiconductor laser device according to this embodiment differs from the semiconductor laser device according to the first embodiment in the configurations of the n-side light guiding layer 41 and the p-side light guiding layer 43, but is the same in other configurations. The semiconductor laser device according to this embodiment will be described below, focusing on the differences from the semiconductor laser device according to the first embodiment.

[0109] In the semiconductor laser device according to this embodiment, the thickness of the p-side optical guiding layer 43 is smaller than the thickness of the n-side optical guiding layer 41. For example, the thickness of the p-side optical guiding layer 43 may be 0, and the thickness of the n-side optical guiding layer 41 may be 0.135 μm.

[0110] The effective refractive index of the semiconductor laminate 1S in the semiconductor laser device according to this embodiment having the above-described configuration is 3.253.

[0111] The semiconductor laser device according to this embodiment also provides the same effects as those of the semiconductor laser device 1 according to the first embodiment.

[0112] Furthermore, in this embodiment, the thickness of the p-side light guiding layer 43 is smaller than the thickness of the n-side light guiding layer 41, so that the peak position of the light intensity distribution in the semiconductor laser element can be shifted toward the substrate 10. Therefore, light absorption in the p-side electrode and each p-type semiconductor layer can be reduced, and thus waveguide loss can be further reduced.

[0113] (Fifth Embodiment) A semiconductor laser element according to a fifth embodiment will be described. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 1 according to the first embodiment mainly in the peak wavelength of the emitted laser light. The semiconductor laser element according to this embodiment will be described below with reference to FIG. 17 , focusing on the differences from the semiconductor laser element according to the first embodiment. FIG. 17 is a diagram showing the configuration of each layer in a semiconductor laminate included in the semiconductor laser element according to this embodiment. FIG. 17 shows the composition, film thickness, refractive index, band gap energy (Eg), and impurity concentration of each layer in the semiconductor laminate.

[0114] The semiconductor laser device according to this embodiment differs from the semiconductor laser device 1 according to the first embodiment in the configuration of the semiconductor laminate, but the other configurations are the same. The peak wavelength of the laser light emitted by the semiconductor laser device according to this embodiment is about 830 nm.

[0115] As shown in FIG. 17 , the semiconductor laminate according to this embodiment includes a buffer layer 421, an n-type barrier buffer layer 422, an n-type cladding layer 430, an n-side light guide layer 441, an active layer 442, a p-side light guide layer 443, a p-type cladding layer 450, a p-type barrier buffer layer 460, and a contact layer 470.

[0116] The buffer layer 421 is a semiconductor layer disposed above the substrate 10. In this embodiment, as shown in FIG. 17 , the buffer layer 421 has a concentration of 5.0×10 １７ cm －３ The n-type GaAs layer is doped with n-type impurities and has a thickness of 0.4 μm.

[0117] The n-type barrier buffer layer 422 is a semiconductor layer disposed above the substrate 10. In this embodiment, the n-type barrier buffer layer 422 is disposed between the buffer layer 421 and the n-type cladding layer 430, and buffers the conduction band barrier between the buffer layer 421 and the n-type cladding layer 430. This reduces the barrier against electrons moving between the buffer layer 421 and the n-type cladding layer 430, thereby reducing the operating voltage of the semiconductor laser device. In this embodiment, the n-type barrier buffer layer 422 has a concentration of 7.5×10 １７ cm－３ n-type Al with a thickness of 0.075 μm doped with n-type impurities ｘｎａ Ga １－ｘｎａ As layer (0.05≦xna≦0.31). The Al composition ratio of the n-type barrier buffer layer 422 increases with increasing distance from the substrate 10. The Al composition ratio of the n-type barrier buffer layer 422 is 0.05 at the end closer to the substrate 10 (i.e., the end farther from the n-type cladding layer 430) and is 0.31 at the end farther from the substrate 10 (i.e., the end closer to the n-type cladding layer 430).

[0118] The n-type cladding layer 430 is a semiconductor layer disposed above the substrate 10. In this embodiment, the n-type cladding layer 430 is disposed between the n-type barrier buffer layer 422 and the n-side optical guide layer 441, and is in contact with both the n-type barrier buffer layer 422 and the n-side optical guide layer 441. The average refractive index of the n-type cladding layer 430 is smaller than the average refractive index of the active layer 442. The n-type cladding layer 430 includes a first n-type cladding layer 431, a second n-type cladding layer 432, and a third n-type cladding layer 433.

[0119] The first n-type cladding layer 431 is disposed above the substrate 10. In this embodiment, the first n-type cladding layer 431 is disposed above the n-type barrier buffer layer 422 and is in contact with the n-type barrier buffer layer 422. In this embodiment, the first n-type cladding layer 431 has a concentration of 7.5×10 １７ cm －３ n-type impurity doped with Al ０．１８５ Ga ０．８１５ ) ０．５１ In ０．４９ This is the P layer.

[0120] The second n-type cladding layer 432 is disposed above the first n-type cladding layer 431. In this embodiment, the second n-type cladding layer 432 is disposed between the first n-type cladding layer 431 and the third n-type cladding layer 433, and is in contact with both the first n-type cladding layer 431 and the third n-type cladding layer 433. In this embodiment, the second n-type cladding layer 432 has a concentration of 5.3×10 １７ cm －３ n-type impurity doped with Al ０．１８５ Ga０．８１５ ) ０．５１ In ０．４９ This is the P layer.

[0121] The third n-type cladding layer 433 is disposed above the second n-type cladding layer 432. In this embodiment, the third n-type cladding layer 433 is disposed between the second n-type cladding layer 432 and the n-side light guide layer 441, and is in contact with both the second n-type cladding layer 432 and the n-side light guide layer 441. In this embodiment, the third n-type cladding layer 433 has a concentration of 3.0×10 １７ cm －３ n-type impurity doped with Al ０．１８５ Ga ０．８１５ ) ０．５１ In ０．４９ This is the P layer.

[0122] The n-side light guide layer 441 is a semiconductor layer disposed above the n-type cladding layer 430. The n-side light guide layer 441 is disposed between the n-type cladding layer 430 and the active layer 442, and is in contact with both the n-type cladding layer 430 and the active layer 442. The average refractive index of the n-side light guide layer 441 is greater than the average refractive index of the n-type cladding layer 430. In this embodiment, the n-side light guide layer 441 includes a first n-side light guide layer 441a disposed above the n-type cladding layer 430, and a second n-side light guide layer 441b disposed above the first n-side light guide layer 441a. The first n-side light guide layer 441a has a concentration of 3.0×10 １７ cm －３ n-type impurity doped with Al ０．０４ Ga ０．９６ ) ０．５１ In ０．４９ The second n-side light guide layer 441b is an undoped (Al ０．０４ Ga ０．９６ ) ０．５１ In ０．４９ This is the P layer.

[0123] The active layer 442 is a light-emitting layer disposed above the n-type cladding layer 430. In this embodiment, the active layer 442 is disposed between the n-side optical guiding layer 441 and the p-side optical guiding layer 443, and is in contact with the n-side optical guiding layer 441 and the p-side optical guiding layer 443. The configuration of the active layer 442 is not particularly limited. In this embodiment, the active layer 442 has a quantum well structure including one or more well layers and two or more barrier layers, and each of the one or more well layers is an AlGaInP layer, a GaInP layer, a GaAsP layer, a GaAs layer, or an InGaAs layer. As shown in FIG. 17 , the active layer 442 according to this embodiment has a barrier layer 442a, a well layer 442b, a barrier layer 442c, a well layer 442d, and a barrier layer 442e.

[0124] The barrier layer 442a is disposed above the n-type cladding layer 430. In this embodiment, the barrier layer 442a is disposed above the n-side optical guiding layer 441 and is in contact with the n-side optical guiding layer 441.

[0125] The barrier layer 442a is an undoped Al layer having a thickness of 0.030 μm. ０．５９ Ga ０．４１ This is an As layer.

[0126] The well layer 442b is disposed between the barrier layer 442a and the barrier layer 442c. In this embodiment, the well layer 442b is in contact with both the barrier layer 442a and the barrier layer 442c. The well layer 442b is an undoped GaAs layer with a thickness of 0.0065 μm.

[0127] The barrier layer 442c is disposed above the well layer 442b. In this embodiment, the barrier layer 442c is disposed between the well layer 442b and the well layer 442d, and is in contact with both the well layer 442b and the well layer 442d. The barrier layer 442c is an undoped AlN layer having a thickness of 0.004 μm. ０．５９ Ga ０．４１ This is an As layer.

[0128] The well layer 442d is disposed between the barrier layer 442c and the barrier layer 442e. In this embodiment, the well layer 442d is in contact with both the barrier layer 442c and the barrier layer 442e. The well layer 442d is an undoped GaAs layer with a thickness of 0.0065 μm.

[0129] The barrier layer 442e is disposed above the well layer 442d. In this embodiment, the barrier layer 442e is disposed between the well layer 442d and the p-side optical guiding layer 443, and is in contact with both the well layer 442d and the p-side optical guiding layer 443. The barrier layer 442e is made of undoped AlN with a thickness of 0.021 μm. ０．５９ Ga ０．４１ This is an As layer.

[0130] The p-side light guiding layer 443 is a semiconductor layer disposed above the active layer 442. The p-side light guiding layer 443 is disposed between the active layer 442 and the p-type cladding layer 450, and is in contact with both the active layer 442 and the p-type cladding layer 450. The average refractive index of the p-side light guiding layer 443 is greater than the average refractive index of the p-type cladding layer 450. In this embodiment, the p-side light guiding layer 443 includes a first p-side light guiding layer 443a disposed above the active layer 442, and a second p-side light guiding layer 443b disposed above the first p-side light guiding layer 443a. The first p-side light guiding layer 443a is an undoped (Al ０．０４ Ga ０．９６ ) ０．５１ In ０．４９ The second p-side light guiding layer 443b is a layer disposed above the first p-side light guiding layer 443a. The second p-side light guiding layer 443b has a concentration of 3.2×10 １７ cm －３ p-type impurity doped with Al ０．０４ Ga ０．９６ ) ０．５１ In ０．４９ This is the P layer.

[0131] The p-type cladding layer 450 is a semiconductor layer disposed above the active layer 442. In this embodiment, the p-type cladding layer 450 is disposed between the p-side optical guiding layer 443 and the p-type barrier buffer layer 460, and is in contact with both the p-side optical guiding layer 443 and the p-type barrier buffer layer 460. The average refractive index of the p-type cladding layer 450 is smaller than the average refractive index of the active layer 442. The p-type cladding layer 450 includes a first p-type cladding layer 451, a second p-type cladding layer 452, and a third p-type cladding layer 453.

[0132] The first p-type cladding layer 451 is disposed above the active layer 442. In this embodiment, the first p-type cladding layer 451 is disposed above the p-side optical guiding layer 443 and is in contact with the p-side optical guiding layer 443. In this embodiment, the first p-type cladding layer 451 has a concentration of 3.2×10 １７ cm －３ p-type impurity doped with Al ０．３０ Ga ０．７０ ) ０．５１ In ０．４９ This is the P layer.

[0133] The second p-type cladding layer 452 is disposed above the first p-type cladding layer 451. In this embodiment, the second p-type cladding layer 452 is disposed between the first p-type cladding layer 451 and the third p-type cladding layer 453, and is in contact with both the first p-type cladding layer 451 and the third p-type cladding layer 453. In this embodiment, the second p-type cladding layer 452 has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．６０ Ga ０．４０ ) ０．５１ In ０．４９ This is the P layer.

[0134] The third p-type cladding layer 453 is an example of a second p-type cladding layer disposed above the first p-type cladding layer 451. In the present embodiment, the third p-type cladding layer 453 is disposed above the second p-type cladding layer 452. In the present embodiment, the third p-type cladding layer 453 is disposed between the second p-type cladding layer 452 and the p-type barrier buffer layer 460, and is in contact with both the second p-type cladding layer 452 and the p-type barrier buffer layer 460. In the present embodiment, the third p-type cladding layer 453 has a concentration of 1.2×10 １８ cm －３ p-type impurity doped with Al ０．３０ Ga ０．７０ ) ０．５１ In ０．４９ This is the P layer.

[0135] Although not shown, in this embodiment, as in the first embodiment, a ridge, a groove, and a protrusion are formed in the semiconductor laminate. The first p-type cladding layer 451 is a region of the p-type cladding layer 450 below the lower end of the ridge. The second p-type cladding layer 452 and the third p-type cladding layer 453 have regions included in the ridge. In this embodiment, the second p-type cladding layer 452 and the third p-type cladding layer 453 further have regions included in the protrusion. In this way, the lower end of the ridge is located within the p-type cladding layer 450, more specifically, at the interface between the first p-type cladding layer 451 and the second p-type cladding layer 452.

[0136] The first p-type cladding layer 451 may have an etching stop layer as its uppermost layer. This allows for improved control of the film thickness of the first p-type cladding layer 451 when forming the ridge (and the protrusion). The etching stop layer may be a single layer made of a p-type GaInP layer or a p-type AlGaInP layer having a lower Al composition ratio than the layers of the first p-type cladding layer 451 located below the etching stop layer. Alternatively, the etching stop layer may have a multilayer periodic structure of GaInP layers and AlGaInP layers.

[0137] The p-type barrier buffer layer 460 is a semiconductor layer disposed above the p-type cladding layer 450. The p-type barrier buffer layer 460 buffers the valence band barrier between the p-type cladding layer 450 and the contact layer 470. In this embodiment, the p-type barrier buffer layer 460 has a film thickness of 0.06 μm or less. By reducing the film thickness of the p-type barrier buffer layer 460 in this manner, the electrical resistance of the p-type barrier buffer layer 460 can be reduced, and therefore an increase in operating voltage caused by inserting the p-type barrier buffer layer 460 between the p-type cladding layer 450 and the contact layer 470 can be suppressed.

[0138] 17 , the p-type barrier buffer layer 460 includes a first p-type barrier buffer layer 460 b and a second p-type barrier buffer layer 460 t. The first p-type barrier buffer layer 460 b is in contact with the p-type cladding layer 450. The second p-type barrier buffer layer 460 t is in contact with the contact layer 470.

[0139] The first p-type barrier buffer layer 460b is disposed above the p-type cladding layer 450. In this embodiment, the first p-type barrier buffer layer 460b is disposed between the p-type cladding layer 450 and the second p-type barrier buffer layer 460t, and is in contact with both the p-type cladding layer 450 and the second p-type barrier buffer layer 460t. In this embodiment, the first p-type barrier buffer layer 460b has a concentration of 2.0×10 １８ cm －３ The p-type GaInP layer is doped with p-type impurities and has a thickness of 0.020 μm.

[0140] The second p-type barrier buffer layer 460t is disposed above the p-type cladding layer 450. In this embodiment, the second p-type barrier buffer layer 460t is disposed between the first p-type barrier buffer layer 460b and the contact layer 470, and is in contact with both the first p-type barrier buffer layer 460b and the contact layer 470. The second p-type barrier buffer layer 460t is an AlGaAs layer. In this embodiment, the second p-type barrier buffer layer 460t has a concentration of 2.0×10 １８ cm －３ p-type Al doped with p-type impurities of 0.040 μm in thickness ｘ Ga １－ｘ It is an As layer (0.08<x≦1).

[0141] The contact layer 470 is a semiconductor layer disposed above the p-type barrier buffer layer 460 and in contact with the p-side electrode. In this embodiment, the contact layer 470 is in contact with the p-type barrier buffer layer 460 and the first p-side electrode 91. The contact layer 470 is a GaAs layer having a film thickness of 0.1 μm or less. In this embodiment, the contact layer 470 has a concentration of 3.0×10 １９ cm －３ The p-type GaAs layer is doped with p-type impurities and has a thickness of 0.100 μm.

[0142] Like the semiconductor laser device 1 according to the first embodiment, the semiconductor laser device according to this embodiment also includes a p-type barrier buffer layer 460 disposed between the p-type cladding layer 450 and the contact layer 470. This makes it possible to suppress an increase in the electrical resistance of the semiconductor laser device, and therefore to reduce the operating voltage of the semiconductor laser device.

[0143] The thickness of the p-type barrier buffer layer 460 according to this embodiment is 0.06 μm or less. The effect of this configuration will be described with reference to FIG. 18 . FIG. 18 is a graph showing the relationship between the thickness of the p-type barrier buffer layer 460 according to this embodiment and the waveguide loss of the semiconductor laser device. FIG. 18 shows simulation results of the waveguide loss when the thickness of each layer of the p-type barrier buffer layer 460 is changed. The simulation was performed under 12 conditions in which the thickness of the second p-type barrier buffer layer 460t was changed in increments of 0.010 μm from 0.010 μm to 0.120 μm. The simulation was also performed under four conditions in which the thickness of the first p-type barrier buffer layer 460b was 0.010 μm, 0.020 μm, 0.035 μm, and 0.065 μm. In this simulation, the first p-side electrode 91 was set to a Ti film. As shown in FIG. 18, by setting the thickness of the p-type barrier buffer layer 460 to 0.06 μm or less, the waveguide loss can be suppressed.

[0144] Among the p-type cladding layer 450 and the p-type barrier buffer layer 460 according to this embodiment, the total thickness of the layers having a refractive index greater than the effective refractive index of the semiconductor laminate may be 0.06 μm or less. In this embodiment, the effective refractive index is 3.206. Among the p-type cladding layer 450 and the p-type barrier buffer layer 460, the layers whose refractive index may be greater than the effective refractive index of the semiconductor laminate are the layers of the p-type barrier buffer layer 460, as shown in FIG. 17 . By setting the total thickness of the layers having a refractive index greater than the effective refractive index to 0.06 μm or less, as in this embodiment, waveguide loss can be suppressed (see FIG. 18 ). Furthermore, by setting the thickness of the p-type barrier buffer layer 460 to 0.06 μm or less, the electrical resistance of the p-type barrier buffer layer 460 can be reduced, thereby reducing the operating voltage of the semiconductor laser device 1.

[0145] The contact layer 470 according to this embodiment is a GaAs layer having a thickness of 0.1 μm or less, which makes it possible to suppress the waveguide loss of the semiconductor laser device, as in the first embodiment.

[0146] The impurity concentration of the contact layer 470 according to this embodiment is higher than the impurity concentration of the second p-type barrier buffer layer 460t and is 2×10 １９ cm－３ By making the impurity concentration in the second p-type barrier buffer layer 460t, which is closer to the center of the light intensity distribution than the contact layer 470, lower than the impurity concentration in the contact layer 470, the waveguide loss of the semiconductor laser device can be reduced, as in the first embodiment. １９ cm －３ This reduces the electrical resistance of the contact layer 470 and the contact resistance with the first p-side electrode 91. Therefore, the operating voltage of the semiconductor laser device can be reduced.

[0147] (Modifications, etc.) Although the semiconductor laser device according to the present disclosure has been described above based on the embodiments, the present disclosure is not limited to the above-described embodiments.

[0148] For example, the p-type cladding layer is Al ｙ１ Ga ｚ１ In １－ｙ１－ｚ１ P layer (0<y1≦1, 0≦z1<1, 0<y1+z1<1), and the first p-type barrier buffer layer is Al ｙ２ Ga ｚ２ In １－ｙ２－ｚ２ In the case of a P layer (0≦y2<1, 0≦z2≦1, 0≦y2+z2<1), the Al composition ratio (y1) of the p-type cladding layer may be larger than the Al composition ratio (y2) of the first p-type barrier buffer layer. ｙ１ Ga ｚ１ In １－ｙ１－ｚ１ P layer (0<y1≦1, 0≦z1<1, 0<y1+z1<1), and the first p-type barrier buffer layer is Al ｙ２ Ga ｚ２ In １－ｙ２－ｚ２ When the p-type cladding layer is a P layer (0≦y2<1, 0<z2≦1, 0≦y2+z2<1) and y1+z1=y2+z2, the Al composition ratio (y1) of the p-type cladding layer may be greater than the Al composition ratio (y2) of the first p-type barrier buffer layer.

[0149] This disclosure also includes forms obtained by applying various modifications to the above-mentioned embodiments that a person skilled in the art would conceive, and forms realized by arbitrarily combining the components and functions of the above-mentioned embodiments within the scope of the present disclosure.

[0150] The semiconductor laser device according to the present disclosure is particularly useful as a high-output light source, for example, because it can suppress the operating voltage.

[0151] 1 Semiconductor laser element 1F First end facet 1R Second end facet 1S Semiconductor laminate 2F, 2R End face protective film 10 Substrate 21, 421 Buffer layer 22, 422 N-type barrier relaxation layer 30, 430 N-type cladding layer 31, 431 First n-type cladding layer 32, 432 Second n-type cladding layer 33, 433 Third n-type cladding layer 41, 441 N-side optical guide layer 42, 442 Active layer 42a, 42c, 442a, 442c, 442e Barrier layer 42b, 442b, 442d Well layer 43, 443 P-side optical guide layer 50, 450 P-type cladding layer 51, 451 First p-type cladding layer 52, 452 Second p-type cladding layer 50P Protrusion 50R Ridge 50T Groove 60, 460 p-type barrier buffer layer 60b, 460b First p-type barrier buffer layer 60t, 460t Second p-type barrier buffer layer 61 First intermediate layer 62 Second intermediate layer 70, 470 Contact layer 80 Current blocking layer 80a Opening 91 First p-side electrode 92 Second p-side electrode 93 Third p-side electrode 94 N-side electrode 441a First n-side optical guide layer 441b Second n-side optical guide layer 443a First p-side optical guide layer 443b Second p-side optical guide layer 453 Third p-type cladding layer

Claims

1. A semiconductor laser element that emits a laser beam, comprising: a semiconductor laminate in which semiconductor layers are laminated and which has a ridge; and a p-side electrode disposed above the semiconductor laminate, wherein the semiconductor laminate includes: an n-type clad layer; an active layer disposed above the n-type clad layer; a p-type clad layer disposed above the active layer; a p-type barrier relaxation layer disposed above the p-type clad layer and having a film thickness of 0.06 μm or less; and a contact layer disposed above the p-type barrier relaxation layer and in contact with the p-side electrode, wherein the film thickness of the contact layer is 0.1 μm or less, the bandgap energy of the contact layer is smaller than the energy corresponding to the peak wavelength of the laser beam, the p-type barrier relaxation layer is a layer that relaxes the valence band barrier between the p-type clad layer and the contact layer, the p-type barrier relaxation layer includes a first p-type barrier relaxation layer and a second p-type barrier relaxation layer disposed between the contact layer and the first p-type barrier relaxation layer, the second p-type barrier relaxation layer is an AlGaAs layer, and the bandgap energy of the second p-type barrier relaxation layer is larger than the energy corresponding to the peak wavelength.

2. A semiconductor laser element that emits a laser beam, comprising: A semiconductor laminate in which semiconductor layers are laminated and which has a ridge; and A p-side electrode disposed above the semiconductor laminate, The semiconductor laminate includes: An n-type clad layer; An active layer disposed above the n-type clad layer; A p-type clad layer disposed above the active layer; A p-type barrier relaxation layer disposed above the p-type clad layer and having a film thickness of 0.06 μm or less; and A contact layer disposed above the p-type barrier relaxation layer and in contact with the p-side electrode, The film thickness of the contact layer is 0.1 μm or less, The bandgap energy of the contact layer is smaller than the energy corresponding to the peak wavelength of the laser beam, The p-type barrier relaxation layer includes a first p-type barrier relaxation layer and a second p-type barrier relaxation layer disposed between the contact layer and the first p-type barrier relaxation layer, The bandgap energy of the first p-type barrier relaxation layer is smaller than the maximum bandgap energy of the p-type clad layer, The second p-type barrier relaxation layer is an AlGaAs layer, The bandgap energy of the second p-type barrier relaxation layer is larger than the energy corresponding to the peak wavelength, The bandgap energy of the second p-type barrier relaxation layer is smaller than the maximum bandgap energy of the p-type clad layer, The bandgap energy of the first p-type barrier relaxation layer is larger than the energy corresponding to the peak wavelength. Semiconductor laser element.

3. The contact layer is a GaAs layer. The semiconductor laser element according to claim 1 or 2.

4. The bandgap energy of the first p-type barrier relaxation layer is larger than the bandgap energy of the second p-type barrier relaxation layer. The semiconductor laser element according to any one of claims 1 to 3.

5. The first p-type barrier relaxation layer is in contact with the p-type clad layer. The semiconductor laser element according to any one of claims 1 to 4.

6. The second p-type barrier relaxation layer is in contact with the contact layer. The semiconductor laser element according to any one of claims 1 to 5.

7. Among the p-type barrier relaxation layers, the total film thickness of the layers having a refractive index larger than the effective refractive index in the semiconductor laminate is 0.06 μm or less. The semiconductor laser element according to any one of claims 1 to 6.

8. Among the contact layer and the p-type barrier relaxation layer, the total film thickness of the layers having a refractive index greater than the effective refractive index in the semiconductor laminate is 0.11 μm or less. The semiconductor laser device according to any one of claims 1 to 7.

9. The p-type barrier relaxation layer is disposed between the first p-type barrier relaxation layer and the second p-type barrier relaxation layer, and has an intermediate layer having a composition different from each of the first p-type barrier relaxation layer and the second p-type barrier relaxation layer. The difference between the maximum bandgap energy of the p-type cladding layer and the bandgap energy of the first p-type barrier relaxation layer, or the bandgap energy difference between the intermediate layer and the second p-type barrier relaxation layer at the boundary between the intermediate layer and the second p-type barrier relaxation layer is 0.25 eV or less. The semiconductor laser device according to any one of claims 1 to 8.

10. The first p-type barrier relaxation layer and the intermediate layer are AlGaInP layers, and the Al composition ratio of the intermediate layer is smaller than the Al composition ratio of the first p-type barrier relaxation layer. The semiconductor laser device according to claim 9.

11. The p-type cladding layer is an AlInP layer. The semiconductor laser device according to any one of claims 1 to 10.

12. The Al composition ratio of the second p-type barrier relaxation layer is 0.6 or less. The semiconductor laser device according to any one of claims 1 to 11.

13. The p-type cladding layer has a first p-type cladding layer that is a region below the lower end of the ridge in the p-type cladding layer, and a second p-type cladding layer disposed above the first p-type cladding layer. The film thickness of the second p-type cladding layer is 0.7 μm or less. The semiconductor laser device according to any one of claims 1 to 12.

14. The p-side electrode includes an Ag film in contact with the contact layer. The semiconductor laser device according to any one of claims 1 to 13.

15. The impurity concentration of the contact layer is greater than the impurity concentration of the second p-type barrier relaxation layer and is 2×10 １９ cm －３ or more. The semiconductor laser device according to any one of claims 1 to 14.

16. The peak wavelength is 620 nm or more and 860 nm or less. The semiconductor laser device according to any one of claims 1 to 15.

17. The active layer has a quantum well structure including one or more well layers and two or more barrier layers. Each of the one or more well layers is an AlGaInP layer, a GaInP layer, a GaAsP layer, a GaAs layer, or an InGaAs layer. The semiconductor laser device according to any one of claims 1 to 16.

Images