Composite wiring board and semiconductor device

The composite wiring substrate addresses the issues of warping and thermal expansion mismatch by using a lower expansion coefficient interposer board and copper/silver conductors, improving electrical connection reliability and thermal management in semiconductor devices.

WO2025142900A1PCT designated stage expired Publication Date: 2025-07-03KYOCERA CORP
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Patent Information

Application Number
PCT/JP2024/045617
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-27
Filing Date
2024-12-24
Publication Date
2025-07-03

AI Technical Summary

Technical Problem

Existing semiconductor devices face challenges in achieving high electrical connection reliability and thermal management due to warping and mismatched thermal expansion coefficients between different substrate layers, leading to destabilized connections and inefficient heat dissipation.

Method used

A composite wiring substrate is designed with a base substrate and an interposer board, where the interposer board has a lower thermal expansion coefficient than the base substrate, using a melting point change type bonding material to maintain connection reliability and a configuration that allows for efficient heat dissipation through copper or silver conductors.

Benefits of technology

The solution enhances electrical connection reliability and thermal management by minimizing warping and maintaining stable connections, ensuring high mounting reliability and efficient heat dissipation across the semiconductor device.

✦ Generated by Eureka AI based on patent content.

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Abstract

A composite wiring board according to the present disclosure comprises: a base board; and a relay board that is electrically connected to the base board via a bonding material. The base board has: a first core substrate; a first organic substrate that is formed from an organic resin and is bonded to the first core substrate; and a plurality of first wirings positioned inside the first organic substrate. The relay board has a second core substrate, a second organic substrate that is formed from an organic resin and is bonded to the second core substrate, and a plurality of second wirings positioned inside the second organic substrate. The thermal expansion coefficient of the relay board is smaller than the thermal expansion coefficient of the base board.
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Description

Composite wiring board and semiconductor device

[0001] The present disclosure relates to a composite wiring board and a semiconductor device.

[0002] 2. Description of the Related Art Conventionally, a technique for mounting a plurality of semiconductor elements on a single base substrate via an interposer has been known. Patent Document 1 discloses an interposer made of organic resin.

[0003] JP 2023-083003 A

[0004] The composite wiring board according to the present disclosure includes a base substrate and an interposer substrate electrically connected to the base substrate via a bonding material. The base substrate includes a first core substrate, a first organic substrate made of organic resin bonded to the first core substrate, and a plurality of first wirings located within the first organic substrate. The interposer substrate includes a second core substrate, a second organic substrate made of organic resin bonded to the second core substrate, and a plurality of second wirings located within the second organic substrate. The coefficient of thermal expansion of the interposer substrate is smaller than the coefficient of thermal expansion of the base substrate.

[0005] Fig. 1 is a schematic cross-sectional view showing the configuration of a semiconductor device according to an embodiment. Fig. 2 is a schematic cross-sectional view showing the configuration of a base substrate according to an embodiment. Fig. 3 is a schematic enlarged view of region III shown in Fig. 2. Fig. 4 is a schematic cross-sectional view showing the configuration of an interconnect substrate and its surroundings according to an embodiment. Fig. 5 is a schematic enlarged view of region V shown in Fig. 4.

[0006] Hereinafter, embodiments for carrying out a composite wiring board and a semiconductor device according to the present disclosure (hereinafter referred to as "embodiments") will be described in detail with reference to the drawings. Note that the present disclosure is not limited to these embodiments. Furthermore, the embodiments can be appropriately combined within the scope of not causing any contradiction in the processing content. Furthermore, the same components in the following embodiments will be given the same reference numerals, and redundant explanations will be omitted.

[0007] Furthermore, in the following embodiments, expressions such as "constant," "orthogonal," "perpendicular," or "parallel" may be used, but these expressions do not necessarily mean "constant," "orthogonal," "perpendicular," or "parallel" in the strict sense. In other words, the above expressions allow for deviations due to, for example, manufacturing precision or installation precision.

[0008] In addition, in the drawings referred to below, for ease of understanding, an orthogonal coordinate system may be shown in which the X-axis direction, Y-axis direction, and Z-axis direction, which are perpendicular to each other, are defined, and the positive Z-axis direction is the vertically upward direction.

[0009] First, the configuration of a semiconductor device 100 according to the embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic cross-sectional view showing the configuration of a semiconductor device 100 according to the embodiment.

[0010] As shown in FIG. 1, the semiconductor device 100 includes a motherboard 1, a composite wiring board 2, and a plurality of semiconductor elements 3.

[0011] The composite wiring board 2 includes a base substrate 4 and an interconnect substrate 5 .

[0012] The base substrate 4 is mounted on the motherboard 1. Details of the base substrate 4 will be described later.

[0013] The relay substrate 5 is a so-called interposer. The relay substrate 5 relays the electrical connection between the base substrate 4 and the semiconductor element 3. The relay substrate 5 is bonded to the semiconductor element 3 via a bonding material 6, and is also bonded to the base substrate 4 via a bonding material 7.

[0014] The Young's modulus of the relay substrate 5 may be smaller than that of the base substrate 4. In this case, the relay substrate 5 may have flexibility that allows it to deform according to the shape of the surface of the base substrate 4. The bonding materials 6 and 7 are, for example, solder. Details of the relay substrate 5 will be described later.

[0015] The semiconductor element 3 is mounted on the relay substrate 5. The semiconductor element 3 is, for example, a chip or chiplet in which circuits or elements are formed on a substrate made of a material other than a semiconductor, such as a semiconductor chip or a glass substrate. The chiplet is a functional block that constitutes part of the integrated circuit of the semiconductor device 100.

[0016] 1 shows two semiconductor elements 3, the semiconductor device 100 may include three or more semiconductor elements 3. The semiconductor device 100 may also include only one semiconductor element 3. For example, when the semiconductor element 3 is a chiplet, an integrated circuit having one function may be configured by a plurality of semiconductor elements 3.

[0017] Next, the configuration of the base substrate 4 according to the embodiment will be described with reference to Fig. 2 and Fig. 3. Fig. 2 is a schematic cross-sectional view showing the configuration of the base substrate 4 according to the embodiment. Fig. 3 is a schematic enlarged view of region III shown in Fig. 2.

[0018] The base substrate 4 has a first core substrate 10 and a first organic substrate 20. The base substrate 4 is a laminate of the first core substrate 10 and the first organic substrate 20. The base substrate 4 also has a first conductor section 30 and a second conductor section 40.

[0019] <First Core Substrate> The first core substrate 10 is a ceramic substrate. The first core substrate 10 may be formed using a ceramic composite material containing a glass component, known as glass ceramic. The glass ceramic may be any of the following: a composite of a glass phase and ceramic particles; a composite of a glass phase and a crystalline phase formed by the crystallization of a portion of the glass phase; a composite in which ceramic particles exist in the glass phase; and a composite in which a glass phase exists at the grain boundaries between ceramic particles. The first core substrate 10 formed using ceramic in this manner has higher rigidity than a core material made of glass.

[0020] For example, the first core substrate 10 may be made of low temperature co-fired ceramics (LTCC). When LTCC is used as the first core substrate 10, a low-melting-point metal such as copper or silver, which has a relatively low electrical resistance, can be used as the wiring. In this embodiment, the low-melting-point metal is a metal with a melting point lower than that of typical metals used for wiring in ceramic substrates, such as tungsten or molybdenum.

[0021] The first core substrate 10 may contain a ceramic filler as ceramic particles. Examples of the ceramic filler that can be used include alumina (aluminum oxide), calcium titanate, and magnesium titanate. In particular, a first core substrate 10 containing alumina has high rigidity.

[0022] The first core substrate 10 has a first surface 101 and a second surface 102 located on the opposite side to the first surface 101. The first core substrate 10 may be a plate-like body having the first surface 101 and the second surface 102 as main surfaces.

[0023] In the embodiment, the first core substrate 10 has a plurality of ceramic layers 11. The plurality of ceramic layers 11 are stacked along the thickness direction of the first core substrate 10. A base substrate 4 having such a first core substrate 10 has a high degree of design freedom. Furthermore, by forming the first core substrate 10 using a plurality of ceramic layers 11, the first core substrate 10 can be manufactured while checking whether the first conductor portion 30 is properly formed for each layer, thereby improving the yield of the first core substrate 10.

[0024] 1 and 2, the first core substrate 10 has four ceramic layers 11, but the number of ceramic layers 11 is not limited to four. The number of ceramic layers 11 may be two, three, or five or more.

[0025] <First Organic Base Material> The first organic base material 20 is a base material containing an organic component. The organic component may be an organic resin. The organic resin may be, for example, an epoxy resin, an acrylic resin, a polycarbonate resin, a polyimide resin, an olefin resin, or a polyphenylene resin.

[0026] The organic resin may be, for example, polytetrafluoroethylene (PTFE) or other fluororesins or polyphenylene ether resins. The first organic base material 20 may contain components other than the organic resin. In the present disclosure, the organic resin may be, for example, a material that accounts for 30% by mass or more of the materials that constitute the first organic base material 20.

[0027] The first organic base material 20 has a third surface 103 and a fourth surface 104 located on the opposite side to the third surface 103. The first organic base material 20 may be a plate-like body having the third surface 103 and the fourth surface 104 as main surfaces.

[0028] The base substrate 4 according to the embodiment has two first organic base materials 20. One of the two first organic base materials 20 is bonded to the first surface 101 of the first core base material 10, and the other is bonded to the second surface 102 of the first core base material 10.

[0029] The first organic base material 20 located on the first surface 101 of the first core substrate 10 has its third surface 103 bonded to the first surface 101 of the first core substrate 10, and multiple semiconductor elements 3 are placed on the fourth surface 104 of the first organic base material 20 via an intermediate substrate 5 (see Figure 1).

[0030] The first organic base material 20 located on the second surface 102 of the first core substrate 10 has its third surface 103 bonded to the first surface 101 of the first core substrate 10, and its fourth surface 104 bonded to the motherboard 1 via a bonding portion 8 (see Figure 1).

[0031] The first organic base material 20 has a plurality of organic resin layers 21. The plurality of organic resin layers 21 are stacked along the thickness direction of the first organic base material 20. A base substrate 4 having such a first organic base material 20 has a high degree of freedom in design. In the example shown in FIG. 2 , the first organic base material 20 has four organic resin layers 21, but the number of organic resin layers 21 is not limited to four. The number of organic resin layers 21 may be two, three, or five or more.

[0032] 1 and 2 show an example in which base substrate 4 has first organic base material 20 on each of first surface 101 and second surface 102 of first core substrate 10. However, the present invention is not limited to this, and it is sufficient that base substrate 4 has first organic base material 20 on at least first surface 101 of first core substrate 10.

[0033] The first organic base material 20 containing an organic component is easier to form a fine wiring pattern on than an inorganic substrate, whereas the first core base material 10 made of ceramic has higher rigidity and lower density than the first organic base material 20.

[0034] The base substrate 4 according to the embodiment can increase rigidity while achieving finer wiring and narrower pitches by combining the first core substrate 10 and the first organic substrate 20. Since warping of the substrate becomes more pronounced as the substrate becomes larger, the configuration of the base substrate 4 in which the first core substrate 10 compensates for the low rigidity of the first organic substrate 20 is particularly useful for increasing the size of the substrate.

[0035] The first core substrate 10 and the first organic substrate 20 are bonded together, for example, by hydrogen bonding. Specifically, the first core substrate 10 and the first organic substrate 20 are bonded together by bonding between hydroxyl groups of the first core substrate 10 and the first organic substrate 20. In this case, a ceramic material such as alumina having surface hydroxyl groups may be used for the first core substrate 10, and an epoxy resin, which is a resin material containing hydroxyl groups, may be used for the first organic substrate 20. By directly bonding the first core substrate 10 and the first organic substrate 20 in this way without using solder, underfill, or the like, the thickness of the base substrate 4 can be reduced and the manufacturing process can be simplified.

[0036] Furthermore, the first core substrate 10 may contain a glass component, and the first organic substrate 20 may contain a coupling agent that chemically bonds with the glass component. For example, a silane coupling agent may be used as the coupling agent. Alternatively, a titanium-based coupling agent or an aluminum-based coupling agent may be used as the coupling agent. With this configuration, the first core substrate 10 and the first organic substrate 20 are chemically bonded together, thereby more firmly bonding the first core substrate 10 and the first organic substrate 20, which are made of different materials.

[0037] <First conductor portion> The first conductor portion 30 is a through-hole conductor located in the first core substrate 10. Specifically, the first conductor portion 30 has a through hole 31 that penetrates the first core substrate 10, and a conductor 32. The conductor 32 is mainly composed of metal and is located inside the through hole 31.

[0038] The first conductor portion 30 also has lands 33 on the first surface 101 and the second surface 102 of the first core substrate 10 .

[0039] <Second Conductor> The second conductor 40 has a plurality of vias 41, a plurality of lands 42, and a plurality of first wirings 43. The vias 41 penetrate one or a plurality of organic resin layers 21. The lands 42 are located between adjacent organic resin layers 21 and electrically connect the plurality of vias 41 to each other. The first wirings 43 are located inside the first organic base material 20. The first wirings 43 may have a diffusion suppression layer 90 on the bottom surface. The diffusion suppression layer 90 may contain any of Cr, Ti, Ni, and a compound containing a combination of two or more of these elements.

[0040] The first wiring 43 located on the first organic base material 20 bonded to the first surface 101 of the first core substrate 10 and the first wiring 43 located on the first organic base material 20 bonded to the second surface 102 are electrically connected via the conductor 32 that penetrates the first core substrate 10. This allows the first wiring 43 to be arranged at a high density.

[0041] The first conductor portion 30 and the second conductor portion 40 may be, for example, a metal conductor whose main component is copper or silver. For example, both the first conductor portion 30 and the second conductor portion 40 may be a metal conductor whose main component is copper. Alternatively, both the first conductor portion 30 and the second conductor portion 40 may be a metal conductor whose main component is silver. Alternatively, one of the first conductor portion 30 and the second conductor portion 40 may be a metal conductor whose main component is copper, and the other may be a metal conductor whose main component is silver.

[0042] By making all of the first conductor portion 30 and the second conductor portion 40 metal conductors whose main component is copper or silver, it is possible to obtain higher electrical characteristics compared to, for example, when one of the first conductor portion 30 and the second conductor portion 40 is made of a metal conductor other than copper or silver.

[0043] Of the first conductor 30 and the second conductor 40, only the first conductor 30 may contain a glass component. In this case, the first conductor 30 is firmly bonded to the first core substrate 10, which also contains a glass component, via the glass component. This allows the rigidity of the first core substrate 10 to be increased.

[0044] Furthermore, in the firing process when manufacturing the base substrate 4, the shrinkage rates of the first core substrate 10 and the first conductor portion 30 can be made to be somewhat uniform, making it less likely that the first conductor portion 30 will become misaligned.

[0045] The first conductor 30 may be formed, for example, by printing a conductive paste containing copper and glass components on a green sheet that is the raw material of the ceramic layer 11, and firing the green sheet simultaneously with the green sheet. Specifically, the conductive paste may contain, for example, copper powder, borosilicate glass powder, and silica particles.

[0046] On the other hand, the second conductor 40 may be formed by copper plating, which allows the first conductor 30 and the second conductor 40 to be configured such that only the first conductor 30 contains a glass component.

[0047] The second conductor 40 may be electrically and thermally connected to the semiconductor element 3 via the relay substrate 5. By thermally connecting the second conductor 40, which is mainly composed of copper or silver, which has a relatively high thermal conductivity, to the semiconductor element 3, which serves as a heat source, the heat generated from the semiconductor element 3 can be efficiently dissipated via the second conductor 40 and the first conductor 30.

[0048] Next, the configuration of the relay substrate 5 according to the embodiment will be described with reference to Fig. 4 and Fig. 5. Fig. 4 is a schematic cross-sectional view showing the configuration of the relay substrate 5 according to the embodiment and its surroundings. Fig. 5 is a schematic enlarged view of region V shown in Fig. 4.

[0049] The relay substrate 5 has a second core substrate 50 and a second organic substrate 60. The relay substrate 5 is a laminate of the second core substrate 50 and the second organic substrate 60. The relay substrate 5 also has a third conductor 70 and a fourth conductor 80.

[0050] <Second Core Substrate> The second core substrate 50 is a ceramic substrate. The second core substrate 50 may be formed using a ceramic composite material containing a glass component, known as glass ceramic. The glass ceramic may be any of the following: a composite of a glass phase and ceramic particles; a composite of a glass phase and a crystalline phase formed by the crystallization of a portion of the glass phase; a composite in which ceramic particles exist in the glass phase; and a composite in which a glass phase exists at the grain boundaries between ceramic particles. The second core substrate 50 formed using ceramic in this manner has higher rigidity than a core material made of glass.

[0051] For example, the second core substrate 50 may be made of low temperature co-fired ceramics (LTCC). When LTCC is used as the second core substrate 50, a low-melting-point metal such as copper or silver, which has a relatively low electrical resistance, can be used as wiring.

[0052] The second core substrate 50 may contain a ceramic filler as ceramic particles. Examples of the ceramic filler that can be used include alumina (aluminum oxide), calcium titanate, and magnesium titanate. In particular, the second core substrate 50 containing alumina has high rigidity.

[0053] The second core substrate 50 has a fifth surface 501 and a sixth surface 502 located opposite the fifth surface 501. The second core substrate 50 may be a plate-like body having the fifth surface 501 and the sixth surface 502 as main surfaces.

[0054] <Second Organic Base Material> The second organic base material 60 is a base material containing an organic component. The organic component may be an organic resin. The organic resin may be, for example, an epoxy resin, an acrylic resin, a polycarbonate resin, a polyimide resin, an olefin resin, or a polyphenylene resin.

[0055] The organic resin may be, for example, polytetrafluoroethylene (PTFE) or other fluororesins or polyphenylene ether resins. The second organic base material 60 may contain components other than the organic resin. In the present disclosure, the organic resin may be, for example, a material that accounts for 30% by mass or more of the materials that constitute the second organic base material 60.

[0056] The second organic base material 60 has a seventh surface 603 and an eighth surface 604 located opposite to the seventh surface 603. The second organic base material 60 may be a plate-like body having the seventh surface 603 and the eighth surface 604 as main surfaces.

[0057] The seventh surface 603 of the second organic base material 60 is bonded to the fifth surface 501 of the second core base material 50 via a bonding material 9, and a plurality of semiconductor elements 3 are mounted on an eighth surface 604 of the second organic base material 60 via a bonding material 6 (see FIG. 1 ). The bonding material 9 is, for example, solder. Details of the bonding material 9 will be described later.

[0058] The second organic base material 60 has a plurality of organic resin layers 61. The plurality of organic resin layers 61 are stacked along the thickness direction of the second organic base material 60. The relay substrate 5 having such a second organic base material 60 has a high degree of freedom in design. In the example shown in FIG. 4 , the second organic base material 60 has three organic resin layers 61, but the number of organic resin layers 61 is not limited to three. The number of organic resin layers 61 may be one or two, or may be four or more.

[0059] <Third conductor portion> The third conductor portion 70 is a through-hole conductor located in the second core substrate 50. Specifically, the third conductor portion 70 has a through hole 71 that penetrates the second core substrate 50, and a conductor 72. The conductor 72 is mainly composed of metal and is located inside the through hole 71.

[0060] The third conductor 70 also has lands 73 on the fifth surface 501 and the sixth surface 502 of the second core substrate 50 .

[0061] <Fourth Conductor> The fourth conductor 80 has a plurality of vias 81, a plurality of lands 82, and a plurality of second wirings 83. The vias 81 penetrate one or a plurality of organic resin layers 61. The lands 82 are located between adjacent organic resin layers 61 and electrically connect the plurality of vias 81 to one another. The lands 82 are formed integrally with the vias 81 located in the same organic resin layer 61. The second wirings 83 are located inside the second organic base material 60. The second wirings 83 may have a diffusion suppression layer 90 on their side and bottom surfaces. Similarly, the side and bottom surfaces of the vias 81 and the side surfaces of the lands 82 may also have a diffusion suppression layer 90. The diffusion suppression layer 90 suppresses diffusion of metal components contained in the second wirings 83 into the second organic base material 60. Therefore, the diffusion suppression layer 90 can reduce electrical conduction between adjacent second wirings 83 via metal components diffused into the second organic base material 60. In other words, the insulation reliability is high.

[0062] The third conductor portion 70 and the fourth conductor portion 80 may be, for example, a metal conductor whose main component is copper or silver. For example, the third conductor portion 70 and the fourth conductor portion 80 may both be metal conductors whose main component is copper. Alternatively, the third conductor portion 70 and the fourth conductor portion 80 may both be metal conductors whose main component is silver. Alternatively, one of the third conductor portion 70 and the fourth conductor portion 80 may be a metal conductor whose main component is copper, and the other may be a metal conductor whose main component is silver.

[0063] By making all of the third conductor portion 70 and the fourth conductor portion 80 metal conductors whose main component is copper or silver, it is possible to obtain higher electrical characteristics compared to, for example, when one of the third conductor portion 70 and the fourth conductor portion 80 is made of a metal conductor other than copper or silver.

[0064] Of the third conductor 70 and the fourth conductor 80, only the first conductor 30 may contain a glass component. In this case, the third conductor 70 is firmly bonded to the second core substrate 50, which also contains a glass component, via the glass component. This allows the rigidity of the second core substrate 50 to be increased.

[0065] Furthermore, in the firing process when manufacturing the relay substrate 5, the shrinkage rates of the second core substrate 50 and the third conductor portion 70 can be made to be somewhat uniform, making it less likely that the third conductor portion 70 will become misaligned.

[0066] The third conductor 70 may be formed, for example, by printing a conductive paste containing copper and glass components onto a green sheet that is the raw material for the second core substrate 50, and firing the green sheet simultaneously with the green sheet. Specifically, the conductive paste may contain, for example, copper powder, borosilicate glass powder, and silica particles.

[0067] On the other hand, the fourth conductor 80 may be formed by copper plating, which allows the third conductor 70 and the fourth conductor 80 to have a configuration in which only the third conductor 70 contains a glass component.

[0068] The fourth conductor 80 may be electrically and thermally connected to the semiconductor element 3 via the bonding material 6. By thermally connecting the fourth conductor 80, which is mainly composed of copper or silver, which has a relatively high thermal conductivity, to the semiconductor element 3, which serves as a heat source, the heat generated from the semiconductor element 3 can be efficiently dissipated via the fourth conductor 80 and the third conductor 70.

[0069] The relay board 5 configured as described above can have an increased rigidity due to the provision of the second core substrate 50. Increasing the rigidity of the relay board 5 makes the relay board 5 less prone to warping, thereby increasing the flatness of the mounting surface of the relay board 5 on which the semiconductor element 3 is mounted. Furthermore, the second wiring 83 of the relay board 5 is formed finer than the first wiring 43 of the base substrate 4. According to the composite wiring board 2 of the embodiment, the relay board 5 is less prone to warping, and therefore, instability in electrical connection due to warping of the relay board 5 is less likely to occur. In other words, the composite wiring board 2 of the embodiment has high reliability of electrical connection.

[0070] As shown in FIG. 1 , the composite wiring board 2 according to the embodiment may have a semiconductor element 3 mounted on an interconnect substrate 5 and a base substrate 4 mounted on a motherboard 1. In this case, from the viewpoint of ensuring mounting reliability, it is desirable that the thermal expansion coefficient of the base substrate 4 be close to that of the motherboard 1, and that the thermal expansion coefficient of the interconnect substrate 5 be close to that of the semiconductor element 3. Mounting reliability here means that the electrical connection between the motherboard, the composite wiring board, and the semiconductor element is maintained even when the composite wiring board undergoes thermal expansion or contraction due to temperature changes. Generally, the thermal expansion coefficient of the semiconductor element is smaller than that of the motherboard. For example, the thermal expansion coefficient of the motherboard is approximately 40 ppm / K, while the thermal expansion coefficient of the semiconductor element is approximately 4 ppm / K. Therefore, it is preferable that the thermal expansion coefficient of the interconnect substrate and the base substrate be smaller than that of the base substrate. The thermal expansion coefficients of the motherboard 1, the semiconductor element 3, the base substrate 4, and the interconnect substrate 5 can be obtained based on the results of measurements using, for example, thermomechanical analysis (TMA).

[0071] Therefore, the thermal conductivity of the relay substrate 5 in the composite wiring board 2 according to the embodiment is configured to be smaller than that of the base substrate 4. In other words, the magnitude relationship between the thermal expansion coefficients of the relay substrate 5 and the base substrate 4 according to the embodiment is relay substrate 5 < base substrate 4. Therefore, the composite wiring board 2 according to the embodiment has high mounting reliability as the composite wiring board 2 in which the base substrate 4 is mounted on the motherboard 1 and the semiconductor element 3 is mounted on the relay substrate 5.

[0072] The relay substrate 5 and base substrate 4 having different thermal expansion coefficients can be produced, for example, by adjusting the ratio of the third conductor portion 70 and the fourth conductor portion 80 in the relay substrate 5 and the ratio of the first conductor portion 30 and the second conductor portion 40 in the base substrate 4 during the process of producing the composite wiring board 2. As another example, if the first core substrate 10 of the base substrate 4 and the second core substrate 50 of the relay substrate 5 are made of different materials, a difference will arise between the thermal expansion coefficients of the base substrate 4 and the relay substrate 5. Furthermore, if the content of inorganic material in the first organic substrate 20 of the base substrate 4 and the content of inorganic material in the second organic substrate 60 of the relay substrate 5 are changed, a difference will arise between the thermal expansion coefficients of the base substrate 4 and the relay substrate 5.

[0073] The magnitude relationship between the thermal expansion coefficients of the relay substrate 5 and the base substrate 4 does not necessarily have to be relay substrate 5 < base substrate 4. For example, the thermal expansion coefficients of the relay substrate 5 and the base substrate 4 may be the same, or the thermal expansion coefficient of the relay substrate 5 may be greater than the thermal expansion coefficient of the base substrate 4.

[0074] Furthermore, in the semiconductor device 100 in which the semiconductor element 3 is mounted on the relay substrate 5 and the base substrate 4 is mounted on the motherboard 1, the thermal expansion coefficient of the semiconductor element 3 may be equal to or lower than that of the relay substrate 5. Furthermore, the thermal expansion coefficient of the relay substrate 5 may be lower than that of the base substrate 4, which may be equal to or lower than that of the motherboard 1. In other words, the magnitude relationship of the thermal expansion coefficients of the semiconductor element 3, relay substrate 5, base substrate 4, and motherboard 1 according to the embodiment may be semiconductor element 3 < relay substrate 5 < base substrate 4 < motherboard 1. With this configuration, the mounting reliability of the semiconductor device 100 is high.

[0075] When providing the second core substrate 50 on the relay substrate 5 as described above, it is conceivable that in the manufacturing process of the composite wiring board 2, the second core substrate 50 and the second organic substrate 60 are first bonded with the bonding material 9 to form the relay substrate 5, and then the relay substrate 5 is bonded to the base substrate 4 with the bonding material 7. In this way, providing the second core substrate 50 on the relay substrate 5 may require at least two bonding steps, i.e., two heat treatment steps. Here, if a normal bonding material such as lead-free solder or lead-containing solder is used to bond the second core substrate 50 and the second organic substrate 60, there is a risk that the bonding material will melt in the first heat treatment step and then re-melt in the second heat treatment step, which may result in a decrease in the reliability of the connection between the second core substrate 50 and the second organic substrate 60.

[0076] Therefore, in the composite wiring board 2 according to the embodiment, the melting point change type bonding material 9 is used as the bonding material that bonds the second core base material 50 and the second organic base material 60 together.

[0077] The melting-point-changing bonding material 9 is a bonding material whose melting point differs between its initial paste state and its state after it is heated to form an intermetallic compound. Specifically, the melting-point-changing bonding material 9 melts at a first melting point of, for example, about 140°C, and then remelts to a second melting point higher than the first melting point, for example, about 245°C. The second melting point of the melting-point-changing bonding material 9 is higher than the first melting point. Specifically, the second melting point is higher than the melting point of the bonding material 7 used to bond the relay substrate 5 and the base substrate 4. Therefore, even if the composite wiring board 2 is heated again in the process of bonding the relay substrate 5 and the base substrate 4, the melting-point-changing bonding material 9, which is the bonding material bonding the second core substrate 50 and the second organic substrate 60, does not remelt. Therefore, according to the composite wiring board 2 of the embodiment, a decrease in the connection reliability between the second core substrate 50 and the second organic substrate 60 due to remelting of the bonding material 9 is unlikely to occur.

[0078] Furthermore, the first melting point of the variable-melting-point bonding material 9 is lower than the melting point of a regular bonding material. Therefore, when the variable-melting-point bonding material 9 is used, the difference in thermal expansion between the second core substrate 50 and the second organic substrate 60 during the process of bonding them can be kept small compared to when a regular bonding material is used. This makes it less likely for distortion to occur in the bonding material 9 during the above process. Furthermore, the difference in thermal contraction between the second core substrate 50 and the second organic substrate 60 during the subsequent cooling process is also reduced, making it less likely for cracks to occur in the bonding material 9. As such, the composite wiring board 2 according to the embodiment has high connection reliability between the second core substrate 50 and the second organic substrate 60.

[0079] The bonding material 9 also functions as a buffer material, which allows the difference in thermal expansion between the second core substrate 50 and the second organic substrate 60 to be alleviated by the bonding material 9 .

[0080] The bonding material 7 may contain, for example, Sn and at least one selected from Ag, Bi, In, Cu, and Sb.

[0081] The present technology may also be configured as follows. (1) A composite wiring board (for example, a composite wiring board 2) includes a base substrate (for example, a base substrate 4) and an interposer substrate (for example, an interposer substrate 5) electrically connected to the base substrate via a bonding material (for example, a bonding material 7). The base substrate includes a first core substrate (for example, a first core substrate 10), a first organic base material (for example, a first organic base material 20) made of organic resin and bonded to the first core substrate, and a plurality of first wirings (for example, first wirings 43) located inside the first organic base material. The interposer includes a second core substrate (for example, a second core substrate 50), a second organic base material (for example, a second organic base material 60) made of organic resin and bonded to the second core substrate, and a plurality of second wirings (for example, second wirings 83) located inside the second organic base material. The thermal expansion coefficient of the interposer substrate is smaller than that of the base substrate. (2) In the composite wiring board described in (1) above, the relay substrate may have a bonding material (e.g., bonding material 9) that bonds the second core substrate and the second organic substrate, and the bonding material may be a melting point changing bonding material. (3) In the composite wiring board described in (1) or (2) above, the first core substrate may be made of ceramic. (4) In the composite wiring board described in (3) above, the first core substrate may have a plurality of ceramic layers (e.g., ceramic layer 11). (5) The composite wiring board described in (3) or (4) above may have two first organic substrates, and the first core substrate may have a first surface (e.g., first surface 101) and a second surface (e.g., second surface 102) located opposite the first surface, and the first organic substrate may be bonded to each of the first surface and the second surface. (6) The composite wiring board described in (5) above may have a conductor (for example, conductor 32) penetrating the first surface and the second surface of the first core substrate, and the first wiring located on the first organic base material bonded to the first surface and the first wiring located on the first organic base material bonded to the second surface may be electrically connected via the conductor. (7) In the composite wiring board described in any one of (3) to (6) above, the first core substrate may contain a glass component, and the first organic base material may contain a coupling agent that chemically bonds with the glass component.(8) A semiconductor device (for example, semiconductor device 100) has a motherboard (for example, motherboard 1), a composite wiring board described in any one of (1) to (7) above mounted on the motherboard, and a semiconductor element (for example, semiconductor element 3) mounted on an interposer, wherein the thermal expansion coefficient of the semiconductor element is equal to or less than the thermal expansion coefficient of the interposer, the thermal expansion coefficient of the interposer is lower than the thermal expansion coefficient of the base substrate, and the thermal expansion coefficient of the base substrate is equal to or less than the thermal expansion coefficient of the motherboard.

[0082] REFERENCE SIGNS LIST 1 Motherboard 2 Composite wiring board 3 Semiconductor element 4 Base substrate 5 Intermediate substrate 9 Bonding material 10 First core substrate 20 First organic substrate 30 First conductor portion 40 Second conductor portion 43 First wiring 50 Second core substrate 60 Second organic substrate 70 Third conductor portion 80 Fourth conductor portion 83 Second wiring 100 Semiconductor device

Claims

1. A composite wiring substrate having a base substrate and an intermediate substrate electrically connected to the base substrate via a bonding material, wherein the base substrate has a first core substrate, a first organic substrate made of an organic resin bonded to the first core substrate, and a plurality of first wirings located inside the first organic substrate, and the intermediate substrate has a second core substrate, a second organic substrate made of an organic resin bonded to the second core substrate, and a plurality of second wirings located inside the second organic substrate, and the coefficient of thermal expansion of the intermediate substrate is smaller than that of the base substrate.

2. The composite wiring substrate according to claim 1, wherein the intermediate substrate has a bonding material for bonding the second core substrate and the second organic substrate, and the bonding material is a melting point change type bonding material.

3. The composite wiring substrate according to claim 1 or 2, wherein the first core substrate is made of ceramic.

4. The composite wiring substrate according to claim 3, wherein the first core substrate has a plurality of ceramic layers.

5. The composite wiring substrate according to claim 3 or 4, having two of the first organic substrates, wherein the first core substrate has a first surface and a second surface located on the opposite side of the first surface, and the first organic substrate is bonded to each of the first surface and the second surface.

6. The composite wiring substrate according to claim 5, having a conductor penetrating the first surface and the second surface of the first core substrate, and the first wirings located in the first organic substrate bonded to the first surface and the first wirings located in the first organic substrate bonded to the second surface are electrically connected via the conductor.

7. The composite wiring substrate according to any one of claims 3 to 6, wherein the first core substrate contains a glass component, and the first organic substrate contains a coupling agent that chemically bonds to the glass component.

8. A semiconductor device having a motherboard, the composite wiring substrate according to any one of claims 1 to 7 mounted on the motherboard, and a semiconductor element mounted on the intermediate substrate, wherein the coefficient of thermal expansion of the semiconductor element is equal to or less than that of the intermediate substrate, the coefficient of thermal expansion of the intermediate substrate is lower than that of the base substrate, and the coefficient of thermal expansion of the base substrate is equal to or less than that of the motherboard.

Citation Information

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