Enhanced prediction of UV coordinates in forward and reverse edgebreaker

Abstract

Mesh encoding and decoding. In an example embodiment of a mesh decoder, a geometry of a triangular mesh is decoded, the triangular mesh comprising a plurality of corners. For at least one current corner of the triangular mesh, a prediction of a UV coordinate is determined associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner. For at least one of the opposite corners, a determination is made of whether to use the at least one opposite corner for the prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

Description

ENHANCED PREDICTION OF UV COORDINATES IN FORWARD AND REVERSE EDGEBREAKERCROSS-REFERENCE

[0001] This application claims the priority of European Patent Application No. 24305007.7, filed 2 January 2024, entitled “Enhanced Prediction of UV Coordinates in Forward and Reverse Edgebreaker,” which is incorporated herein by reference in its entirety.BACKGROUND

[0002] Following the MPEG V-Mesh (now renamed V-DMC) CfP the solution proposed by Apple was selected to become the foundation of the MPEG V-Mesh Test Model (TM). This proposal is described at K. Mammou, J. Kim, A. Tourapis and D. Podborski, "m59281 - [V- CG] Apple's Dynamic Mesh Coding CfP Response," Apple Inc, 2022. An overview of mesh encoding and decoding are illustrated in FIGs. 1 and 2, respectively. FIG. 1 illustrates an MPEG TM Intra frame encoding process. FIG. 2 illustrates an MPEG TM Intra frame decoding process. The test model, for some frames, uses a static mesh coder for the encoding of a base mesh that is then subdivided to obtain an approximation of the original mesh.

[0003] Until v3.0, the V-Mesh test model encoded the base mesh using the Google Draco implementation of the state-of-the-art mesh encoder named Edgebreaker, and more specifically its Spiral Reversi variant which they adapted to work on a Corner Table (CT). Edgebreaker is described in, for example, J. Rossignac, "Edgebreaker: Connectivity compression for triangle meshes," GVU center, Georgia Institute of Technology, 1999 (“Rossignac (1999)”); and J. Rossignac, "3D compression made simple: Edgebreaker with ZipandWrap on a corner-table," in Proceedings International Conference on Shape Modeling and Applications, Genova, Italy, 2001 (“Rossignac (2001)”). The spirale reversi variant is described in M. Isenburg and J. Snoeyink, "Spirale Reversi: Reverse decoding of the Edgebreaker encoding," Computational Geometry, vol. 20, pp. 39-52, 2001 (“Isenburg & Snoeyink (2001)”).

[0004] Note that Rossignac (1999) originally decodes in a forward manner and operates on a Half Edge representation of the mesh. Later, Rossignac (1999) proposed a modified version, still decoding forward but running on a Corner Table representation of the mesh, which leads to a very compact algorithm. Spirale Reversi, described by Isenburg & Snoeyink (2001), proposes an extension of Rossignac (1999), still running on a Half Edgerepresentation, but performing the decoding in a reverse manner, which leads to a decoding on O(n) in one pass which is a better performance than Rossignac (1999) (worst case time complexity of O(n2)) and Rossignac (2001) (O(n) but multi pass).

[0005] For the standardization of V-DMC is desirable to provide an MPEG alternative implementation of the edgebreaker that could be used in the test model reference software and extended / specified as needed. InterDigital handled the task of crafting the first version of the software. The version that was adopted for the TM v3.0 is detailed in the following MPEG contributions: J.-E. Marvie and O. Mocquard, "m62603 - [V-DMC][EE4.4] Edgebreaker base mesh codec integration," MPEG meeting 142, Antalya, 2023; and J.-E. Marvie and O. Mocquard, "m63344 -[V-DMC][EE4.4]-an-efficient-Edgebreaker- implementation," MPEG meeting 142, Antalya. This software is further described in European Patent Application No. 23305505.2, filed 6 April 2023. In that application, we presented the specific adaptations of the forward edge breaker, working on a corner table that were made to support the V-Mesh TM requirements as well as the associated bitstream syntax. Further extensions are described in the following European Patent Applications:• European Patent Application No. 23305941.9, filed 14 June 2023 (describing the coding of per-face attributes).• European Patent Application No. 23306154.8, filed 7 July 2023 (describing alternative vertex traversals).• European Patent Application No. 23306155.5, filed 7 July 2023 (describing prediction-degree based motion estimation).• European Patent Application No. 23306292.6, filed 26 July 2023 (describing per- face attribute optimization).

[0006] For some meshes, especially the large ones with regular topology (vertex valence average of 6 neighbors), some specific extensions (known as valence driven encoding) can be used to better encode the CLERS table, such as those described in A. Szymczak, "Optimized Edgebreaker encoding for large and regular triangle meshes.," The Visual Computer, vol. 19, pp. 271-278, 2003. However, this solution only works with the reverse version of the EdgeBreaker. A first version of the reverse version is presented in Isenburg & Snoeyink (2001), which works on a half edge data structure. Later a version working on a corner table data structure, and supporting surfaces with holes and handles, was presented in T. Lewiner, H. Lopes, J. Rossignac and A. W. Vieira, "Efficient Edgebreakerfor Surfaces of Arbitrary Topology," in Proceedings. 17th Brazilian Symposium on Computer Graphics and Image Processing, 2004 (“Lewiner et al. (2004)”).SUMMARY

[0007] A mesh encoding method according to some embodiments comprises: encoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination ofwhetherto use the at least one opposite corner forthe prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

[0008] A mesh decoding method according to some embodiments comprises: decoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination ofwhetherto use the at least one opposite corner forthe prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

[0009] Some embodiments include, in response to a determination that at least one of the opposite corners is beyond a UV seam from the current corner, performing an orientation test.

[0010] In some embodiments, an orientation bit is not encoded in the bitstream.

[0011] Some encoding embodiments further comprise subtracting the prediction of the UV coordinate from an input UV coordinate to obtain a difference, and encoding the difference in a bitstream.

[0012] Some decoding embodiments further comprise obtaining a UV difference from a bitstream and adding the UV difference to the prediction of the UV coordinate to obtain a reconstructed UV coordinate.

[0013] In some embodiments the encoder or decoder is an edgebreaker encoder or decoder.

[0014] In some embodiments, the encoder or decoder is a forward mesh encoder or decoder.

[0015] In some embodiments, the encoder or decoder is a reverse mesh encoder or decoder.

[0016] An apparatus according to some embodiments comprises one or more processors, the apparatus being configured to perform any of the methods described herein.

[0017] An apparatus according to some embodiments comprises at least one processor and a computer-readable medium storing instructions for performing any of the methods described herein.

[0018] A computer-readable medium according to some embodiments store instructions for performing any of the methods described herein.

[0019] A computer-readable medium according to some embodiments stores a mesh encoded according to any of the methods described herein.

[0020] A signal according to some embodiments conveys a mesh encoded according to any of the methods described herein.BRIEF DESCRIPTION OF THE DRAWINGS

[0021] FIG. 1 is a functional block diagram illustrating an MPEG test model (TM) Intra frame encoding process.

[0022] FIG. 2 is a functional block diagram illustrating an MPEG test model Intra frame decoding process.

[0023] FIG. 3 is a flow chart illustrating an example codec using the spirale reversi implementation of edgebreaker.

[0024] FIG. 4 illustrates a first portion of the predictUV method from the TMv6 decoder.

[0025] FIG. 5 illustrates a second portion of the predictUV method from the TMv6 decoder.

[0026] FIG. 6 illustrates an excerpt of a portion of the code in TMv6 where the predictUV method is invoked.

[0027] FIG. 7 illustrates a predictUV method for use in a reverse codec according to some embodiments. In this example, min stretch is used and can be invoked several times, e.g. once for each neighboring corner.

[0028] FIG. 8 illustrates an excerpt of the procedure uvDecodeWithPrediction which invokes predictUV several times for the prediction of a corner.

[0029] FIG. 9 illustrates a procedure predictUV for UV prediction performed in a reverse encoder system according to an example embodiment.

[0030] FIG. 10 illustrates a procedure predictUV for UV prediction performed in a reverse decoder system according to an example embodiment.

[0031] FIG. 11 illustrates the use of the procedure predictUV in reverse decoding in the uvDecodeWithPrediction procedure according to an example embodiment.

[0032] FIG. 12 illustrates a procedure predictUV for uv prediction performed in a forward encoder system according to an example embodiment.

[0033] FIG. 13 illustrates a procedure predictUV for uv prediction performed in a forward decoder system according to an example embodiment.

[0034] FIG. 14 illustrates the use of the procedure predictUV in forward decoding in the uvDecodeWithPrediction procedure according to an example embodiment.

[0035] FIGs. 15A-15B is a table showing example results over the first two frames of V- DMC CTC of TMv6.0 forward plus a UV optimization as described herein, versus the TMv6.0 forward version, for the CO condition.

[0036] FIG. 16A-16D show example results over the first two frames of V-DMC CTC of TMv6.0 forward plus a UV optimization as described herein, versus the TMv6.0 forward version. FIGs. 16A-16B illustrate the results of the C1 lossy Al condition. FIGs. 16C-16D illustrates the results of the C2 lossy RA condition.

[0037] FIGs. 17A-17B shows example results over the first two frames of V-DMC CTC of a reverse codec plus a UV optimization as described herein, versus results from the reverse codec without such an optimization, with and without the UV extension described herein, for the CO condition.

[0038] FIGs. 18A-18D show example results over the first two frames of V-DMC CTC of a reverse codec plus a UV optimization as described herein, versus results from the reverse codec without such an optimization. FIGs. 18A-18B illustrates results of C1 lossy Al. FIGs. 18C-18D illustrates results on C2 lossy RA.

[0039] FIGs. 19A-19B provide a flow chart describing the predictUV procedure for the case of the reverse decoder.

[0040] FIGs. 20A-20B provide a flow chart describing the predictUV procedure for the case of the reverse encoder.

[0041] FIG. 21 is a block diagram of an example of a system in which various aspects and embodiments are implemented.DETAILED DESCRIPTIONOverview of Mesh Coding

[0042] FIG. 1 is a schematic block diagram of a mesh encoding process in which some embodiments may be implemented. A source mesh model 302 is provided as an input mesh M(i) to the mesh encoding process. The source mesh model 302 is associated with a source texture map 304 that is proved as an input texture map A(i) to the encoding process. The input mesh is decimated at 306 to generate a base mesh m(i) with a reduced number of vertices, and a UV atlas is generated for the base mesh AT 308. The base mesh is quantized at 310 and encoded at 312, with the compressed base mesh data being multiplexed at 314 into a dynamic mesh bitstream. The compressed base mesh data is reconstructed at the encoder to generate reconstructed base mesh m’(i) with a static mesh decoder 316. The reconstructed base mesh is subdivided at 318 by adding new vertices. A subdivision surface fitting process is performed at 320 by comparing the subdivided base mesh with the input mesh M(i) to determine a set of displacements d(i) that deform the vertices of the subdivided base mesh to correspond more closely to the surfaces defined by the input mesh M(i). These displacements may be updated at 322 into updated displacements d’(i) based on difference between the original base mesh m(i) and the reconstructed base mesh m’(i). These updated displacements are encoded using a wavelet transform 324 that generates wavelet coefficients e’(i), which are quantized at 326 and packed at 328 into an image format. A time-varying series of images representing the wavelet coefficients may be encoded at 330 using conventional video encoding techniques, and the encoded video may be multiplexed at 314 with the data representing the compressed base mesh. At the encoder, the displacements are reconstructed from the encoded video through image unpacking 328, inverse quantization 330, and inverse wavelet transform 332 to generate a reconstructed set of displacements d”(i). A reconstructed base mesh M”(i) is obtained through inverse quantization at 334 of the reconstructed quantized base mesh m’(i), and the reconstructed base mesh M”(i) is subdivided at 336. A reconstructed deformed mesh DM(i) is generated at 338 by applying the reconstructed set of displacements d”(i) to the reconstructed base mesh m’(i). Thereconstructed deformed mesh DM(i) is used as a destination mesh model 340 for the purpose of attribute transfer.

[0043] Using the reconstructed deformed mesh DM(i) (destination mesh model 340), the input mesh M(i) (source mesh model 302), and the input texture map A(i) (source texture map 304), an attribute transfer process is performed to provide attribute values for a destination texture map A’(i) that is associated with the reconstructed deformed mesh DM(i). Pixels in the texture map A’(i) that are not associated with any triangle of the reconstructed deformed mesh DM(i) may be filled using a padding process 342. A color space conversion 344 may be performed, a time-varying series of texture maps A’(i) may be encoded using conventional video encoding techniques 346, and the encoded video may be multiplexed at 314 into a bitstream 350 with the data representing the displacements and the compressed base mesh. Patch information 348 may also be multiplexed in the bitstream.

[0044] FIG. 2 illustrates an example of a mesh decoder. The mesh decoder demultiplexes different sub-bitstreams from, e.g. a V3C bitstream. The sub-bitstreams may include a subbitstream representing a static mesh, a sub-bitstream representing displacements, and one or more sub-bitstreams representing attributes. In the illustration of FIG. 2, the displacements sub-bitstream is illustrated as being decoded with a video decoder, but as discussed in greater detail below, different decoder configurations may be used depending on parameters received in the bitstream. For example, the decoder may be configured to use an arithmetic decoder in place of a video decoder for the coding of the displacements. In addition, where video coding is used, different decoder configurations may use different video codecs (such as AVC, HEVC, WC, and the like).

[0045] FIG. 3 is a flow chart illustrating an example codec using the spirale reversi implementation of edgebreaker. The top row is the encoding line, and the bottom row is the decoding line.

[0046] As illustrated in FIG. 3, an example edgebreaker encoder performs pre-processing 102 of a mesh, e.g. to accommodate non-manifold surfaces or to quantize attributes. At 104, the encoder performs connectivity coding using edgebreaker to generate a CLERS table representing the connectivity. At 106, the encoder performs prediction of attributes of the mesh. The prediction may proceed in a topology-based order determined by the edgebreaker encoding. Alternatively, the prediction may proceed using a different order, such as a depth-first traversal or a vertex-degree-based traversal. At 108, the alternate traversal is performed. The encoder may signal in the bitstream information indicating whichtype of traversal is used for attribute prediction. The encoder may test different traversal types (e.g. a topology-based traversal type and one or more alternative traversal types) and encode the mesh using whichever traversal type provides the best performance (e.g. the greatest compression). At 110, entropy coding is performed of the CLERS table, of other information (e.g. handle information) about the topology of the mesh, and / or of the attribute residuals. A bitstream including this entropy encoded information may be stored for later use or may be transmitted to an encoder without intermediate storage.

[0047] At 112, a decoder performs entropy decoding on a received bitstream, including entropy decoding as appropriate of a CLERS table, handle information, and / or attribute residual information. At 114, the decoder uses the CLERS table and related information to reconstruct the topology or connectivity of the mesh. At 116, the decoder performs attribute prediction and corrections using the appropriate traversal type corresponding to the traversal type used by the encoder (which may be signaled in the bitstream). Where the traversal type is an alternative traversal type, the decoder performs the appropriate alternative traversal at 118. Where the traversal type is based on the topology of the mesh as reconstructed in 114, an alternative traversal is not needed. At 120, post-processing is performed, e.g. to recreate manifold structures, dequantize attributes, and perform postindexing.

[0048] In TMv6.0 an extension of an edgebreaker codec was proposed to perform the prediction of uv coordinates using multiple stretch but reducing the need for an orientation bit in some cases by testing opposite corners. In addition, the processing was only performed for the first prediction stretch and other predictions around the corner were using length selector from the first prediction stretch. See FIGs. 4-6. An alternative implementation, developed by the present inventors, uses some multiple stretch without orientation optimization using opposites, see FIGs. 7-8, providing improved results.

[0049] FIG. 3 illustrates an overview of a reverse edgebreaker mesh codec. The top row is the encoding line, and the bottom row is the decoding line.

[0050] Example embodiments provide a more efficient solution to predict uv coordinates in both forward and reverse versions of edgebreaker.

[0051] In example embodiments, a stretch is performed, and an orientation test is conditioned by the existence of a UV seam, for each of the neighbor triangles. Such embodiments provide better coding results than a mixed version that uses one stretch plus orientation test for the first neighbor triangle and some length selector for the other neighbors.

[0052] Example commented source code for the different functional blocks is provided below. Example modifications to the V3C syntax are further provided below.

[0053] Example embodiments can be implemented both with a forward edgebreaker codec and a reverse edgebreaker codec.

[0054] In example embodiments, the procedure predictUV performs the opposite test for each call of the procedure if the opposite is not over a UV seam (and the handling of dummy points is simplified for the forward mode). Example embodiments do not use length test from first prediction anymore but rather use the high-quality prediction and systematically use the test of the opposite.

[0055] FIGs. 19A-19B provide a flow chart describing the predictUV procedure for the case of the reverse decoder. FIGs. 19A-19B illustrate the procedure of FIG. 10 in a flow chart version. FIGs. 20A-20B provide a flow chart describing the predictUV procedure for the case of the reverse encoder. FIGs. 20A-20B illustrate the procedure of FIG. 9 in a flow chart version. Note that only the blocks labeled A and A’ are different between the two flow charts.

[0056] In example embodiments, the procedures predictUV for the forward mode are analogous to the ones of the reverse mode previously presented, only few changes are operated on the TMv6 forward version. The TMv6 version did not check if opposite was over a uv seam. This is done by testing the OTC table when the attribute uses an auxiliary UV index (if no auxiliary index table is used, there is no seam notion).

[0057] In an example embodiment, the reverse version includes the following code: const bool hasSeparatellvIndex = 0TC . size( ) ! = 0 const bool onSeam = (hasSeparatellvIndex ? (0TC [c ] == -2) : false) const bool checkOpposite = ( l onSeam && O[c] >= 0 && TC [0[c ] ] >= 0 && MV[TC [0[c ] ] ] > 0)

[0058] In an example embodiment, the forward version includes the following code: const bool hasSeparatellvIndex = 0TC . size( ) ! = 0 const bool onSeam = (hasSeparatellvIndex ? (0TC [c ] ! = -4) : false) const bool checkOpposite = O[c ] >= 0 && IDX[0[c ] ] >= 0 && ( (hasSeparatellvIndex && l onSeam && MC [ IDX[0[c ] ] ] > 0) | | ( ! hasSeparatellvIndex && M[ IDX[0[c ] ] ] && ! D[ IDX[0[c ] ] ] )) J

[0059] The source code illustrated herein is a (sometime simplified) C++ code. In the example code: std : : and glm : : are prefixes that can be ignored for the pseudocode. dvec2 are mathematical 2D vectors of C / C++ double values (64bits floating point) vec2 are mathematical 2D vectors of C / C++ float values (32bits floating point). dot(ujv) returns mathematical dot product of vectors u and v sqrt returns mathematical square root of the parameter round returns mathematical rounding to nearest integer of the parameter std : : vector<float> name is an array of floats named name, float could be replaced another type such as vec2j then the following methods would all operate on vec2 values instead of floats. name[i] dereferences the array name at index i name . push_back(v) adds a new element of value v at the end of the array name by increasing its size of 1 element. name . reserve(n) reserves some memory for the vector name but its effective number of elements name . size( ) is not changed. Such a memory pre-allocation prevents multiple memory realocations on multiple calls to name. push_back( ) . name . assign(nJv) resizes the array name to contain n elements and set all the values to v. v is optional, default value is used if not provided name . resize(nj v) resizes the array name to contain n elements and set the new values to v. Existing values are left unchanged, v is optional, default value is used if not provided.

[0060] FIG. 4 illustrates a first portion of the predictUV method from the TMv6 decoder. FIG. 5 illustrates a second portion of the predictUV method from the TMv6 decoder.

[0061] FIG. 6 illustrates an excerpt of a portion of the code in TMv6 where the predictUV method is invoked. This portion of the code illustrates how the first uv is taken into account using the variable first.

[0062] FIG. 7 illustrates a predictUV method for use in a reverse codec according to some embodiments. In this example, min stretch is used and can be invoked several times, e.g. once for each neighboring corner.

[0063] FIG. 8 illustrates an excerpt of the procedure uvDecodeWithPrediction which invokes predictUV several times for the prediction of a corner.

[0064] Some embodiments are implemented in a codec capable of reverse encoding and decoding. In some such embodiments, the codec is further capable of forward encoding and decoding, for example using some or all of the TMv6 forward version.

[0065] FIG. 9 illustrates a procedure predictUV for uv prediction performed in a reverse encoder system according to an example embodiment.

[0066] FIG. 10 illustrates a procedure predictUV for uv prediction performed in a reverse decoder system according to an example embodiment.

[0067] FIG. 11 illustrates the use of the procedure predictUV in reverse decoding in the uvDecodeWithPrediction procedure according to an example embodiment.

[0068] FIG. 12 illustrates a procedure predictUV for uv prediction performed in a forward encoder system according to an example embodiment.

[0069] FIG. 13 illustrates a procedure predictUV for uv prediction performed in a forward decoder system according to an example embodiment.

[0070] FIG. 14 illustrates the use of the procedure predictUV in forward decoding in the uvDecodeWithPrediction procedure according to an example embodiment.

[0071] Example encoding and decoding embodiments provide a more efficient way to compute min stretch in mesh coding (e.g. V-DMC) with economy of orientation bit encoding if not necessary. The overall algorithm is simpler and some coding gains are visible for most cases.

[0072] FIGs. 15A-15B and FIGs. 16A-16D show example results over the first two frames of V-DMC CTC of TMv6.0 forward plus a UV optimization as described herein, versus the TMv6.0 forward version. FIGs. 15A-15B illustrate the CO condition. FIGs. 16A-16B illustrate the results of the C1 lossy Al condition. FIGs. 16C-16D illustrate the results of the C2 lossy RA condition.

[0073] FIGs. 17A-17B and FIGs. 18A-18D show example results over the first two frames of V-DMC CTC of a reverse codec plus a UV optimization as described herein, versus results from the reverse codec without such an optimization. FIGs. 17A-17B show resultsfor the first two frames of -DMC CTC, reverse with and without the UV extension described herein, for the CO condition. FIGs. 18A-18D illustrate results for the first two frames of V- DMC CTC, reverse with and without our UV extension. FIGs. 18A-18B illustrate results of C1 lossy Al. FIGs. 18C-18D illustrate results on C2 lossy RA.Example system hardware.

[0074] Example embodiments of encoders and / or decoders (collectively coders) configured to implement embodiments described herein may be implemented using systems such as the system of FIG. 21. FIG. 21 is a block diagram of an example of a system in which various aspects and embodiments are implemented. System 1000 can be embodied as a device including the various components described below and is configured to perform one or more of the aspects described in this document. Examples of such devices, include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system 1000, singly or in combination, can be embodied in a single integrated circuit (IC), multiple ICs, and / or discrete components. For example, in at least one embodiment, the processing and encoder / decoder elements of system 1000 are distributed across multiple ICs and / or discrete components. In various embodiments, the system 1000 is communicatively coupled to one or more other systems, or other electronic devices, via, for example, a communications bus or through dedicated input and / or output ports. In various embodiments, the system 1000 is configured to implement one or more of the aspects described in this document.

[0075] The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein for implementing, for example, the various aspects described in this document. Processor 1010 can include embedded memory, input output interface, and various other circuitries as known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device, and / or a non-volatile memory device). System 1000 includes a storage device 1040, which can include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and / or optical disk drive. The storage device 1040 can include an internal storage device, an attached storagedevice (including detachable and non-detachable storage devices), and / or a network accessible storage device, as non-limiting examples.

[0076] System 1000 includes an encoder / decoder module 1030 configured, for example, to process data to provide an encoded video or decoded video, and the encoder / decoder module 1030 can include its own processor and memory. The encoder / decoder module 1030 represents module(s) that can be included in a device to perform the encoding and / or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, encoder / decoder module 1030 can be implemented as a separate element of system 1000 or can be incorporated within processor 1010 as a combination of hardware and software as known to those skilled in the art.

[0077] Program code to be loaded onto processor 1010 or encoder / decoder 1030 to perform the various aspects described in this document can be stored in storage device 1040 and subsequently loaded onto memory 1020 for execution by processor 1010. In accordance with various embodiments, one or more of processor 1010, memory 1020, storage device 1040, and encoder / decoder module 1030 can store one or more of various items during the performance of the processes described in this document. Such stored items can include, but are not limited to, the input video, the decoded video or portions of the decoded video, the bitstream, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.

[0078] In some embodiments, memory inside of the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions and to provide working memory for processing that is needed during encoding or decoding. In other embodiments, however, a memory external to the processing device (for example, the processing device can be either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory can be the memory 1020 and / or the storage device 1040, for example, a dynamic volatile memory and / or a non-volatile flash memory. In several embodiments, an external non-volatile flash memory is used to store the operating system of, for example, a television. In at least one embodiment, a fast external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations, such as for MPEG-2 (MPEG refers to the Moving Picture Experts Group, MPEG-2 is also referred to as ISO / IEC 13818, and 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or WC (Versatile Video Coding, a new standard being developed by JVET, the Joint Video Experts Team).

[0079] The input to the elements of system 1000 can be provided through various input devices as indicated in block 1130. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion that receives an RF signal transmitted, for example, over the air by a broadcaster, (ii) a Component (COMP) input terminal (or a set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and / or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples, not shown in FIG. 1C, include composite video.

[0080] In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal, or band-limiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) band-limiting again to a narrower band of frequencies to select (for example) a signal frequency band which can be referred to as a channel in certain embodiments, (iv) demodulating the downconverted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select the desired stream of data packets. The RF portion of various embodiments includes one or more elements to perform these functions, for example, frequency selectors, signal selectors, band-limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner that performs various of these functions, including, for example, downconverting the received signal to a lower frequency (for example, an intermediate frequency or a near-baseband frequency) or to baseband. In one set-top box embodiment, the RF portion and its associated input processing element receives an RF signal transmitted over a wired (for example, cable) medium, and performs frequency selection by filtering, downconverting, and filtering again to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements performing similar or different functions. Adding elements can include inserting elements in between existing elements, such as, for example, inserting amplifiers and an analog-to-digital converter. In various embodiments, the RF portion includes an antenna.

[0081] Additionally, the USB and / or HDMI terminals can include respective interface processors for connecting system 1000 to other electronic devices across USB and / or HDMI connections. It is to be understood that various aspects of input processing, for example, Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within processor 1010 as necessary. Similarly, aspects of USB or HDMI interface processing can be implemented within separate interface ICs orwithin processor 1010 as necessary. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor 1010, and encoder / decoder 1030 operating in combination with the memory and storage elements to process the datastream as necessary for presentation on an output device.

[0082] Various elements of system 1000 can be provided within an integrated housing, Within the integrated housing, the various elements can be interconnected and transmit data therebetween using suitable connection arrangement 1140, for example, an internal bus as known in the art, including the I nter-IC (I2C) bus, wiring, and printed circuit boards.

[0083] The system 1000 includes communication interface 1050 that enables communication with other devices via communication channel 1060. The communication interface 1050 can include, but is not limited to, a transceiver configured to transmit and to receive data over communication channel 1060. The communication interface 1050 can include, but is not limited to, a modem or network card and the communication channel 1060 can be implemented, for example, within a wired and / or a wireless medium.

[0084] Data is streamed, or otherwise provided, to the system 1000, in various embodiments, using a wireless network such as a Wi-Fi network, for example IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal of these embodiments is received over the communications channel 1060 and the communications interface 1050 which are adapted for Wi-Fi communications. The communications channel 1060 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet for allowing streaming applications and other over-the-top communications. Other embodiments provide streamed data to the system 1000 using a set-top box that delivers the data over the HDMI connection of the input block 1130. Still other embodiments provide streamed data to the system 1000 using the RF connection of the input block 1130. As indicated above, various embodiments provide data in a non-streaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, for example a cellular network or a Bluetooth network.

[0085] The system 1000 can provide an output signal to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes one or more of, for example, a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a cell phone (mobile phone), or other device. The display 1100 can also be integrated with other components (for example, as ina smart phone), or separate (for example, an external monitor for a laptop). The other peripheral devices 1120 include, in various examples of embodiments, one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disk player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide a function based on the output of the system 1000. For example, a disk player performs the function of playing the output of the system 1000.

[0086] In various embodiments, control signals are communicated between the system 1000 and the display 1100, speakers 1110, or other peripheral devices 1120 using signaling such as AV.Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to system 1000 using the communications channel 1060 via the communications interface 1050. The display 1100 and speakers 1110 can be integrated in a single unit with the other components of system 1000 in an electronic device such as, for example, a television. In various embodiments, the display interface 1070 includes a display driver, such as, for example, a timing controller (T Con) chip.

[0087] The display 1100 and speaker 1110 can alternatively be separate from one or more of the other components, for example, if the RF portion of input 1130 is part of a separate set-top box. In various embodiments in which the display 1100 and speakers 1110 are external components, the output signal can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.

[0088] The embodiments can be carried out by computer software implemented by the processor 1010 or by hardware, or by a combination of hardware and software. As a nonlimiting example, the embodiments can be implemented by one or more integrated circuits. The memory 1020 can be of any type appropriate to the technical environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory, as non-limiting examples. The processor 1010 can be of any type appropriate to the technical environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.Additional embodiments.

[0089] A mesh encoding method according to some embodiments comprises: encoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination ofwhetherto use the at least one opposite corner forthe prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

[0090] A mesh decoding method according to some embodiments comprises: decoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination ofwhetherto use the at least one opposite corner forthe prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

[0091] Some embodiments include, in response to a determination that at least one of the opposite corners is beyond a UV seam from the current corner, performing an orientation test.

[0092] In some embodiments, an orientation bit is not encoded in the bitstream.

[0093] Some encoding embodiments further comprise subtracting the prediction of the UV coordinate from an input UV coordinate to obtain a difference, and encoding the difference in a bitstream.

[0094] Some decoding embodiments further comprise obtaining a UV difference from a bitstream and adding the UV difference to the prediction of the UV coordinate to obtain a reconstructed UV coordinate.

[0095] In some embodiments the encoder or decoder is an edgebreaker encoder or decoder.

[0096] In some embodiments, the encoder or decoder is a forward mesh encoder or decoder.

[0097] In some embodiments, the encoder or decoder is a reverse mesh encoder or decoder.

[0098] An apparatus according to some embodiments comprises one or more processors, the apparatus being configured to perform any of the methods described herein.

[0099] An apparatus according to some embodiments comprises at least one processor and a computer-readable medium storing instructions for performing any of the methods described herein.

[0100] A computer-readable medium according to some embodiments store instructions for performing any of the methods described herein.

[0101] A computer-readable medium according to some embodiments stores a mesh encoded according to any of the methods described herein.

[0102] A signal according to some embodiments conveys a mesh encoded according to any of the methods described herein.

[0103] This disclosure describes a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes of clarity in description, and does not limit the disclosure or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.

[0104] The aspects described and contemplated in this disclosure can be implemented in many different forms. While some embodiments are illustrated specifically, other embodiments are contemplated, and the discussion of particular embodiments does not limit the breadth of the implementations. At least one of the aspects generally relates to mesh encoding and decoding, and at least one other aspect generally relates to transmitting a bitstream generated or encoded. These and other aspects can be implemented as a method, an apparatus, a computer readable storage medium having stored thereon instructions for encoding or decoding mesh data according to any of the methods described, and / or a computer readable storage medium having stored thereon a bitstream generated according to any of the methods described.

[0105] Various methods are described herein, and each of the methods comprises one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined. Additionally, terms such as “first”, “second”, etc. may be used in various embodiments to modify an element, component, step,operation, etc., such as, for example, a “first decoding” and a “second decoding”. Use of such terms does not imply an ordering to the modified operations unless specifically required. So, in this example, the first decoding need not be performed before the second decoding, and may occur, for example, before, during, or in an overlapping time period with the second decoding.

[0106] Various numeric values may be used in the present disclosure, for example. The specific values are for example purposes and the aspects described are not limited to these specific values.

[0107] Embodiments described herein may be carried out by computer software implemented by a processor or other hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments can be implemented by one or more integrated circuits. The processor can be of any type appropriate to the technical environment and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.

[0108] When a figure is presented as a flow diagram, it should be understood that it also provides a block diagram of a corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow diagram of a corresponding method / process.

[0109] The implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (for example, discussed only as a method), the implementation of features discussed can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, cell phones, portable / personal digital assistants (“PDAs”), and other devices that facilitate communication of information between end-users.

[0110] Reference to “one embodiment” or “an embodiment” or “one implementation” or “an implementation”, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase “in oneembodiment” or “in an embodiment” or “in one implementation” or “in an implementation”, as well any other variations, appearing in various places throughout this disclosure are not necessarily all referring to the same embodiment.

[0111] Additionally, this disclosure may refer to “determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.

[0112] Further, this disclosure may refer to “accessing” various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.

[0113] Additionally, this disclosure may refer to “receiving” various pieces of information. Receiving is, as with “accessing”, intended to be a broad term. Receiving the information can include one or more of, for example, accessing the information, or retrieving the information (for example, from memory). Further, “receiving” is typically involved, in one way or another, during operations such as, for example, storing the information, processing the information, transmitting the information, moving the information, copying the information, erasing the information, calculating the information, determining the information, predicting the information, or estimating the information.

[0114] It is to be appreciated that the use of any of the following 7”, “and / or”, and “at least one of’, for example, in the cases of “A / B”, “A and / or B” and “at least one of A and B”, is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of “A, B, and / or C” and “at least one of A, B, and C”, such phrasing is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B) only, or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended for as many items as are listed.

[0115] Also, as used herein, the word “signal” refers to, among other things, indicating something to a corresponding decoder. For example, in certain embodiments the encoder signals a particular one of a plurality of parameters for region-based filter parameterselection for de-artifact filtering. In this way, in an embodiment the same parameter is used at both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter as well as others, then signaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functions, a bit savings is realized in various embodiments. It is to be appreciated that signaling can be accomplished in a variety of ways. For example, one or more syntax elements, flags, and so forth are used to signal information to a corresponding decoder in various embodiments. While the preceding relates to the verb form of the word “signal”, the word “signal” can also be used herein as a noun.

[0116] Implementations can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method, or data produced by one of the described implementations. For example, a signal can be formatted to carry the bitstream of a described embodiment. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or as a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.

[0117] We describe a number of embodiments. Features of these embodiments can be provided alone or in any combination, across various claim categories and types. Further, embodiments can include one or more of the following features, devices, or aspects, alone or in any combination, across various claim categories and types:

[0118] A bitstream or signal that includes one or more of the described syntax elements, or variations thereof.

[0119] A bitstream or signal that includes syntax conveying information generated according to any of the embodiments described.

[0120] Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal that includes one or more of the described syntax elements, or variations thereof.

[0121] Creating and / or transmitting and / or receiving and / or decoding according to any of the embodiments described.

[0122] A method, process, apparatus, medium storing instructions, medium storing data, or signal according to any of the embodiments described.

[0123] Note that various hardware elements of one or more of the described embodiments are referred to as “modules” that carry out (i.e., perform, execute, and the like) various functions that are described herein in connection with the respective modules. As used herein, a module includes hardware (e.g., one or more processors, one or more microprocessors, one or more microcontrollers, one or more microchips, one or more application-specific integrated circuits (ASICs), one or more field programmable gate arrays (FPGAs), one or more memory devices) deemed suitable for a given implementation. Each described module may also include instructions executable for carrying out the one or more functions described as being carried out by the respective module, and it is noted that those instructions could take the form of or include hardware (i.e., hardwired) instructions, firmware instructions, software instructions, and / or the like, and may be stored in any suitable non-transitory computer-readable medium or media, such as commonly referred to as RAM, ROM, etc.

[0124] Although features and elements are described above in particular combinations, each feature or element can be used alone or in any combination with the other features and elements. In addition, the methods described herein may be implemented in a computer program, software, or firmware incorporated in a computer-readable medium for execution by a computer or processor. Examples of computer-readable storage media include, but are not limited to, a read only memory (ROM), a random access memory (RAM), a register, cache memory, semiconductor memory devices, magnetic media such as internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks, and digital versatile disks (DVDs). A processor in association with software may be used to implement a radio frequency transceiver for use in a WTRU, UE, terminal, base station, RNC, or any host computer.

Claims

CLAIMS1. A mesh encoding method comprising: encoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination of whether to use the at least one opposite corner for the prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

2. A mesh encoding apparatus comprising one or more processors configured to perform at least: encoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination of whether to use the at least one opposite corner for the prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

3. The method of claim 1 or the apparatus of claim 2, further comprising, in response to a determination that at least one of the opposite corners is beyond a UV seam from the current corner, performing an orientation test.

4. The method of claim 1 or claim 3 as it depends from claim 1 , or the apparatus of claim 2, or claim 3 as it depends from claim 2, further comprising determining whether to encode an orientation bit in the bitstream, wherein the determination of whether to encode the orientation bit is based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

5. The method of claim 1 or claims 3-4 as they depend from claim 1 , or the apparatus of claim 2 or claims 3-4 as they depend from claim 2, further comprising subtracting theprediction of the UV coordinate from an input UV coordinate to obtain a difference, and encoding the difference in a bitstream.

6. The method of claim 1 or claims 3-5 as they depend from claim 1 , or the apparatus of claim 2 or claims 3-5 as they depend from claim 2, wherein the encoder is an edgebreaker encoder.

7. The method of claim 1 or claims 3-6 as they depend from claim 1 , or the apparatus of claim 2 or claims 3-6 as they depend from claim 2, wherein the encoder is a reverse mesh encoder.

8. A mesh decoding method comprising: decoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination of whether to use the at least one opposite corner for the prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

9. A mesh decoding apparatus comprising one or more processors configured to perform at least: decoding a geometry of a triangular mesh, the triangular mesh comprising a plurality of corners; for at least one current corner of the triangular mesh, determining a prediction of a UV coordinate associated with the current corner based on a set of respective UV coordinates associated with at least one corner opposite the current corner; wherein for at least one of the opposite corners, a determination of whether to use the at least one opposite corner for the prediction is made based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

10. The method of claim 8 or the apparatus of claim 9, further comprising, in response to a determination that at least one of the opposite corners is beyond a UV seam from the current corner, performing an orientation test.11 . The method of claim 8 or claim 10 as it depends from claim 8, or the apparatus of claim 9 or claim 10 as it depends from claim 9, further comprising determining whether to read an orientation bit from the bitstream, wherein the determination of whether to read the orientation bit is based at least in part on whether the opposite corner is beyond a UV seam from the current corner.

12. The method of claim 8 or claims 10-11 as they depend from claim 8, or the apparatus of claim 9 or claims 10-11 as they depend from claim 9, further comprising obtaining a UV difference from a bitstream and adding the UV difference to the prediction of the UV coordinate to obtain a reconstructed UV coordinate.

13. The method of claim 8 or claims 10-12 as they depend from claim 8, or the apparatus of claim 9 or claims 10-12 as they depend from claim 9, wherein the decoder is an edgebreaker decoder.

14. The method of claim 8 or claims 10-13 as they depend from claim 8, or the apparatus of claim 9 or claims 10-13 as they depend from claim 9, wherein the decoder is a forward mesh decoder.

15. The method of claim 8 or claims 10-14 as they depend from claim 8, or the apparatus of claim 9 or claims 10-14 as they depend from claim 9, wherein the decoder is a reverse mesh decoder.

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