Interleaver using parameters

Abstract

Various aspects of the present disclosure relate to an interleaver using parameters. A device stores multiple sets of one or more interleaver parameters. The one or more interleaver parameters can include, for example, precomputed interleaver indices, an interleaver pattern, a code rate, a block size, an interleaver depth, or combination thereof. The Ambient IoT device can select one of the sets of one or more interleaver patterns, such as based on a strength of a power signal and transmit an indication of the selected set to a reader device. Additionally, or alternatively, the reader device can transmit an indication to the Ambient IoT of which of the multiple set of one or more interleaver parameters to use.

Description

INTERLEAVER USING PARAMETERSRELATED APPLICATION

[0001] This application claims priority to U.S. Patent Application Serial No. 63 / 554,534 filed February 16, 2024 entitled “INTERLEAVER USING STORED PARAMETERS,” the disclosure of which is incorporated by reference herein in its entirety.TECHNICAL FIELD

[0002] The present disclosure relates to wireless communications, and more specifically to an interleaver using parameters.BACKGROUND

[0003] A wireless communications system may include one or multiple network communication devices, which may be otherwise known as network equipment (NE), supporting wireless communications for one or multiple user communication devices, which may be otherwise known as user equipment (UE), or other suitable terminology. The wireless communications system may support wireless communications with one or multiple user communication devices by utilizing resources of the wireless communication system (e.g., time resources (e.g., symbols, slots, subframes, frames, or the like) or frequency resources (e.g., subcarriers, carriers, or the like)). Additionally, the wireless communications system may support wireless communications across various radio access technologies including third generation (3G) radio access technology, fourth generation (4G) radio access technology, fifth generation (5G) radio access technology, among other suitable radio access technologies beyond 5G (e.g., sixth generation (6G)).SUMMARY

[0004] An article “a” before an element is unrestricted and understood to refer to “at least one” of those elements or “one or more” of those elements. The terms “a,” “at least one,” “one or more,” and “at least one of one or more” may be interchangeable. As used herein, including in the claims, “or” as used in a list of items (e.g., a list of items prefaced by a phrase such as “at least one of’ or “one or more of’ or “one or both of’) indicates an inclusive list such that, for example, a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Byway of another example, a list of at least one of A; B; or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Also, as used herein, the phrase “based on” shall not be construed as a reference to a closed set of conditions. For example, an example step that is described as “based on condition A” may be based on both a condition A and a condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase “based on” shall be construed in the same manner as the phrase “based at least in part on”. Further, as used herein, including in the claims, a “set” may include one or more elements.

[0005] An apparatus (e.g., a UE or Ambient Internet of Things (A-IoT) device) for wireless communication is described. The apparatus may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the apparatus may be configured to, capable of, or operable to obtain a set of multiple bits; retrieve one or more interleaver parameters stored in the at least one memory; generate, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; map the set of multiple interleaved bits to a set of binary modulated symbols; and transmit the set of binary modulated symbols.

[0006] A processor (e.g., a standalone processor chipset, or a component of a UE or of an A-IoT device) for wireless communication is described. The processor may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the processor may be configured to, capable of, or operable to obtain a set of multiple bits; retrieve one or more interleaver parameters stored in the at least one memory; generate, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; map the set of multiple interleaved bits to a set of binary modulated symbols; and transmit the set of binary modulated symbols.

[0007] A method performed or performable by an apparatus (e.g., a UE or A-IoT device) for wireless communication is described. The method may include obtaining a set of multiple bits; retrieving one or more interleaver parameters stored in at least one memory of the apparatus; generating, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; mapping the set of multiple interleaved bits to a set of binary modulated symbols; and transmitting the set of binary modulated symbols.

[0008] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to transmit the set of binary modulated symbols via an uplink (UL) transmission or backscattered transmission.

[0009] In some implementations of the apparatus, processor, and method described herein, multiple sets of one or more interleaver parameters are stored in the at least one memory.

[0010] In some implementations of the apparatus, processor, and method described herein, the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth.

[0011] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to receive an identifier of one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits.

[0012] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to determine, based on a strength of an incident power signal, one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits.

[0013] In some implementations of the apparatus, processor, and method described herein, each set of the multiple sets of one or more interleaver parameters is stored in a different portion of a data structure in the at least one memory.

[0014] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to transmit an identifier of one of the multiple sets of one or more interleaver parameters that the apparatus used to generate the set of multiple interleaved bits.

[0015] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to transmit the identifier in a control message.

[0016] In some implementations of the apparatus, processor, and method described herein, the set of multiple bits has a larger block size than a block size of any of the multiple sets of one or more interleaver parameters, and the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to: segment the set of multiple bits into multiple segments of bits; select, for each of the multiple segments of bits, one of the multiple sets of one or more interleaver parameters; generate, for each of the multiple segments of bits, a subset of multiple interleaved bits based at least in part on the selected one of the multiple sets of one or more interleaver parameters; and concatenate the generated subsets of multiple interleaved bits.

[0017] In some implementations of the apparatus, processor, and method described herein, the set of multiple bits has a smaller block size than a block size of any of the multiple sets of one or more interleaver parameters, and the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to: generate an augmented set of bits by adding one or more filler bits to the set of multiple bits; and generate, based on the one or more interleaver parameters and the augmented set of bits, the set of multiple interleaved bits.

[0018] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to obtain the set of multiple bits from at least one of a Manchester encoder or a Miller encoder.

[0019] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to map the set of multiple interleaved bits to a set of binary modulated symbols using at least one of amplitude-shift keying (ASK), frequency-shift keying (FSK), or phase-shift keying (PSK).

[0020] In some implementations of the apparatus, processor, and method described herein, the apparatus comprises an A-IoT device.

[0021] In some implementations of the apparatus, processor, and method described herein, the apparatus comprises a passive device or semi-passive device using a backscattering transmission technique.

[0022] In some implementations of the apparatus, processor, and method described herein, the apparatus comprises an active device that generates and amplifies a signal internally.

[0023] An NE (e.g., a base station) for wireless communication is described. The NE may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the NE may be configured to, capable of, or operable to at least one of transmit a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receive a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receive a set of binary modulated symbols; map the set of binary modulated symbols to a set of multiple interleaved bits; generate, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and decode the set of multiple bits.

[0024] A processor (e.g., a standalone processor chipset, or a component of a NE (e.g., a base station)) for wireless communication is described. The processor may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the processor may be configured to, capable of, or operable to at least one of transmit a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receive a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receive a set of binary modulated symbols; map the set of binary modulated symbols to a set of multiple interleaved bits; generate, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and decode the set of multiple bits.

[0025] A method performed or performable by an NE (e.g., a base station) for wireless communication is described. The method may include at least one of transmitting a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receiving a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receiving a set of binary modulated symbols; mapping the set of binary modulated symbols to a set of multiple interleaved bits; generating, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and

[0026] In some implementations of the NE, processor, and method described herein, the NE, processor, and method may further be configured to, capable of, performed, performable, or operable to receive the set of binary modulated symbols via an UL transmission or backscattered transmission

[0027] In some implementations of the NE, the processor, and the method described herein, the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth.

[0028] In some implementations of the NE, processor, and method described herein, the NE, processor, and method may further be configured to, capable of, performed, performable, or operable to receive the set of binary modulated symbols from an apparatus, and determine the first identifier based on a received signal strength from the apparatus and decoding errors at the base station.

[0029] In some implementations of the NE, processor, and method described herein, the NE, processor, and method may further be configured to, capable of, performed, performable, or operable to receive the second identifier in a control message.

[0030] In some implementations of the NE, the processor, and the method described herein, the apparatus comprises an A-IoT device.

[0031] In some implementations of the NE, the processor, and the method described herein, the apparatus comprises a passive device or semi-passive device using a backscattering transmission technique.

[0032] In some implementations of the NE, the processor, and the method described herein, wherein the apparatus comprises an active device that generates and amplifies a signal internally.BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 illustrates an example of a wireless communications system in accordance with aspects of the present disclosure.

[0034] Figure 2 illustrates an example of a wireless communications system, in accordance with aspects of the present disclosure.

[0035] Figure 3 illustrates an example of a system including an interleaver in accordance with aspects of the present disclosure.

[0036] Figure 4 illustrates an example of a system including an interleaver in accordance with aspects of the present disclosure.

[0037] Figure 5 illustrates an example of a device in accordance with aspects of the present disclosure.

[0038] Figure 6 illustrates an example of a processor in accordance with aspects of the present disclosure.

[0039] Figure 7 illustrates an example of a NE in accordance with aspects of the present disclosure.

[0040] Figure 8 illustrates a flowchart of a method performed by a device in accordance with aspects of the present disclosure.

[0041] Figure 9 illustrates a flowchart of a method performed by a NE in accordance with aspects of the present disclosure.DETAILED DESCRIPTION

[0042] For various applications, numerous (e.g., billions) of loT devices are expected to be deployed in a wireless communications system. However, it is difficult to power this large number of devices with batteries that need to be replaced for re-charging, which leads to high maintenance cost. Accordingly, devices that consume very low power and / or rely on harvesting the energy are considered. One example of such a device is a device (e.g., referred to as a passive device) that has no energy storage, no independent signal generation, and uses backscattering transmission. Another example of such a device is a device (e.g., referred to as a semi-passive device) that has energy storage, no independent signal generation, and uses backscattering transmission. Use of stored energy can include amplification for reflected signals. Another example of such a device is a device(e.g., referred to as an active device) that has energy storage, has independent signal generation (e.g., an active RF component for transmission), and may use backscattering transmission.

[0043] loT devices may include A-IoT devices. An A-IoT device refers to a low-power (e.g., self-powered) sensor or device, which is typically small and / or low-cost. For example, A-IoT devices may include an energy harvester with an output power of from 1 microwatt (pW) to a few hundreds of pW. A-IoT devices also typically do not include a subscriber identity module (SIM) card. There are different topologies and deployment scenarios of A-IoT devices. Examples of these topologies include a topology where a base station acts as reader and as source of a carrier wave, a topology where the base station acts as a reader but another device is used as a source of the carrier wave, a topology where the base station acts as a controller and another intermediate node is used as a reader and as a source of the carrier wave, and so forth.

[0044] An interleaver is discussed herein. An interleaver generates interleaved codes and the basic idea behind the use of interleaved codes is to jumble symbols at the transmitter. This leads to randomization of bursts of received errors which are closely located and analysis for random channel can then be applied. Thus, the main function performed by the interleaver at the transmitter is to alter the input symbol sequence. At the receiver, a deinterleaver will alter the received sequence to get back the original unaltered sequence at the transmitter.

[0045] Bursty errors in wireless communications can result from the effect of a wireless channel on the long time domain transmission of modulated symbols using a low power waveform such as on-off keying (OOK), FSK, PSK, and so forth for A-IoT communication. Modulated symbols in binary bits are encoded using, for example, Manchester coding, Miller coding, FM0 subcarrier, and so forth, where the raw bits of 0s and Is are translated to a 01 or 10 to avoid transmitting contiguous 0s to a device (e.g., a remote wireless device). Such line encoders do not employ an interleaver and often result in bursty errors. Accordingly, using the techniques discussed herein, an interleaver that is separate from the encoder receives the encoded bits from the encoder and generates interleaved codes, which can be transmitted to a device using a low power waveform such as OOK, FSK, PSK, and so forth. Using the techniques discussed herein, bursty errors due to the effect of the channel on the long time domain transmission of the modulated symbols using a low power waveform, such as OOK, FSK, PSK, and so forth, for A-IoT communication by transmitting the 0s and Is in terms ofone or more of time domain symbols, frequency domain shift, or phase shift are reduced by using an interleaver after the encoder.

[0046] When using an A-IoT or other low power device, the low power device stores multiple sets of one or more interleaver parameters. The one or more interleaver parameters can include, for example, precomputed interleaver indices, an interleaver pattern, a code rate, a block size, an interleaver depth, or combination thereof. The A-IoT device can select one of the sets of one or more interleaver patterns, such as based on a strength of a power signal and transmit an indication of the selected set to a reader device. The reader device knows the one or more interleaver parameters for the multiple sets, so upon receiving the indication of the selected set the reader device knows the one or more interleaver parameters to use to deinterleave the transmissions received from the A-IoT device. Additionally or alternatively, the reader device can transmit an indication to the A-IoT deviceof which of the multiple set of one or more interleaver parameters to use.

[0047] The techniques discussed herein allow use of an interleaver with an encoder that does not include an interleaver (e.g., that uses Manchester coding, Miller coding, FMO subcarrier, etc.), reducing errors introduced in the wireless channel between an A-IoT device and a reader device. Furthermore, by using stored sets of one or more interleaver parameters alleviates the need for resources to be expended to generate interleaver indices on the fly, reducing power usage in the A- loT or other low power device.

[0048] Reference is made herein to communicating data or information, such as signaling communication resources and / or communications that are transmitted or received between devices. It is to be appreciated that other terms may be used interchangeably with communicating, such as signaling, transmitting, receiving, outputting, forwarding, retrieving, obtaining, and so forth.

[0049] Aspects of the present disclosure are described in the context of a wireless communications system.

[0050] Figure 1 illustrates an example of a wireless communications system 100 in accordance with aspects of the present disclosure. The wireless communications system 100 may include one or more NE 102, one or more UE 104, and a core network (CN) 106. The wireless communications system 100 may support various radio access technologies. In some implementations, the wirelesscommunications system 100 may be a 4G network, such as an LTE network or an LTE- Advanced (LTE-A) network. In some other implementations, the wireless communications system 100 may be a new radio (NR) network, such as a 5G network, a 5G-Advanced (5G-A) network, or a 5G ultrawideband (5G-UWB) network. In other implementations, the wireless communications system 100 may be a combination of a 4G network and a 5G network, or other suitable radio access technology including Institute of Electrical and Electronics Engineers (IEEE) 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20. The wireless communications system 100 may support radio access technologies beyond 5G, for example, 6G. Additionally, the wireless communications system 100 may support technologies, such as time division multiple access (TDMA), frequency division multiple access (FDMA), or code division multiple access (CDMA), etc.

[0051] The one or more NE 102 may be dispersed throughout a geographic region to form the wireless communications system 100. One or more of the NE 102 described herein may be or include or may be referred to as a network node, a base station, a network element, a network function, a network entity, a radio access network (RAN), a NodeB, an eNodeB (eNB), a nextgeneration NodeB (gNB), or other suitable terminology. An NE 102 and a UE 104 may communicate via a communication link, which may be a wireless or wired connection. For example, an NE 102 and a UE 104 may perform wireless communication (e.g., receive signaling, transmit signaling) over a Uu interface.

[0052] An NE 102 may provide a geographic coverage area for which the NE 102 may support services for one or more UEs 104 within the geographic coverage area. For example, an NE 102 and a UE 104 may support wireless communication of signals related to services (e.g., voice, video, packet data, messaging, broadcast, etc.) according to one or multiple radio access technologies. In some implementations, an NE 102 may be moveable, for example, a satellite associated with a nonterrestrial network (NTN). In some implementations, different geographic coverage areas associated with the same or different radio access technologies may overlap, but the different geographic coverage areas may be associated with different NE 102.

[0053] The one or more UE 104 may be dispersed throughout a geographic region of the wireless communications system 100. A UE 104 may include or may be referred to as a remote unit, a mobile device, a wireless device, a remote device, a subscriber device, a transmitter device, a receiver device, or some other suitable terminology. In some implementations, the UE 104 may bereferred to as a unit, a station, a terminal, or a client, among other examples. Additionally, or alternatively, the UE 104 may be referred to as an Internet-of-Things (loT) device, an Internet-of- Everything (loE) device, or machine-type communication (MTC) device, an A-IoT device, among other examples.

[0054] A UE 104 may be able to support wireless communication directly with other UEs 104 over a communication link. For example, a UE 104 may support wireless communication directly with another UE 104 over a device-to-device (D2D) communication link. In some implementations, such as vehicle-to-vehicle (V2V) deployments, vehicle-to-everything (V2X) deployments, or cellular-V2X deployments, the communication link may be referred to as a sidelink. For example, a UE 104 may support wireless communication directly with another UE 104 over a PC5 interface.

[0055] An NE 102 may support communications with the CN 106, or with another NE 102, or both. For example, an NE 102 may interface with other NE 102 or the CN 106 through one or more backhaul links (e.g., SI, N2, N6, or other network interface). In some implementations, the NE 102 may communicate with each other directly. In some other implementations, the NE 102 may communicate with each other indirectly (e.g., via the CN 106). In some implementations, one or more NE 102 may include subcomponents, such as an access network entity, which may be an example of an access node controller (ANC). An ANC may communicate with the one or more UEs 104 through one or more other access network transmission entities, which may be referred to as a radio heads, smart radio heads, or transmission-reception points (TRPs).

[0056] The CN 106 may support user authentication, access authorization, tracking, connectivity, and other access, routing, or mobility functions. The CN 106 may be an evolved packet core (EPC), or a 5G core (5GC), which may include a control plane entity that manages access and mobility (e.g., a mobility management entity (MME), an access and mobility management functions (AMF)) and a user plane entity that routes packets or interconnects to external networks (e.g., a serving gateway (S-GW), a packet data network (PDN) gateway (P-GW), or a user plane function (UPF)). In some implementations, the control plane entity may manage non-access stratum (NAS) functions, such as mobility, authentication, and bearer management (e.g., data bearers, signal bearers, etc.) for the one or more UEs 104 served by the one or more NE 102 associated with the CN 106.

[0057] The CN 106 may communicate with a packet data network over one or more backhaul links (e.g., via an SI, N2, N6, or other network interface). The packet data network may include an application server. In some implementations, one or more UEs 104 may communicate with the application server. A UE 104 may establish a session (e.g., a protocol data unit (PDU) session, or the like) with the CN 106 via an NE 102. The CN 106 may route traffic (e.g., control information, data, and the like) between the UE 104 and the application server using the established session (e.g., the established PDU session). The PDU session may be an example of a logical connection between the UE 104 and the CN 106 (e.g., one or more network functions of the CN 106).

[0058] In the wireless communications system 100, the NEs 102 and the UEs 104 may use resources of the wireless communications system 100 (e.g., time resources (e.g., symbols, slots, subframes, frames, or the like) or frequency resources (e.g., subcarriers, carriers)) to perform various operations (e.g., wireless communications). In some implementations, the NEs 102 and the UEs 104 may support different resource structures. For example, the NEs 102 and the UEs 104 may support different frame structures. In some implementations, such as in 4G, the NEs 102 and the UEs 104 may support a single frame structure. In some other implementations, such as in 5G and among other suitable radio access technologies, the NEs 102 and the UEs 104 may support various frame structures (i.e., multiple frame structures). The NEs 102 and the UEs 104 may support various frame structures based on one or more numerologies.

[0059] One or more numerologies may be supported in the wireless communications system 100, and a numerology may include a subcarrier spacing and a cyclic prefix. A first numerology (e.g., / r=0) may be associated with a first subcarrier spacing (e.g., 15 kHz) and a normal cyclic prefix. In some implementations, the first numerology (e.g., / r=0) associated with the first subcarrier spacing (e.g., 15 kHz) may utilize one slot per subframe. A second numerology (e.g., / r=l) may be associated with a second subcarrier spacing (e.g., 30 kHz) and a normal cyclic prefix. A third numerology (e.g., / r=2) may be associated with a third subcarrier spacing (e.g., 60 kHz) and a normal cyclic prefix or an extended cyclic prefix. A fourth numerology (e.g., / r=3) may be associated with a fourth subcarrier spacing (e.g., 120 kHz) and a normal cyclic prefix. A fifth numerology (e.g., / r=4) may be associated with a fifth subcarrier spacing (e.g., 240 kHz) and a normal cyclic prefix.

[0060] A time interval of a resource (e.g., a communication resource) may be organized according to frames (also referred to as radio frames). Each frame may have a duration, for example, a 10 millisecond (ms) duration. In some implementations, each frame may include multiple subframes. For example, each frame may include 10 subframes, and each subframe may have a duration, for example, a 1 ms duration. In some implementations, each frame may have the same duration. In some implementations, each subframe of a frame may have the same duration.

[0061] Additionally or alternatively, a time interval of a resource (e.g., a communication resource) may be organized according to slots. For example, a subframe may include a number (e.g., quantity) of slots. The number of slots in each subframe may also depend on the one or more numerologies supported in the wireless communications system 100. For instance, the first, second, third, fourth, and fifth numerologies (i.e., / r=0, jU=l , / r=2, / r=3, / r=4) associated with respective subcarrier spacings of 15 kHz, 30 kHz, 60 kHz, 120 kHz, and 240 kHz may utilize a single slot per subframe, two slots per subframe, four slots per subframe, eight slots per subframe, and 16 slots per subframe, respectively. Each slot may include a number (e.g., quantity) of symbols (e.g., OFDM symbols). In some implementations, the number (e.g., quantity) of slots for a subframe may depend on a numerology. For a normal cyclic prefix, a slot may include 14 symbols. For an extended cyclic prefix (e.g., applicable for 60 kHz subcarrier spacing), a slot may include 12 symbols. The relationship between the number of symbols per slot, the number of slots per subframe, and the number of slots per frame for a normal cyclic prefix and an extended cyclic prefix may depend on a numerology. It should be understood that reference to a first numerology (e.g., / r=0) associated with a first subcarrier spacing (e.g., 15 kHz) may be used interchangeably between subframes and slots.

[0062] In the wireless communications system 100, an electromagnetic (EM) spectrum may be split, based on frequency or wavelength, into various classes, frequency bands, frequency channels, etc. By way of example, the wireless communications system 100 may support one or multiple operating frequency bands, such as frequency range designations FR1 (410 MHz - 7.125 GHz), FR2 (24.25 GHz - 52.6 GHz), FR3 (7.125 GHz - 24.25 GHz), FR4 (52.6 GHz - 114.25 GHz), FR4a or FR4-1 (52.6 GHz - 71 GHz), and FR5 (114.25 GHz - 300 GHz). In some implementations, the NEs 102 and the UEs 104 may perform wireless communications over one or more of the operating frequency bands. In some implementations, FR1 may be used by the NEs 102 and the UEs 104, among other equipment or devices for cellular communications traffic (e.g.,control information, data). In some implementations, FR2 may be used by the NEs 102 and the UEs 104, among other equipment or devices for short-range, high data rate capabilities.

[0063] FR1 may be associated with one or multiple numerologies (e.g., at least three numerologies). For example, FR1 may be associated with a first numerology (e.g., / r=0), which includes 15 kHz subcarrier spacing; a second numerology (e.g., / r=l), which includes 30 kHz subcarrier spacing; and a third numerology (e.g., / r=2), which includes 60 kHz subcarrier spacing. FR2 may be associated with one or multiple numerologies (e.g., at least 2 numerologies). For example, FR2 may be associated with a third numerology (e.g., / r=2), which includes 60 kHz subcarrier spacing; and a fourth numerology (e.g., / r=3), which includes 120 kHz subcarrier spacing.

[0064] In some cases, a cell refers to a radio access node in communication with a base station or including a base station. A cell typically has a coverage area, which is a geographic area in which the cell provides wireless connectivity to devices within. Different cells may operate on defined frequencies or frequency bands, referred to as subcarriers. In some examples, a UE 104 establishes a wireless connection with a cell, and subsequently that cell may be referred to as a serving cell of the UE 104.

[0065] In one or more implementations, the wireless communications system 100 also includes one or more A-IoT devices. When using an A-IoT or other low power device in the wireless communications system 100, the A-IoT device stores multiple sets of one or more interleaver parameters. Different sets of the multiple sets can have different identifiers allowing the different sets to be individually identified. These identifiers can be, for example, numerical identifiers, alphanumerical identifiers, indexes into rows or columns of parameters, and so forth. The one or more interleaver parameters can include, for example, precomputed interleaver indices, an interleaver pattern, a code rate, a block size, an interleaver depth, or combination thereof. An interleaver pattern refers to, for example, different interleaver indices (e.g., indexes), with different interleaver patterns having different interleaver indices. Interleaver indices refer to, for example, how data elements are rearranged by the interleaver, such as a set of numbers identifying the order in which input data elements are rearranged by the interleaver (e.g., mapping input data element positions to output data element positions). A code rate refers to, for example, a data rate of a source (e.g., an encoder) of data for the interleaver (e.g., how much redundancy is added to data input tothe encoder). A block size refers to, for example, a number of codes (outputs from the encoder) blocked or grouped together for input to the interleaver (e.g., rows written sequentially from the output of the encoder, columns written sequentially from the output of the encoder). Interleaver depth refers to, for example, a separation between bits in a codeword generated by the interleaver. The A-IoT device can select one of the sets of one or more interleaver patterns, such as based on a strength of a power signal and transmit an indication of the selected set to a reader device. The reader device knows the one or more interleaver parameters for the multiple sets, so upon receiving the indication of the selected set the reader device knows the one or more interleaver parameters to use to deinterleave the transmissions received from the A-IoT. Additionally or alternatively, the reader device can transmit an indication to the A-IoT of which of the multiple set of one or more interleaver parameters to use.

[0066] Figure 2 illustrates an example of a wireless communications system 200, in accordance with aspects of the present disclosure. In some examples, the wireless communications system 200 implements aspects of the wireless communications system 100. For example, the wireless communications system 200 includes a NE 202 (e.g., a base station), and multiple low power (e.g., A-IoT devices) 204.

[0067] Each A-IoT device 204 may be classified or defined as a low power device if a power consumption level of the A-IoT device 204 satisfies (e.g., is less than) a threshold value. The A-IoT device 204 may include a low power processor to reduce the power consumption level of the A-IoT device 204. A low power processor may be a processor that operates with a power consumption level that satisfies (e.g., is less than) a threshold value. A low power processor and / or the A-IoT device 204 may have reduced functionality when compared with a processor or other wireless device that operates at a power consumption level that is greater than the threshold values. For example, the low power processor and / or the A-IoT device 204 may have reduced processing capabilities for decoding and generating signaling, may have reduced transmission and / or reception capabilities (e.g., transmission and / or reception range, among others), reduced energy storage capabilities (e.g., smaller battery), or the like when compared with a processor or wireless device that operates at a power consumption level that is greater than the threshold values.

[0068] In one or more implementations, the A-IoT device 204 may be a sensor (e.g., a tag), an actuator, an appliance, or another device capable of connecting to a wireless network. In someexamples, the A-IoT device 204 is categorized according to a set of components and / or capabilities of the A-IoT devices, where the categories include one or more of an active A-IoT device category, a semi-passive A-IoT device category, and / or a passive A-IoT device category. An active A-IoT device includes a power source and an active radio frequency component, such as a transmitter and / or receiver component, for signal generation. The transmitter and / or receiver component may include one or more antennas for transmitting and receiving signaling. A semi-passive A-IoT device may have energy storage capabilities but may not include an active radio frequency component for signal generation. A passive A-IoT device may not have energy storage capabilities or an active radio frequency component.

[0069] In some cases, semi-passive A-IoT devices and passive A-IoT devices use backscattering techniques and / or energy harvesting for transmitting and / or receiving transmissions. In variations, an active A-IoT device may use a transmitter and / or receiver component for transmitting or receiving transmissions and / or may use backscattering techniques for transmitting and / or receiving transmissions. Semi-passive A-IoT devices may use the stored energy to amplify a signal when using backscattering techniques. Backscattering techniques include receiving signaling from a source (e.g., a node such as the NE 202 or a UE) and modulating a reflection of the incoming signaling towards a destination (e.g., a node such as the NE 202 or a UE). Thus, the A-IoT device 204 may not use an active receiver and / or transmitter component for receiving and transmitting signaling, which reduces a power consumption level of the device.

[0070] In some examples, the A-IoT device 204 may be capable of energy harvesting using energy harvesting techniques. For example, the A-IoT device 204 may extract energy from transmission waves from a source device (e.g., the NE 202) to power the A-IoT device 204. The source device may transmit the signaling using a continuous wave waveform in which the signaling has a constant amplitude and frequency and / or a carrier wave waveform in which the signaling has a periodic variation in amplitude, duration, and position. Signaling transmitted using a continuous wave waveform may be referred to as a continuous wave transmission, while signaling transmitted using a carrier wave waveform may be referred to as a carrier wave transmission. If the A-IoT device 204 includes an energy storage component, then the A-IoT device 204 may store the extracted energy for later use (e.g., to amplify a reflection of signal or to generate a new signal).

[0071] In recent years, loT has attracted much attention in the wireless communication world. More things are expected to be interconnected for improving productivity, efficiency, and increasing comforts of life. Further reduction of size, complexity, and power consumption of loT devices can enable the deployment of tens or even hundreds of billion loT devices for various applications and provide added value across the entire value chain. It is impractical to power all the loT devices by batteries that need to be replaced or recharged manually, which leads to high maintenance cost, serious environmental issues, and even safety hazards for some use cases (e.g., wireless sensor in electric power and petroleum industry).

[0072] Many existing wireless communication devices are powered by battery that needs to be replaced or recharged manually. The automation and digitalization of various industries open numbers of new markets considering new loT technologies of supporting battery-less devices with no energy storage capability or devices with energy storage that do not need to be replaced or recharged manually. The form factor of such devices are expected to be reasonably small to convey the validity of target use cases.

[0073] Various use cases, traffic scenarios, device constraints of ambient power-enabled Internet of Things are considered and identification of new potential service requirements as well as new KPIs are considered. Devices being battery-less or with limited energy storage capability (e.g., using a capacitor) are considered and the energy is provided through the harvesting of radio waves, light, motion, heat, or any other power source .

[0074] Considering the limited size and complexity required by practical applications for battery-less devices with no energy storage capability or devices with limited energy storage that do not need to be replaced or recharged manually, the output power of energy harvester is typically from 1 microwatt (pW) to a few hundreds of pW. Existing cellular devices may not work well with energy harvesting due to their peak power consumption of higher than 10 milliwatts (mW).

[0075] An example type of application is asset identification, which presently resorts mainly to barcode and radio frequency identification (RFID) in most industries. An advantage of these two technologies is the ultra-low complexity and small form factor of the tags. However, the limited reading range of a few meters usually requires handheld scanning which leads to labor intensive and time-consuming operations, or RFID portals or gates, which leads to costly deployments. Moreover,the lack of interference management scheme results in severe interference between RFID readers and capacity problems, especially in case of dense deployment. It is difficult to support large-scale network with seamless coverage for RFID.

[0076] Since existing technologies cannot meet all the requirements of target use cases, a new loT technology is desired to open new markets within 3rdGeneration Partnership Project (3GPP) systems, whose number of connections and / or device density can be orders of magnitude higher than existing 3GPP loT technologies. The new loT technology is expected to provide complexity and power consumption orders of magnitude lower than the existing 3 GPP low power wide area (LPWA) technologies (e.g., narrowband (NB)-IoT and enhanced machine type communication (eMTC)), and is expected to address use cases and scenarios that cannot otherwise be fulfilled based on existing 3GPP LPWA loT technologies.

[0077] Assessment of A-IoT suitable for deployment in a 3GPP system that relies on ultra-low complexity devices with ultra-low power consumption for the very-low end loT applications is taken into consideration. Addressing use cases and scenarios that cannot otherwise be fulfilled based on existing 3GPP LPWA loT technology, e.g., NB-IoT including with reduced peak Tx power is taken into consideration.

[0078] A harmonized air interface design with reduced (e.g., minimized) differences (where appropriate) for A-IoT to enable the following devices is considered: a) an approximately 1 pW peak power consumption, has energy storage, initial sampling frequency offset (SFO) up to 10xppm, neither downlink (DL) nor UL amplification in the device, where X is to be decided; the device’s UL transmission is backscattered on a carrier wave provided externally; b) less than or equal to a few hundred pW peak power consumption, has energy storage, initial SFO up to 10xppm, both DL and / or UL amplification in the device, where X is to be decided; the device’s UL transmission may be generated internally by the device, or be backscattered on a carrier wave provided externally. The coverage design target is a largest distance of 10-50 meters with device indoors. Devices where a UE operates as an intermediate node under network (e.g., base station) control), with no RRC states, no mobility (e.g., at least no cell selection or re-selection -like function), no hybrid automatic repeat request (HARQ), no automatic repeat request (ARQ), is considered.

[0079] Deployment scenarios with the following characteristics are considered. A deployment and topology scenario with a base station and coexistence characteristics of micro-cell, co-site. A deployment and topology scenario with a UE as an intermediate node, under network (e.g., base station) control and base station and coexistence characteristics of macro-cell, co-site; and the location is of intermediate node is indoor. FR1 licensed spectrum in frequency division duplex (FDD). Spectrum deployment in-band to NR, in guard-band to ETE / NR, in one or more standalone bands. Traffic types DO-DTT, DT, with focus on rUCl (indoor inventory) and rUC4 (indoor command). Whether the harmonized air interface design can address the device-originated autonomous (DO-A) use case is also considered.

[0080] The occurrence of transmission from A-IoT device (including backscattering when used) at least in UL spectrum is considered.

[0081] The following is considered: applicable largest (e.g., maximum) distance target values(s); latency suitable for use in RAN; 2-dimensional (2D) distribution of devices; deployment scenarios for coverage and coexistence evaluations; identify basic blocks or components of possible A-IoT device architectures, taking into account implementations of low-power low-complexity devices which meet the RAN design target for power consumption and complexity; link budget calculation for coverage, including whether or how to model carrier wave from one or more nodes inside or outside the connectivity topology.

[0082] The following is considered: appropriate and feasible solutions for A-IoT, including decisions on which functions, procedures, etc. are used, and providing at least desired (e.g., required) functionalities; positioning , restricted to functionalities which would have no, or little, specification impact; the feasibility and desired (e.g., required) functionalities for proximity determination.

[0083] For the A-IoT DL and UL, the following is considered: frame structure, synchronization and timing, random access; numerologies, bandwidths, and multiple access; waveforms and modulations; channel coding; downlink channel / signal aspects; uplink channel / signal aspects; scheduling and timing relationships; characteristics of carrier-wave waveform for a carrier wave provided externally to the A-IoT device, including for interference handling at A-IoT UL receiver, and at NR base station.

[0084] The following is also considered: functions used for an A-IoT compact protocol stack and lightweight signaling procedure to enable DO-DTT and DT data transmission; for example, paging, random access, data transmission, including radio resource control aspects, interactions with upper layers.

[0085] The following is also considered: impacts on signaling and procedures for CN-RAN interface, to enable paging, device context management, data transport; RAN architecture aspects, including whether support for split architecture is used; solutions for locating an A-IoT device with no specification impact, e.g., reusing existing user location report, or reduced (e.g., minimal) specification impact to convey location information to core network.

[0086] The following is also considered: coexistence of A-IoT and NR / LTE; RF for A-IoT, including A-IoT base station transmission and reception, A-IoT Device transmission and reception, intermediate node (e.g., UE), transmission and reception.

[0087] An A-IoT device can include any of various receiver types. In one or more implementations, an A-IoT device receiver is a heterodyne envelope detector implemented at intermediate frequency (IF) level. Additionally or alternatively, the receiver is a homodyne / zero-IF envelope detector at the baseband (BB). Additionally or alternatively, the receiver is the orthogonal frequency division multiplexing (OFDM) based sequence or signal with time domain or frequency domain correlation.

[0088] The following discussions refer to an A-IoT device. However, it is to be appreciated that these techniques can be used with other low power devices or low power processors that may not be referred to A-IoT devices.

[0089] One technique for interleaving is to use convolution and turbo codes where there is an internal interleaver in the encoder. But some encoders, such as those using Manchester coding or Miller coding, do not support internal interleaver functionality. The convolution and turbo codes produces systematic and parity bits whereas the Manchester coding and Miller coding does not produce any additional parity bits.

[0090] Figure 3 illustrates an example of a system 300 including an interleaver in accordance with aspects of the present disclosure. The system 300 can be part of an A-IoT device or other low power processor. The system 300 includes an encoder 302, an interleaver 304, and a binarymodulator 306. The encoder 302 is a binary encoder such as using Manchester coding, Miller coding, FMO coding, and so forth. The encoder 302 receives an incoming bit stream 308 and generates a series of two or more pulses, transition of pulses from low to high or vice versa and inverts the transition at the edge or middle of the bit to transmit digital information Os and Is over the analog channels and the receiver can differentiate the received pulses. In the case of a cross interleaver, the delay lines are introduced to progressively increase the time duration and to increase the separation between consecutive inputs.

[0091] In one or more implementations, the coded bit streams from the encoder 302 are provided as an input to a an interleaver 304, which is outside of (external to) the encoder. The interleaver 304 interweaves each coded bit stream, which is a technique to make the coded bit stream from the binary modulated signal robust against burst errors. The code words generated from the binary encoder 302 with different code rates (e.g., 0.25, 0.5, etc.) may be made to jumble at the transmitter by the interleaver 304 and mapped by the binary modulator 306 to the binary modulated signals 310 from ASK, FSK, PSK, and so forth. The A-IoT device stores each of the interleaver patterns containing different indices in memory of the A-IoT instead of generating on the fly to save the compute resources. The A-IoT device stores a subset of precomputed and prestored interleaver indices for different interleaving depths of block codes containing rows written sequentially or columns written sequentially, etc., according to different code rates (e.g., 0.25, 0.5, etc.), different block sizes (e.g., 50, 100, etc.), different interleaver depths (e.g., separation between the bits in a codeword where the codeword is generated from the block encoder), or a combination thereof.

[0092] Figure 4 illustrates an example of a system 400 including an interleaver 402 in accordance with aspects of the present disclosure. The interleaver 402 writes an input coded bit stream 404 sequentially. The interleaver pattern of the interleaver 402, after receiving the incoming code words (the input coded bit stream 404) simply shifts the bits according to the pre-computed and pre-stored indices in its memory for a subset of block sizes, and outputs the shifted bits 406.

[0093] Situations can arise where inputs are received having different block sizes than any of the block sizes for which interleaver indices are store. Handling inputs of different block size according to the stored indices from a subset of block sizes can be performed as follows.

[0094] In one or more implementations, the interleaver indices for other larger block sizes than the subset of block sizes stored at the A-IoT device may be derived based on segmenting the larger block size into smaller block sizes where the smaller block sizes may be from the subset of block sizes from the precomputed and prestored interleaver indices in its memory. This provides flexibility to the A-IoT device to perform interleaving to a range of block sizes. The interleaving is done within each smaller block size and then concatenated. For example, if the A-IoT device stores only 50 and 100 block size interleaver indices, and when a larger data size (e.g., 200 block size) arrives, then the A-IoT device may segment the 200 block size into multiple of 50 block sizes and interleaving is performed within each segment and then the results concatenated.

[0095] Additionally or alternatively, the input of 200 bits can be segmented into multiple non- uniform segment sizes, where each of the segment interleaver indices are stored in the memory. For example, 200 bits can be segmented into two bit segments and one 100 bit segment and then the interleaving is done within each segment. The results of interleaving within each segment can then be concatenated.

[0096] Additionally or alternatively, segments themselves are interleaved following the interleaving within each segment. For example, when an input stream of 200 bits are segmented into two 50 bit segments (segment#! and segment#2) and one 100 bit segment (segment#3), then segments are interleaved as follows:Segment#! (50 bits) — segment#3(100 bits) — segment#2(50 bits)Accordingly, the results of interleaving within each segment are concatenated in the order of segment#! followed by segment#3 followed by segment#2.

[0097] In one or more implementations, the A-IoT device segments the larger block size into multiple smaller block sizes according to the availability of indices in its memory. After interleaving is performed within each segment, the A-IoT device also performs outer-interleaving across the segments. Such a two-step interleaving may randomize the input bit stream and spread across the word.

[0098] In one or more implementations, the interleaver indices for other smaller block sizes than the subset of block sizes stored at the A-IoT device can be derived by adding filler bits (e.g., any pattern of 0s or Is) to the smaller block sizes to reach one of the nearest stored block sizeindices (e.g., an augmented set of bits having the nearest stored block size indices) and then perform segmentation and / or interleaving as discussed above. Additionally or alternatively, filler bits are added in those indices of the smaller block size input stream when mapped to the indices from a larger block size.

[0099] Filler bits may be added to be compatible with the interleaving depth, for example, the encoded block size is not divisible by the configured depth of the interleaver according to one of the stored block sizes. For example, when the input stream is 35 bits however the stored indices of the interleaver is 50 then 15 filler bits are added to the input stream to use the nearest interleaver indices from the memory.

[0100] In one or more implementations, the interleaver indices pattern may also be non-uniform and the distribution of such interleaver is prestored as indices in the memory of the A-IoT device.

[0101] In one or more implementations, the node (e.g., base station or UE) acting as a reader after receiving the UL signal from the A-IoT device, such as the backscattered signal from the A- loT device, may signal or activate one from the multiple interleaving patterns including the interleaving depth to the A-IoT device in a trigger message.

[0102] The base station may signal or activate the same interleaving pattern including depth to a group or subgroup of A-IoT devices in the trigger message.

[0103] Additionally or alternatively, the A-IoT device autonomously selects the interleaver pattern including the interleaver depth from the subset of supported one according to the message size for UL transmission including the backscattered transmission and the incident power of the source carrier wave signal. Stronger (higher incident power) source carrier wave signals can have smaller or shorter separations between the bits of a codeword, whereas weaker (lower incident power) source carrier wave signals can have larger or longer separations between the bits of a code word. In one example, when the incident power level of the carrier wave signal is below a threshold (e.g., weaker) producing a weaker backscattered signal power (unless it is amplified using a reflection amplifier which is device specific) the A-IoT device autonomously selects an interleaver pattern and depth increasing (e.g., maximizing) the separating between the bits of a codeword. In some examples, the A-IoT device may also select the interleaving pattern for UL transmissionaccording to the DL signal strength quality and / or errors from the downlink signal (e.g., cyclic redundancy check (CRC) errors)

[0104] In one or more implementations, the A-IoT device maintains and / or transmits a data structure (for example, a multi-dimensional (e.g., two-dimensional) table, a one-dimensional array, a set of records or pages) that stores the interleave patterns, depths, code rates, and so forth, for different message sizes and / or code rates. The A-IoT device can transmit an index into different portions of the data structure to identify a particular interleave pattern, depth, code rate, etc. for different message sizes and / or code rates to the reader node (e.g., base station or UE) as part of a control message or header message to help the interleaver decoder at the reader. For example, different rows of a configuration table can store different combinations of interleave patterns, depths, and / or code rates, and the A-IoT device can transmit a configuration table row index value to specify an interleave pattern and / or depth for a message size and / or code rate to the reader node (e.g., base station or UE) as part of a control message or header message to help the interleaver decoder at the reader.

[0105] Additionally or alternatively, a device may support encoding raw input bits using a convolutional encoder following which a Manchester or Miller line coding technique may be applied to avoid having problems due to consecutive Os before sending the bits to the binary modulator such as ASK, FSK, PSK. In one exmaple, the device may support encoding raw input bits using Reed-Muller code or block codes and then the bits are sent to the Manchester or Miller line coder and after that to an interleave block which finally interleaves the data to avoid any burst errors. In one implementation, a simplified convolutional encoder with a fixed register may be supported together with the Manchester or Miller line coding techniques.

[0106] Accordingly, the techniques discussed herein supporting a bit interleaver for binary coded bits from Manchester codes, Miller codes, etc., for different code word sizes (block sizes), interleaver depths, interleaver patterns, or a combination thereof.

[0107] The techniques discussed herein support mapping interleaved bits to the binary modulated symbols, e.g., ASK, FSK, or PSK for UE transmission or backscattered transmission.

[0108] The techniques discussed herein support storing precomputed interleaver indices for a subset of block sizes for different patterns, depths, code rates, etc., or a combination thereof, at different memory regions of an A-IoT device.

[0109] The techniques discussed herein support determining the interleaver indices for a pattern, depth, code rate, or combination thereof for smaller block sizes from the precomputed and stored indices.

[0110] The techniques discussed herein support a configuration table containing rows containing interleaver patterns, depths, code rates, etc., or a combination thereof.

[0111] The techniques discussed herein support a reader that selects the row indices depending on the received signal strength and decoding errors at the reader and informs the A-IoT device about the configuration row index in the next update of a trigger message to the A-IoT device or to a group of A-IoT devices.

[0112] The techniques discussed herein support an A-IoT device selecting the configuration row index according to the incident power of the carrier wave signal at the A-IoT device, e.g., selects higher depth for the weaker incident power signal.

[0113] Figure 5 illustrates an example of a device 500 in accordance with aspects of the present disclosure. The device 500 may include a processor 502, a memory 504, a controller 506, and a transceiver 508. The processor 502, the memory 504, the controller 506, or the transceiver 508, or various combinations thereof or various components thereof may be examples of means for performing various aspects of the present disclosure as described herein. These components may be coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces. The device 500 may be an A-IoT device or a UE discussed above.

[0114] The processor 502, the memory 504, the controller 506, or the transceiver 508, or various combinations or components thereof may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as or otherwise supporting a means for performing the functions described in the present disclosure.

[0115] The processor 502 may include an intelligent hardware device (e.g., a general-purpose processor, a DSP, a CPU, an ASIC, an FPGA, or any combination thereof). In some implementations, the processor 502 may be configured to operate the memory 504. In some other implementations, the memory 504 may be integrated into the processor 502. The processor 502 may be configured to execute computer-readable instructions stored in the memory 504 to cause the device 500 to perform various functions of the present disclosure.

[0116] The memory 504 may include volatile or non-volatile memory. The memory 504 may store computer-readable, computer-executable code including instructions when executed by the processor 502 cause the device 500 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such as the memory 504 or another type of memory. Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special-purpose computer.

[0117] In some implementations, the processor 502 and the memory 504 coupled with the processor 502 may be configured to cause the device 500 to perform one or more of the functions described herein (e.g., executing, by the processor 502, instructions stored in the memory 504). For example, the processor 502 may support wireless communication at the device 500 in accordance with examples as disclosed herein. The device 500 may be configured to or operable to support a means for obtaining a set of multiple bits; retrieving one or more interleaver parameters stored in at least one memory of the apparatus; generating, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; mapping the set of multiple interleaved bits to a set of binary modulated symbols; and transmitting the set of binary modulated symbols.

[0118] Additionally, the device 500 may be configured to support any one or combination of transmitting the set of binary modulated symbols via an UL transmission or backscattered transmission; where multiple sets of one or more interleaver parameters are stored in the at least one memory; where the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth; receiving an identifier of one of the multiple sets of one ormore interleaver parameters to use to generate the set of multiple interleaved bits; determining, based on a strength of an incident power signal, one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits; where each set of the multiple sets of one or more interleaver parameters is stored in a different portion of a data structure in the at least one memory; transmitting an identifier of one of the multiple sets of one or more interleaver parameters that the apparatus used to generate the set of multiple interleaved bits; transmitting the identifier in a control message; where the set of multiple bits has a larger block size than a block size of any of the multiple sets of one or more interleaver parameters, and segmenting the set of multiple bits into multiple segments of bits; selecting, for each of the multiple segments of bits, one of the multiple sets of one or more interleaver parameters; generating, for each of the multiple segments of bits, a subset of multiple interleaved bits based at least in part on the selected one of the multiple sets of one or more interleaver parameters; and concatenating the generated subsets of multiple interleaved bits; where the set of multiple bits has a smaller block size than a block size of any of the multiple sets of one or more interleaver parameters, and generating an augmented set of bits by adding one or more filler bits to the set of multiple bits; and generating, based on the one or more interleaver parameters and the augmented set of bits, the set of multiple interleaved bits; obtaining the set of multiple bits from at least one of a Manchester encoder or a Miller encoder; mapping the set of multiple interleaved bits to a set of binary modulated symbols using at least one of ASK, FSK, or PSK; where the apparatus comprises an A-IoT device; where the apparatus comprises a passive device or semi-passive device using a backscattering transmission technique; where the apparatus comprises an active device that generates and amplifies a signal internally.

[0119] Additionally, or alternatively, the device 500 may support at least one memory (e.g., the memory 504) and at least one processor (e.g., the processor 502) coupled with the at least one memory and configured to cause the device to: obtain a set of multiple bits; retrieve one or more interleaver parameters stored in the at least one memory; generate, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; map the set of multiple interleaved bits to a set of binary modulated symbols; and transmit the set of binary modulated symbols.

[0120] Additionally, the device 500 may be configured to support any one or combination of where the at least one processor is further configured to cause the device to transmit the set ofbinary modulated symbols via an UL transmission or backscattered transmission; where multiple sets of one or more interleaver parameters are stored in the at least one memory; where the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth; where the at least one processor is further configured to cause the device to receive an identifier of one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits; where the at least one processor is further configured to cause the device to determine, based on a strength of an incident power signal, one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits; where each set of the multiple sets of one or more interleaver parameters is stored in a different portion of a data structure in the at least one memory; where the at least one processor is further configured to cause the device to transmit an identifier of one of the multiple sets of one or more interleaver parameters that the apparatus used to generate the set of multiple interleaved bits; where the at least one processor is further configured to cause the device to transmit the identifier in a control message; where the set of multiple bits has a larger block size than a block size of any of the multiple sets of one or more interleaver parameters, and the at least one processor is further configured to cause the device to segment the set of multiple bits into multiple segments of bits; select, for each of the multiple segments of bits, one of the multiple sets of one or more interleaver parameters; generate, for each of the multiple segments of bits, a subset of multiple interleaved bits based at least in part on the selected one of the multiple sets of one or more interleaver parameters; and concatenate the generated subsets of multiple interleaved bits; where the set of multiple bits has a smaller block size than a block size of any of the multiple sets of one or more interleaver parameters, and the at least one processor is further configured to cause the device to generate an augmented set of bits by adding one or more filler bits to the set of multiple bits; and generate, based on the one or more interleaver parameters and the augmented set of bits, the set of multiple interleaved bits; where the at least one processor is further configured to cause the device to obtain the set of multiple bits from at least one of a Manchester encoder or a Miller encoder; where the at least one processor is further configured to cause the device to map the set of multiple interleaved bits to a set of binary modulated symbols using at least one of ASK, FSK, or PSK; where the apparatus comprises an A- loT device; where the apparatus comprises a passive device or semi-passive device using abackscattering transmission technique; where the apparatus comprises an active device that generates and amplifies a UL signal internally.

[0121] The controller 506 may manage input and output signals for the device 500. The controller 506 may also manage peripherals not integrated into the device 500. In some implementations, the controller 506 may utilize an operating system such as iOS®, ANDROID®, WINDOWS®, or other operating systems. In some implementations, the controller 506 may be implemented as part of the processor 502.

[0122] In some implementations, the device 500 may include at least one transceiver 508. In some other implementations, the device 500 may have more than one transceiver 508. The transceiver 508 may represent a wireless transceiver. The transceiver 508 may include one or more receiver chains 510, one or more transmitter chains 512, or a combination thereof.

[0123] A receiver chain 510 may be configured to receive signals (e.g., control information, data, packets) over a wireless medium. For example, the receiver chain 510 may include one or more antennas to receive a signal over the air or wireless medium. The receiver chain 510 may include at least one amplifier (e.g., a low-noise amplifier (LNA)) configured to amplify the received signal. The receiver chain 510 may include at least one demodulator configured to demodulate the receive signal and obtain the transmitted data by reversing the modulation technique applied during transmission of the signal. The receiver chain 510 may include at least one decoder for decoding the demodulated signal to receive the transmitted data.

[0124] A transmitter chain 512 may be configured to generate and transmit signals (e.g., control information, data, packets). The transmitter chain 512 may include at least one modulator for modulating data onto a carrier signal, preparing the signal for transmission over a wireless medium. The at least one modulator may be configured to support one or more techniques such as amplitude modulation (AM), frequency modulation (FM), or digital modulation schemes like phase-shift keying (PSK) or quadrature amplitude modulation (QAM). The transmitter chain 512 may also include at least one power amplifier configured to amplify the modulated signal to an appropriate power level suitable for transmission over the wireless medium. The transmitter chain 512 may also include one or more antennas for transmitting the amplified signal into the air or wireless medium.

[0125] Figure 6 illustrates an example of a processor 600 in accordance with aspects of the present disclosure. The processor 600 may be an example of a processor configured to perform various operations in accordance with examples as described herein. The processor 600 may include a controller 602 configured to perform various operations in accordance with examples as described herein. The processor 600 may optionally include at least one memory 604, which may be, for example, an L1 / L2 / L3 cache. Additionally, or alternatively, the processor 600 may optionally include one or more arithmetic-logic units (ALUs) 606. One or more of these components may be in electronic communication or otherwise coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces (e.g., buses).

[0126] The processor 600 may be a processor chipset and include a protocol stack (e.g., a software stack) executed by the processor chipset to perform various operations (e.g., receiving, obtaining, retrieving, transmitting, outputting, forwarding, storing, determining, identifying, accessing, writing, reading) in accordance with examples as described herein. The processor chipset may include one or more cores, one or more caches (e.g., memory local to or included in the processor chipset (e.g., the processor 600) or other memory (e.g., random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase change memory (PCM), and others).

[0127] The controller 602 may be configured to manage and coordinate various operations (e.g., signaling, receiving, obtaining, retrieving, transmitting, outputting, forwarding, storing, determining, identifying, accessing, writing, reading) of the processor 600 to cause the processor 600 to support various operations in accordance with examples as described herein. For example, the controller 602 may operate as a control unit of the processor 600, generating control signals that manage the operation of various components of the processor 600. These control signals include enabling or disabling functional units, selecting data paths, initiating memory access, and coordinating timing of operations.

[0128] The controller 602 may be configured to fetch (e.g., obtain, retrieve, receive) instructions from the memory 604 and determine subsequent instruction(s) to be executed to cause the processor 600 to support various operations in accordance with examples as described herein. The controller 602 may be configured to track memory addresses of instructions associated with the memory 604.The controller 602 may be configured to decode instructions to determine the operation to be performed and the operands involved. For example, the controller 602 may be configured to interpret the instruction and determine control signals to be output to other components of the processor 600 to cause the processor 600 to support various operations in accordance with examples as described herein. Additionally, or alternatively, the controller 602 may be configured to manage flow of data within the processor 600. The controller 602 may be configured to control transfer of data between registers, ALUs 606, and other functional units of the processor 600.

[0129] The memory 604 may include one or more caches (e.g., memory local to or included in the processor 600 or other memory, such as RAM, ROM, DRAM, SDRAM, SRAM, MRAM, flash memory, etc. In some implementations, the memory 604 may reside within or on a processor chipset (e.g., local to the processor 600). In some other implementations, the memory 604 may reside external to the processor chipset (e.g., remote to the processor 600).

[0130] The memory 604 may store computer-readable, computer-executable code including instructions that, when executed by the processor 600, cause the processor 600 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such as system memory or another type of memory. The controller 602 and / or the processor 600 may be configured to execute computer-readable instructions stored in the memory 604 to cause the processor 600 to perform various functions. For example, the processor 600 and / or the controller 602 may be coupled with or to the memory 604, the processor 600, and the controller 602, and may be configured to perform various functions described herein. In some examples, the processor 600 may include multiple processors and the memory 604 may include multiple memories. One or more of the multiple processors may be coupled with one or more of the multiple memories, which may, individually or collectively, be configured to perform various functions herein.

[0131] The one or more ALUs 606 may be configured to support various operations in accordance with examples as described herein. In some implementations, the one or more ALUs 606 may reside within or on a processor chipset (e.g., the processor 600). In some other implementations, the one or more ALUs 606 may reside external to the processor chipset (e.g., the processor 600). One or more ALUs 606 may perform one or more computations such as addition, subtraction, multiplication, and division on data. For example, one or more ALUs 606 may receive input operands and an operation code, which determines an operation to be executed. One or moreALUs 606 may be configured with a variety of logical and arithmetic circuits, including adders, subtractors, shifters, and logic gates, to process and manipulate the data according to the operation. Additionally, or alternatively, the one or more ALUs 606 may support logical operations such as AND, OR, exclusive-OR (XOR), not-OR (NOR), and not-AND (NAND), enabling the one or more ALUs 606 to handle conditional operations, comparisons, and bitwise operations.

[0132] The processor 600 may support wireless communication in accordance with examples as disclosed herein. The processor 600 may be configured to or operable to support at least one controller (e.g., the controller 602) coupled with at least one memory (e.g., the memory 604) and configured to cause the processor to: obtain a set of multiple bits; retrieve one or more interleaver parameters stored in the at least one memory; generate, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; map the set of multiple interleaved bits to a set of binary modulated symbols; and transmit the set of binary modulated symbols.

[0133] Additionally, the processor 600 may be configured to or operable to support any one or combination of where the at least one controller is further configured to cause the processor to transmit the set of binary modulated symbols via an UL transmission or backscattered transmission; where multiple sets of one or more interleaver parameters are stored in the at least one memory; where the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth; where the at least one controller is further configured to cause the processor to receive an identifier of one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits; where the at least one controller is further configured to cause the processor to determine, based on a strength of an incident power signal, one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits; where each set of the multiple sets of one or more interleaver parameters is stored in a different portion of a data structure in the at least one memory; where the at least one controller is further configured to cause the processor to transmit an identifier of one of the multiple sets of one or more interleaver parameters that the processor used to generate the set of multiple interleaved bits; where the at least one controller is further configured to cause the processor to transmit the identifier in a control message; where the set of multiple bits has a larger block sizethan a block size of any of the multiple sets of one or more interleaver parameters, and the at least one controller is further configured to cause the processor to: segment the set of multiple bits into multiple segments of bits; select, for each of the multiple segments of bits, one of the multiple sets of one or more interleaver parameters; generate, for each of the multiple segments of bits, a subset of multiple interleaved bits based at least in part on the selected one of the multiple sets of one or more interleaver parameters; and concatenate the generated subsets of multiple interleaved bits; where the set of multiple bits has a smaller block size than a block size of any of the multiple sets of one or more interleaver parameters, and the at least one controller is further configured to cause the processor to: generate an augmented set of bits by adding one or more filler bits to the set of multiple bits; and generate, based on the one or more interleaver parameters and the augmented set of bits, the set of multiple interleaved bits; where the at least one controller is further configured to cause the processor to obtain the set of multiple bits from at least one of a Manchester encoder or a Miller encoder; where the at least one controller is further configured to cause the processor to map the set of multiple interleaved bits to a set of binary modulated symbols using at least one of ASK, FSK, or PSK; where the processor is included in an A-IoT device; where the processor is included in a passive device or semi-passive device using a backscattering transmission technique; where the processor is included in an active device that generates and amplifies a UL signal internally.

[0134] Additionally, or alternatively, the processor 600 may be configured to or operable to support at least one controller (e.g., the controller 602) coupled with at least one memory (e.g., the memory 604) and configured to cause the processor to: at least one of transmit a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receive a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receive a set of binary modulated symbols; map the set of binary modulated symbols to a set of multiple interleaved bits; generate, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and decode the set of multiple bits.

[0135] Additionally, the processor 600 may be configured to or operable to support any one or combination of where the at least one processor is further configured to cause the base station to receive the set of binary modulated symbols via an UL transmission or backscattered transmission; where the one or more interleaver parameters in each set of one or more interleaver parametersinclude one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth; where the at least one processor is further configured to cause the base station to receive the set of binary modulated symbols from an apparatus, and determine the first identifier based on a received signal strength from the apparatus and decoding errors at the base station; where the at least one processor is further configured to cause the base station to receive the second identifier in a control message; where the apparatus comprises an A-IoT device; where the apparatus comprises a passive device or semi-passive device using a backscattering transmission technique; where the apparatus comprises an active device that generates and amplifies a signal internally.

[0136] Figure 7 illustrates an example of a NE 700 in accordance with aspects of the present disclosure. The NE 700 may include a processor 702, a memory 704, a controller 706, and a transceiver 708. The processor 702, the memory 704, the controller 706, or the transceiver 708, or various combinations thereof or various components thereof may be examples of means for performing various aspects of the present disclosure as described herein. These components may be coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces.

[0137] The processor 702, the memory 704, the controller 706, or the transceiver 708, or various combinations or components thereof may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as or otherwise supporting a means for performing the functions described in the present disclosure.

[0138] The processor 702 may include an intelligent hardware device (e.g., a general-purpose processor, a DSP, a CPU, an ASIC, an FPGA, or any combination thereof). In some implementations, the processor 702 may be configured to operate the memory 704. In some other implementations, the memory 704 may be integrated into the processor 702. The processor 702 may be configured to execute computer-readable instructions stored in the memory 704 to cause the NE 700 to perform various functions of the present disclosure.

[0139] The memory 704 may include volatile or non-volatile memory. The memory 704 may store computer-readable, computer-executable code including instructions when executed by the processor 702 cause the NE 700 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such as the memory 704 or another type of memory. Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special-purpose computer.

[0140] In some implementations, the processor 702 and the memory 704 coupled with the processor 702 may be configured to cause the NE 700 to perform one or more of the functions described herein (e.g., executing, by the processor 702, instructions stored in the memory 704). For example, the processor 702 may support wireless communication at the NE 700 in accordance with examples as disclosed herein. The NE 700 may be configured to support a means for at least one of transmitting a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receiving a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receiving a set of binary modulated symbols; mapping the set of binary modulated symbols to a set of multiple interleaved bits; generating, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and decoding the set of multiple bits.

[0141] Additionally, the NE 700 may be configured to support any one or combination of receiving the set of binary modulated symbols via an UL transmission or backscattered transmission; where the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth; receiving the set of binary modulated symbols from an apparatus, and determining the first identifier based on a received signal strength from the apparatus and decoding errors at the base station; receiving the second identifier in a control message; where the apparatus comprises an A-IoT device; where the apparatus comprises a passive device or semipassive device using a backscattering transmission technique; where the apparatus comprises an active device that generates and amplifies a signal internally.

[0142] Additionally, or alternatively, the NE 700 may support at least one memory (e.g., the memory 704) and at least one processor (e.g., the processor 702) coupled with the at least one memory and configured to cause the NE to: at least one of transmit a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receive a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receive a set of binary modulated symbols; map the set of binary modulated symbols to a set of multiple interleaved bits; generate, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and decode the set of multiple bits.

[0143] Additionally, the NE 700 may be configured to support any one or combination of where the at least one processor is further configured to cause the base station to receive the set of binary modulated symbols via an UL transmission or backscattered transmission where the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth; where the at least one processor is further configured to cause the base station to receive the set of binary modulated symbols from an apparatus, and determine the first identifier based on a received signal strength from the apparatus and decoding errors at the base station; where the at least one processor is further configured to cause the base station to receive the second identifier in a control message; where the apparatus comprises an A-IoT device; where the apparatus comprises a passive device or semi-passive device using a backscattering transmission technique; where the apparatus comprises an active device that generates and amplifies a UL signal internally.

[0144] The controller 706 may manage input and output signals for the NE 700. The controller 706 may also manage peripherals not integrated into the NE 700. In some implementations, the controller 706 may utilize an operating system such as iOS®, ANDROID®, WINDOWS®, or other operating systems. In some implementations, the controller 706 may be implemented as part of the processor 702.

[0145] In some implementations, the NE 700 may include at least one transceiver 708. In some other implementations, the NE 700 may have more than one transceiver 708. The transceiver 708 may represent a wireless transceiver. The transceiver 708 may include one or more receiver chains 710, one or more transmitter chains 712, or a combination thereof.

[0146] A receiver chain 710 may be configured to receive signals (e.g., control information, data, packets) over a wireless medium. For example, the receiver chain 710 may include one or more antennas to receive a signal over the air or wireless medium. The receiver chain 710 may include at least one amplifier (e.g., a low-noise amplifier (LNA)) configured to amplify the received signal. The receiver chain 710 may include at least one demodulator configured to demodulate the receive signal and obtain the transmitted data by reversing the modulation technique applied during transmission of the signal. The receiver chain 710 may include at least one decoder for decoding the demodulated signal to receive the transmitted data.

[0147] A transmitter chain 712 may be configured to generate and transmit signals (e.g., control information, data, packets). The transmitter chain 712 may include at least one modulator for modulating data onto a carrier signal, preparing the signal for transmission over a wireless medium. The at least one modulator may be configured to support one or more techniques such as amplitude modulation (AM), frequency modulation (FM), or digital modulation schemes like phase-shift keying (PSK) or quadrature amplitude modulation (QAM). The transmitter chain 712 may also include at least one power amplifier configured to amplify the modulated signal to an appropriate power level suitable for transmission over the wireless medium. The transmitter chain 712 may also include one or more antennas for transmitting the amplified signal into the air or wireless medium.

[0148] Figure 8 illustrates a flowchart of a method in accordance with aspects of the present disclosure. The operations of the method may be implemented by a device as described herein. In some implementations, the device may execute a set of instructions to control the function elements of the device to perform the described functions.

[0149] At 802, the method may include obtaining a set of multiple bits. The operations of 802 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 802 may be performed by a device as described with reference to Figure 5, such as an A-IoT device.

[0150] At 804, the method may include retrieving one or more interleaver parameters stored in at least one memory of the apparatus. The operations of 804 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 804 may be performed by a device as described with reference to Figure 5, such as an A-IoT device.

[0151] At 806, the method may include generating, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits. The operations of 806 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 806 may be performed a device as described with reference to Figure 5, such as an A-IoT device.

[0152] At 808, the method may include mapping the set of multiple interleaved bits to a set of binary modulated symbols. The operations of 808 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 808 may be performed by a device as described with reference to Figure 5, such as an A-IoT device.

[0153] At 810, the method may include transmitting the set of binary modulated symbols. The operations of 810 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 810 may be performed a device as described with reference to Figure 5, such as an A-IoT device.

[0154] It should be noted that the method described herein describes a possible implementation, and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible.

[0155] Figure 9 illustrates a flowchart of a method in accordance with aspects of the present disclosure. The operations of the method may be implemented by a NE as described herein. In some implementations, the NE may execute a set of instructions to control the function elements of the NE to perform the described functions.

[0156] At 902, the method may include at least one of transmitting a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receiving a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits. The operations of 902 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 902 may be performed by a NE as described with reference to Figure 7.

[0157] At 904, the method may include receiving a set of binary modulated symbols. The operations of 904 may be performed in accordance with examples as described herein. In someimplementations, aspects of the operations of 904 may be performed by a NE as described with reference to Figure 7.

[0158] At 906, the method may include mapping the set of binary modulated symbols to a set of multiple interleaved bits. The operations of 906 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 906 may be performed a NE as described with reference to Figure 7.

[0159] At 908, the method may include generating, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits. The operations of 908 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 908 may be performed by a NE as described with reference to Figure 7.

[0160] At 910, the method may include decoding the set of multiple bits. The operations of 910 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 910 may be performed a NE as described with reference to Figure 7.

[0161] It should be noted that the method described herein describes a possible implementation, and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible.

[0162] The description herein is provided to enable a person having ordinary skill in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to a person having ordinary skill in the art, and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus, the disclosure is not limited to the examples and designs described herein but is to be accorded the broadest scope consistent with the principles and novel features disclosed herein.

Claims

CLAIMSWhat is claimed is:

1. A user equipment (UE) for wireless communication, comprising: at least one memory; and at least one processor coupled with the at least one memory and configured to cause the UE to: obtain a set of multiple bits; retrieve one or more interleaver parameters stored in the at least one memory; generate, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; map the set of multiple interleaved bits to a set of binary modulated symbols; and transmit the set of binary modulated symbols.

2. The UE of claim 1 , wherein multiple sets of one or more interleaver parameters are stored in the at least one memory.

3. The UE of claim 2, wherein the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth.

4. The UE of claim 2, wherein the at least one processor is further configured to cause the UE to: receive an identifier of one of the multiple sets of one or more interleaver parameters; and generate the set of multiple interleaved bits using the identified one of the multiple sets of one or more interleaver parameters.

5. The UE of claim 2, wherein the at least one processor is further configured to cause the UE to determine, based on a strength of an incident power signal, one of the multiple sets of one or more interleaver parameters to use to generate the set of multiple interleaved bits.

6. The UE of claim 2, wherein each set of the multiple sets of one or more interleaver parameters is stored in a different portion of a data structure in the at least one memory.

7. The UE of claim 2, wherein the at least one processor is further configured to cause the UE to transmit an identifier of one of the multiple sets of one or more interleaver parameters that the UE used to generate the set of multiple interleaved bits.

8. The UE of claim 7, wherein the at least one processor is further configured to cause the UE to transmit the identifier in a control message.

9. The UE of claim 2, wherein the set of multiple bits has a larger block size than a block size of any of the multiple sets of one or more interleaver parameters, and the at least one processor is further configured to cause the UE to: segment the set of multiple bits into multiple segments of bits; select, for each of the multiple segments of bits, one of the multiple sets of one or more interleaver parameters; generate, for each of the multiple segments of bits, a subset of multiple interleaved bits based at least in part on the selected one of the multiple sets of one or more interleaver parameters; and concatenate the generated subsets of multiple interleaved bits.

10. The UE of claim 2, wherein the set of multiple bits has a smaller block size than a block size of any of the multiple sets of one or more interleaver parameters, and the at least one processor is further configured to cause the UE to: generate an augmented set of bits by adding one or more filler bits to the set of multiple bits; and generate, based on the one or more interleaver parameters and the augmented set of bits, the set of multiple interleaved bits.

11. The UE of claim 1 , wherein the at least one processor is further configured to cause the UE to obtain the set of multiple bits from at least one of a Manchester encoder or a Miller encoder.

12. The UE of claim 1, wherein the at least one processor is further configured to cause the UE to map the set of multiple interleaved bits to a set of binary modulated symbols using at least one of amplitude-shift keying (ASK), frequency-shift keying (FSK), or phase-shift keying (PSK).

13. The UE of claim 1, wherein the UE comprises at least one of an Ambient Internet of Things (loT) device, a passive device or semi-passive device using a backscattering transmission technique, or an active device that generates and amplifies a signal internally.

14. A method performed by a UE, the method comprising: obtaining a set of multiple bits; retrieving one or more interleaver parameters stored in at least one memory of the UE; generating, based at least in part on the one or more interleaver parameters and the set of multiple bits, a set of multiple interleaved bits; mapping the set of multiple interleaved bits to a set of binary modulated symbols; and transmitting the set of binary modulated symbols.

15. The method of claim 14, wherein multiple sets of one or more interleaver parameters are stored in the at least one memory.

16. The method of claim 15, wherein the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth.

17. A base station for wireless communication, comprising: at least one memory; and at least one processor coupled with the at least one memory and configured to cause the base station to: at least one of transmit a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receive a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receive a set of binary modulated symbols; map the set of binary modulated symbols to a set of multiple interleaved bits; generate, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and decode the set of multiple bits.

18. The base station of claim 17, wherein the one or more interleaver parameters in each set of one or more interleaver parameters include one or more of precomputed interleaver indices, an interleaver pattern, a code rate, a block size, or an interleaver depth.

19. The base station of claim 17, wherein the at least one processor is further configured to cause the base station to: receive the set of binary modulated symbols from an apparatus; and determine the first identifier based on a received signal strength from the apparatus and decoding errors at the base station.

20. A method performed by a base station, the method comprising: at least one of transmitting a first identifier of one of multiple sets of one or more interleaver parameters for generation of interleaved bits, or receiving a second identifier of one of multiple sets of one or more interleaver parameters for interleaved bits; receiving a set of binary modulated symbols; mapping the set of binary modulated symbols to a set of multiple interleaved bits; generating, based at least in part on a set of one or more interleaver parameters indicated by the first identifier or the second identifier, a set of multiple bits; and decoding the set of multiple bits.

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