Methods and apparatus for addressing a quantum computing node

Abstract

A method of addressing a first set of quantum computing nodes in a network, wherein the network further comprises a controller node comprising N qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, is disclosed. The method comprises obtaining, at the controller node, information indicating a number of quantum computing nodes within the first set; determining, at the controller node, an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; preparing, at the controller node, the N qubits in the initial quantum state; applying, at each quantum computing node of the first set, a Hadamard gate operation to put each of the one or more ancillary qubits into an equal superposition state; applying, at the controller node, M controlled unitary gate operations on the N qubits, wherein the mth controlled unitary gate operation is controlled by the mth ancillary qubit of the set of M ancillary qubits, wherein the mth controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, …, M; applying, at the first set of quantum computing nodes, an inverse quantum Fourier transform operation to the set of M ancillary qubits; and performing, at each quantum computing node of the first set, a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

Description

[0001] METHODS AND APPARATUS FOR ADDRESSING A QUANTUM COMPUTING NODE

[0002] Technical Field

[0003] The present disclosure relates to methods of addressing a first set of quantum computing nodes in a network. The present disclosure also relates to a system, a quantum computing node, and a controller node for addressing a first set of quantum computing nodes in a network.

[0004] Background

[0005] Telecommunication networks are evolving to provide limitless connectivity and to enable latency sensitive applications (such as augmented reality, cloud gaming, for example) through intelligent network platforms. These network platforms may rely on heterogenous computing accelerators in the edge to cloud continuum to meet the diverse requirements of future applications.

[0006] Several problems relating to telecommunication networks have been solved on quantum computers. Examples of such problems include i) Fourier transforms ii) maximum likelihood based soft Multiple-Input Multiple-Output (MIMO) detection, iii) offloading user equipment (UE) specific tasks to edge computing servers, and iv) offloading UEs to micro base stations within a coverage area of a macro cell to improve the quality of service.

[0007] Providing confidential and trustworthy computing in telecommunication networks remains a challenging task due to the complexity of such networks. Confidential and trustworthy computing may be realised through the provision of a secret and reliable addressing scheme in the network. However, current addressing schemes are complex and prone to eavesdropping. Current addressing schemes rely on complex mathematical problems and certificates, but are not fundamentally, physically secret. This becomes a problem when the encrypted address, generated by the addressing scheme, is accessible to an eavesdropper on an interconnect / channel in the network.

[0008] Distributed quantum computing algorithms (for example, blind quantum computing) involve non classical operations (for example, entanglement), which make them suitable for secret addressing schemes. A large proportion of existing addressing solutions (see [3], [4],

[0011] ,

[0012] ,

[0019] ,

[0020] ) involve classically addressing each node in a network, and have been proven to essentially be secure against classical attacks. However, these solutions are not inherently secret between the controller / server and the specific node that has been addressed. Moreover, classical modes of node addressing in a network require additional schemes to enable them to be secret (such as digital signatures, certificates, or a hashing function). This leads to additional resource overheads when implementing these solutions.

[0009] Some existing quantum solutions (see

[0021] ,

[0022] ) focus on the addressing of individual qubits within a quantum processing unit node, and not on the addressing of the nodes themselves. These solutions do not consider addressing the quantum processing unit nodes themselves, which comprise a number of qubits within them. [2] uses superpositions of states shared among different parties in a network (i.e., transmitting quantum states existing in a superposition of various locations or paths simultaneously within the network), hence distributing quantum information in a delocalized way, but there is no addressing of these various locations (nodes) in the network.

[0010] Some existing solutions (see [1], [5],

[0016] ,

[0017] ) apply to one specific qubit modality (for example, photonics), and do not provide a general addressing solution that is applicable to any type of qubit modality.

[0011] Some existing solutions (see

[0013] ,

[0014] ,

[0015] ,

[0018] ) focus on quantum key distribution (QKD). These solutions are used to produce and distribute only a single-use, secret, secure, random key, which can then be used to encrypt (and decrypt) a message only a single time (such as the one-time pad classical encryption technique, for example).

[0012] There is therefore a need for an addressing scheme that can generate and assign secret, unique and reliable addresses to nodes in a network.

[0013] Summary

[0014] It is an aim of the present disclosure to provide methods, a system, a controller node, a quantum computing node and a computer readable medium which at least partially address one or more of the challenges discussed above. According to a first aspect of the present disclosure, there is provided a method of addressing a first set of quantum computing nodes in a network, wherein the network further comprises a controller node comprising A / qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The method comprises obtaining, at the controller node, information indicating a number of quantum computing nodes within the first set; determining, at the controller node, an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; preparing, at the controller node, the N qubits in the initial quantum state; applying, at each quantum computing node of the first set, a Hadamard gate operation to put each of the one or more ancillary qubits into an equal superposition state; applying, at the controller node, M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, applying, at the first set of quantum computing nodes, an inverse quantum Fourier transform operation to the set of M ancillary qubits; and performing, at each quantum computing node of the first set, a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

[0015] According to a second aspect of the present disclosure, there is provided a method, performed by a controller node in a network, of addressing a first set of quantum computing nodes in the network, wherein the controller node comprises N qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The method comprises obtaining information indicating a number of quantum computing nodes within the first set; determining an initial quantum state for the N qubits, and a unitary operator 1 / of the initial quantum state; preparing the N qubits in the initial quantum state; and applying M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M.

[0016] According to a third aspect of the present disclosure, there is provided a method, performed by a quantum computing node in a network, of addressing a first set of quantum computing nodes in the network, wherein the network further comprises a controller node comprising A / qubits, wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, and wherein the quantum computing node is part of the first set. The method comprises applying a Hadamard gate operation to put each of the one or more ancillary qubits of the set of M ancillary qubits comprised at the quantum computing node into an equal superposition state; at each of the one or more ancillary qubits, controlling one of M controlled unitary gate operations that have been applied by the controller node on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, applying an inverse quantum Fourier transform operation to the set of M ancillary qubits; and performing a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

[0017] According to a fourth aspect of the present disclosure, there is provided a system for addressing a first set of quantum computing nodes in a network, the system comprising first set of quantum computing nodes and a controller node in the network, wherein the controller node comprises N qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The system is configured to obtain, at the controller node, information indicating a number of quantum computing nodes within the first set; determine, at the controller node, an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; prepare, at the controller node, the N qubits in the initial quantum state; apply, at each quantum computing node of the first set, a Hadamard gate operation to put each of the one or more ancillary qubits into an equal superposition state; apply, at the controller node, M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, apply, at the first set of quantum computing nodes, an inverse quantum Fourier transform operation to the set of M ancillary qubits; and perform, at each quantum computing node of the first set, a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node. According to a fifth aspect of the present disclosure, there is provided a controller node in a network, for addressing a first set of quantum computing nodes in the network, wherein the controller node comprises A / qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The controller node is configured to obtain information indicating a number of quantum computing nodes within the first set; determine an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; prepare the N qubits in the initial quantum state; and apply M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M.

[0018] According to a sixth aspect of the present disclosure, there is provided a quantum computing node in a network, for addressing a first set of quantum computing nodes in the network, wherein the network further comprises a controller node comprising N qubits, wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, and wherein the quantum computing node is part of the first set. The quantum computing node is configured to apply a Hadamard gate operation to put each of the one or more ancillary qubits of the set of M ancillary qubits comprised at the quantum computing node into an equal superposition state; at each of the one or more ancillary qubits, control one of M controlled unitary gate operations that have been applied by the controller node on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, apply an inverse quantum Fourier transform operation to the set of M ancillary qubits; and perform a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

[0019] According to a seventh aspect of the present disclosure, there is provided a computer program product comprising a computer readable medium, the computer readable medium having computer readable code embodied therein, the computer readable code being configured such that, on execution by a suitable computer or processor, the computer or processor is caused to perform a method according to any one of the aspects or examples of the present disclosure.

[0020] Brief Description of the Figures

[0021] For a better understanding of the present disclosure, and to show more clearly how it may be carried into effect, reference will now be made, by way of example, to the following drawings in which:

[0022] Figure 1 illustrates a controller node;

[0023] Figure 2 illustrates a quantum circuit for addressing a first set of quantum computing nodes in a network;

[0024] Figure 3 illustrates a method of addressing a first set of quantum computing nodes in a network;

[0025] Figure 4 illustrates a quantum circuit for addressing a first set of quantum computing nodes in a network;

[0026] Figure 5 illustrates a method of addressing a first set of quantum computing nodes in a network;

[0027] Figure 6 illustrates a quantum circuit for addressing a first set of quantum computing nodes in a network;

[0028] Figure 7 illustrates a method of addressing a first set of quantum computing nodes in a network;

[0029] Figure 8 is a flow chart illustrating process steps in a method of addressing a first set of quantum computing nodes in a network;

[0030] Figure 9 is a flow chart illustrating process steps in a method, performed by a controller node in a network, of addressing a first set of quantum computing nodes in the network; Figure 10 is a flow chart illustrating process steps in a method, performed by a quantum computing node in a network, of addressing a first set of quantum computing nodes in the network;

[0031] Figure 11 is a schematic of an example of a system for addressing a first set of quantum computing nodes in a network;

[0032] Figure 12 is a block diagram illustrating a controller node; and

[0033] Figure 13 is a block diagram illustrating a quantum computing node that is part of a first set of quantum computing nodes.

[0034] Detailed Description

[0035] Embodiments of the present disclosure relate to improved systems, apparatuses, and methods for addressing a quantum computing node in a network. Certain aspects of this disclosure provide systems, apparatuses and methods for generating and assigning a unique, secret address to individual quantum computing nodes in a network, through the use of distributed quantum computing (for example, using quantum phase estimation). Certain aspects of this disclosure therefore provide a secret addressing scheme that can be deployed in a network.

[0036] In certain embodiments, a controller node, configured to generate a unique and secret address for each quantum computing node in a network, is provided. The controller node may assign these addresses to the quantum computing nodes without transmitting the addresses over a channel, which protects from eavesdropping. The controller can encode these non-local addresses at the quantum computing nodes through the use of distributed quantum computing (for example, through the use of eigenstate operation(s) and address kick-back, which will be described in greater detail below). In some embodiments, the addresses may be encoded on a composite system comprising qubits belonging to the quantum computing nodes, and comprising qubits belonging to the controller node, through local state preparation and operations that are performed only at the controller node based on the address to be encoded. These operations may use, for example, Einstein-Podolsky-Rosen (EPR) pairs. The controller node may generate and assign these addresses using different quantum computing protocols (for example, quantum phase estimation (QPE), iterative quantum phase estimation (IQPE), etc), as described in greater detail below. Figure 1 illustrates a controller node 100 (also referred to herein as a secret addressing scheme manager), according to embodiments of the present disclosure. The controller node 100 generates and assigns secret addresses to a first set of quantum computing node in a network. The controller node 100 may be a central node of the network, and the controller node is responsible for controlling the first set of quantum computing nodes. For example, the controller node 100 may perform one or more of the following actions: assigning distributed tasks to the first set of quantum computing nodes, sending / transmitting / initiating transmission of execution instructions to the first set of quantum computing nodes, and / or keeping track of data and communication qubits used during the execution of tasks (such as resource management, task scheduling, etc.). The quantum computing nodes may be basic computing units (for example, computing units that are configured to execute tasks that have been assigned to them, rather than configured to assign tasks themselves and / or keep track of data and communication qubits used during the execution of tasks), and may be responsible for executing tasks or quantum circuits that have been assigned to them by the controller node 100. It will be appreciated that each of the first set of quantum computing nodes and / or the controller node 100 may respectively comprise a quantum processing unit (QPU) and / or other components (for example, a central processing unit (CPU), a memory, a graphics processing unit (GPU)).

[0037] The controller node 100 generates and assigns secret addresses to a first set of quantum computing nodes in a network as follows. Firstly, the controller node 100 receives information relating to the network as an input. The received information may comprise information relating to the first set of quantum computing nodes (for example, the number of quantum computing nodes within the first set and / or the number of qubits comprised at each quantum computing node in the first set), and / or information relating the controller node 100 (for example, the number of qubits comprised at the controller node 100).

[0038] The received information may further comprise information relating to the channels that connect the nodes in the network. The received information may further comprise, for each of the first set of quantum computing nodes, information indicating one or more operations that the quantum computing node can perform (for example, a Hadamard operation, a rotation operation, a measurement operation, etc.). The controller node 100 then, based on the input, generates and assigns secret addresses to the first set of quantum computing nodes, to output an addressing scheme. The addressing scheme comprises, for each quantum computing node of the first set, a secret address that has been assigned to that quantum computing node. That is, the controller node 100 obtains a list of secret addresses for each quantum computing node within the first set. On outputting the addressing scheme, each of the quantum computing nodes within the first set will have its own secure address stored within it.

[0039] The addresses are secret in the sense that each address is only shared between the controller node 100 and the quantum computing node that it has been assigned to. The controller node 100 is configured such that, whenever a new quantum computing node is introduced into the network, the controller node 100 assigns a new secret address to the new quantum computing node, and outputs an updated addressing scheme further comprising the new secret address assigned to the new quantum computing node.

[0040] To generate and assign a secret address to each quantum computing node of the first set, the controller node 100 uses distributed quantum computing. The controller node 100, based on information relating to the network architecture that has been received as an input, uses distributed quantum computing to allocate a unique, secret address to each of the quantum computing nodes within the first set. Using distributed quantum computing, the controller node 100 assigns an address to each of the quantum computing nodes within the first set, without transferring said addresses over a channel, by using the concept of phase kick-back. The concept of phase kick-back is explained in greater detail below.

[0041] A number of examples of how the controller node 100 may use distributed quantum computing to generate and assign a secret address to each quantum computing node of the first set are now described with reference to Figs. 2 to 7.

[0042] Figure 2 illustrates a quantum circuit 200 for addressing a first set of quantum computing nodes in a network, according to certain embodiments of the present disclosure. The quantum circuit 200 uses QPE to assign addresses to multiple quantum computing nodes in a network at once. Therefore, the quantum circuit 200 need only be executed once in order to address all of the quantum computing nodes comprised within the first set. The quantum circuit 200 enables the controller node to assign an address to each of the quantum computing nodes within the first set, without transferring said addresses over a channel, by using the concept of phase kick-back.

[0043] In this embodiment, the first set of quantum computing nodes comprises P quantum computing nodes (Node-1 , .... Node-p). The QPU of the controller node comprises N qubits 202, which have been initialised in the state |t ). A set of M ancillary qubits 204a, 204b, ... , 204m are shared among the QPUs of the quantum computing nodes Node-1 to Node-p. That is, each of the quantum computing nodes of the first set comprises one or more ancillary qubits of the set of M ancillary qubits 204a, 204b, ... , 204m. Each qubit of the set of M ancillary qubits 204a, 204b, ... , 204m is initially in the state |0).

[0044] In this embodiment, and in the embodiments described with reference to Figs. 3 to 5, M is equivalent to the number of addressing bits that are to be assigned to the quantum computing node(s).

[0045] It will be appreciated that, in this embodiment, addresses are able to be generated and assigned to multiple quantum computing nodes at once, given a single initial state of the QPU of the controller node.

[0046] In the quantum circuit 200, the set of M ancillary qubits 204a, 204b, ... , 204m are firstly initialised in an equal superposition of all possible basis states, through the application of a respective Hadamard gate 206a, 206b, ... 206m on each qubit of the set of M ancillary qubits 204a, 204b, ... , 204m.

[0047] The quantum circuit 200 then encodes an address at each of the quantum computing nodes Node-1 to Node-p, through the application of M controlled U operations 208a, 208b, ... 208m.

[0048] The qubit of the set of M ancillary qubits 204a, 204b, ... , 204m (where m = 1, M) is the control qubit of the controlled U operation. For each controlled U operation, all of the N qubits 202 are target qubits. It will be appreciated that, as the control qubit and the target qubits for each controlled U operation are located at different nodes, each controlled U operation can be implemented by a non-local mode of implementing multiqubit gates (for example, TeleGate, TeleData, teleportation primitives), such as the Telegate operation 314 using an EPR pair that has been previously shared between the controller node and the quantum computing node comprising the mthancillary qubit. It will be appreciated that no information relating to the address can be obtained by an eavesdropper listening to a channel during the execution of these non-local gates.

[0049] In this embodiment, the mthcontrolled unitary gate operation is based on an applied unitary operator U2'(m'1>that is equivalent to 2fm-7applications of the unitary operator U (where |t ) is an eigenstate of the unitary operator LT). Therefore, applying the controlled U operation on the N qubits 202 encodes a part of the eigenvalue phase of the applied unitary operator U2'(m'1>into the state of the ancillary qubit. That is, the controlled U operation on the N qubits “kicks back” the part of the eigenvalue phase of the applied unitary operator U2'(m'1>to the ancillary qubit. This part of the eigenvalue phase is an address bit of the address that has been assigned to the quantum computing node that comprises the ancillary qubit.

[0050] The addresses are then decoded at the quantum computing nodes Node-1 to Node-p. An inverse Quantum Fourier Transform (QFT-1) 210 is applied to the set of M ancillary qubits 204a, 204b, ... , 204m. In this embodiment, the inverse Quantum Fourier Transform 210 is a non-local operation that is performed over multiple quantum computing nodes, Node-1 to Node-p.

[0051] Following this, at each of the quantum computing nodes Node-1 to Node-p, for the one or more ancillary qubits of the set of M ancillary qubits 204a, 204b, ... , 204m that are comprised at that node, a measurement 212a, 212b, ... 212m is performed on each respective ancillary qubit in the computational basis.

[0052] Performing a measurement on the ancillary qubit enables the part of the eigenvalue phase of the applied unitary operator U2'(m'1>(that was encoded into state of the ancillary qubit) to be obtained. Therefore, performing a measurement on the mthancillary qubit enables the addressing bit that was encoded into state of the ancillary qubit to be obtained.

[0053] For each of the quantum computing nodes Node-1 to Node-p, by performing measurements on each of the one or more ancillary qubits comprised at that node, the quantum computing node is able to obtain the complete address that has been assigned to the quantum computing node. The controller node is aware of the assigned addresses, by virtue of knowing which of the M controlled U operations 208a, 208b, ... 208m were controlled by the ancillary qubits of the quantum computing node, and therefore, which addressing bits have been “kicked back” to the ancillary qubits of the quantum computing node.

[0054] Figure 3 illustrates a method 300 of addressing a first set of quantum computing nodes in a network, which may be performed by the quantum circuit 200 described above.

[0055] At step 302, the controller node obtains data relating to the architecture of the network. This data may describe the number of quantum computing nodes belonging to the first set, information relating to the controller node, information relating to the channels between the nodes within the network, and / or operations that can be performed by each quantum computing node of the first set. The operations may include one or more of a Hadamard operation, a rotation operation, a measurement operation, etc.

[0056] At step 304, the controller node determines an initial quantum state |t > for N qubits comprised at the controller node, and a unitary operator U of the initial quantum state |t >, such that L / |^)= |^), where A is an eigenvalue of the unitary operator, and |t ) is a eigenstate of the unitary operator.

[0057] At step 306, the controller node prepares the N qubits in the initial quantum state |t >.

[0058] At step 308, each of the quantum computing nodes of the first set, applies respectively to each of the one or more ancillary qubits of the set of M ancillary qubits comprised at that quantum computing node, a Hadamard gate (H-gate). This initialises the set of M ancillary qubits in an equal superposition of all possible basis states.

[0059] At step 310, the controller node iteratively applies M controlled unitary gate operations to the N qubits. Each of these M controlled unitary gate operations is respectively controlled by each ancillary qubit of the set of M ancillary qubits (that is, these operations are controlled by ancillary qubits comprised at the quantum computing nodes).

[0060] The mthcontrolled unitary gate operation (where m = 1, M) is controlled by the ancillary qubit of the set of M ancillary qubits. In this embodiment, the controlled unitary gate operation applies the unitary operator U2'(m'1>to the N qubits. The unitary operator U2'(m'1>is equivalent to 2fm-7applications of the unitary operator U. Applying the controlled unitary gate operation encodes, into the state of the ancillary qubit, a part of the eigenvalue phase of the applied unitary operator u2A(m'1>. This part of the eigenvalue phase is an address bit of the address that has been assigned to the quantum computing node that comprises the ancillary qubit.

[0061] That is, iteratively applying the M controlled unitary gate operations to the N qubits in this manner, encodes the addresses of the quantum computing nodes of the first set into the states of the ancillary qubits of the quantum computing nodes.

[0062] As noted above, as the control qubit and the target qubits for each controlled U operation are located at different nodes, each controlled U operation can be implemented by a non-local mode of implementing multi-qubit gates. These nonlocal controlled operations may be performed using the TeleGate primitive, which uses a previously shared EPR pair, as shown in Figure 2.

[0063] At step 312, the quantum computing nodes of the first set combinedly measure the state of their one or more ancillary qubits (of the set of M ancillary qubits) in the Fourier basis, to obtain, at each quantum computing node, the address of that quantum computing node.

[0064] At step 314, the controller node appends the addressing scheme to comprise the addresses that have been assigned to the quantum computing nodes of the first set. Step 314 may comprise forming or updating a list that comprises the secret addresses for each quantum computing node within the first set.

[0065] At step 316, the controller node determines whether there are any new quantum computing node(s) in the network. If the controller node determines that there are any new quantum computing nodes in the network, the controller node repeats steps 302- 314 to address the new quantum computing node(s). It will be appreciated that, in the repetition of step 302, the first set of quantum computing node is updated to further comprise the new quantum computing node(s).

[0066] Figure 4 illustrates a quantum circuit 400 for addressing a first set of quantum computing nodes in a network, according to certain embodiments of the present disclosure. The quantum circuit 400 uses QPE to addresses each quantum computing node in the network individually. Therefore, one execution of the quantum circuit 400 will address one quantum computing node. That is, in this embodiment, the first set comprises a single quantum computing node. The quantum circuit 400 may then be executed for each quantum computing node in the network individually, where the first set will be updated with each execution to comprise a single quantum computing node that is currently being addressed.

[0067] As illustrated in Figure 4, in this embodiment, the set of M ancillary qubits are comprised at the single quantum computing node that is currently being addressed. For each execution of the quantum circuit 400, the set of M ancillary qubits will comprise the ancillary qubits at the quantum computing node that is currently being addressed.

[0068] That is, the main difference between the quantum circuit 200 and the quantum circuit 400 is which node(s) possess the ancillary qubits. In the quantum circuit 200, the ancillary qubits are comprised at all of the quantum computing nodes in the network (that is, the first set comprises all of the quantum computing nodes in the network). In the quantum circuit 400, the ancillary qubits are comprised at one quantum computing node in the network (that is, the first set comprises one quantum computing node in the network). Since, in this embodiment, the ancillary qubits belong to only one quantum computing node, executing the quantum circuit illustrated in Fig. 4 will generate an address for the one quantum computing node.

[0069] It will be appreciated that, the number of ancillary qubits required to execute the quantum circuit 400 is less than the number of ancillary qubits required to execute the quantum circuit 200. This reduces the size of the inverse Quantum Fourier Transform (QFT-1) in the quantum circuit 400. Furthermore, as all the ancillary qubits are possessed by one single quantum computing node in the quantum circuit 400, there are no non-local operations involved in implementing the inverse Quantum Fourier Transform (QFT-1) in quantum circuit 400. This may significantly reduce the number of EPR pairs required to address the quantum computing nodes in the network.

[0070] The quantum circuit 400 enables the controller node to assign an address to a single quantum computing node, without transferring said address over a channel, by using the concept of phase kick-back.

[0071] In this embodiment, the first set of quantum computing nodes comprises a single quantum computing node, Node-p. The QPU of the controller node comprises N qubits 402, which have been initialised in the state |t ). The set of M ancillary qubits 404a, 404b, ... 404m are comprised within the QPU of the quantum computing node Node-p. Each qubit of the set of M ancillary qubits are initially in the state |0).

[0072] In the quantum circuit 400, the set of M ancillary qubits 404a, 404b, ... 404m are initialised in an equal superposition of all possible basis states, through the application of a respective Hadamard gate 406a, 406b, ... 406m on each qubit of the set of M ancillary qubits 404a, 404b, ... 404m respectively.

[0073] The quantum circuit 400 then encodes an address at the quantum computing node Node-p, through the application of M controlled II operations 408a, 408b, ... 408m.

[0074] The qubit of the set of M ancillary qubits (where m = 1, M) is the control qubit of the controlled U operation. For each controlled U operation, all of the N qubits 402 are target qubits. It will be appreciated that, as the control qubit and the target qubits for each controlled U operation are located at different nodes, each controlled U operation can be implemented by a non-local mode of implementing multi-qubit gates (for example, TeleGate, TeleData, teleportation primitives), such as the Telegate operation 414 using an EPR pair that has been previously shared between the controller node and the quantum computing node.

[0075] In this embodiment, the controlled unitary gate operation is based on an applied unitary operator U2'(m'1>that is equivalent to 2fm-7applications of the unitary operator U (where |t ) is an eigenstate of the unitary operator LT). Therefore, applying the controlled U operation on the N qubits 402 encodes a part of the eigenvalue phase of the applied unitary operator U2'(m'1>into the state of the ancillary qubit (where U is the unitary operator of the state |t ». That is, applying the controlled U operation on the

[0076] N qubits 402 “kicks back” the part of the eigenvalue phase of the applied unitary operator U2*(m'1)to t|ie mthanci||ary qubit. This part of the eigenvalue phase is an address bit of the address that has been assigned to the single quantum computing node Node-p.

[0077] The addresses are then decoded at the quantum computing node Node-p. An inverse Quantum Fourier Transform (QFT-1) 410 is applied to the set of M ancillary qubits 404a, 404b, ... 404m. Following this, the quantum computing node Node-p, for each ancillary qubit of the set of M ancillary qubits 404a, 404b, ... 404m, performs a measurement 412a, 412b, ... 412m on the ancillary qubit in a computational basis. Performing a measurement on the mthancillary qubit enables the part of the eigenvalue phase of the applied unitary operator U2'(m'1>(that was encoded into state of the ancillary qubit) to be obtained. Therefore, performing a measurement on the ancillary qubit enables the addressing bit that was encoded into state of the ancillary qubit to be obtained.

[0078] For the single quantum computing node Node-p, by performing measurements 412a, 412b, ... 412m on each of the ancillary qubits, the quantum computing node is able to obtain the complete address that has been assigned to the quantum computing node. The controller node is aware of the assigned address, by virtue of knowing the M controlled U operations 408a, 408b, ... 408m that were controlled by the ancillary qubits of the quantum computing node 404a, 404b, ... 404m, and therefore, which addressing bits have been “kicked back” to the ancillary qubits of the quantum computing node.

[0079] Figure 5 illustrates a method 500 of addressing a first set of quantum computing nodes in a network, which may be performed by the quantum circuit 400 described above. As noted above, in this embodiment, the first set of quantum computing nodes comprises a single quantum computing node in the network.

[0080] At step 502, the controller node obtains data relating to the architecture of the network. This data may describe the number of quantum computing nodes in the network, information relating to the controller node, information relating to the channels between the nodes within the network, and / or operations that can be performed by each quantum computing node in the network. The operations may include one or more of a Hadamard operation, a rotation operation, a measurement operation, etc.

[0081] At step 504, the controller node determines an initial quantum state |t > for N qubits comprised at the controller node, and a unitary operator U of the initial quantum state |t >, such that L / |^)= |^), where A is an eigenvalue of the unitary operator, and |t > is an eigenstate of the unitary operator.

[0082] At step 506, the controller node prepares the N qubits in the initial quantum state |t >.

[0083] At step 508, the single quantum computing node of the first set applies to each ancillary qubit of the set of M ancillary qubits respectively, a Hadamard gate (H-gate). This initialises the set of M ancillary qubits in an equal superposition of all possible basis states.

[0084] At step 510, the controller node iteratively applies M controlled unitary gate operations to the N qubits. Each of these M controlled unitary gate operations is respectively controlled by each qubit of the set of M ancillary qubits (that is, these operations are controlled by ancillary qubits comprised at the single quantum computing node).

[0085] The mthcontrolled unitary gate operation (where m = 1, M) is controlled by the ancillary qubit of the set of M ancillary qubits. In this embodiment, the controlled unitary gate operation applies the unitary operator U2'(m'1>to the N qubits. The unitary operator U2'(m'1>is equivalent to 2fm-7applications of the unitary operator U. Applying the controlled unitary gate operation encodes, into the state of the mthancillary qubit, a part of the eigenvalue phase of the applied unitary operator U2'(m'1>. This part of the eigenvalue phase is an address bit of the address that has been assigned to single quantum computing node.

[0086] That is, iteratively applying the M controlled unitary gate operations to the N qubits in this manner, encodes the address of the quantum computing node into the states of the ancillary qubits at the quantum computing node.

[0087] As noted above, as the control qubit and the target qubits for each controlled II operation are located at different nodes, each controlled U operation can be implemented by a non-local mode of implementing multi-qubit gates. These nonlocal controlled operations may be performed using the TeleGate primitive, which uses a previously shared EPR pair, as shown in Figure 4.

[0088] At step 512, the quantum computing node combinedly measures the state of the set of M ancillary qubits in the Fourier basis, to obtain, at the quantum computing node, the address of the quantum computing node (where this address has been “kicked back” to the quantum computing node in step 510).

[0089] At step 514, the controller node appends the addressing scheme to comprise the address that has been assigned to the quantum computing node. Step 514 may comprise forming or updating a list that comprises the secret addresses for each quantum computing node within the network. At step 516, the controller node determines whether there are any further quantum computing nodes in the network that are yet to be addressed. In response to determining that there are quantum computing nodes in the network that are yet to be addressed, the method 500 returns to step 504, and repeats steps 504-516 for another quantum computing node in the network that has yet to be addressed. In this repetition of steps 504 to 516, the first set is updated to comprise the single quantum computing node that is currently being addressed.

[0090] Figure 6 illustrates a quantum circuit 600 for addressing a first set of quantum computing nodes in a network, according to embodiments of the present disclosure. The quantum circuit 600 uses IQPE to assign addresses to each quantum computing node in the network individually. Therefore, one execution of the quantum circuit 600 will address one quantum computing node. That is, in this embodiment, the first set comprises one quantum computing node. The quantum circuit 600 may then be executed for each quantum computing node in the network individually, where the first set will be updated before each execution to comprise the single quantum computing node that is currently being addressed.

[0091] In the quantum circuit 600, only one ancillary qubit per quantum computing node is required to address the quantum computing node. That is, in this embodiment, significantly fewer ancillary qubits are required in order to address the quantum computing nodes in the network. However, it will be appreciated that, if more than one address bit is required for each quantum computing node, there may be an overhead resulting from resetting, reinitializing and applying phase correction in order to assign the complete address (comprising multiple address bits) to each quantum computing node. However, all these operations are implemented locally at each quantum computing node, as illustrated in Fig. 6.

[0092] This method enables the controller node to assign an address to a single quantum computing node, without transferring said address over a channel, by using the concept of phase kick-back.

[0093] In this embodiment, the first set of quantum computing nodes comprises a single quantum computing node Node-p, and the set of M ancillary qubits comprises a single ancillary qubit qo (which is comprised at the quantum computing node Node-p). The QPU of the controller node comprises A / qubits 602, which have been initialised in the state |t ). The single ancillary qubit qo is initially in the state |0).

[0094] In the quantum circuit 600, the single ancillary qubit, qo is initialised in an equal superposition of all possible basis states, through the application of a Hadamard gate 604 on the ancillary qubit qo.

[0095] The quantum circuit 600 then encodes a first address bit at the quantum computing node Node-p, through the application of a first controlled U operation 606.

[0096] The first controlled U operation 606 is controlled by the ancillary qubit qo (that is, the ancillary qubit qo is the control qubit of the first controlled U operation 606), and all of the N qubits 602 are target qubits of the first controlled U operation 606. It will be appreciated that, as the control qubit and the target qubits for the first controlled U operation 606 are located at different nodes, the first controlled U operation 606 can be implemented by a non-local mode of implementing multi-qubit gates (for example, TeleGate, TeleData, teleportation primitives), such as the Telegate operation 608 using an EPR pair that has been previously shared between the controller node and the quantum computing node.

[0097] In this embodiment, the first controlled U operation 606 is based on an applied unitary operator U2'(T'1>that is equivalent to 2<T~1>applications of the unitary operator U (where |t ) is an eigenstate of the unitary operator U, and where T is a number of addressing bits of the address to be encoded at the quantum computing node).

[0098] Therefore, applying the first controlled U operation 606 on the N qubits 602 encodes a part of the eigenvalue phase of the applied unitary operator U2'(T'1>into the state of the ancillary qubit qo. That is, applying the first controlled U operation 606 on the N qubits 602 “kicks back” the part of the eigenvalue phase of the applied unitary operator U2'(T'1>to the ancillary qubit qo. This part of the eigenvalue phase is a first addressing bit of the address that has been assigned to the single quantum computing node Node-p.

[0099] The first addressing bit is then decoded at the quantum computing node Node-p. The quantum computing node Node-p applies a Hadamard gate 610 to the ancillary qubit qo (that is, the quantum computing node Node-p applies a single qubit inverse Quantum Fourier Transform (QFT-1)). Following this, the quantum computing node Node-p performs a measurement 612 on the ancillary qubit qo in a computational basis. Performing a measurement 612 on the single ancillary qubit qo enables the part of the eigenvalue phase of the applied unitary operator U2'(T'1>that was encoded into state of the single ancillary qubit qo to be obtained. Therefore, performing a measurement 612 on the single ancillary qubit qo enables the addressing bit that was encoded into state of the single ancillary qubit qo to be obtained. The addressing bit is then stored at a first classical bit Co of a classical register 624.

[0100] The quantum computing node Node-p then reinitialises 614 the state of the ancillary qubit qo. In this example, the ancillary qubit is reset to the state |0). The ancillary qubit qo is then initialised in an equal superposition of all possible basis states, through the application of a Hadamard gate 616a on the ancillary qubit qo.

[0101] The quantum computing node Node-p then applies a phase correction 616b to the ancillary qubit qo, where this phase correction is based on previously obtained addressing bit (stored at the first classical bit Co). This phase correction enables the next addressing bit of the address to be encoded into the state of the ancillary qubit qo.

[0102] The quantum circuit 600 then encodes a second address bit at the quantum computing node Node-p, through the application of a second controlled U operation 618.

[0103] The second U operation is controlled by the ancillary qubit qo, and all of the N qubits 602 are target qubits of the second controlled U operation 618. The second controlled U operation 618 can be implemented by a non-local mode of implementing multi-qubit gates.

[0104] The second controlled U operation 618 is based on an applied unitary operator U2'(T'2>that is equivalent to 2<T~2>applications of the unitary operator U.

[0105] Therefore, applying the second controlled U operation 618 on the N qubits 602 encodes a part of the eigenvalue phase of the applied unitary operator U2'(T'2>into the state of the ancillary qubit qo. That is, the second controlled U operation 618 on the N qubits 602 “kicks back” the part of the eigenvalue phase of the applied unitary operator U2'(T'2>to the ancillary qubit qo. This part of the eigenvalue phase is a second addressing bit of the address that has been assigned to single quantum computing node Node-p. The second addressing bit is then decoded at the quantum computing node Node-p. The quantum computing node Node-p applies a Hadamard gate 620 to the ancillary qubit qo. Following this, the quantum computing node Node-p performs a measurement 622 on the ancillary qubit qo in a computational basis, to obtain the second addressing bit of the address for the quantum computing node Node-p. The second addressing bit is then stored at a second classical bit Ci of the classical register 624. That is, each obtained addressing bit is stored at a respective classical bit of the classical register 624.

[0106] The operations 614-622 may then be repeated to obtain further addressing bits at the quantum computing node Node-p, until a complete address for the quantum computing node Node-p has been obtained. It will be appreciated that, in this embodiment, for an sfhapplication of a controlled U operation in the quantum circuit 600, the controlled U operation that is applied will be based on the applied unitary operator U2'(T'S>, that is equivalent to 2<T~S>applications of the unitary operator U.

[0107] Figure 7 illustrates a method 700 of addressing a first set of quantum computing nodes in a network, which may be executed by the quantum circuit 600 described above. As noted above, in this embodiment, the first set of quantum computing nodes comprises a single quantum computing node in the network, and the set of M ancillary qubits comprises a single ancillary qubit that is comprised at the single quantum computing node.

[0108] At step 702, the controller node obtains data relating to the architecture of the network. This data may describe the number of quantum computing nodes in the network, information relating to the controller node, information relating to the channels between the nodes within the network (that is, the quantum computing nodes in the network and the controller node), and / or operations that can be performed by each quantum computing node in the network. The operations may include one or more of a Hadamard operation, a rotation operation, a measurement operation, etc.

[0109] At step 704, the controller node determines an initial quantum state |t > for N qubits comprised at the controller node, and a unitary operator U of the initial quantum state |t >, such that L / |^)= |^), where A is an eigenvalue of the unitary operator, and |t > is an eigenstate of the unitary operator.

[0110] At step 706, the controller node prepares the A / qubits in the initial quantum state \ . At step 708, the single quantum computing node of the first set, applies to the single ancillary qubit qo (which is comprised at the quantum computing node), a Hadamard gate (H-gate). This initialises the single ancillary qubit qo in an equal superposition of all possible basis states.

[0111] As noted above, in this embodiment, the set of M ancillary qubits comprises the single ancillary qubit qo. Therefore, in this embodiment, / W=1 , and at step 710, the controller node applies a single, first controlled unitary gate operation to the N qubits. This first controlled unitary operation is controlled by the single ancillary qubit qo comprised at the quantum computing node. The first controlled unitary gate operation is based on an applied unitary operator U2'(T'1>that is equivalent to 2<T~1>applications of the unitary operator U, where T is a number of addressing bits of the address to be encoded at the quantum computing node.

[0112] As noted above, applying the first controlled U operation on the N qubits encodes a part of the eigenvalue phase of the applied unitary operator U2'(T'1>into the state of the single ancillary qubit qo. This part of the eigenvalue phase is the first addressing bit of the address that has been assigned to the single quantum computing node.

[0113] That is, applying the first controlled U operation to the N qubits in this manner, encodes the first addressing bit of the address of the quantum computing node into the state of the single ancillary qubit qo.

[0114] As noted above, as the control qubit and the target qubits for the first controlled U operation are located at different nodes, the first controlled U operation can be implemented by a non-local mode of implementing multi-qubit gates. This nonlocal controlled operation may be performed using the TeleGate primitive, which uses a previously shared EPR pair, as shown in Figure 6.

[0115] At step 712, the quantum computing node measures the state of the single ancillary qubit qo in the Fourier basis, to obtain, at the quantum computing node, the first addressing bit of address of the quantum computing node.

[0116] At step 714, the controller node determines whether a complete address for the quantum computing node has been obtained at the quantum computing node. In response to determining that a complete address for the quantum computing node has not been obtained at the quantum computing node, the method 700 proceeds to step 716. In response to determining that a complete address for the quantum computing node has been obtained at the quantum computing node, the method 700 proceeds to step 718.

[0117] At step 716, the quantum computing node reinitialises the state of the ancillary qubit qo. For example, the ancillary qubit may be reset to the state |0). At step 716, the ancillary qubit qo is then initialised in an equal superposition of all possible basis states, through the application of a Hadamard gate on the ancillary qubit qo.

[0118] At step 716, the quantum computing node then applies a phase correction to the ancillary qubit qo, where this phase correction is based on the value of the previously obtained first addressing bit. This phase correction enables the next bit of the address to be encoded into the state of the ancillary qubit qo. The method 700 then proceeds to step 710.

[0119] The steps 710 to 714 are then repeated to obtain, at the quantum computing node, the second addressing bit of address of the quantum computing node. It will be appreciated that steps 710 to 714 of the method 700 will be repeated T times, in order to obtain a complete address at the quantum computing node. It will be appreciated that, for the sfhiteration of step 710, a sfhcontrolled U operation will be applied that is equivalent to the applied unitary operator U2'(T'S>.

[0120] At step 718, the controller node appends the addressing scheme to comprise the address that has been assigned to the quantum computing node. Step 718 may comprise forming or updating a list that comprises the secret addresses for each quantum computing node within the network.

[0121] At step 720, the controller node determines whether there are any further quantum computing nodes in the network that are yet to be addressed. In response to determining that there are quantum computing nodes in the network that are yet to be addressed, the method 700 then returns to step 704, and repeats for another quantum computing node in the network that has yet to be addressed. In this repetition of steps 704 to 720, the first set is updated to comprise the single quantum computing node that is currently being addressed, and the set of M ancillary qubits will be updated to comprise a single ancillary qubit that is comprised that quantum computing node. It will therefore be appreciated that a first set of quantum computing nodes in a network may be addressed via the use of different protocols, such as quantum phase estimation (described with reference to Figs. 2-5), or IQPE (described with reference to Figs. 6 and 7).

[0122] The controller node may select one of the methods 300, 500 or 700 to address a first set of quantum computing nodes in a network, based on an intent defined by a user. The intent may indicate how the user wishes to generate the secret addresses and / or indicate the method 300, 500 or 700 that the user wishes to use. The user may define the intent based on the implementation cost of each of the methods 300, 500 and 700 and / or how each of the methods 300, 500 and 700 are implemented.

[0123] For example, the intent may indicate that the user wishes to address all of the quantum computing nodes in the network in one go or may indicate that the user wishes to address the quantum computing nodes in the network one at a time.

[0124] Where the intent indicates that the user wishes to address all of the quantum computing nodes in the network in one go, and where a suitable number of EPR pairs are shared between the quantum computing nodes and the controller node in the network to implement the method 300, the controller node may determine to execute the method 300 in order to address the quantum computing nodes in the network.

[0125] Where the intent indicates that the user wishes to address the quantum computing nodes in the network one at a time, the controller node may determine to execute the either the method 500 or the method 700 in order to address the quantum computing nodes in the network. If more than one ancillary qubit is available at each of the quantum computing nodes that are to be addressed, the controller node may determine to execute the method 500 to address the quantum computing nodes in the network. If a quantum circuit of increased depth (which may lead to higher decoherence) is able to be supported to address each of the quantum computing nodes, the controller node may determine to execute the method 700 to address the quantum computing nodes in the network.

[0126] An overview of methods which may be performed according to different examples of the present disclosure are now described with reference to Figures 8-10. The methods 800, 900 and 1000 described below are example implementations of at least part of the methods 300, 500 and 700 described above.

[0127] Figure 8 is a flow chart illustrating process steps in a method 800 of addressing a first set of quantum computing nodes in a network, wherein the network further comprises a controller node comprising A / qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The method 800 is an example implementation of at least part of any of the methods 300, 500 and 700 described above.

[0128] In some embodiments, the N qubits are comprised within a quantum processing unit at the controller node, and, for each quantum computing node of the first set, the one or more ancillary qubits are comprised within a quantum processing unit at the quantum computing node.

[0129] In some embodiments, (for example, in embodiments according to the method 700 above), the first set of quantum computing nodes comprises one quantum computing node, and wherein the set of M ancillary qubits comprises one ancillary qubit.

[0130] In step 802, the method 800 comprises obtaining, at the controller node, information indicating a number of quantum computing nodes within the first set. In some embodiments, the method further comprises obtaining, at the controller node, information relating to one or more channels connecting the nodes in the network; and / or obtaining, at the controller node, for at least one quantum computing node of the first set, information indicating one or more quantum operations that can be performed by the quantum computing node.

[0131] In step 804, the method 800 comprises determining, at the controller node, an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state.

[0132] In step 806, the method 800 comprises preparing, at the controller node, the N qubits in the initial quantum state.

[0133] In step 808, the method 800 comprises applying, at each quantum computing node of the first set, a Hadamard gate operation to put each of the one or more ancillary qubits into an equal superposition state. In step 810, the method 800 comprises applying, at the controller node, M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M. In some embodiments (for example, in embodiments according to the methods 300 and / or 500 described above), the controlled unitary gate operation may be based on an applied unitary operator U2'(m'1>that is equivalent applications of the unitary operator U. In some embodiments (for example, in embodiments according to the method 700 above), the controlled unitary gate operation may be based on an applied unitary operator U2*<T'1>that is equivalent to 2fT'1)applications of the unitary operator U, where T is a number of addressing bits of the address to be encoded at the quantum computing node. In some embodiments, the M controlled unitary gate operations are nonlocal controlled operations.

[0134] In some embodiments, applying, at the controller node, the controlled unitary gate operation on the N qubits, encodes a part of the eigenvalue phase of the applied unitary operator into the state of the ancillary qubit.

[0135] In step 812, the method 800 comprises applying, at the first set of quantum computing nodes, an inverse quantum Fourier transform operation to the set of M ancillary qubits.

[0136] In step 814, the method 800 comprises performing, at each quantum computing node of the first set, a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node. In some embodiments, for each quantum computing node of the first set, the at least first addressing bit of the address for the quantum computing node comprises parts of the eigenvalue phases of the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

[0137] In some embodiments, obtaining at least a first addressing bit of an address for the quantum computing node comprises obtaining the complete address for the quantum computing node. In some embodiments, the method may further comprise determining whether a complete address has been obtained at the quantum computing node. In some embodiments, in response to determining that a complete address has not been obtained at the quantum computing node, the method may further comprise applying, at the quantum computing node, a reset operation on the ancillary qubit; applying, at the quantum computing node, a Hadamard gate operation to put the ancillary qubit into an equal superposition state; applying, at the quantum computing node, a phase correction to the ancillary qubit, wherein the phase correction is based on the obtained first addressing bit; applying, at the controller node, a controlled unitary gate operation to the A / qubits, wherein the controlled unitary operation is controlled by the ancillary qubit at the quantum computing node, and wherein the controlled unitary operation is based on the applied unitary operator U2'(T'2>that is equivalent to 2<T~2>applications of the unitary operator L / ; applying, at the quantum computing node, an inverse quantum Fourier transform operation to the ancillary qubit; and performing, at the quantum computing node, a measurement on the ancillary qubit, to obtain a second addressing bit of the address for the quantum computing node.

[0138] In some embodiments, the method further comprises determining, at the controller node, for each quantum computing node of the first set, the at least first addressing bit of the address for the quantum computing node based on the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

[0139] Figure 9 is a flow chart illustrating process steps in a method 900, performed by a controller node in a network, of addressing a first set of quantum computing nodes in the network, wherein the controller node comprises N qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The method 900 is an example implementation of at least part of the method performed by the controller node in any of the methods 300, 500 and 700 described above.

[0140] In some embodiments (for example, in embodiments according to the method 700 described above), the first set of quantum computing nodes comprises one quantum computing node, and wherein the set of M ancillary qubits comprises one ancillary qubit.

[0141] In step 902, the method 900 comprises obtaining information indicating a number of quantum computing nodes within the first set. In some embodiments, the method further comprises: obtaining information relating to one or more channels connecting the nodes in the network; and / or obtaining, for at least one quantum computing node of the first set, information indicating one or more quantum operations that can be performed by the quantum computing node.

[0142] In step 904, the method 900 comprises determining an initial quantum state for the A / qubits, and a unitary operator U of the initial quantum state.

[0143] In step 906, the method 900 comprises preparing the N qubits in the initial quantum state.

[0144] In step 908, the method 900 comprises applying, at the controller node, M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M. In some embodiments, the M controlled unitary gate operations are nonlocal controlled operations. In some embodiments, applying the m"1controlled unitary gate operation on the N qubits, encodes a part of the eigenvalue phase of the applied unitary operator into the state of the ancillary qubit.

[0145] In some embodiments (for example, in embodiments according to the methods 300 and / or 500 described above), the controlled unitary gate operation is based on an applied unitary operator U2'(m'1>that is equivalent to 2<m~1>applications of the unitary operator U. In some embodiments (for example, in embodiments according to the method 700 described above), the controlled unitary gate operation is based on an applied unitary operator U2'(T'1>that is equivalent to 2<T~1>applications of the unitary operator U, where T is a number of addressing bits of the address to be encoded at the quantum computing node.

[0146] In some embodiments, the method further comprises determining whether a complete address has been obtained at the quantum computing node.

[0147] In some embodiments, in response to determining that a complete address has not been obtained at the quantum computing node, the method further comprises: applying a controlled unitary gate operation to the N qubits, wherein the controlled unitary operation is controlled by the ancillary qubit at the quantum computing node, and wherein the controlled unitary operation is based on the applied unitary operator U2A(T'2>that is equivalent to 2<T~2>applications of the unitary operator U.

[0148] In some embodiments, the method further comprises determining, for each quantum computing node of the first set, at least a first addressing bit of an address for the quantum computing node based on the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

[0149] Figure 10 is a flow chart illustrating process steps in a method 1000, performed by a quantum computing node in a network, of addressing a first set of quantum computing nodes in the network, wherein the network further comprises a controller node comprising N qubits, wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, and wherein the quantum computing node is part of the first set. The method 1000 is an example implementation of at least part of the method performed by a quantum computing node of the first set in any of the methods 300, 500 and 700 described above.

[0150] In some embodiments (for example, in embodiments according to the method 700 described above), the first set of quantum computing nodes comprises one quantum computing node, and wherein the set of M ancillary qubits comprises one ancillary qubit.

[0151] In step 1002, the method 1000 comprises applying a Hadamard gate operation to put each of the one or more ancillary qubits of the set of M ancillary qubits comprised at the quantum computing node into an equal superposition state.

[0152] In step 1004, the method 1000 comprises, at each of the one or more ancillary qubits, controlling one of M controlled unitary gate operations that have been applied by the controller node on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M. In some embodiments, applying, at the controller node, the controlled unitary gate operation on the N qubits, encodes a part of the eigenvalue phase of the applied unitary operator into the state of the ancillary qubit. In some embodiments, the M controlled unitary gate operations are nonlocal controlled operations. In some embodiments (for example, in embodiments according to the methods 300 and / or 500 described above), the controlled unitary gate operation is based on an applied unitary operator U2'(m'1>that is equivalent to 2<m~1>applications of the unitary operator U. In some embodiments (for example, in embodiments according to the method 700 described above), the controlled unitary gate operation is based on an applied unitary operator U2'(T'1>that is equivalent to 2<T~1>applications of the unitary operator U, where T is a number of addressing bits of the address to be encoded at the quantum computing node.

[0153] In step 1006, the method 1000 comprises applying an inverse quantum Fourier transform operation to the set of M ancillary qubits.

[0154] In step 1008, the method 1000 comprises performing a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node. In some embodiments, obtaining at least a first addressing bit of an address for the quantum computing node comprises obtaining the complete address for the quantum computing node.

[0155] In some embodiments, the at least first addressing bit of the address for the quantum computing node comprises parts of the eigenvalue phases of the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

[0156] In some embodiments, the method further comprises applying a reset operation on the ancillary qubit; applying a Hadamard gate operation to put the ancillary qubit into an equal superposition state; applying a phase correction to the ancillary qubit, wherein the phase correction is based on the obtained first addressing bit; at the ancillary qubit, controlling a controlled unitary gate operation that has been applied by the controller node on the N qubits, wherein the controlled unitary operation is based on an applied unitary operator U2'(T'2>that is equivalent to 2<T~2>applications of the unitary operator L / ; applying an inverse quantum Fourier transform operation to the ancillary qubit; and performing a measurement on the ancillary qubit to obtain a second addressing bit of the address for the quantum computing node. These additional steps may be performed in response to the controller node determining that a complete address has not been obtained at the quantum computing node. Figure 11 is a schematic of an example of a system 1100 for addressing a first set of quantum computing nodes in a network, wherein the network further comprises a controller node comprising A / qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The system 1100 comprises a controller node 1102, and a first set of quantum computing nodes 1104. The controller node 1102 is configured to obtain information indicating a number of quantum computing nodes within the first set; determine an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; and prepare the N qubits in the initial quantum state. Each quantum computing node of the first set 1104 is configured to apply a Hadamard gate operation to put each of the one or more ancillary qubits into an equal superposition state. The controller node 1102 is further configured to apply M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M. The first set of quantum computing nodes 1104 are further configured to apply an inverse quantum Fourier transform operation to the set of M ancillary qubits. Each quantum computing node of the first set 1104 is further configured to perform a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

[0157] Therefore, in some examples, the system 1100 is operable to carry out the methods 300, 500, 700 and 800 described above. In some examples, the controller node 1102 is operable to carry out at least part of the methods 300, 500, 700, 800 and 900 described above. In some examples, the first set of quantum computing nodes 1104 is operable to carry out at least part of the methods 300, 500, 700, 800 and 1000 described above.

[0158] Figure 12 is a block diagram illustrating a controller node 1200 which may implement at least part of the method 300, 500, 700, 800 and / or 900 according to examples of the present disclosure, for example on receipt of suitable instructions from a computer program 1250. The controller node comprises N qubits. Referring to Figure 12, the controller node 1200 comprises processing circuitry 1210. The processing circuitry may comprise a processor (such as a QPU and / or a CPU) 1202, a memory 1204 and interfaces 1206. The processing circuitry 1210 is operable to perform some or all of the steps of the method 300, 500, 700, 800 and / or 900 as discussed above. The processor 1202 may be configured to obtain information indicating a number of quantum computing nodes within a first set, wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits; determine an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; prepare the N qubits in the initial quantum state; and apply M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by the m"1ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M. The memory 1204 may contain instructions executable by the rest of the processing circuitry 1210 such that the controller node 1200 is operable to perform some or all of the steps of the method 300, 500, 700, 800 and / or 900. The instructions may also include instructions for executing one or more telecommunications and / or data communications protocols such as may be implemented by the interfaces 1206. The instructions may be stored in the form of the computer program 1250.

[0159] Figure 13 is a block diagram illustrating a quantum computing node 1300 that is part of a first set of quantum computing nodes, wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits. The quantum computing node 1300 may implement at least part of the method 300, 500, 700, 800 and / or 1000 according to examples of the present disclosure, for example on receipt of suitable instructions from a computer program 1350. Referring to Figure 13, the quantum computing node 1300 comprises processing circuitry 1310. The processing circuitry may comprise a processor (such as a QPU and / or a CPU) 1302, a memory 1304 and interfaces 1306. The processing circuitry 1310 is operable to perform some or all of the steps of the method 300, 500, 700, 800 and / or 1000 as discussed above. The processor 1302 may be configured to apply a Hadamard gate operation to put each of the one or more ancillary qubits of the set of M ancillary qubits comprised at the quantum computing node into an equal superposition state; at each of the one or more ancillary qubits, control one of M controlled unitary gate operations that have been applied by the controller node on the N qubits comprised at the controller node, wherein the controlled unitary gate operation is controlled by the ancillary qubit of the set of M ancillary qubits, wherein the controlled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, apply an inverse quantum Fourier transform operation to the set of M ancillary qubits; and perform a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node. The memory 1304 may contain instructions executable by the rest of the processing circuitry 1310 such that the quantum computing node 1300 is operable to perform some or all of the steps of the method 300, 500, 700, 800 and / or 1000. The instructions may also include instructions for executing one or more telecommunications and / or data communications protocols such as may be implemented by the interfaces 1306. The instructions may be stored in the form of the computer program 1350.

[0160] Embodiments of the present disclosure relate to improved systems, apparatuses, and methods for addressing a quantum computing node in a network. These systems, apparatuses and methods allow a unique and secret address to be assigned to each quantum computing node in a network.

[0161] The methods described herein can be utilised in quantum networks, hybrid networks, different network configurations such as centralized networks and distributed networks, and different network topologies. The methods described herein can also be utilized for any type of qubit modality (for example, superconducting, photonics, trapped-ions, silicon spin).

[0162] As noted above, the methods described herein are able to adapt to changes in network architecture (for example, when a new quantum computing node is introduced into the network), and can therefore be utilized to address nodes in networks that comprise a Plug and Play (PnP) feature, for example. Utilizing distributed quantum computing in the methods described herein also enables large numbers of quantum computing nodes in a network to be addressed.

[0163] The methods of the present disclosure may be implemented in hardware, or as software modules running on one or more processors. The methods may also be carried out according to the instructions of a computer program, and the present disclosure also provides a computer readable medium having stored thereon a program for carrying out any of the methods described herein. A computer program embodying the disclosure may be stored on a computer readable medium, or it could, for example, be in the form of a signal such as a downloadable data signal provided from an Internet website, or it could be in any other form.

[0164] It should be noted that the above-mentioned examples illustrate rather than limit the disclosure, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single processor or other unit may fulfil the functions of several units recited in the claims. Any reference signs in the claims shall not be construed so as to limit their scope.

[0165] References

[0166] 1. Donkor, Eric. "Experimental auto-compensating multi-user quantum key distribution network using a wavelength-addressed bus line architecture." Enabling Photonics Technologies for Defense, Security, and Aerospace Applications VIII. Vol. 8397. SPIE, 2012.

[0167] 2. Miguel-Ramiro, Jorge, Alexander Pirker, and Wolfgang Dur. "Genuine quantum networks with superposed tasks and addressing." npj Quantum Information 7.1 (2021): 135.

[0168] 3. Ghosh, llttarn, and Raja Datta. "IDSDDIP: A secure distributed dynamic IP configuration scheme for mobile ad hoc networks." International Journal of Network Management 23.6 (2013): 424-446.

[0169] 4. Ghosh, llttarn, and Raja Datta. "A secure addressing scheme for large-scale managed MANETs." IEEE transactions on network and service management 12.3 (2015): 483-495.

[0170] 5. Moiseev, E. S., and S. A. Moiseev. "Time-bin quantum RAM." Journal of Modern Optics 63.20 (2016): 2081-2092.

[0171] 6. https: / / netsquid.org / (Accessed 8 January 2024)

[0172] 7. https: / / github.com / tqsd / QuNetSim (Accessed 8 January 2024)

[0173] 8. https: / / github.com / sequence-toolbox / SeQUeNCe (Accessed 8 January 2024)

[0174] 9. https: / / github.com / Cloudslab / iQuantum (Accessed 8 January 2024)

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[0187] 22. WQ2023133306

Claims

CLAIMS1 . A method (800) of addressing a first set of quantum computing nodes in a network, wherein the network further comprises a controller node comprising A / qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, the method (800) comprising: obtaining (802), at the controller node, information indicating a number of quantum computing nodes within the first set; determining (804), at the controller node, an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; preparing (806), at the controller node, the N qubits in the initial quantum state; applying (808), at each quantum computing node of the first set, a Hadamard gate operation to put each of the one or more ancillary qubits into an equal superposition state; applying (810), at the controller node, M controlled unitary gate operations on the N qubits, wherein thecontrolled unitary gate operation is controlled by the m"1ancillary qubit of the set of M ancillary qubits, wherein thecontrolled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1,applying (812), at the first set of quantum computing nodes, an inverse quantum Fourier transform operation to the set of M ancillary qubits; and performing (814), at each quantum computing node of the first set, a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

2. The method (800) of claim 1 , wherein thecontrolled unitary gate operation is based on an applied unitary operator u2*<m'1>that is equivalent toapplications of the unitary operator L / ;3. The method (800) of claim 1 , wherein the first set of quantum computing nodes comprises one quantum computing node, and wherein the set of M ancillary qubits comprises one ancillary qubit.

4. The method (800) of claim 3, wherein the controlled unitary gate operation is based on an applied unitary operator U2*<T'1>that is equivalent to 2fT'1)applications of theunitary operator U, where T is a number of addressing bits of the address to be encoded at the quantum computing node.

5. The method (800) of claim 4, wherein the method (800) further comprises determining whether a complete address has been obtained at the quantum computing node.

6. The method (800) of claim 5, wherein, in response to determining that a complete address has not been obtained at the quantum computing node, the method (800) further comprises: applying, at the quantum computing node, a reset operation on the ancillary qubit; applying, at the quantum computing node, a Hadamard gate operation to put the ancillary qubit into an equal superposition state; applying, at the quantum computing node, a phase correction to the ancillary qubit, wherein the phase correction is based on the obtained first addressing bit; applying, at the controller node, a controlled unitary gate operation to the N qubits, wherein the controlled unitary operation is controlled by the ancillary qubit at the quantum computing node, and wherein the controlled unitary operation is based on the applied unitary operator U2*<T'2>that is equivalent to 2<T~2>applications of the unitary operator L / ; applying, at the quantum computing node, an inverse quantum Fourier transform operation to the ancillary qubit; and performing, at the quantum computing node, a measurement on the ancillary qubit, to obtain a second addressing bit of the address for the quantum computing node.

7. The method (800) according to any of claims 1-5, wherein obtaining at least a first addressing bit of an address for the quantum computing node comprises obtaining the complete address for the quantum computing node.

8. The method (800) of any preceding claim, wherein the method (800) further comprises: obtaining, at the controller node, information relating to one or more channels connecting the nodes in the network; and / or obtaining, at the controller node, for at least one quantum computing node of the first set, information indicating one or more quantum operations that can be performed by the quantum computing node.

9. The method (800) of any preceding claim, wherein the method (800) further comprises: determining, at the controller node, for each quantum computing node of the first set, the at least first addressing bit of the address for the quantum computing node based on the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

10. The method (800) of any preceding claim, wherein applying (810), at the controller node, thecontrolled unitary gate operation on the A / qubits, encodes a part of the eigenvalue phase of the applied unitary operator into the state of theancillary qubit.11 . The method (800) of any preceding claim, wherein, for each quantum computing node of the first set, the at least first addressing bit of the address for the quantum computing node comprises parts of the eigenvalue phases of the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

12. The method (800) of any preceding claim, wherein the A / qubits are comprised within a quantum processing unit at the controller node, and wherein, for each quantum computing node of the first set, the one or more ancillary qubits are comprised within a quantum processing unit at the quantum computing node.

13. The method (800) of any preceding claim, wherein the M controlled unitary gate operations are nonlocal controlled operations.

14. A method (900), performed by a controller node in a network, of addressing a first set of quantum computing nodes in the network, wherein the controller node comprises N qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, the method (900) comprising: obtaining (902) information indicating a number of quantum computing nodes within the first set; determining (904) an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; preparing (906) the N qubits in the initial quantum state; andapplying (908) M controlled unitary gate operations on the N qubits, wherein the controlled unitary gate operation is controlled by theancillary qubit of the set of M ancillary qubits, wherein thecontrolled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M.

15. The method (900) of claim 14, wherein thecontrolled unitary gate operation is based on an applied unitary operator u2*<m'1>that is equivalent to 2<m~1>applications of the unitary operator L / ;16. The method (900) of claim 14, wherein the first set of quantum computing nodes comprises one quantum computing node, and wherein the set of M ancillary qubits comprises one ancillary qubit.

17. The method (900) of claim 16, wherein thecontrolled unitary gate operation is based on an applied unitary operator U2*<T'1>that is equivalent to 2fT'1)applications of the unitary operator U, where T is a number of addressing bits of the address to be encoded at the quantum computing node.

18. The method (900) of claim 17, wherein the method (900) further comprises determining whether a complete address has been obtained at the quantum computing node.

19. The method (900) of claim 18, wherein, in response to determining that a complete address has not been obtained at the quantum computing node, the method (900) further comprises: applying a controlled unitary gate operation to the N qubits, wherein the controlled unitary operation is controlled by the ancillary qubit at the quantum computing node, and wherein the controlled unitary operation is based on the applied unitary operator U2'(T'2>that is equivalent to 2<T~2>applications of the unitary operator U.

20. The method (900) of any of claims 14-19, wherein the method (900) further comprises: obtaining information relating to one or more channels connecting the nodes in the network; and / orobtaining, for at least one quantum computing node of the first set, information indicating one or more quantum operations that can be performed by the quantum computing node.

21. The method (900) of any of claims 14-20, wherein the method (900) further comprises: determining, for each quantum computing node of the first set, at least a first addressing bit of an address for the quantum computing node based on the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

22. The method (900) of any of claims 14-21 , wherein applying (908) thecontrolled unitary gate operation on the A / qubits, encodes a part of the eigenvalue phase of the applied unitary operator into the state of theancillary qubit.

23. The method (900) of any of claims 14-22, wherein the M controlled unitary gate operations are nonlocal controlled operations.

24. A method (1000), performed by a quantum computing node in a network, of addressing a first set of quantum computing nodes in the network, wherein the network further comprises a controller node comprising N qubits, wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, and wherein the quantum computing node is part of the first set, the method (1000) comprising: applying (1002) a Hadamard gate operation to put each of the one or more ancillary qubits of the set of M ancillary qubits comprised at the quantum computing node into an equal superposition state; at each of the one or more ancillary qubits, controlling (1004) one of M controlled unitary gate operations that have been applied by the controller node on the N qubits, wherein thecontrolled unitary gate operation is controlled by theancillary qubit of the set of M ancillary qubits, wherein thecontrolled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and whereinapplying (1006) an inverse quantum Fourier transform operation to the set of M ancillary qubits; andperforming (1008) a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

25. The method (1000) of claim 24, wherein thecontrolled unitary gate operation is based on an applied unitary operator u2*<m'1>that is equivalent to 2<m~1>applications of the unitary operator L / ;26. The method (1000) of claim 24, wherein the first set of quantum computing nodes comprises one quantum computing node, and wherein the set of M ancillary qubits comprises one ancillary qubit.

27. The method (1000) of claim 26, wherein thecontrolled unitary gate operation is based on an applied unitary operator U2*<T'1>that is equivalent to 2<T~1>applications of the unitary operator U, where T is a number of addressing bits of the address to be encoded at the quantum computing node.

28. The method (1000) of claim 27, the method (1000) further comprising: applying a reset operation on the ancillary qubit; applying a Hadamard gate operation to put the ancillary qubit into an equal superposition state; applying a phase correction to the ancillary qubit, wherein the phase correction is based on the obtained first addressing bit; at the ancillary qubit, controlling a controlled unitary gate operation that has been applied by the controller node on the N qubits, wherein the controlled unitary operation is based on an applied unitary operator U2'(T'2>that is equivalent to 2<T~2>applications of the unitary operator L / ; applying an inverse quantum Fourier transform operation to the ancillary qubit; and performing a measurement on the ancillary qubit to obtain a second addressing bit of the address for the quantum computing node.

29. The method (1000) according to any of claims 24-27, wherein obtaining at least a first addressing bit of an address for the quantum computing node comprises obtaining the complete address for the quantum computing node.

30. The method (1000) according to any of claims 24-29, wherein applying, at the controller node, the controlled unitary gate operation on the N qubits, encodes a partof the eigenvalue phase of the applied unitary operator into the state of the mthancillary qubit.

31. The method (1000) according to any of claims 24-30, wherein the at least first addressing bit of the address for the quantum computing node comprises parts of the eigenvalue phases of the controlled unitary gate operations that were controlled by the one or more ancillary qubits comprised at the quantum computing node.

32. The method (1000) according to any of claims 24-31 , wherein the M controlled unitary gate operations are nonlocal controlled operations.

33. A computer program product (1250, 1350) comprising a computer readable medium, the computer readable medium having computer readable code embodied therein, the computer readable code being configured such that, on execution by a suitable computer or processor (1202, 1302), the computer or processor (1202, 1302) is caused to perform a method (800, 900, 1000) of any one of claims 1 to 32.

34. A system (1100) for addressing a first set of quantum computing nodes (1104) in a network, the system (1100) comprising the first set of quantum computing nodes (1104) and a controller node (1102) in the network, wherein the controller node (1102) comprises N qubits, and wherein each quantum computing node of the first set (1104) comprises one or more ancillary qubits of a set of M ancillary qubits, the system (1100) configured to: obtain, at the controller node (1102), information indicating a number of quantum computing nodes within the first set (1104); determine, at the controller node (1102), an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; prepare, at the controller node (1102), the N qubits in the initial quantum state; apply, at each quantum computing node of the first set (1104), a Hadamard gate operation to put each of the one or more ancillary qubits into an equal superposition state; apply, at the controller node (1102), M controlled unitary gate operations on the N qubits, wherein thecontrolled unitary gate operation is controlled by theancillary qubit of the set of M ancillary qubits, wherein thecontrolled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1,apply, at the first set of quantum computing nodes (1104), an inverse quantum Fourier transform operation to the set of M ancillary qubits; and perform, at each quantum computing node of the first set (1104), a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node.

35. The system of claim 34, wherein the system (1100) is further configured to perform the method of any of claims 2-13.

36. A controller node (1200) in a network, for addressing a first set of quantum computing nodes in the network, wherein the controller node (1200) comprises N qubits, and wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, the controller node (1200) configured to: obtain information indicating a number of quantum computing nodes within the first set; determine an initial quantum state for the N qubits, and a unitary operator U of the initial quantum state; prepare the N qubits in the initial quantum state; and apply M controlled unitary gate operations on the N qubits, wherein thecontrolled unitary gate operation is controlled by theancillary qubit of the set of M ancillary qubits, wherein thecontrolled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and wherein m = 1, M.

37. The controller node (1200) of claim 36, wherein the controller node (1200) is further configured to perform the method of any of claims 15-23.

38. A quantum computing node (1300) in a network, for addressing a first set of quantum computing nodes in the network, wherein the network further comprises a controller node comprising N qubits, wherein each quantum computing node of the first set comprises one or more ancillary qubits of a set of M ancillary qubits, and wherein the quantum computing node (1300) is part of the first set, the quantum computing node (1300) configured to: apply a Hadamard gate operation to put each of the one or more ancillary qubits of the set of M ancillary qubits comprised at the quantum computing node (1300) into an equal superposition state;at each of the one or more ancillary qubits, control one of M controlled unitary gate operations that have been applied by the controller node on the N qubits, wherein the controlled unitary gate operation is controlled by theancillary qubit of the set of M ancillary qubits, wherein thecontrolled unitary gate operation based on an applied unitary operator that is equivalent to a number of applications of the unitary operator U, and whereinapply an inverse quantum Fourier transform operation to the set of M ancillary qubits; and perform a measurement on each of the one or more ancillary qubits, to obtain at least a first addressing bit of an address for the quantum computing node (1300).

39. The quantum computing node (1300) of claim 38, wherein the quantum computing node (1300) is further configured to perform the method of any of claims 25- 32.

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