Pulse gaps for ETCH product refresh and plasma sheath thickness uniformity

Advanced RF pulsing schemes with pulsed plasma time-off gaps and matchless power sources address plasma non-uniformity, enhancing amorphous carbon layer cell tilt uniformity and reducing global tilt in semiconductor fabrication.

WO2025151289A1PCT designated stage expired Publication Date: 2025-07-17LAM RES CORP
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Patent Information

Application Number
PCT/US2024/061808
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-11
Filing Date
2024-12-23
Publication Date
2025-07-17

AI Technical Summary

Technical Problem

Plasma non-uniformity during semiconductor fabrication leads to ion tilt angles causing tilted etch features in wafers, resulting in non-uniformity of high aspect ratio amorphous carbon etch cell tilt.

Method used

Implementing advanced radio frequency pulsing schemes with uniquely pulsed plasma time-off gaps and matchless power sources to control sheath thickness across the wafer, using inner and outer coils to synchronize RF bias power independently, allowing for evacuation of unused etch products and process byproducts.

Benefits of technology

Achieves improved amorphous carbon layer cell tilt uniformity and reduced global tilt in high aspect ratio structures by controlling sheath thickness uniformly, leading to straight ACL cell mask open profiles.

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Abstract

A system for generating plasma through inductive coupling using an inner and outer coil. A first matchless power source supplies a first sinusoidal power signal that is pulsed to the inner coil. A second matchless power source supplies a second sinusoidal power signal that is pulsed to the outer coil. A radio frequency (RE) bias power generator generates an RE bias signal that is pulsed. In alternating periods of the RE bias signal including a first period and a second period, a first pulse of the RE bias signal overlaps a pulse of the first sinusoidal power signal in the first period, and a second pulse overlaps a pulse of the second sinusoidal power signal in the second period. A time-off gap in plasma generation is located between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal.
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Description

PULSE GAPS FOR ETCH PRODUCT REFRESH AND PLASMA SHEATH THICKNESS UNIFORMITYTECHNICAL FIELD

[0001] The present embodiments relate to semiconductor fabrication, and more specifically to systems and methods for advanced radio frequency pulsing schemes in combination with uniquely pulsed plasma time-off gaps to control sheath thickness across a wafer in order to improve high aspect ratio amorphous carbon etch cell tilt uniformity.BACKGROUND OF THE DISCLOSURE

[0002] Many modem semiconductor chip fabrication processes such as plasma etching processes are performed within a plasma processing chamber in which a substrate, e.g., wafer, is supported on an electrostatic chuck. In plasma etching processes, the wafer is exposed to a plasma generated within a plasma processing volume. Plasma contains various types of radicals, electrons, as well as positive and negative ions. The chemical and physical reactions of the various radicals, electrons, positive ions, and negative ions are used to etch features, surfaces and materials of a wafer.

[0003] For example, when a process gas is supplied into the plasma processing chamber, one or more radio frequency signals provide power that are applied to one or more coils and electrodes of the plasma processing chamber to form an electric field. The process gas is turned into plasma by the RF signals, thereby performing plasma etching on a predetermined layer disposed on the wafer. Unfortunately, during wafer processing, the plasma non-uniformity arising from plasma generation zones may result in ions striking the wafer with a non- vertical direction (e.g., ion tilt angles) occurring all across the wafer which may cause tilted etch features in the wafer.

[0004] It is in this context that embodiments of the disclosure arise.SUMMARY

[0005] The present embodiments relate to methods and apparatus for improving across wafer amorphous carbon layer cell tilt uniformity, and all other high aspect ratio etches, when generating inductively coupled plasma by using advanced radio frequency pulsing schemes in combination with special byproduct refresh methods. In particular, uniquely pulsed plasma time-off gaps are used in combination with the RF pulsing schemes to uniquely control sheath thickness across a wafer, which leads to improved ACL cell tilt uniformity globally across the wafer. Several inventive embodiments of the present disclosure are described below.

[0006] Embodiments of the present disclosure provide a system for generating plasma. The system including a plasma chamber configured for generating a plasma through inductive coupling, wherein the plasma chamber includes an electrostatic chuck (ESC) for supporting a substrate, and a dielectric window disposed opposite the ESC. The system including an inner coil disposed over the dielectric window. The system including an outer coil disposed over the dielectric window. The system including a first matchless power source electrically coupled to the inner coil, and configured to supply a first sinusoidal power signal to the inner coil at a first signal frequency, wherein the first sinusoidal power signal is pulsed at a pulsing frequency with a first duty cycle. The system including a second matchless power source electrically coupled to the outer coil, and configured to supply a second sinusoidal power signal to the outer coil at a second signal frequency, wherein the second sinusoidal power signal is pulsed at the pulsing frequency with a second duty cycle. The system including a radio frequency (RF) bias power generator for generating an RF bias signal operating at a bias frequency, wherein the RF bias signal is pulsed at a bias pulsing frequency with a third duty cycle. In a plurality of alternating periods of the RF bias signal including a first period and a second period, a first pulse of the RF bias signal overlaps at least a portion of a pulse of the first sinusoidal power signal supplied to the inner coil in the first period, and a second pulse of the RF bias signal overlaps at least a portion of a pulse of the second sinusoidal power signal supplied to the outer coil in the second period. A time-off gap in plasma generation is located between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal.

[0007] Other embodiments of the present disclosure provide for a method for generating plasma is described. The method including providing a plasma chamber configured for generating a plasma through inductive coupling, wherein the plasma chamber includes an electrostatic chuck for supporting a substrate and a dielectric window disposed opposite the ESC. The method including supplying a first sinusoidal power signal to an inner coil at a first signal frequency, wherein the first sinusoidal power signal is pulsed at a pulsing frequency with a first duty cycle. The method including supplying a second sinusoidal power signal to the outercoil at a second signal frequency, wherein the second sinusoidal power signal is pulsed at the pulsing frequency with a second duty cycle. The method including supplying a radio frequency (RF) bias signal operating at a bias frequency, wherein the RF bias signal is pulsed at a bias pulsing frequency with a third duty cycle. The method including locating a time-off gap in plasma generation between a repeatable pulse of the first sinusoidal power signal and a repeatable pulse of the second sinusoidal power signal. In a plurality of alternating periods of the RF bias signal including a first period and a second period, a first pulse of the RF bias signal overlaps at least a portion of a pulse of the first sinusoidal power signal supplied to the inner coil in the first period, and a second pulse of the RF bias signal overlaps at least a portion of a pulse of the second sinusoidal power signal supplied to the outer coil in the second period. The method including locating a time-off gap in plasma generation between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal.

[0008] These and other advantages will be appreciated by those skilled in the art upon reading the entire specification and the claims.BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The embodiments may best be understood by reference to the following description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 illustrates an embodiment of a transformer coupled plasma processing system utilized for etching operations including matchless radio frequency power sources that are uniquely pulsed to achieve plasma time-off gaps, in accordance with an implementation of the disclosure.

[0011] FIGS. 2A illustrates details of a matchless power source using a direct drive circuit, in accordance with one embodiment of the disclosure.

[0012] FIG. 2B is a functional block diagram of an example of a direct drive circuit, in accordance with one embodiment of the disclosure.

[0013] FIG. 3 is a flow diagram illustrating a method for improving cell tilt uniformity when generating inductively coupled plasma using matchless RF power sources that are uniquely pulsed to achieve plasma time-off gaps, in accordance with one embodiment of the disclosure.

[0014] FIG. 4A illustrates timing of an RF bias signal and RF power signals supplied to coils of a transform coupled plasma generating system that are uniquely pulsed such that in alternating pulses of the RF bias signal one pulse of the RF bias signal corresponds to the RF power signal to the inner coil and the next pulse of the RF bias signal corresponds to the RF power signal to the outer coil, in accordance with one embodiment of the present disclosure.

[0015] FIG. 4B illustrates exemplary timing of RF power signals supplied to coils of a transformer coupled plasma generation system and an RF bias signal that are uniquely pulsed to achieve plasma time-off gaps, in accordance with one embodiment of the present disclosure.

[0016] FIGS. 5A-5E illustrate how tuning plasma time-off gaps of radio frequency power signals supplied to coils of a transformer coupled plasma generation system controls cell tilt globally across a wafer, in accordance with one embodiment of the disclosure.DETAILED DESCRIPTION

[0017] Although the following detailed description contains many specific details for the purposes of illustration, anyone of ordinary skill in the art will appreciate that many variations and alterations to the following details are within the scope of the present disclosure.Accordingly, the aspects of the present disclosure described below are set forth without any loss of generality to, and without imposing limitations upon, the claims that follow this description.

[0018] Generally speaking, the various embodiments of the present disclosure describe methods and apparatus for improving across wafer amorphous carbon layer (ACL) cell tilt uniformity, as well as for all other high aspect ratio etches, using advanced radio frequency (RF) pulsing schemes with special byproduct refresh methods. In particular, advanced transformer coupled plasma (TCP) and bias pulsing schemes in combination with uniquely pulsed plasma time off gaps allow for unused etch products and process byproducts to evacuate the chamber before being re-energized (ionized). This process affects the sheath thickness globally across the wafer in a controllable manner. As a result, a more uniform cell tilt can be achieved providing for etching of high aspect ratio formations (e.g., cells and trenches). In one embodiment, the RF power signals are generated using matchless power sources (e.g., Direct Drive ™) to independently control inner and outer TCP coils. Synchronized RF bias power is applied independently of each of the RF power signals delivered to the inner and outer coils.

[0019] Advantages of the various embodiments, disclosing methods and apparatus for advanced RF pulsing schemes in combination with uniquely pulsed plasma time-off gaps provide for an ability to evacuate unused etch products and process byproducts from the chamber. Evacuation of unused etch products and process byproducts prevents them from being ionized or re-energized or refreshed, which allows for more uniform sheath thickness globally across a wafer. That is, the sheath is uniquely controlled above the wafer. In that manner, ions will bombard the wafer perpendicular to the wafer, which reduces cell tilting leading to improved across wafer ACL cell tilt uniformity. As a result, straight ACL cell mask open cell profiles are produced with high aspect ratios globally across a wafer. Further, with improved plasma uniformity by using a mixture of a higher frequency signal and a lower frequency signal, there is reduced global tilt in the entirety of the substrate.

[0020] With the above general understanding of the various embodiments, example details of the embodiments will now be described with reference to the various drawings. Similarly numbered elements and / or components in one or more figures are intended to generally have the same configuration and / or functionality. Further, figures may not be drawn to scale but are intended to illustrate and emphasize novel concepts. It will be apparent, that the present embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail in order not to unnecessarily obscure the present embodiments.

[0021] Throughout the specification the terms substrate and wafer may be used interchangeably. Generally, plasma processing may be performed on a substrate and / or wafer to etch features on a surface, or to deposit layers on the surface of the substrate and / or wafer.

[0022] FIG. 1 illustrates an embodiment of a transformer coupled plasma (TCP) processing system 100 configured for generating plasma 150 in chamber 101 using matchless radio frequency power sources that are uniquely pulsed to achieve plasma time-off gaps, in accordance with one embodiment of the present disclosure. TCP processing is also known as or referred to as inductively coupled plasma (ICP) processing used for generating plasma. For example, TCP processing system 100 may be utilized for etching operations. Plasma chamber 101 includes a chuck 110, a dielectric window 120 disposed opposite the chuck, and one or more matchless RF power sources, in accordance with an implementation of the disclosure. The chuck 110 can be an electrostatic chuck (ESC) for supporting the substrate 105 (e.g., wafer) when present. For example, the ESC also includes electrostatic electrodes to enable the chucking and dechucking of the wafer that are powered by a filter and DC clamp power supply, or other control system, to lift the substrate 105 off of the ESC 110. Although not shown, pumps are connected to the plasma chamber 101 to enable vacuum control and removal of gaseous byproducts from the plasma chamber during operational plasma processing.

[0023] In some embodiments, the TCP processing system 100 may include a controller 150 that is used for controlling various components of the ICP processing system 100. In one example, the controller 150 can be connected to the plasma generators (e.g., matchless RF power source 140A, matchless RF power source 140B, bias RF power source 115), to the gas source(s) 114 that are coupled to the plasma process chamber 101, and to other components. In some embodiments, the controller 150 includes one or more recipes including multiple set points and various operating parameters (e.g., voltage, current, frequency, pressure, flow rate, power levels, temperature, timing parameters, process gases, mechanical movement of the substrate 120, etc.) for operating the TCP processing system 100. For example, depending on the processing being performed, the controller 150 controls the delivery of process gases deliveredfrom the gas source(s) 114 to the process chamber 101 in order to achieve a designed processing condition, such as to etch features and / or deposit or form films over the substrate 105. The chosen gases are then distributed in a space volume defined over the substrate 120 resting over the ESC 118.

[0024] TCP processing system 100 is configured for generating plasma 150 through inductive coupling. In particular, after supplying corresponding radio frequency (RF) power to each of an inner coil 130 and an outer coil 135 located near (e.g., disposed over) a dielectric window to provide inductively coupled power into the plasma processing chamber 101 and injecting process gas(es) into the plasma process chamber, plasma 150 is then formed between the dielectric window 120 and the ESC 110. In one embodiment, the inner coil is arranged within an inner space of the outer coil along a plane and / or a horizontal plane. The inner and outer coils enable generation of uniform plasma through inductive coupling by independently applying RF power to each coil. For example, the plasma 150 can be used to etch the surface of the substrate 105.

[0025] The dielectric window 120 can be defined from a ceramic type material. Other dielectric materials are also possible, so long as they are capable of withstanding the conditions of a semiconductor etching chamber. The dielectric window 120 is provided to separate the inner coil 130 and the outer coil 135 from the plasma processing chamber 101. For example, each of the inner and outer coils may be configured to generate corresponding toroidal power distributions in the plasma 150. As such, the dielectric window 120 is configured to allow energy to pass from the inner and outer coils to the plasma processing chamber 101.

[0026] TCP processing system 100 includes at least one matchless RF power source 140 configured for providing RF power to an electrode (e.g., inner coil, outer coil, etc.) in the plasma chamber 101. An example of the matchless RF power source 140 is a low impedance voltage source. In particular, there is no RF match between the matchless RF power source 140 and the plasma chamber 101. In one implementation, there is no RF cable coupled between the matchless plasma source an a corresponding antenna. Because the RF power source 140 is matchless, a majority of the RF power that is generated is applied to the corresponding electrode, as RF power is not lost passing through circuit components of a RF match and / or through an RF cable. The matchless RF power source 140 operates at an operating signal frequency to generate a shaped sinusoidal waveform, which is an RF signal. In particular, the matchless RF power source 140 drives the electrode using different types of waveforms to support different types of processes, such as, etching, cleaning, sputtering, depositing, etc.

[0027] A matchless RF power source provides several advantages, including a high quality factor resulting in high current and high voltage (e.g., for pre-striking of plasma), an optimalquality factor for plasma sustainability for stable processing operation, lower cost for higher performance of a plasma tool, low output impedance, no need to us an RF match circuit and / or an RF cable, etc. As a result, a matchless RF power source can provide an increase in impedance tuning speed (i.e., because no RF match circuit is used), advanced pulse capabilities, and coil power multiplexing. The matchless RF power source is configured to be electrically coupled to an electrode, such as a showerhead, a coil, etc. without the use of an RF cable and / or an RF match.

[0028] In particular, a matchless RF power source 140A supplies RF power to the inner coil 130. That is, the RF power source 140 is electrically coupled to the inner coil 130, and is configured to supply a first sinusoidal power signal at a first signal frequency, such as to an input node of the inner coil. To complete the circuit, an output node of the inner coil is coupled to ground. Further, the first sinusoidal power signal is pulsed at a first pulsing frequency with a first duty cycle. Also, a matchless RF power source I40B is electrically coupled to outer coil 135 to supply RF power, such as to an input node of the outer coil. To complete the circuit, an output node of the outer coil 135 is coupled to ground. Furthermore, the matchless RF power source 140B is electrically coupled to the outer coil, and is configured to supply a second sinusoidal power signal at a second signal frequency. The second sinusoidal power signal is pulsed at a second pulsing frequency with a second duty cycle. In one embodiment, a single RF power source is used to supply the first sinusoidal power signal and the second sinusoidal power signal. In one embodiment, the first and second sinusoidal power signals are pulsed at the same pulsing frequency, and in another embodiment can be pulsed with different pulsing frequencies. Also, in embodiments, the first and second sinusoidal power signals have similar or different signal frequencies.

[0029] Furthermore, a time-off gap in plasma generation is located between successive pulses of the first sinusoidal power signal supplied to the inner coil and of the second sinusoidal power signal supplied to the outer coil. In particular, the time-off gap and the successive pulses of the sinusoidal power signals have a temporal relationship, in that the time-off gap is temporally located between the successive pulses of the first sinusoidal power signal and the second sinusoidal power signal. For example, the time-off gap and the successive pulses occur sequentially in time. In one embodiment, the first sinusoidal power signal and the second sinusoidal power signal are completely off in the time-off gap. The time-off gap in plasma generation allows for unused etch products and process byproducts to evacuate the chamber, thereby preventing re-energization and / or ionization of those elements. This promotes a more uniform thickness of the plasma sheath globally across the wafer, which results in ACL cell tiltuniformity in high aspect ratio structures. In one embodiment, pulsing for the first sinusoidal power signal and for the second sinusoidal power signal are asynchronous.

[0030] The RF power signals supplied to the inner and outer coils may be configured in different combinations of tunable parameters to provide high and / or low frequency power, wherein the tunable parameters include signal frequency, duty cycle, pulsing frequency, in phase signaling such that both RF power signals are in-phase, out-of-phase signaling, power, etc. For illustration, each of the first sinusoidal power signal supplying RF power to the inner coil and the second sinusoidal power signal supplying RF power to the outer coil operate at corresponding RF signal frequencies that range between 30 Hz to 14 MHz. For example, the signal frequency may range between 30 Hz to 100 Hz, or higher, for delivering low frequency power. In another example, the signal frequency may range between 100 kHz to 14 MHz, or higher, for delivering high frequency power. In some implementations, the signal frequency may range as high as 100 megahertz (MHz). Further, power of each of the RF power signals may range between 100 watts to 4 kilowatts (kW), or higher. In some implementations, the power may range as high as 10 kilowatts (kW).

[0031] Also, a pulsing frequency for each of the RF power signals to the inner and outer coils may range between 25 Hz to 1 kilohertz (kHz). In addition, each of the RF power signals may be pulsed with a duty cycle that ranges between 1% to 100 %.

[0032] An RF power source 160 is configured to provide RF bias power at a bias frequency and at one or more bias pulsing frequencies, so that the RF power signals supplying power to the inner coil and outer coil occurs with a corresponding pulse of RF bias power either singly or in combination. For example, in alternating pulses of an RF bias signal, one pulse of the RF bias signal corresponds to the RF power signal to the inner coil and the next pulse of the RF bias signal corresponds to the RF power signal to the outer coil. In other embodiments, direct current (DC) bias power is supplied. In one implementation, a single RF power generator may be configured to provide one or more RF bias signals with timing that correspond to one or more of the individual RF power signals. That is, the one or more RF bias signals may have timing to include one or more frequencies and / or one or more duty cycles that correspond to one or more of the individual RF power signals supplying power to the inner and outer coils. In another implementation, separate RF power sources (not shown) may be configured to each provide a separate RF bias signal corresponding to the RF power signals supplying power to the inner and outer coils. As such, one or more RF power sources may be included within the RF power source 160, such that RF bias power may be supplied. For example, a match circuit 1 17 is electrically coupled to a lower electrode (not shown) located within the ESC 110; and a RF biaspower source 115 is electrically coupled to the match circuit 117, wherein the RF bias power source is configured to supply a bias voltage to the ESC 110.

[0033] Various parameters of the generated RF bias signal are selectable depending on desired results. For example, the frequency of the RF bias signal may range between 100 kilohertz (kHz) to 14 megahertz (MHz). Further, power of the RF bias signal may range between 100 watts to 10 kilowatts (kW), or higher. Also, a pulsing frequency for the RF bias signals may range between 25 Hz to 1 kilohertz (kHz). In addition, the RF bias signal may be pulsed with a duty cycle that ranges between 1% to 100 %.

[0034] The RF bias signal may be pulsed to be ON when at least one of the RF power signals (i.e., sinusoidal power signals), or a portion of at least one of the RF power signals, supplying RF power to the inner coil and the outer coils is also ON. That is, a single RF bias power generator may be configured to provide a single RF bias signal that corresponds to pulses of one or more of the individual RF power signals applied to the inner and outer coils, wherein a pulse of the RF bias signal occurs with at least a portion of the corresponding RF power signal to the inner or outer coil. For example, a bias signal may be pulsed on during pulses of one of the RF power signals to the inner or outer coils, or the bias signal may be pulsed on during pulses of both RF power signals to the inner and outer coils.

[0035] For example, the RF bias signal may be pulsed to be ON when at least a portion of the pulsed first sinusoidal power signal to the inner coil is also ON. In another example, the RF bias signal may be pulsed to be ON when at least a portion of the pulsed second sinusoidal power signal to the outer coil is also ON. When occurring only with pulses of one of the RF power signals to either the inner or outer coil, the pulsing frequency of the RF bias signal may be similar to the pulsing frequency of the corresponding RF power signal. Further, the duty cycle of the RF bias signal that is pulsed may be similar or different than the duty cycle of the corresponding RF power signal that is pulsed.

[0036] In still another example, pulses of the RF bias signal the RF bias signal occur with pulses of each of the RF power signals to the inner and outer coils. That is, the RF bias signal may be pulsed to be ON when at least a portion of the pulsed first sinusoidal power signal to the inner coil is also ON, and when at least a portion of the pulsed second sinusoidal power signal to the outer coil is also ON. In particular, in a plurality of alternating periods of the RF bias signal including a first period and a second period, a first pulse of the RF bias signal overlaps at least a portion of a pulse of the first sinusoidal power signal supplied to the inner coil in the first period, and a second pulse of the RF bias signal overlaps at least a portion of a pulse of the second sinusoidal power signal supplied to the outer coil in the second period.

[0037] When occurring with pulses of each of the RF power signals to the inner and outer coils, the pulsing frequency of the RF bias signal may have a higher pulsing frequency (e.g., approximately double) and higher duty cycle (e.g., because the period of the pulsing frequency of the RF bias signal is shorter) than the pulsing frequency and duty cycle of either of the RF power signals supplied to the inner or outer coil. In another example, the timing of the RF bias signal may be complex to include multiple pulsing frequencies and multiple duty cycles to correspond with when each of the RF power signals to the inner and outer coils are ON, such that the RF bias signal is pulsed ON to correspond with at least a portion of the pulsed second sinusoidal power signal to the outer coil is ON and when at least a portion of the pulsed second sinusoidal power signal to the outer coil is ON.

[0038] FIG. 2A is a diagram of system 200A which includes details of a matchless power source 140 using a direct drive circuit, in accordance with one embodiment of the disclosure. The direct drive circuit is configured as a matchless plasma source, which provides several advantages, including a high quality factor resulting in high current and high voltage (e.g., for pre-striking of plasma), an optimal quality factor for plasma sustainability for stable processing operation, lower cost for higher performance of a plasma tool, low output impedance, no need to us an RF match circuit and / or an RF cable, etc.

[0039] As shown, system 200A includes the matchless plasma source 140, the connection 210, and the plasma chamber 101. The matchless plasma source 140 includes an input section 202 electrically coupled to an output section 204, which is electrically coupled to a reactive circuit 206. The reactive circuit 206 is electrically coupled via the connection 210 to an electrode 215, which may be an inner coil and / or an outer coil of a TCP system.

[0040] The input section 202 includes a signal generator and a portion of a gate driver. The output section 204 includes the remaining portion of the gate driver and a half-bridge transistor circuit. More particularly, the input section 202 generates multiple square wave signals and provides the square wave signals to the output section 204. The output section 204 generates an amplified square waveform from the multiple square wave signals received from the input section 202. Moreover, the output section 204 shapes an envelope, such as a peak-to-peak magnitude, of the amplified square waveform. For example, a shaping control signal 203 is supplied from the input section 202 to the output section 204 to generate the envelope. The shaping control signal 203 has multiple voltage values for shaping the amplified square waveform.

[0041] The amplified square waveform that is shaped is sent from the output section 204 to the reactive circuit 206. The reactive circuit 206 removes (e.g., filters out) higher-order harmonics of the amplified square waveform to generate the shaped sinusoidal waveform havinga fundamental frequency. The shaped sinusoidal waveform has the envelope that is shaped. An example of the reactive circuit 206 includes one or more capacitors (e.g., variable and / or fixed) and / or one or more inductors (e.g., variable and / or fixed) that are coupled to each other in series, or in parallel, or a combination thereof.

[0042] Moreover, a reactance of the reactive circuit 206 is modified by sending a quality factor control signal 207 from the input section 202 to the reactive circuit 206 to change a reactance of the reactive circuit 206. In addition, in some embodiments, a feedback signal 205 is sent from the output section 204 to the input section 202. For example, a phase difference is identified or determined from the feedback signal 205 to control the output section 204 to reduce, such as nullify, the phase difference. Optionally, a feedback signal 209 may be sent from the reactive circuit 206 to the input section 202.

[0043] A shaped sinusoidal waveform is sent from the reactive circuit 206 via the connection 210 to the electrode 215 for processing the substrate 105. For example, the matchless RF power source 140 drives the electrode using different types of waveforms to support different types of processes, such as, etching, cleaning, sputtering, depositing, etc. Upon receiving the shaped sinusoidal waveform and the process materials, plasma is lit within the plasma chamber 101 to process the substrate 105.

[0044] FIG. 2B is a functional block diagram of an example of a direct drive circuit 141 provided within a matchless RF power source 140, in accordance with one embodiment of the disclosure. The direct drive circuit 141 includes a clock generator to generate a clock signal at a frequency, a gate driver to receive the clock signal and a half bridge circuit. The direct drive circuit 141 outputs different types of waveforms to support different types of processes, such as, etching, cleaning, sputtering, depositing, etc. For example, an arbitrary-shaped pulse is generated at the output of the half-bridge circuit or a multi-state pulse is generated at the output. Accordingly, pulses of different shapes and of different power levels are used to drive an electrode of a plasma chamber. The different waveforms are generated by controlling an amount of direct current (DC) voltage that is provided at an output of an agile DC rail within the halfbridge circuit. The DC voltage may be controlled by a controller board that provides voltage values to a DC source of the DC agile rail. In addition, the drive frequency is tuned at a high rate, such as less than 10 microseconds, to tune the impedance associated with the plasma chamber.

[0045] In particular, the drive circuit 141 includes a clock 220 that operates at one or more selected RF frequencies (e.g., f-RF). The clock signal output by the clock 220 is input to a gate driver circuit 222. In some examples, the gate driver circuit 222 includes an amplifier 244 and an inverting amplifier 246 having respective inputs connected to the clock 220.

[0046] Outputs of the gate driver circuit 222 is input to a half bridge circuit 238. In some examples, the half bridge circuit 238 includes a first switch 240 and a second switch 242, which may be in the form of metal oxide semiconductor field effect transistors (MOSFETs). As such, the first switch 240 and the second switch 242 each include a control terminal, and first and second terminals. As shown, an output of the amplifier 244 of the gate driver circuit 222 is input to the control terminal of the first switch 240. An output of the inverting amplifier 246 of the gate driver circuit 222 is input to the control terminal of the second switch 242.

[0047] The first terminal of the first switch 240 is connected to a DC supply 250. The second terminal of the second switch 242 is connected to a DC supply 255. A single DC supply can produce undesired DC voltage / component on a base plate of the ESC. This DC component can complicate the wafer chucking / dechucking performance by affecting the ESC DC bias on the base plate that is expected to be independently controlled. To resolve any undesired DC voltage on the base plate from a single DC supply, the drive circuit 141 may use dual DC supplies, in one embodiment, including the first DC supply 250 operating at +VDC / 2 and a second DC supply 255 operating at -VDC / 2. For instance, to achieve the same output RF power for a single DC supply direct drive circuit and a dual DC supply direct drive circuit, both the first and second DC supplies (e.g., 250 and 255) of the dual DC supply direct drive circuit operate at half the voltage (e.g., +VDC) used by a single DC supply direct drive circuit. In some examples, the first DC supply 250 and the second DC supply 255 operate at approximately the same magnitude and opposite polarity.

[0048] An output node 230 is connected to the second terminal of the first switch 240 and to the first terminal of the second switch 242. In embodiments, the voltage waveform output by the drive circuit 141 has no DC component, and as such produces a sinusoidal wave representing an RF power signal. The output node 230 is connected by an inductor 232 to a cathode 234. In some examples, a capacitance 236 in series with a resistance 238 may be used to model the impedance seen by the drive circuit 141, wherein the impedance may be from plasma capacitance and resistance; and / or the capacitance and resistance of the electrode (or another component) in the substrate support; and / or other stray or parasitic capacitance and resistance.

[0049] FIG. 3 is a flow diagram 300 illustrating a method for improving cell tilt uniformity when generating inductively coupled plasma using matchless RF power sources that are uniquely pulsed to achieve plasma time-off gaps, in accordance with one embodiment of the disclosure. In the method, advanced TCP and bias pulsing schemes in combination with uniquely pulsed plasma time-off gaps provide for unique control of a plasma sheath thickness globally across a wafer, which results in improved across (i.e., global) wafer ACL cell tilt uniformity. That is, cells can be etched with reduced tilting, allowing for etching of cell featureswith increased high aspect ratios. The method of flow diagram 300 may be implemented to control processes in the plasma processing systems of FIG. 1, as well as for other plasma processing systems.

[0050] At 310, the method includes providing a plasma chamber configured for generating a plasma through inductive coupling, wherein the plasma chamber includes an ESC for supporting a substrate and a dielectric window disposed opposite the ESC. Gases may be delivered to the plasma chamber depending on the processing being performed to achieve a desired processing condition, such as to etch features and / or to deposit or form films over a substrate.

[0051] At 320, the method includes supplying a first sinusoidal power signal to an inner coil disposed over a dielectric window. The sinusoidal power signal is configured to provide RF power. More particularly, the first sinusoidal power signal is operating at a first signal frequency. For example, a frequency of the first sinusoidal power signal ranges between 30 hertz (Hz) to 14 megahertz (MHz), or higher. Also, the first sinusoidal power signal is pulsed at a pulsing frequency with a first duty cycle. For example, the pulsing frequency may range between 25 hertz (Hz) to 1 kilohertz (kHz). A duty cycle for the pulsing frequency may range between 1% to 100%. Further, the power for the first sinusoidal power signal ranges between 100 watts (W) to 4 kilowatts (kW), or higher. Other ranges for frequency, pulsing frequency, duty cycle, and power for the first sinusoidal power signal are contemplated, as previously described.

[0052] At 330, the method includes supplying a second sinusoidal power signal to an outer coil disposed over the dielectric window. The sinusoidal power signal is configured to provide RF power. More particularly, the second sinusoidal power signal is operating at a second signal frequency. For example, a frequency of the second sinusoidal power signal ranges between 30 hertz (Hz) to 14 megahertz (MHz), or higher. Also, the second sinusoidal power signal is pulsed at the pulsing frequency with a second duty cycle. As previously described, the pulsing frequency may range between 25 hertz (Hz) to 1 kilohertz (kHz), and a duty cycle for the pulsing frequency may range between 1% to 100%. Further, the power for the second sinusoidal power signal ranges between 100 watts (W) to 4 kilowatts (kW), or higher. Other ranges for frequency, pulsing frequency, duty cycle, and power for the second sinusoidal power signal are contemplated, as previously described.

[0053] The first sinusoidal power signal is generated using a first matchless power source and a second matchless power source is used for generating the second sinusoidal power signal, in one embodiment. In other embodiments, an RF power source with a matching circuit can be used for generating RF power to the inner and outer coils. The first and second matchless power sources generating the first and second sinusoidal power signals can include direct drive circuits,as previously introduced in FIGS. 2A-2B. For example, a direct drive circuit includes a signal generator configured to supply an input RF signal. The direct drive circuit includes a gate driver configured to receive the input RF signal and produce a plurality of square wave signals. The direct drive circuit includes a half bridge circuit configured to receive the plurality of square wave signals from the gate driver and generate an amplified square waveform. The direct drive circuit includes a reactive circuit configured to extract a shaped sinusoidal waveform, as a corresponding sinusoidal power signal, from the amplified square waveform based on a shaped envelope of a shaping voltage signal.

[0054] At 340, the method includes supplying an RF bias signal operating at a bias frequency for providing a bias signal to at least one of the RF power signals powering the inner coil and outer coil. The RF bias signal is pulsed at a bias pulsing frequency with a third duty cycle. In various embodiments, the RF bias signal may be pulsed to occur with pulses of either or both of the first and second sinusoidal power signals supplied to the inner and outer coils. In other embodiments, the bias signal is a DC signal that is pulsed.

[0055] In one embodiment, the RF bias signal may be pulsed to be ON when one of the RF power signals to the inner or outer coils that are pulsed is also ON, wherein a pulse of the RF bias signal occurs with at least a portion of the corresponding RF power signal to the inner or outer coil. When pulses of the RF bias signal occur with pulses of one of the RF power signals to the inner or outer coil, the pulsing frequency of the RF bias signal may be similar to the pulsing frequency of the corresponding RF power signal. The RF bias signal is pulsed with a third duty cycle, wherein the duty cycle of the RF bias signal may be similar to or different than the duty cycle of the corresponding RF power signal that is pulsed. For example, pulsing of the RF bias signal may correspond to pulsing of the first sinusoidal power signal supplying RF power to the inner coil, or may correspond to pulsing of the second sinusoidal power signal supplying RF power to the outer coil. In addition, a third synchronization delay is applied to the RF bias signal, wherein the third synchronization delay aligns the RF bias signal to pulses of at least one of the first sinusoidal power signal to the inner coil and / or the second sinusoidal power signal to the outer coil. As such, a repeatable pulse of the RF bias signal is on during a repeatable pulse of the first sinusoidal power signal and / or the second sinusoidal power signal.

[0056] In another embodiment, the RF bias signal is pulsed to occur with pulses of both first and second sinusoidal power signals supplied to the inner and outer coils. For example, in a plurality of alternating periods of the RF bias signal including a first period and a second period, a first pulse of the RF bias signal overlaps at least a portion of a pulse of the first sinusoidal power signal supplied to the inner coil in the first period, and a second pulse of the bias signaloverlaps at least a portion of a pulse of the second sinusoidal power signal supplied to the outer coil in the second period.

[0057] At 350, the method includes maintaining a time-off gap in plasma generation between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal. In particular, the time-off gap and the pulses of the sinusoidal power signals have a temporal relationship, in that the time-off gap is temporally located and or maintained between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal. For example, the time-off gap and the pulses occur sequentially in time. The time-off gap is generated based on timing of the RF power signals to the inner and outer coils and their respective duty cycles. In particular, a first synchronization delay is applied to the first sinusoidal power signal in relation to a reference point, and a second synchronization delay is applied to the second sinusoidal power signal in relation to a reference point. The first synchronization delay and the second synchronization delay align the time-off gap between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal. In one embodiment, the time-off gap ranges between greater than 0 milliseconds to less than 5 milliseconds. The time-off gap is further described below in relation to FIGS. 4A-4B.

[0058] FIG. 4A is a diagram 400A illustrating timing of an RF bias signal and sinusoidal (e.g., RF) power signals supplied to coils of a transform coupled plasma generating system. Each of the signals are uniquely pulsed, such that in alternating pulses of the RF bias signal one pulse of the RF bias signal corresponds to the RF power signal to the inner coil and the next pulse of the RF bias signal corresponds to the RF power signal to the outer coil, in accordance with one embodiment of the present disclosure. Time-off gaps in plasma generation are temporally located between pulses of RF power signals to the inner and outer coils, in one embodiment. For example, a time-off gap and corresponding pulses of the RF power signals occur sequentially in time.

[0059] For example, bias signal 463 is shown with reference to timeline 462. The bias signal may be configured as an RF bias signal with a bias frequency, or be configured as a DC bias signal. The bias signal is pulsed at a pulsing frequency and duty cycle. For example, a period 466 corresponding to the pulsing frequency is shown for the bias signal 463. Alternating periods 468 are repeated in succession, wherein of the alternating periods 468 includes a bias pulse 463 a that is followed by bias pulse 463b.

[0060] A first sinusoidal power signal 464 is supplied to the inner coil of a transformer coupled plasma generating system. The first sinusoidal power signal 464 may be associated with an RF frequency, a pulsing frequency, and a duty cycle. The first sinusoidal power signal includes pulses 464a, 464b . . . 464n. A second sinusoidal power signal 465 is supplied to theouter coil, and includes pulses 465a, 465b, . . . 465n. The second sinusoidal power signal 465 may be associated with an RF frequency, a pulsing frequency, and a duty cycle.

[0061] Synchronization delay 473 is applied to the bias signal 463, and is used to align the bias signal 463 to each of the first sinusoidal power signal 464 and the second sinusoidal power signal 465. Further to achieve alignment, synchronization delay 471 may be applied to the first sinusoidal power signal 464 and synchronization delay 472 may be applied to the second sinusoidal power signal 465. Each of the synchronization delays are set with reference to a synchronization reference point 461, which may be any fixed point on the timeline 462, such as a leading edge or trailing edge of a pulse of the bias signal 463, etc.

[0062] In one embodiment, alignment of the signals provides that in alternating pulses of the bias signal, one pulse of the bias signal corresponds to the first sinusoidal power signal supplied to the inner coil, and the next pulse of the bias signal corresponds to the second sinusoidal power signal supplied to the outer coil. In particular, pulses in the bias signal 463 may be arranged in a plurality of alternating periods, wherein each of the alternating periods includes a first period and a second period, and each of the periods includes a pulse of the bias signal. For example, one of the alternating periods 468 includes a bias pulse 463a in the first period, and bias pulse 463b in the second period. Also, in the first period, the bias pulse 463a overlaps at least a portion of a pulse (e.g., 464a) of the first sinusoidal power signal that is supplied to the inner coil. Further, in the second period, the bias pulse 463b overlaps at least a portion of a pulse (465 a) of the second sinusoidal power signal supplied to the outer coil in the second period.

[0063] In addition, the synchronization delay 471 for first sinusoidal power signal 464 and the synchronization delay 472 for the second sinusoidal power signal 465 are used to set one or more time off-gaps between pulses of the first sinusoidal power signal 464 and the second sinusoidal power signal 465. For example, time off gap 467a is located between the trailing edge of a pulse (e.g., 464a) of the first sinusoidal power signal 464 and the leading edge of a pulse (e.g., 465a) of the second sinusoidal power signal 465. In another example, time off gap 467b is located between the trailing edge of a pulse (e.g., 465a) of the second sinusoidal power signal 465 and the leading edge of a pulse (464b) of the first sinusoidal power signal 464. In that manner, the plasma time-off gaps in plasma generation allow for evacuation of unused etch products and process byproducts from the chamber, thereby preventing unwanted ionization of those products. This promotes more uniform sheath thickness globally across the wafer, which reduces cell tilting across the wafer.

[0064] FIG. 4B is a diagram 400B illustrating RF power signals supplied to coils of a transformer coupled plasma generation system and an RF bias signal that are uniquely pulsed to achieve plasma time-off gaps, in accordance with one embodiment of the present disclosure. Inparticular, the plasma time-off gaps between the RF power signals allow for evacuation of unused etch products and process byproducts from the chamber, as opposed to unwanted ionization of those products. This promotes more uniform sheath thickness globally across the wafer, which reduces cell tilting and / or tilting of ions hitting the wafer. In that manner, uniformity is achieved for across wafer ACL cell tilt, thereby leading to improved ACL cell mask open cell profiles with high aspect ratios.

[0065] Diagram includes y-axis 410, which indicates amplitude of a one or more corresponding signals, including sinusoidal power signals (i.e., supplying RF power) to the inner and outer coils and / or RF bias signals. Corresponding amplitudes of each of the signals is relative to a corresponding timeline illustrated across one or more x-axis.

[0066] For example, the x-axis representing timeline 415B corresponds to a first sinusoidal or RF power signal 420 that provides RF power to an inner coil of a TCP processing system. Also, timeline 415B represents a zero (0) amplitude along the y-axis 410 for the first sinusoidal power signal 420. The first sinusoidal power signal 420 operates at a first signal frequency, and is pulsed at a pulsing frequency (corresponding to the period 405) with a first duty cycle. The first sinusoidal power signal 420 includes an ON period and a secondary period corresponding with the first duty cycle. During the secondary period, the first sinusoidal power signal is completely off or at a reduced power, or a combination thereof. As shown, the first sinusoidal power signal 420 includes one or more pulses, including pulse 420a, 420b, 420c, . . . and 420n.

[0067] In addition, the x-axis representing timeline 415C corresponds to a second sinusoidal or RF power signal 430 that provides RF power to an outer coil of the TCP processing system. Also, timeline 415C represents a zero (0) amplitude along the y-axis 410 for the second sinusoidal power signal 430. The second sinusoidal power signal 430 operates at a second signal frequency, and is pulsed at the pulsing frequency (corresponding to the period 405) with a second duty cycle. The second sinusoidal power signal 430 includes an ON period and a secondary period corresponding with the second duty cycle. During the secondary period, the second sinusoidal power signal is completely off or at a reduced power, or a combination thereof. As shown, the second sinusoidal power signal 430 includes one or more repeatable pulses, including pulse 430a, 430b, . . . and 430n.

[0068] Also, the x-axis representing timeline 415A corresponds to an RF bias signal providing bias power for a corresponding RF power signal (i.e., at least one of the sinusoidal (e.g., RF) power signals to the inner and outer coils). As shown, pulses of the RF bias signal occur with each of the sinusoidal power signals to the inner and outer coils. In particular, the RF bias signal 440 provides RF bias power for the first sinusoidal power signal 420 supplying RF power to the inner coil and the second sinusoidal power signal 430 supplying RF power to theouter coil. Timeline 415A represents a zero (0) amplitude along the y-axis 410 for the RF bias signal 440. The RF bias signal operates at a bias frequency, as previously described. The RF bias signal 440 is pulsed at a bias pulsing frequency having a corresponding period 446 with a third duty cycle. For example, RF bias signal includes pulses 440a, 440b, 440c, 440d, . . . 440n. The pulsing frequency of the RF bias signal may be different than the pulsing frequency of either of the first or second sinusoidal power signals supplying RF power to the inner or outer coils, as previously described. For example, the pulsing frequency of the RF bias signal may be higher (approximately double) than the pulsing frequency of a corresponding sinusoidal power signal supplying power to either of the inner or outer coil. In addition, the duty cycle of the RF bias signal may be higher than the duty cycle of either sinusoidal power signal supplying power to the inner or outer coil, because the period of the RF bias signal is shorter than the period of either sinusoidal power signal supplying power to the inner or outer coil.

[0069] In one exemplary implementation, each of the first and second sinusoidal power signals supplying RF power operate at a substantially similar pulsing frequency with a corresponding pulsing period 405. For purposes of illustration, the pulsing frequency and pulsing period 405 is shown with reference to the first sinusoidal power signal 420 that is pulsed with a first duty cycle. As such, leading edges of pulses 420a, 420b, 420c . . . and 420n of the first sinusoidal power signal 420 occur at the beginning of corresponding periods 405 based on the pulsing frequency.

[0070] In the exemplary implementation, the second sinusoidal power signal 430 is pulsed at the pulsing frequency with a second duty cycle; although the duty cycles of the first and second sinusoidal power signals may be similar or different, as previously described. That is, each pulse of the second sinusoidal power signal 430 occurs within a corresponding period 405 based on the pulsing frequency, and include pulses 430a, 430b, . . . and 430n.

[0071] As previously described, alternating pulses of the RF bias signal 440 correspond with alternating pulses of the first and second sinusoidal power signals. For example, one pulse of the RF bias signal 440 corresponds to the first sinusoidal power signal 420 supplied to the inner coil, and the next pulse of the RF bias signal 440 corresponds to the second sinusoidal power signal 430 supplied to the outer coil. For example, a first pulse (e.g., pulse 440a) of the RF bias signal 440 overlaps at least a portion of a pulse (e.g., 420a) of the first sinusoidal power signal 420 supplying RF power to the inner coil. In addition, a second pulse (e.g., pulse 440b) of the RF bias signal overlaps at least a portion of a pulse (e.g., 430a) of the second sinusoidal power signal 430 supplying power to the outer coil.

[0072] Further, a first timing for the first sinusoidal power signal and a second timing for the second sinusoidal power signal are asynchronous. For example, a first synchronization delay421 is applied to the first sinusoidal power signal 420. Synchronization delays can be made with reference to synchronization reference line 406 correspond with y-axis 410. In addition, a second synchronization delay 431, made with reference to sync reference line 406, is applied to the second sinusoidal power signal 430.

[0073] Also, a third synchronization delay 441, made with reference to sync reference line 406 corresponding to y-axis 410, is applied to the RF bias signal 440. The synchronization delay 441 aligns the RF bias signal 440 to the first sinusoidal power signal 420 and the second sinusoidal power signal 430, such that bias power is applied to the ESC when the first sinusoidal power signal 420 and the second sinusoidal power signal 430 are pulsing on. That is, a corresponding pulse of the RF bias signal 440 is on during a corresponding pulse of the first sinusoidal power signal 420 supplying RF power to the inner coil. Also, a corresponding pulse of the RF bias signal 440 is on during a corresponding pulse of the second sinusoidal power signal 430 supplying RF power to the outer coil. In various embodiments, alignment of the signals may include aligning leading edges of the signals, aligning trailing edges of the signals, aligning centers of the signals, etc. For example, the synchronization delay 421 applied to the first sinusoidal power signal 420 and the synchronization delay 441 applied to the RF bias signal 440 aligns centers of pulses of each of the RF power signal 420 and the RF bias signal 440, as is shown by dotted line 442. The duty cycles of each of the RF bias signal 440 to the first sinusoidal power signal 420 may be similar or different, in embodiments. Also, the synchronization delay 431 applied to the second sinusoidal power signal 430 and the synchronization delay 441 applied to the RF bias signal 440 aligns centers of pulses of each of the RF power signal 430 and the RF bias signal 440, as is shown by dotted line 443. Similarly, duty cycles of each of the RF bias signal 440 to the second sinusoidal power signal 430 may be similar or different, in embodiments.

[0074] In particular, a time-off gap in plasma generation is located between a corresponding pulse of the first sinusoidal power signal 420 and a corresponding pulse of the second sinusoidal power signal 430. In particular, the time-off gap and the pulses of the sinusoidal power signals have a temporal relationship, in that the time-off gap is temporally located between the pulse of the first sinusoidal power signal 420 and the pulse of the second sinusoidal power signal 430. For example, the time-off gap and the pulses occur sequentially in time. The time-off gap in plasma generation is set based on duty cycles and synchronization delays of the first sinusoidal power signal 420 and the second sinusoidal power signal 430. For example, the first synchronization delay 421 and the second synchronization delay 431 align the time-off gap between a corresponding pulse of the first sinusoidal power signal 420 and a correspondingpulse of the second sinusoidal power signal 430. As previously described, a corresponding time- off gap ranges between greater than 0 milliseconds to less than 5 milliseconds.

[0075] As shown, time-off gap 450A is located between a trailing edge 434 of pulse 430a of the second sinusoidal power signal 430 and a leading edge 423 of pulse 420b of the first sinusoidal power signal 420. Also, time-off gap 450B is located between a trailing edge 424 of pulse 420b of the first sinusoidal power signal 420 and a leading edge 433 of pulse 430b of the second sinusoidal power signal 430. That is, time-off gaps 450A and 450B are shown on either side of pulse 420b of the first sinusoidal power signal 420, such that time-off gaps are located on either side of each pulse of the first sinusoidal power signal 420. Also, time-off gaps are located on either side of each pulse of the second sinusoidal power signal 430. In one embodiment, the time-off gaps 450A and 450B are equal in duration, and as such, time-off gaps of equal duration are located on either side of each of the pulses for the first and second sinusoidal power signals. In another embodiment, the time-off gaps 450A and 450B are unequal in duration.

[0076] In one embodiment, the first sinusoidal power signal 420 and the second sinusoidal power signal 430 are completely off, or at reduced powers, in the time-off gap. In one implementation, the RF power signals in the time-off gaps are completely off. In one embodiment, the second sinusoidal power signal 430 includes an ON period and a secondary period for the second duty cycle, wherein during the secondary period, the second sinusoidal power signal 430 is completely off or at a reduced power, or a combination thereof.

[0077] FIGS. 5A-5E illustrate how tuning plasma time-off gaps of radio frequency power signals supplied to coils of a transformer coupled plasma generation system achieves unique shapes of cell tilt that may be used to control cell tilt globally across a wafer, in accordance with one embodiment of the disclosure. The goal to is to achieve near zero (0) cell tilt. The y-axis 515 illustrates degrees of cell tilt and their direction. Positive values indicate an inward tilt (i.e., tilting towards the center of the wafer), and negative values indicate an outward tilt (i.e., tilting away from the center of the wafer). The x-axis shows radial distance from a center of a wafer, such that cell tilt may be measured at various radial distances from the center of the wafer. Embodiments of the present disclosure affect cell tilt globally across the wafer, and more particularly within the ranges of 0 to approximately 130 millimeters (mm) radially (as indicated by line 520) from center (e.g., for a 300 mm wafer). Cell tilt at the edge of the wafer is controlled using other methodologies.

[0078] FIG. 5A shows that global cell tilt may be affected by tuning duration of time-off gaps in plasma generation. Dotted line 550A shows cell tilt and direction at various radial distances from the center of the wafer 105 when there is zero (0) time-off gap between RF power signals to the inner and outer coils. Measured sample points 550B for cell tilt and directiongenerated with zero (0) time-off gap between RF power signals to the inner and outer coils is shown in each of the data plots FIGS. 5B-5D, and is used as a reference to other data points corresponding to non-zero time-off gaps. That is, FIGS. 5B-5D show data plots for processes with varying time-off gaps for plasma generation in relation to a process without a time-off gap.

[0079] As shown in diagram 500A, the cell tilt and direction trend negatively towards an outward tilt the greater the radial distance from center of the wafer, until reaching the edge region, due in part to non-uniformity of the plasma sheath. In particular, between 0 to 85 mm in radial distance, the cell tilt and direction is slightly inward towards a center of the wafer. However, beyond approximately a radial distance of 85 mm, the cell tilt and direction trends negatively towards an outward tilt (i.e., crossing zero (0) line), with degrees of outward tilting increasing the further away from the center of the wafer 105. This may be shown in FIG. 5E illustrating a cell tilt globally across a wafer. Horizontal axis 570 shows radial distance from a center of a wafer 105, wherein the center is shown by dotted line 580. Dotted line 585 shows radial distance of 130 millimeters (mm), wherein the global region of the wafer is approximately between 0 and 130 mm radial distance from the center. A plurality of cells features 595 generated through etching is shown on the wafer. Outward tilting (as indicated by negative values) is prevalent, with a trend to more negative values (i.e., outward tilting) in diagram 500A moving towards a greater distance from center. Previous tuning of parameters, not including time-off gaps of plasma generation, is unable to reverse this negative trend.

[0080] Cell tilt is partly dependent on the shape (e.g., thickness) of the plasma sheath generated in part responsive to generation of plasma from application of a bias RF power signal placed on an ESC. The plasma sheath is inversely proportional to a ion density profile of the generated plasma. The sheath defines an area where there is a depletion of electrons, and is located near or on the substrate. Non-uniformity of the thickness of the plasma sheath and curvature of its bottom surface may show up mid-substrate (i.e., approximately halfway from the center to the edge of the substrate), or even earlier. That is, sheath thickness may be horizontal initially on the wafer (i.e., near the center of the wafer), but is deformed as the wafer radial length progresses, and rises upwards at the edge. That is, sheath may bend beginning at midwafer (i.e., approximately half way from the center to the edge), and sometimes even earlier (i.e., towards the center).

[0081] Generally, ions escaping the plasma and pulled towards the wafer, in part by the bias RF power signal, travel perpendicular to the sheath thickness. Where the sheath is uniform, such as near the center of the wafer, ions escape the plasma and travel in a vertical direction towards the substrate. On the other hand, where the sheath is non-uniform, ions escape the plasma at an angle, such as perpendicular to the surface of the sheath, which is deformed (e.g., rising awayfrom the wafer). As such, ions have a tilt that is offset from vertical. The ion tilt that is offset from vertical (desired) and introduced on the wafer contributes to tilting of the cell tilt and nonuniformity of the cell tilt globally across the wafer. For example, when etching the wafer, the etching features of the substrate where nonuniformity or this sheath bending takes place will be angled (i.e., etched at an angle) and not vertical (i.e., etched vertically), whereas in uniform plasma and correspondingly the plasma sheath, the etching features will be vertically oriented.

[0082] In diagram 500A, each of dotted lines 555A, 560A, and 565A shows that the negative trend for cell tilt and direction shown in dotted line 55OA is reversed (e.g., moving towards a positive slope) the greater the distance from the center of the wafer using various time-off gaps. For example, dotted line 555A shows cell tilt and direction when a time-off gap of 0.5 milliseconds (ms) is located between RF power signals to the inner and outer coils. Also, dotted line 560A shows cell tilt and direction when a time-off gap of 1.0 milliseconds (ms) is located between RF power signals to the inner and outer coils. Also, dotted line 565A shows cell tilt and direction when a time-off gap of 2.0 milliseconds (ms) is located between RF power signals to the inner and outer coils.

[0083] Data plot FIG. 5B shows measured sample points 555B for cell tilt and direction generated with 0.5 ms time-off gap between RF power signals to the inner and outer coils. The 0.5 ms time-off gap is shown to reverse the negative trend towards an outward direction of cell tilt the greater the radial distance from center of the wafer. Reversing the negative trend was not possible until introduction of tuning of the time-off gap between RF power signals to the inner and outer coils in present embodiments.

[0084] Data plot FIG. 5C shows measured sample points 560B for cell tilt and direction generated with a 1.0 ms time-off gap between RF power signals to the inner and outer coils. The time-off gap is shown to reverse the negative trend towards an outward direction of cell tilt the greater the radial distance from center of the wafer. The 1.0 ms time-off gap reverses the negative trend towards an outward direction of cell tilt the greater the radial distance from center of the wafer, wherein previously reversing the negative trend was not possible.

[0085] Data plot FIG. 5D shows measured sample points 565B for cell tilt and direction generated with a 2.0 ms time-off gap between RF power signals to the inner and outer coils. The 2.0 time-off gap is shown to reverse the negative trend towards an outward direction of cell tilt the greater the radial distance from center of the wafer, wherein previously reversing the negative trend was not possible.

[0086] As a result, with proper tuning of time-off gaps, uniformity of cell tilt can be achieved globally across the wafer, in accordance with one embodiment of the present disclosure. For example, proper tuning of time-off gaps provides for modifying direction of celltilt. This is shown by the ability to rotate line 590, which indicates direction of cell tilt. Further, proper tuning of time-of gaps can selectively modify the direction of cell tilt at targeted radial distances from the center of the wafer. In that manner, vertical cell tilt can be achieved globally across all radial distances of the wafer.

[0087] In embodiments, a substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other parts of the chamber such as a gas inlet and / or target, which may be implemented by control system or controller 150 of FIG. 1. In some implementations, a controller is part of a system, which may be part of the abovedescribed examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a substrate pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The controller, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, and process implemented for operating a plasma chamber. Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor substrate or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0088] The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” of all or a part of a fab host computer system, which can allow for remote access of the substrate processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g., a server) can provide process recipes to a system over a network, which may include a local network or the Internet.

[0089] Without limitation, example systems may include a plasma etch chamber or module, an ion implantation chamber or module, a track chamber or module, and any othersemiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0090] The foregoing description of the embodiments has been provided for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varied in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.

[0091] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein, but may be modified within their scope and equivalents of the claims.

Claims

CLAIMS1. A system, comprising: a plasma chamber configured for generating a plasma through inductive coupling, wherein the plasma chamber includes an electrostatic chuck (ESC) for supporting a substrate, and a dielectric window disposed opposite the ESC; an inner coil disposed over the dielectric window; an outer coil disposed over the dielectric window; a first matchless power source electrically coupled to the inner coil, and configured to supply a first sinusoidal power signal to the inner coil at a first signal frequency, wherein the first sinusoidal power signal is pulsed at a first pulsing frequency with a first duty cycle; and a second matchless power source electrically coupled to the outer coil, and configured to supply a second sinusoidal power signal to the outer coil at a second signal frequency, wherein the second sinusoidal power signal is pulsed at a second pulsing frequency with a second duty cycle; and a radio frequency (RF) bias power generator for generating an RF bias signal operating at a bias frequency, wherein the RF bias signal is pulsed at a bias pulsing frequency with a third duty cycle, wherein in a plurality of alternating periods of the RF bias signal including a first period and a second period, a first pulse of the RF bias signal overlaps at least a portion of a pulse of the first sinusoidal power signal supplied to the inner coil in the first period, and a second pulse of the RF bias signal overlaps at least a portion of a pulse of the second sinusoidal power signal supplied to the outer coil in the second period, wherein a time-off gap in plasma generation is located between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal.

2. The system of claim 1, wherein the first sinusoidal power signal and the second sinusoidal power signal are completely off in the time-off gap.

3. The system of claim 1, wherein in the plurality of alternating periods, the first period and the second period repeat in succession.

4. The system of claim 1, a first synchronization delay applied to the first sinusoidal power signal; a second synchronization delay applied to the second sinusoidal power signal; and a third synchronization delay applied to the RF bias signal;wherein the first synchronization delay and the second synchronization delay and the third synchronization delay align alternating pulses of the RF bias signal to the pulse of the first sinusoidal power signal supplied to the inner coil in the first period and to the pulse of the second sinusoidal power signal supplied to the outer coil in the second period.

5. The system of claim 4, wherein each of the first synchronization delay and the second synchronization delay and the third synchronization delay are set in relation to a reference point.

6. The system of claim 1, wherein the first pulsing frequency of the first sinusoidal power signal is approximately similar to the second pulsing frequency of the second sinusoidal power signal.

7. The system of claim 1, further comprising: a first synchronization delay applied to the first sinusoidal power signal; and a second synchronization delay applied to the second sinusoidal power signal, wherein the first synchronization delay and the second synchronization delay align the time-off gap between the pulse of the first sinusoidal power signal in the first period and the pulse of the second sinusoidal power signal in the second period.

8. The system of claim 1, wherein the first sinusoidal power signal includes an ON period and a secondary period for the first duty cycle, wherein during the secondary period, the first sinusoidal power signal is completely off or at a reduced power.

9. The system of claim 1, wherein the second sinusoidal power signal includes an ON period and a secondary period for the second duty cycle, wherein during the secondary period, the second sinusoidal power signal is completely off or at a reduced power.

10. The system of claim 1, wherein a first timing for the first sinusoidal power signal and a second timing for the second sinusoidal power signal are asynchronous.

11. The system of claim 1, wherein the first matchless power source includes a direct drive circuit, comprising: a signal generator configured to supply an input RF signal; a gate driver configured to receive the input RF signal and configured to produce a plurality of square wave signals;a half bridge circuit configured to receive the plurality of square wave signals from the gate driver and generate an amplified square waveform; and a reactive circuit configured to extract a shaped sinusoidal waveform from the amplified square waveform based on a shaped envelope of a shaping voltage signal.

12. The system of claim 1, wherein the time-off gap ranges between greater than 0 milliseconds to less than 5 milliseconds.

13. A method, comprising: providing a plasma chamber configured for generating a plasma through inductive coupling, wherein the plasma chamber includes an electrostatic chuck (ESC) for supporting a substrate and a dielectric window disposed opposite the ESC; supplying a first sinusoidal power signal to an inner coil at a first signal frequency, wherein the first sinusoidal power signal is pulsed at a first pulsing frequency with a first duty cycle; supplying a second sinusoidal power signal to the outer coil at a second signal frequency, wherein the second sinusoidal power signal is pulsed at a second pulsing frequency with a second duty cycle; supplying a radio frequency (RF) bias signal operating at a bias frequency, wherein the RF bias signal is pulsed at a bias pulsing frequency with a third duty cycle, wherein in a plurality of alternating periods of the RF bias signal including a first period and a second period, a first pulse of the RF bias signal overlaps at least a portion of a pulse of the first sinusoidal power signal supplied to the inner coil in the first period, and a second pulse of the RF bias signal overlaps at least a portion of a pulse of the second sinusoidal power signal supplied to the outer coil in the second period; and maintaining a time-off gap in plasma generation between the pulse of the first sinusoidal power signal and the pulse of the second sinusoidal power signal.

14. The method of claim 13, wherein the first sinusoidal power signal and the second sinusoidal power signal are completely off in the time-off gap.

15. The method of claim 13, wherein in the plurality of alternating periods, the first period and the second period repeat in succession.

16. The method of claim 13, applying a first synchronization delay to the first sinusoidal power signal;applying a second synchronization delay to the second sinusoidal power signal; and applying a first synchronization delay to the RF bias signal, wherein the first synchronization delay and the second synchronization delay and the third synchronization delay align alternating pulses of the RF bias signal to the pulse of the first sinusoidal power signal supplied to the inner coil in the first period and to the pulse of the second sinusoidal power signal supplied to the outer coil in the second period.

17. The method of claim 16, wherein each of the first synchronization delay and the second synchronization delay and the third synchronization delay are set in relation to a reference point.

18. The method of claim 16, wherein the first pulsing frequency of the first sinusoidal power signal is approximately similar to the second pulsing frequency of the second sinusoidal power signal.

19. The method of claim 13, wherein the locating the time-off gap includes: applying a first synchronization delay to the first sinusoidal power signal; and applying a second synchronization delay to the second sinusoidal power signal, wherein the first synchronization delay and the second synchronization delay align the time-off gap between the pulse of the first sinusoidal power signal in the first period and the pulse of the second sinusoidal power signal in the second period.

20. The method of claim 13, wherein the first sinusoidal power signal includes an ON period and a secondary period for the first duty cycle, wherein during the secondary period, the first sinusoidal power signal is completely off or at a reduced power.

21. The method of claim 13, wherein the second sinusoidal power signal includes an ON period and a secondary period for the second duty cycle, wherein during the secondary period, the second sinusoidal power signal is completely off or at a reduced power.

22. The method of claim 13, generating the first sinusoidal power signal using a first matchless power source; and generating the second sinusoidal power signal using a second matchless power source.

23. The method of claim 22, further comprising: using a direct drive circuit to generate the first sinusoidal power signal, including: using a signal generator configured to supply an input RF signal;using a gate driver configured to receive the input RF signal and configured to produce a plurality of square wave signals; using a half bridge circuit configured to receive the plurality of square wave signals from the gate driver and generate an amplified square waveform; and using a reactive circuit configured to extract a shaped sinusoidal waveform, as the first sinusoidal power signal, from the amplified square waveform based on a shaped envelope of a shaping voltage signal.

24. The method of claim 13, wherein the time-off gap ranges between greater than 0 milliseconds to less than 5 milliseconds.

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