Programmable logic device system of baseboard, and application device thereof

Abstract

Embodiments of the present application relate to the technical field of computer network communications, and provide a programmable logic device system of a baseboard, and an application device thereof. The programmable logic device system of the baseboard comprises: a low pin count bus parsing module is configured to parse a low pin count bus command issued by a central processing unit; a register space allocation module is configured to allocate data of the low pin count bus command to a preset register address space; a serial port hub module is configured to interact with the central processing unit and a baseboard management controller, and provide the preset register address space; a serial port parsing module is configured to parse serial port data between a baseboard serial port module and the central processing unit or between the baseboard serial port module and the baseboard management controller; a serial port switching module is configured to connect the baseboard serial port module to the central processing unit on the basis of a serial port complete byte switching policy, or connect the baseboard serial port module to the baseboard management controller on the basis of said policy. The embodiments of the present application solve the problems of incomplete bytes, messy codes and system suspension caused by serial port switching of different management planes.

Description

A programmable logic device system of a substrate and its application equipment

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to a Chinese patent application filed with the Patent Office of China on January 17, 2024, with application number 202410064086.8 and application name “A programmable logic device system for a substrate and its application equipment”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present application relates to the field of computer network communication technology, and in particular to a programmable logic device system of a substrate, a substrate serial port system, a switch, an electronic device, and a storage medium. Background Art

[0004] With the rapid development of data center services, the demand for data center switches is rapidly increasing, as are switch capacity, the number of panel ports, and port speeds. Typically, users need to quickly access information from the management and network forwarding planes through serial ports or management network ports. Because the management and network forwarding planes belong to different management modules, the management network ports can be accessed through the management modules' respective IP (Internet Protocol) addresses. The two management modules communicate with each other via an intranet port, while the panel serial ports must be switched to the serial ports of each management module for time-sharing access. The two management modules also record their respective system logs via the serial ports. However, during this time-sharing switching process, incomplete transmissions can easily occur, resulting in garbled characters on the CPU (Central Processing Unit), BMC (Baseboard Management Controller), and host computer, or even the system serial port freezing.

[0005] Summary of the Invention

[0006] In view of the above problems, embodiments of the present application are proposed to provide a substrate programmable logic device system, a substrate serial port system, a switch, an electronic device and a storage medium that overcome the above problems or at least partially solve the above problems.

[0007] To solve the above problems, in a first aspect of the present application, an embodiment of the present application discloses a programmable logic device system for a substrate. One end of the programmable logic device system for the substrate is connected to a central processing unit and a baseboard management controller, and the other end of the programmable logic device system for the substrate is connected to a baseboard serial port module. The programmable logic device system for the substrate includes:

[0008] A reduced pin bus parsing module is connected to the central processing unit and is used to parse the reduced pin bus commands issued by the central processing unit;

[0009] A register space allocation module, connected to the reduced pin bus parsing module, for allocating data of reduced pin bus commands to a preset register address space;

[0010] The serial port hub module is connected to the central processing unit and the baseboard management controller, and is used to interact with the central processing unit and the baseboard management controller; and provides a preset register address space;

[0011] The serial port parsing module is connected to the serial port hub module and is used to parse the serial port data between the baseboard serial port module and the central processor, or between the baseboard serial port module and the baseboard management controller;

[0012] The serial port switching module is connected to the serial port parsing module and is used to connect the baseboard serial port module to the central processing unit or to connect the baseboard serial port module to the baseboard management controller based on the serial port complete byte switching strategy.

[0013] In some embodiments, the programmable logic device system of the substrate further includes:

[0014] The filter module is located between the serial port analysis module and the baseboard serial port module and is used to filter out interference signals from the baseboard serial port module.

[0015] In some embodiments, the programmable logic device system of the substrate further includes:

[0016] The baud rate detection module is connected to the baseboard serial port module and is used to detect the baud rate of the baseboard serial port module. The baud rate is used to control the data transmission rate.

[0017] In some embodiments, the serial port hub module includes:

[0018] The interface idle detection submodule is used to detect the switching instruction of the baseboard serial port module;

[0019] The switching determination submodule is configured to generate a first target feature code or a second target feature code based on first switching data of the first input instruction when the switching instruction is a first input instruction.

[0020] In some embodiments, the serial port hub module further includes:

[0021] an input sub-detection sub-module, configured to parse the second switching instruction and determine second switching data when the switching instruction is the second switching instruction;

[0022] The handover determination submodule is further configured to generate a first target characteristic code or a second target characteristic code based on the second handover data.

[0023] In some embodiments, the serial port switching module includes:

[0024] The serial port status judgment submodule is used to obtain the status characteristic code of the serial port analysis module; connect the baseboard serial port module to the central processor or connect the baseboard serial port module to the baseboard management controller according to the status characteristic code.

[0025] In some embodiments, the serial port status judgment submodule is used to obtain the status feature code of the serial port parsing module; when the status feature code is the first target feature code, the baseboard serial port module is connected to the baseboard management controller; when the status feature code is the second target feature code, the baseboard serial port module is connected to the central processing unit.

[0026] In some embodiments, the serial port switching module further includes:

[0027] The first central processing unit sending state detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle based on the state characteristic code being the first target characteristic code; when it is idle, close the connection channel from the central processing unit to the baseboard serial port module;

[0028] The first baseboard management controller sending status detection submodule is used to detect whether the sending direction from the baseboard management controller to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset first waiting time, the channel between the baseboard serial port module and the baseboard management controller is connected; and after the connection is connected, the serial port status judgment submodule is returned.

[0029] In some embodiments, the serial port switching module further includes:

[0030] The second central processing unit sends a state detection submodule for detecting the sending direction from the baseboard management controller to the baseboard serial port module based on the state characteristic code being the second target characteristic code; and closing the connection channel from the baseboard management controller to the baseboard serial port module when the state characteristic code is in an idle time;

[0031] The second baseboard management controller sending status detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset second waiting time, the channel between the baseboard serial port module and the central processing unit is connected; and after the connection is connected, it returns to the serial port status judgment submodule.

[0032] In some embodiments, the serial port parsing module includes:

[0033] The start bit check submodule is used to detect whether there is a serial port start bit;

[0034] The starter module is used to receive the start bit data of the serial port data when the serial port start bit exists;

[0035] The payload submodule is used to receive serial port byte data of the serial port data after receiving the start bit data;

[0036] The stop submodule is used to receive the stop bit data of the serial port data when the received serial port byte data reaches a preset bit number.

[0037] In some embodiments, the filtering module is configured to determine the initial input value as the input value of the serial port input data when consecutive preset bits of the serial port input data of the substrate serial port module are the same initial input value.

[0038] In some embodiments, the baud rate detection module is used to count the number of times the level on the signal line changes within a third preset time period, and determine the baud rate according to the number of times.

[0039] In the second aspect of the present application, an embodiment of the present application discloses a substrate serial port system, including: a central processing unit, a baseboard management controller, a baseboard serial port module and the programmable logic device system of the baseboard as above, one end of the baseboard programmable logic device system is connected to the central processing unit and the baseboard management controller, and the other end of the baseboard programmable logic device system is connected to the baseboard serial port module.

[0040] In some embodiments, the baseboard serial port module includes:

[0041] The physical interface of the panel is connected to the other end of the programmable logic device system on the substrate.

[0042] In some embodiments, the baseboard serial port module further includes:

[0043] The level conversion submodule is located between the level conversion submodule and the other end of the programmable logic device system of the substrate and is used for serial port level conversion.

[0044] In some embodiments, the central processing unit includes:

[0045] The first universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is used for communicating with the substrate serial port module based on the substrate serial port system;

[0046] The second universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is used to generate a startup log and an operation log of the central processing unit.

[0047] In some embodiments, the baseboard management controller includes:

[0048] The first universal asynchronous receiver / transmitter of the baseboard management controller is connected to one end of the programmable logic device system of the baseboard and is used for communicating with the baseboard serial port module based on the baseboard serial port system;

[0049] The second universal asynchronous receiver / transmitter of the baseboard management controller is connected to one end of the programmable logic device system of the baseboard and is used to generate a baseboard management controller startup log and an operation log.

[0050] In a third aspect of the present application, an embodiment of the present application discloses a switch, including the above-mentioned baseboard serial port system.

[0051] In the fourth aspect of the present application, an embodiment of the present application further discloses an electronic device, including a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the programmable logic device system of the substrate as above is implemented when the computer program is executed by the processor.

[0052] In the fifth aspect of the present application, an embodiment of the present application further discloses a computer non-volatile readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, a programmable logic device system of the substrate as above is implemented.

[0053] The embodiments of the present application include the following advantages:

[0054] The embodiment of the present application is connected to the central processing unit through a simplified pin bus parsing module, which is used to parse the simplified pin bus commands issued by the central processing unit; the register space allocation module is connected to the simplified pin bus parsing module, which is used to allocate the data of the simplified pin bus commands to the preset register address space; the serial port hub module is connected to the central processing unit and the baseboard management controller, which is used to interact with the central processing unit and the baseboard management controller; and provides a preset register address space; the serial port parsing module is connected to the serial port hub module, which is used to parse the serial port data between the baseboard serial port module and the central processing unit, or between the baseboard serial port module and the baseboard management controller; the serial port switching module is connected to the serial port parsing module, which is used to The complete byte switching strategy connects the baseboard serial port module to the central processing unit, or connects the baseboard serial port module to the baseboard management controller; connects the three groups of serial ports to the CPLD respectively, and the CPLD completes the serial port complete byte switching according to the panel port switching instruction to avoid abnormal serial port hanging. It can solve the problems of incomplete bytes caused by serial port switching on different management planes, garbled characters and system hanging caused by them. The central processing unit serial port, baseboard management controller serial port and panel serial port use a unified serial port switching logic with good logic code portability, which simplifies the complexity of hardware design. The upper-layer software is unaware of the logic modification, which reduces the development complexity and design difficulty, reduces the development risk, improves reliability, and thus plays a role in saving costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] FIG1 is a schematic diagram of a serial port system of the prior art;

[0056] FIG2 is a schematic diagram of an embodiment of a programmable logic device system of a substrate provided by some embodiments of the present application;

[0057] FIG3 is a processing diagram of a filter module of a programmable logic device system embodiment of a substrate provided by some embodiments of the present application;

[0058] FIG4 is a processing diagram of a serial port hub module of a programmable logic device system embodiment of a substrate provided by some embodiments of the present application;

[0059] FIG5 is a processing diagram of a serial port switching module of a programmable logic device system embodiment of a substrate provided by some embodiments of the present application;

[0060] FIG6 is a schematic diagram of a state machine of a serial port parsing module of a programmable logic device system embodiment of a substrate provided by some embodiments of the present application;

[0061] FIG7 is a schematic diagram of an embodiment of a substrate serial port system provided by some embodiments of the present application;

[0062] FIG8 is a structural block diagram of an electronic device provided in some embodiments of the present application;

[0063] FIG9 is a structural block diagram of a storage medium provided in some embodiments of the present application. DETAILED DESCRIPTION

[0064] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0065] Referring to Figure 1, the existing serial port system solution consists of a baseboard management controller module (BMC module), a central processing unit (CPU), a complex programmable logic device (CPLD) baseboard, an interface conversion module (MAX232), and a front panel (RJ45). The BMC module's asynchronous serial communication interface 5 (UART5) is primarily responsible for communicating with the panel serial port, while asynchronous serial communication interface 1 (UART1) is primarily responsible for recording CPU startup logs and system operation logs. The CPU card's asynchronous serial communication interface 0 (UART0) is primarily responsible for communicating with the panel serial port, while UART0 is primarily responsible for recording BMC startup logs and system operation logs. The base board CPLD is primarily responsible for serial port switching between the panel serial port, the BMC module's UART1 and UART5, and the CPU card's UART5 and UART1. The MAX232 is responsible for serial port level conversion. The panel RJ45 is the physical interface of the panel serial port.

[0066] The two groups of management modules communicate over the network through the inline port. The panel serial port needs to be switched to the serial port of each management module for time-sharing access. The two groups of management modules record each other's system logs through the serial port. However, during the time-sharing switching process, incomplete transmission is prone to occur, resulting in garbled characters on the CPU side, BMC side, and host computer side, and even abnormal hanging of the system serial port.

[0067] 2 shows a schematic diagram of a programmable logic device system for a substrate provided by some embodiments of the present application. One end of the programmable logic device system for the substrate is connected to a central processing unit and a baseboard management controller, and the other end of the programmable logic device system for the substrate is connected to a baseboard serial port module. The programmable logic device system for the substrate may specifically include:

[0068] A reduced pin bus parsing module is connected to the central processing unit and is used to parse the reduced pin bus commands issued by the central processing unit;

[0069] A register space allocation module, connected to the reduced pin bus parsing module, for allocating data of reduced pin bus commands to a preset register address space;

[0070] The serial port hub module is connected to the central processing unit and the baseboard management controller, and is used to interact with the central processing unit and the baseboard management controller; and provides a preset register address space;

[0071] The serial port parsing module is connected to the serial port hub module and is used to parse the serial port data between the baseboard serial port module and the central processor, or between the baseboard serial port module and the baseboard management controller;

[0072] The serial port switching module is connected to the serial port parsing module and is used to connect the baseboard serial port module to the central processing unit or to connect the baseboard serial port module to the baseboard management controller based on the serial port complete byte switching strategy.

[0073] In some embodiments of the present application, the programmable logic device system of the substrate includes at least a reduced pin bus parsing module, a register space allocation module, a serial port hub module, a serial port parsing module and a serial port switching module. Among them, the reduced pin bus parsing module is connected to the central processing unit, and the reduced pin bus parsing module can parse the LPC read and write commands issued by the CPU, feed back the read data to the CPU, and configure the write data to the Base Board CPLD register; the register address space allocation module is connected to the central processing unit, and can allocate the data of the reduced pin bus command to the preset register address space. If the serial port hub module occupies 256Byte (byte) register address space, the register space allocation module can complete the allocation of the 256Byte space. The serial port hub module can occupy 0xA0~0xAF (160~175Byte) space. It is connected to the central processing unit and the baseboard management controller and can interact with the central processing unit and the baseboard management controller. The serial port parsing module is connected to the serial port hub module and can parse the serial port data between the substrate serial port module and the baseboard management controller. The serial port switching module is mainly responsible for the serial port complete byte switching strategy; the serial port switching module is connected to the serial port parsing module, and can connect the baseboard serial port module to the central processor or the baseboard serial port module to the baseboard management controller based on the serial port complete byte switching strategy.

[0074] Some embodiments of the present application are connected to the central processing unit through a simplified pin bus parsing module, which is used to parse the simplified pin bus commands issued by the central processing unit; a register space allocation module, which is connected to the simplified pin bus parsing module, is used to allocate the data of the simplified pin bus commands to the preset register address space; a serial port hub module, which is connected to the central processing unit and the baseboard management controller, is used to interact with the central processing unit and the baseboard management controller; and provides a preset register address space; a serial port parsing module, which is connected to the serial port hub module, is used to parse the serial port data between the baseboard serial port module and the central processing unit, or between the baseboard serial port module and the baseboard management controller; a serial port switching module, which is connected to the serial port parsing module, is used to The complete byte switching strategy of the port connects the baseboard serial port module to the central processing unit, or connects the baseboard serial port module to the baseboard management controller; connects the three groups of serial ports to the CPLD respectively, and the CPLD completes the serial port complete byte switching according to the panel port switching instruction to avoid abnormal serial port hanging. It can solve the problems of incomplete bytes caused by serial port switching on different management planes, garbled characters and system hanging caused by them. The central processing unit serial port, baseboard management controller serial port and panel serial port adopt a unified serial port switching logic with good logic code portability, which simplifies the complexity of hardware design. The logic modification is unaware of the upper-layer software, reducing the development complexity and design difficulty, reducing development risk, and improving reliability, thereby saving costs.

[0075] In some embodiments of the present application, the programmable logic device system of the substrate further includes:

[0076] The filter module is located between the serial port analysis module and the baseboard serial port module and is used to filter out interference signals from the baseboard serial port module.

[0077] The filter module is located between the serial port analysis module and the baseboard serial port module. It can filter out the Ethernet cable that is mistakenly inserted into the baseboard serial port module and the interference signal; to avoid the garbled code problem introduced by the Ethernet interface cable being mistakenly inserted into the panel serial port.

[0078] Specifically, the filtering module is used for determining the initial input value as the input value of the serial port input data when the serial port input data of the substrate serial port module has consecutive preset bits as the same initial input value.

[0079] Referring to Figure 3, during the data reception process, the serial port input data of the baseboard serial port module is continuously right-shifted. During this shift, it is determined whether consecutive preset bits of the data have the same initial input value, such as whether 50 consecutive bits are 1 or 50 consecutive bits are 0. If the serial port input data of the baseboard serial port module has consecutive preset bits that have the same initial input value, the initial input value is determined to be the input value of the serial port input data, thereby filtering out Ethernet cables that are incorrectly plugged into the panel serial port or interference signals from the panel serial port. If 50 consecutive bits are 1, the input value of the serial port input data is determined to be 1; if 50 consecutive bits are 0, the input value of the serial port input data is determined to be 0.

[0080] In some embodiments of the present application, the programmable logic device system of the substrate further includes:

[0081] The baud rate detection module is connected to the baseboard serial port module and is used to detect the baud rate of the baseboard serial port module. The baud rate is used to control the data transmission rate.

[0082] The baud rate detection module can be connected to the baseboard serial port module to detect the baud rate of the baseboard serial port module and control the data transmission rate by the baud rate. In some embodiments of the present application, the programmable logic device system of the baseboard can support 9600 and 115200 baud rates.

[0083] Specifically, the baud rate detection module is used to count the number of times the level on the signal line changes within a third preset time period, and determine the baud rate according to the number of times.

[0084] The baud rate can be determined by counting the number of level changes on the signal line within the third preset time period. For example, the number of high and low level changes on the signal line within 1 second can be counted, and the current panel serial port baud rate can be determined based on the number of changes.

[0085] In some embodiments of the present application, the serial port hub module includes:

[0086] The interface idle detection submodule is used to detect the switching instruction of the baseboard serial port module;

[0087] The switching determination submodule is configured to generate a first target feature code or a second target feature code based on first switching data of the first input instruction when the switching instruction is a first input instruction.

[0088] In some embodiments of the present application, the serial port hub module may include an interface idle detection submodule and a switch determination submodule. The interface idle detection submodule may detect switch instructions from the baseboard serial port module and distribute them based on unused switch instructions. When the switch instruction is a first input instruction, the switch determination submodule may generate a first target signature code or a second target signature code based on the first switch data.

[0089] In some embodiments of the present application, the serial port hub module further includes:

[0090] an input sub-detection sub-module, configured to parse the second switching instruction and determine second switching data when the switching instruction is the second switching instruction;

[0091] The handover determination submodule is further configured to generate a first target characteristic code or a second target characteristic code based on the second handover data.

[0092] In addition, the serial port hub module also includes an input sub-detection sub-module, which parses the second switching instruction and determines the second switching data when the switching instruction is the second switching instruction; the switching determination sub-module generates the first target feature code or the second target feature code based on the second switching data.

[0093] Referring to Figure 4, IDLE (interface idle detection submodule) is responsible for detecting the switching instructions input by the panel serial port. After detecting that a switching instruction is input, the keyboard input CTRL U (the second switching instruction) jumps to the CHECK_ID (input sub-detection submodule). After detecting the keyboard input CTRL B (the second switching instruction), the state jumps to CHECK_END (switch determination submodule); CHECK_ID mainly implements keyboard input 1 or 2 (the second switching data), and the state jumps to CHECK_END after the reception is completed; CHECK_END mainly outputs the serial port switching instruction based on the above status detection and sends it to the serial port switching module, and the serial port switching module completes the specific switching.

[0094] In some embodiments of the present application, the serial port switching module includes:

[0095] The serial port status judgment submodule is used to obtain the status characteristic code of the serial port analysis module; connect the baseboard serial port module to the central processor or connect the baseboard serial port module to the baseboard management controller according to the status characteristic code.

[0096] In some embodiments of the present application, the status characteristic code of the serial port parsing module can be obtained through the serial port status judgment submodule; the switching object is determined based on the status characteristic code, and then the baseboard serial port module is connected to the central processing unit, or the baseboard serial port module is connected to the baseboard management controller.

[0097] Specifically, the serial port status judgment submodule is used to obtain the status characteristic code of the serial port analysis module; when the status characteristic code is the first target characteristic code, the baseboard serial port module is connected to the baseboard management controller; when the status characteristic code is the second target characteristic code, the baseboard serial port module is connected to the central processing unit.

[0098] In practical applications, the serial port status determination submodule can determine whether the status code is a first target code or a second target code based on the status code of the serial port analysis module. The first target code is the code corresponding to switching the baseboard management controller, and the second target code is the code corresponding to switching the central processing unit.

[0099] When the status characteristic code is the first target characteristic code, the baseboard serial port module is connected to the baseboard management controller; when the status characteristic code is the second target characteristic code, the baseboard serial port module is connected to the central processing unit.

[0100] In some embodiments, the serial port switching module further includes:

[0101] The first central processing unit sending state detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle based on the state characteristic code being the first target characteristic code; when it is idle, close the connection channel from the central processing unit to the baseboard serial port module;

[0102] The first baseboard management controller sending status detection submodule is used to detect whether the sending direction from the baseboard management controller to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset first waiting time, the channel between the baseboard serial port module and the baseboard management controller is connected; and after the connection is connected, the serial port status judgment submodule is returned.

[0103] In some embodiments, the serial port switching module further includes:

[0104] The second central processing unit sends a state detection submodule for detecting the sending direction from the baseboard management controller to the baseboard serial port module based on the state characteristic code being the second target characteristic code; and closing the connection channel from the baseboard management controller to the baseboard serial port module when the state characteristic code is in an idle time;

[0105] The second baseboard management controller sending status detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset second waiting time, the channel between the baseboard serial port module and the central processing unit is connected; and after the connection is connected, it returns to the serial port status judgment submodule.

[0106] Refer to Figure 5. The CHECK_IDLE module (switching query module) mainly determines whether the serial port needs to be switched to the BMC side or the CPU side. rx_data_reg1 is 0x31, rx_data_reg is 0x32, which means the serial port needs to be switched to the BMC side (baseboard management controller). rx_data_reg1 is 0x32, rx_data_reg is 0x31, which means the serial port needs to be switched to the CPU side. The CPU2BMC_1 status (central processing unit sending status) mainly detects whether the current CPU to panel serial port sending direction is idle. If it is idle, the current connection is closed, otherwise the current connection is maintained. The CPU2BMC_2 status (baseboard management controller sending status) mainly detects whether the BMC sender is idle. The BMC2CPU_1 status (baseboard management controller sending status) mainly detects whether the sending direction from the BMC to the panel port is idle. If it is idle, the current connection is closed. Otherwise, the current connection is maintained. The BMC2CPU_2 status (central processing unit sending status) mainly detects whether the sending direction from the CPU is idle. If the delay time is more than 4 milliseconds, the CPU serial port is connected to the panel serial port. If the above conditions are met, the CPU serial port is connected to the panel serial port. Otherwise, the disconnected state is maintained. After the state switching is completed, the state jumps to the CHECK_IDLE state and waits for the next switching.

[0107] In some embodiments of the present application, the serial port parsing module includes:

[0108] The start bit check submodule is used to detect whether there is a serial port start bit;

[0109] The starter module is used to receive the start bit data of the serial port data when the serial port start bit exists;

[0110] The payload submodule is used to receive serial port byte data of the serial port data after receiving the start bit data;

[0111] The stop submodule is used to receive the stop bit data of the serial port data when the received serial port byte data reaches a preset bit number.

[0112] In some embodiments of the present application, the serial port parsing module includes a start bit check submodule, a start submodule, a payload submodule, and a stop submodule. The start bit check submodule detects whether a serial port start bit exists. When a start bit exists, the start submodule sequentially receives the start bit data of the serial port data. After receiving the start bit data, the payload submodule receives the serial port byte data of the serial port data. Finally, when the serial port byte data received by the stop submodule reaches a preset number of bits, the stop submodule receives the stop bit data of the serial port data, thereby completing the reception of one byte.

[0113] As shown in Figure 6, the IDLE state (query state) mainly implements the serial port data start bit check. After the serial port start bit is detected, the state machine jumps to the START state (start state). The START state mainly implements the start bit data reception. After reception, the state jumps to the PAYLOAD state (completion state). The PAYLOAD state mainly implements the reception of 8 bytes of data. After reception, the state jumps to the STOP state. The STOP state mainly implements the serial port STOP bit reception. After reception, the state jumps to the IDLE state, completing the 1-byte data reception. The reception cycle continues in this way.

[0114] Some embodiments of this application address the issues of garbled characters and system freezes caused by serial port switching by not caching serial port data and only detecting bus idle status and switching delays. Practical verification has proven that this effectively resolves these issues. This solution does not impact existing hardware design and is imperceptible to upper-layer software. This reduces the complexity of system hardware design, facilitates unified software processing, and reduces software processing complexity, thereby reducing development difficulty and risk, and lowering operating costs.

[0115] Referring to Figure 7, a schematic diagram of an embodiment of a substrate serial port system provided in an embodiment of the present application is shown. The substrate serial port system may include: a central processing unit, a baseboard management controller, a baseboard serial port module and the programmable logic device system of the substrate as above. One end of the substrate programmable logic device system is connected to the central processing unit and the baseboard management controller, and the other end of the substrate programmable logic device system is connected to the baseboard serial port module.

[0116] In some embodiments of the present application, three groups of interfaces of the central processing unit, the baseboard management controller, and the baseboard serial port module are all connected to the programmable logic device system of the baseboard. One end of the baseboard programmable logic device system is connected to the central processing unit and the baseboard management controller, and the other end of the baseboard programmable logic device system is connected to the baseboard serial port module. The CPLD completes the serial port complete byte switching according to the panel port switching instruction to switch the central processing unit to the baseboard serial port module interface, or the baseboard management controller to the baseboard serial port module interface.

[0117] In some embodiments, the baseboard serial port module includes:

[0118] The physical interface of the panel is connected to the other end of the programmable logic device system on the substrate.

[0119] In some embodiments of the present application, the baseboard serial port module may include a panel physical interface, specifically, a panel RJ45 interface. The panel physical interface is connected to the CPLD at the other end of the baseboard programmable logic device system, that is, on a different side from the central processing unit and the baseboard management controller.

[0120] In some embodiments, the baseboard serial port module further includes:

[0121] The level conversion submodule is located between the level conversion submodule and the other end of the programmable logic device system of the substrate and is used for serial port level conversion.

[0122] In some embodiments of the present application, a level conversion submodule may be provided between the level conversion submodule and one end of the programmable logic device system of the substrate, as shown in FIG1 , and the level conversion submodule may be a MAX232. The level conversion submodule may perform level conversion on the serial port.

[0123] In some embodiments, the central processing unit includes:

[0124] The first universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is used for communicating with the serial port module of the substrate based on the serial port system of the substrate;

[0125] The second universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is used to generate a startup log and an operation log of the central processing unit.

[0126] In some embodiments of the present application, the central processing unit (CPU) may include two different universal asynchronous receiver / transmitters (UARTs): a first CPU UART and a second CPU UART. The first CPU UART communicates with the baseboard serial port module based on the baseboard serial port system, specifically, is responsible for communicating with the panel serial port. The second CPU UART is used to record CPU startup logs and system operation logs.

[0127] In some embodiments, the baseboard management controller includes:

[0128] The first universal asynchronous receiver / transmitter of the baseboard management controller is connected to one end of the programmable logic device system of the baseboard and is used for communicating with the baseboard serial port module based on the baseboard serial port system;

[0129] The second universal asynchronous receiver / transmitter of the baseboard management controller is connected to one end of the programmable logic device system of the baseboard and is used to generate a baseboard management controller startup log and an operation log.

[0130] In some embodiments of the present application, the baseboard management controller (BMC) may include two different universal asynchronous receiver / transmitters (UARTs): a first BMC UART and a second BMC UART. The first BMC UART communicates with the baseboard serial port module based on the baseboard serial port system, specifically, is responsible for communicating with the panel serial port. The second BMC UART is used to record BMC startup logs and system operation logs.

[0131] In some embodiments, the programmable logic device system of the substrate includes:

[0132] A reduced pin bus parsing module is connected to the central processing unit and is used to parse the reduced pin bus commands issued by the central processing unit;

[0133] A register space allocation module, connected to the reduced pin bus parsing module, for allocating data of reduced pin bus commands to a preset register address space;

[0134] The serial port hub module is connected to the central processing unit and the baseboard management controller, and is used to interact with the central processing unit and the baseboard management controller; and provides a preset register address space;

[0135] The serial port parsing module is connected to the serial port hub module and is used to parse the serial port data between the baseboard serial port module and the central processor, or between the baseboard serial port module and the baseboard management controller;

[0136] The serial port switching module is connected to the serial port parsing module and is used to connect the baseboard serial port module to the central processing unit or to connect the baseboard serial port module to the baseboard management controller based on the serial port complete byte switching strategy.

[0137] In some embodiments, the programmable logic device system of the substrate further includes:

[0138] The filter module is located between the serial port analysis module and the baseboard serial port module and is used to filter out interference signals from the baseboard serial port module.

[0139] In some embodiments, the programmable logic device system of the substrate further includes:

[0140] The baud rate detection module is connected to the baseboard serial port module and is used to detect the baud rate of the baseboard serial port module. The baud rate is used to control the data transmission rate.

[0141] In some embodiments, the serial port hub module includes:

[0142] The interface idle detection submodule is used to detect the switching instruction of the baseboard serial port module;

[0143] The switching determination submodule is configured to generate a first target feature code or a second target feature code based on first switching data of the first input instruction when the switching instruction is a first input instruction.

[0144] In some embodiments, the serial port hub module further includes:

[0145] an input sub-detection sub-module, configured to parse the second switching instruction and determine second switching data when the switching instruction is the second switching instruction;

[0146] The handover determination submodule is further configured to generate a first target characteristic code or a second target characteristic code based on the second handover data.

[0147] In some embodiments, the serial port switching module includes:

[0148] The serial port status judgment submodule is used to obtain the status characteristic code of the serial port analysis module; connect the baseboard serial port module to the central processor or connect the baseboard serial port module to the baseboard management controller according to the status characteristic code.

[0149] In some embodiments, the serial port status judgment submodule is used to obtain the status feature code of the serial port parsing module; when the status feature code is the first target feature code, the baseboard serial port module is connected to the baseboard management controller; when the status feature code is the second target feature code, the baseboard serial port module is connected to the central processing unit.

[0150] In some embodiments, the serial port switching module further includes:

[0151] The first central processing unit sending state detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle based on the state characteristic code being the first target characteristic code; when it is idle, close the connection channel from the central processing unit to the baseboard serial port module;

[0152] The first baseboard management controller sending status detection submodule is used to detect whether the sending direction from the baseboard management controller to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset first waiting time, the channel between the baseboard serial port module and the baseboard management controller is connected; and after the connection is connected, the serial port status judgment submodule is returned.

[0153] In some embodiments, the serial port switching module further includes:

[0154] The second central processing unit sends a state detection submodule for detecting the sending direction from the baseboard management controller to the baseboard serial port module based on the state characteristic code being the second target characteristic code; and closing the connection channel from the baseboard management controller to the baseboard serial port module when the state characteristic code is in an idle time;

[0155] The second baseboard management controller sending status detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset second waiting time, the channel between the baseboard serial port module and the central processing unit is connected; and after the connection is connected, it returns to the serial port status judgment submodule.

[0156] In some embodiments, the serial port parsing module includes:

[0157] The start bit check submodule is used to detect whether there is a serial port start bit;

[0158] The starter module is used to receive the start bit data of the serial port data when the serial port start bit exists;

[0159] The payload submodule is used to receive serial port byte data of the serial port data after receiving the start bit data;

[0160] The stop submodule is used to receive the stop bit data of the serial port data when the received serial port byte data reaches a preset bit number.

[0161] In some embodiments, the filtering module is configured to determine the initial input value as the input value of the serial port input data when consecutive preset bits of the serial port input data of the substrate serial port module are the same initial input value.

[0162] In some embodiments, the baud rate detection module is used to count the number of times the level on the signal line changes within a third preset time period, and determine the baud rate according to the number of times.

[0163] In some implementations of the present application, a switch is also disclosed, which has the baseboard serial port system as described above, and the baseboard serial port system is used to control information interaction between the management plane and the network forwarding plane.

[0164] Among them, the baseboard serial port system includes: a central processing unit, a baseboard management controller, a baseboard serial port module and the above-mentioned baseboard programmable logic device system. One end of the baseboard programmable logic device system is connected to the central processing unit and the baseboard management controller, and the other end of the baseboard programmable logic device system is connected to the baseboard serial port module.

[0165] In some embodiments, the baseboard serial port module includes:

[0166] The physical interface of the panel is connected to the other end of the programmable logic device system on the substrate.

[0167] In some embodiments, the baseboard serial port module further includes:

[0168] The level conversion submodule is located between the level conversion submodule and the other end of the programmable logic device system of the substrate and is used for serial port level conversion.

[0169] In some embodiments, the central processing unit includes:

[0170] The first universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is used for communicating with the serial port module of the substrate based on the serial port system of the substrate;

[0171] The second universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is used to generate a startup log and an operation log of the central processing unit.

[0172] In some embodiments, the baseboard management controller includes:

[0173] The first universal asynchronous receiver / transmitter of the baseboard management controller is connected to one end of the programmable logic device system of the baseboard and is used for communicating with the baseboard serial port module based on the baseboard serial port system;

[0174] The second universal asynchronous receiver / transmitter of the baseboard management controller is connected to one end of the programmable logic device system of the baseboard and is used to generate a baseboard management controller startup log and an operation log.

[0175] Specifically, one end of the programmable logic device system of the substrate is connected to the central processing unit and the baseboard management controller, and the other end of the programmable logic device system of the substrate is connected to the baseboard serial port module. The programmable logic device system of the substrate includes:

[0176] A reduced pin bus parsing module is connected to the central processing unit and is used to parse the reduced pin bus commands issued by the central processing unit;

[0177] A register space allocation module, connected to the reduced pin bus parsing module, for allocating data of reduced pin bus commands to a preset register address space;

[0178] The serial port hub module is connected to the central processing unit and the baseboard management controller, and is used to interact with the central processing unit and the baseboard management controller; and provides a preset register address space;

[0179] The serial port parsing module is connected to the serial port hub module and is used to parse the serial port data between the baseboard serial port module and the central processor, or between the baseboard serial port module and the baseboard management controller;

[0180] The serial port switching module is connected to the serial port parsing module and is used to connect the baseboard serial port module to the central processing unit or to connect the baseboard serial port module to the baseboard management controller based on the serial port complete byte switching strategy.

[0181] In some embodiments, the programmable logic device system of the substrate further includes:

[0182] The filter module is located between the serial port analysis module and the baseboard serial port module and is used to filter out interference signals from the baseboard serial port module.

[0183] In some embodiments, the programmable logic device system of the substrate further includes:

[0184] The baud rate detection module is connected to the baseboard serial port module and is used to detect the baud rate of the baseboard serial port module. The baud rate is used to control the data transmission rate.

[0185] In some embodiments, the serial port hub module includes:

[0186] The interface idle detection submodule is used to detect the switching instruction of the baseboard serial port module;

[0187] The switching determination submodule is configured to generate a first target feature code or a second target feature code based on first switching data of the first input instruction when the switching instruction is a first input instruction.

[0188] In some embodiments, the serial port hub module further includes:

[0189] an input sub-detection sub-module, configured to parse the second switching instruction and determine second switching data when the switching instruction is the second switching instruction;

[0190] The handover determination submodule is further configured to generate a first target characteristic code or a second target characteristic code based on the second handover data.

[0191] In some embodiments, the serial port switching module includes:

[0192] The serial port status judgment submodule is used to obtain the status characteristic code of the serial port analysis module; connect the baseboard serial port module to the central processor or connect the baseboard serial port module to the baseboard management controller according to the status characteristic code.

[0193] In some embodiments, the serial port status judgment submodule is used to obtain the status feature code of the serial port parsing module; when the status feature code is the first target feature code, the baseboard serial port module is connected to the baseboard management controller; when the status feature code is the second target feature code, the baseboard serial port module is connected to the central processing unit.

[0194] In some embodiments, the serial port switching module further includes:

[0195] The first central processing unit sending state detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle based on the state characteristic code being the first target characteristic code; when it is idle, close the connection channel from the central processing unit to the baseboard serial port module;

[0196] The first baseboard management controller sending status detection submodule is used to detect whether the sending direction from the baseboard management controller to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset first waiting time, the channel between the baseboard serial port module and the baseboard management controller is connected; and after the connection is connected, the serial port status judgment submodule is returned.

[0197] In some embodiments, the serial port switching module further includes:

[0198] The second central processing unit sends a state detection submodule for detecting the sending direction from the baseboard management controller to the baseboard serial port module based on the state characteristic code being the second target characteristic code; and closing the connection channel from the baseboard management controller to the baseboard serial port module when the state characteristic code is in an idle time;

[0199] The second baseboard management controller sending status detection submodule is used to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle; when it is in the idle time and delayed for a preset second waiting time, the channel between the baseboard serial port module and the central processing unit is connected; and after the connection is connected, it returns to the serial port status judgment submodule.

[0200] In some embodiments, the serial port parsing module includes:

[0201] The start bit check submodule is used to detect whether there is a serial port start bit;

[0202] The starter module is used to receive the start bit data of the serial port data when the serial port start bit exists;

[0203] The payload submodule is used to receive serial port byte data of the serial port data after receiving the start bit data;

[0204] The stop submodule is used to receive the stop bit data of the serial port data when the received serial port byte data reaches a preset bit number.

[0205] In some embodiments, the filtering module is configured to determine the initial input value as the input value of the serial port input data when consecutive preset bits of the serial port input data of the substrate serial port module are the same initial input value.

[0206] In some embodiments, the baud rate detection module is used to count the number of times the level on the signal line changes within a third preset time period, and determine the baud rate according to the number of times.

[0207] 8 , some embodiments of the present application further provide an electronic device, including:

[0208] The processor 801 and the storage medium 802 store a computer program executable by the processor 801. When the electronic device is running, the processor 801 executes the computer program to execute the programmable logic device system of the substrate as any one of the embodiments of the present application.

[0209] The memory may include random access memory (RAM) or non-volatile memory, such as at least one disk storage. In some embodiments, the memory may also be at least one storage device located away from the processor.

[0210] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components.

[0211] 9 , some embodiments of the present application further provide a computer non-volatile readable storage medium 901 , on which a computer program is stored. When the computer program is executed by a processor, the programmable logic device system of the substrate of any one of the embodiments of the present application is executed.

[0212] It should be noted that, for the above embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present application are not limited by the order of the actions described, because according to the embodiments of the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all embodiments of the present application, and the actions involved are not necessarily required by the embodiments of the present application.

[0213] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0214] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0215] The present application embodiment is described with reference to the flow chart and / or block diagram of the method, terminal device (system), and computer program product according to some embodiments of the present application. It should be understood that each process and / or box in the flow chart and / or block diagram, and the combination of the process and / or box in the flow chart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device produce a device for implementing the function specified in one process or multiple processes in the flow chart and / or one box or multiple boxes in the block diagram.

[0216] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0217] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce computer-implemented processing, so that the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0218] Although some embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they are aware of the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the embodiments of the present application and all changes and modifications that fall within the scope of the embodiments of the present application.

[0219] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0220] The above is a detailed introduction to a programmable logic device system of a substrate, a substrate serial port system, a switch, an electronic device and a storage medium provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A programmable logic device system for a substrate, characterized in that, One end of the programmable logic device system on the substrate is connected to the central processing unit and the baseboard management controller, and the other end of the programmable logic device system on the substrate is connected to the substrate serial port module. The programmable logic device system on the substrate includes: A reduced pin bus parsing module, connected to the central processing unit, and configured to parse the reduced pin bus commands issued by the central processing unit; A register space allocation module, connected to the reduced pin bus parsing module, and configured to allocate the data of the reduced pin bus commands to a preset register address space; A serial port hub module, connected to the central processing unit and the baseboard management controller, and configured to interact with the central processing unit and the baseboard management controller; and provide the preset register address space; A serial port parsing module, connected to the serial port hub module, and configured to parse the serial port data between the substrate serial port module and the central processing unit, or between the substrate serial port module and the baseboard management controller; A serial port switching module, connected to the serial port parsing module, and configured to perform serial port complete byte switching based on the serial port complete byte switching strategy, and connect the substrate serial port module to the central processing unit, or connect the substrate serial port module to the baseboard management controller.

2. The programmable logic device system of the substrate according to claim 1, wherein The programmable logic device system on the substrate further includes: A filtering module, located between the serial port parsing module and the substrate serial port module, and configured to filter out the interference signals of the substrate serial port module.

3. The programmable logic device system of the substrate according to any one of claims 1 to 2, characterized in that, The programmable logic device system on the substrate further includes: A baud rate detection module, connected to the substrate serial port module, and configured to detect the baud rate of the substrate serial port module, and the baud rate is configured to control the data transmission rate.

4. The programmable logic device system of the substrate according to claim 1, characterized in that, The serial port hub module includes: An interface idle detection sub-module, configured to detect the switching instruction of the substrate serial port module; A switching determination sub-module, configured to generate a first target signature or a second target signature based on the first switching data of the first input instruction when the switching instruction is the first input instruction.

5. The programmable logic device system of the substrate according to claim 4, characterized in that, The serial port hub module further includes: An input sub-detection sub-module, configured to parse the second switching instruction and determine the second switching data when the switching instruction is the second switching instruction; The switching determination sub-module is further configured to generate the first target signature or the second target signature based on the second switching data.

6. The programmable logic device system of the substrate according to claim 5, characterized in that, The serial port switching module includes: A serial port status judgment sub-module, configured to obtain the status signature of the serial port parsing module; and connect the substrate serial port module to the central processing unit, or connect the substrate serial port module to the baseboard management controller according to the status signature.

7. The programmable logic device system of the substrate according to claim 6, wherein, The serial port status judgment sub-module is configured to obtain the status signature of the serial port parsing module; when the status signature is the first target signature, connect the substrate serial port module to the baseboard management controller; when the status signature is the second target signature, connect the substrate serial port module to the central processing unit.

8. The programmable logic device system of the substrate according to claim 7, characterized in that, The serial port switching module further includes: The first central processing unit sending status detection sub-module is configured to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle when the status feature code is the first target feature code; when it is in the idle time, close the connection channel from the central processing unit to the baseboard serial port module; The first baseboard management controller sending status detection sub-module is configured to detect whether the sending direction from the baseboard management controller to the baseboard serial port module is idle; when it is in the idle time and after delaying a preset first waiting duration, connect the channel between the baseboard serial port module and the baseboard management controller; and after the connection, return to the serial port status judgment sub-module.

9. The programmable logic device system of the substrate according to claim 7, wherein The serial port switching module further includes: The second central processing unit sending status detection sub-module is configured to detect the sending direction from the baseboard management controller to the baseboard serial port module when the status feature code is the second target feature code; when it is in the idle time, close the connection channel from the baseboard management controller to the baseboard serial port module; The second baseboard management controller sending status detection sub-module is configured to detect whether the sending direction from the central processing unit to the baseboard serial port module is idle; when it is in the idle time and after delaying a preset second waiting duration, connect the channel between the baseboard serial port module and the central processing unit; and after the connection, return to the serial port status judgment sub-module.

10. The programmable logic device system of the substrate according to claim 1, characterized in that, The serial port parsing module includes: The start bit check sub-module is configured to detect whether there is a serial port start bit; The start sub-module is configured to receive the start bit data of the serial port data when there is a serial port start bit; The payload sub-module is configured to receive the serial port byte data of the serial port data after receiving the start bit data; The stop sub-module is configured to receive the stop bit data of the serial port data when the received serial port byte data reaches a preset number of bits.

11. The programmable logic device system of the substrate according to claim 2, wherein The filtering module is configured to determine the initial input value as the input value of the serial port input data when the serial port input data of the baseboard serial port module is the same initial input value for a continuous preset number of bits.

12. The programmable logic device system of the substrate according to claim 3, wherein The baud rate detection module is configured to count the number of times the level changes on the signal line within a third preset duration, and determine the baud rate according to the number of times.

13. A substrate serial port system, characterized in that, It includes: A central processing unit, a baseboard management controller, a baseboard serial port module, and a programmable logic device system of the baseboard as described in any one of claims 1 to 12. One end of the programmable logic device system of the baseboard is connected to the central processing unit and the baseboard management controller, and the other end of the programmable logic device system of the baseboard is connected to the baseboard serial port module.

14. The substrate serial port system according to claim 13, wherein The baseboard serial port module includes: A panel physical interface, connected to the other end of the programmable logic device system of the baseboard.

15. The substrate serial port system according to claim 14, wherein, The baseboard serial port module further includes: A level conversion sub-module, located between the level conversion sub-module and the other end of the programmable logic device system of the baseboard, and configured for serial port level conversion.

16. The substrate serial port system according to claim 13, characterized in that, The central processing unit includes: The first universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is configured to communicate with the substrate serial port module based on the substrate serial port system; The second universal asynchronous receiver / transmitter of the central processing unit is connected to one end of the programmable logic device system of the substrate and is configured to generate the central processing unit startup log and operation log.

17. The substrate serial port system according to claim 13, wherein The substrate management controller includes: The first universal asynchronous receiver / transmitter of the substrate management controller is connected to one end of the programmable logic device system of the substrate and is configured to communicate with the substrate serial port module based on the substrate serial port system; The second universal asynchronous receiver / transmitter of the substrate management controller is connected to one end of the programmable logic device system of the substrate and is configured to generate the substrate management controller startup log and operation log.

18. A switch, characterized in that, It includes the substrate serial port system according to any one of claims 13 to 17.

19. An electronic device, characterized in that, It includes a processor, a memory, and a computer program stored on the memory and capable of running on the processor. When the computer program is executed by the processor, it implements the programmable logic device system of the substrate according to any one of claims 1 to 12.

20. A computer non-volatile readable storage medium, characterized in that, A computer program is stored on the computer non-volatile readable storage medium. When the computer program is executed by a processor, it implements the programmable logic device system of the substrate according to any one of claims 1 to 12.

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