Beam controlling laser devices and methods for producing thereof

Abstract

A vertical-cavity surface-emitting laser (VCSEL) includes a substrate, a first reflector structure formed above a first surface of the substrate, and a second reflector structure formed above the first surface of the substrate. Further, a multijunction active region is formed above the first surface of substrate between the first reflector structure and the second reflector structure. The multi-junction active region includes a plurality of multiple-quantum-wells (MQWs) regions and a plurality of oxide layers which each include a peripheral region and an aperture region. The peripheral region surrounds the aperture region. At an edge between the peripheral region and the aperture region a stress field of at least 2 Gigapascals is realized.

Description

[0001] BEAM CONTROLLING LASER DEVICES AND METHODS FOR PRODUCING

[0002] THEREOF

[0003] Field

[0004] This present disclosure generally relates to semiconductor- based lasers and methods for producing thereof .

[0005] Background

[0006] FIG . 1 shows a diagram of a typical vertical cavity surface emitting laser (VCSEL ) 100 . The VCSEL 100 includes a p-type distributed Bragg reflecto ( DBR) 105 at the top, and similarly a n-type DBR 110 a : the bottom .

[0007] The reflector structures , e . g . , the DBRs or DBR mirrors 105 and 110 are based on AlGaAs / GaAs material system . That is , each of the DBR mirrors 105 and 10 include alternating layers . For a first layer 112 can be a layer of Aluminum Gallium Arsenide (AlGAas ) and a second layer 114 can be a layer of Gallium Arsenide ( GaAs ) .

[0008] The VCSEL 100 can include an active region that is principally made of a p-i-n j unction, which can include multiple quantum-wells (MQWs ) that generate photons . FIG . 1 shows a MQW or MQW layer 120 . The electrical and optical confinement in the VCSEL 100 is achieved by us ing an oxide layer 130 , which can be located or placed above ( and sometimes below) the active region . The oxide layer 130 can typically be an aluminum oxide layer (A12O3) . The oxide layer 130 can include an aperture region 150 . The aperture region 150 may be formed from a semiconductor layer or material .

[0009] These layers are typically grown on the GaAs substrate 140 and using a Metalorganic Chemical Vapor Deposition (MOCVD) technique . As shown in FIG. 1, the ohmic contacts at the top, also called the anode 165 and the ohmic contacts at the bottom, also called the cathode 160 are placed for injecting current flow into the device.

[0010] The VCSEL 100 can be configured to emit a light beam 170.

[0011] The axes depicted in FIG. 1 show the typical directions at which the epitaxial layers are grown and based on. In other words, the

[0001] direction (e.g., Z-axis) shows the growth direction, while the

[0110] direction (e.g., X-axis) and the [1-10] (e.g., Y-axis) are the directions at which the VCSEL 100 is typically fabricated at.

[0012] One challenge with VCSEL such as the VCSEL 100 is the difficulty in controlling the beam divergence of the VCSELs . For example, for most automotive Laser Imaging, Detection, and Ranging (LIDAR) applications, a smaller divergence angle is desired to keep most of the output optical power imaged on a smaller footprint. However, typically for large- aperture VCSELs, the divergence angle is also quite large, mainly due to stimulation of the higher order transverse modes .

[0013] Similarly, as the injected bias current into the VCSEL increases, similar observations are made mainly due to enhanced current crowding around the edges of the oxide layer .

[0014] Brief Description of the Drawings

[0015] In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the disclosure. In the following description, various aspects of the disclosure are described with reference to the following drawings, in which:

[0016] FIG. 1 shows a diagram of a typical vertical cavity surface emitting laser;

[0017] FIG. 2 shows a diagram depicting or formation of an oxide layer using an oxidation process ;

[0018] FIGS. 3 and 4 each show partial views of an aluminum oxide layer;

[0019] FIGS. 5 and 6 each show partial views of another aluminum oxide layer;

[0020] FIGS. 7A and 7B are examples of a single junction VCSEL;

[0021] FIG. 8 shows an example of a multi j unction VCSEL;

[0022] FIGS. 9A-9C each shows an example of a multi unction VCSEL;

[0023] FIGS. 10A-10C each shows an example of a multi unction VCSEL;

[0024] FIG. 11 shows flow diagram of a method according to at least one aspect of the present disclosure .

[0025] Description

[0026] The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and aspects in which the disclosure may be practiced. One or more aspects are described in sufficient detail to enable those skilled in the art to practice the disclosure. Other aspects may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the disclosure. The various aspects described herein are not necessarily mutually exclusive, as some aspects can be combined with one or more other aspects to form new aspects. Various aspects are described in connection with methods and various aspects are described in connection with devices. However, it may be understood that aspects described in connection with methods may similarly apply to the devices, and vice versa. Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures. Throughout the drawings, it should be noted that proportions are not necessary to scale and that the size of features may be emphasized for ease of illustration.

[0027] FIG. 2 shows a diagram of creation or formation an aluminum oxide (A12O3) layer for a VCSEL, e.g., through wet thermal oxidation .

[0028] Prior to an oxidation process, a layer 210, e.g., a native semiconductor material or layer 210 can be used or provided. This layer 210 can be provided with a spacer layer or layers 205. The layer 210 can have a high aluminum content, for example it may be at least 98% aluminum. In one case, the layer 210 can be or include aluminum gallium arsenide, e.g., in the form of AlxGa2-xAs wherein, 0.98<x<l. In another case, the layer 210 be or include aluminum arsenide (AlAs) .

[0029] Spacer layer 205, which is at the top and bottom of layer 210, is based on AlGaAs but with lower Al composition (such as 0.9 or lower) .

[0030] As shown, for both scenarios, an oxidation process is applied at least to the semiconductor layer or material 210 for the formation of an oxide layer.

[0031] For the oxidation process, water vapor at high temperatures (e.g., greater than 340°C) is injected from the sidewalls of the mesa thus forming aluminum oxide (A12O3) along

[0110] and [1-10] directions. However, it has been recognized (see e.g., Advances in Selective Wet Oxidation of AlGaAs Alloys. IEEE Journal of Selected Topics in Quantum Electronics, 3 (3) , 600-608.) that when aluminum oxide is formed, both its thickness and volume are shrunk to a certain degree compared to the native material before oxidation .

[0032] The layers or materials 220a and 230a result from an oxidation process applied to layer 210 , namely a layer of aluminum gallium arsenide (AlGaAs ) . That is to say, the layer 220a is an aluminum oxide layer resulting from the oxidation of the aluminum gallium arsenide , while layer 230a represents the residual aluminum gallium arsenide remaining after the oxidation process has taken place .

[0033] Similarly, the layers or materials 220b and 230b result from an oxidation process applied to layer 210 when the layer 210 is a layer of aluminum arsenide (AlAs ) . More speci fically, the layer 220b is an aluminum oxide layer resulting from the oxidation of the aluminum arsenide material , whi le layer 230b represents the residual aluminum arsenide remaining after the completion of the oxidation process .

[0034] It has been recogni zed that aluminum oxide formed from AlGaAs shrinks by approximately 3 to 6% , while aluminum oxide formed from AlAs shrinks by approximately 13% . For example , FIGS . 3 and 4 respectively show a magni fied crosssection and a magni fied top view of the aluminum oxide layer 220a formed from oxidation of aluminum gallium arsenide .

[0035] FIGS . 5 and 6 respectively show a magni fied cross-section view and magni fied top view of the aluminum oxide layer 220b form from aluminum arsenide .

[0036] Referring to FIGS . 3 and 4 , the shrinkage resulting from the oxidation process leads to formation of stress field 270a at the periphery or edges of the oxide layer 220a .

[0037] Similarly, referring to FIGS . 5 and 6 , the shrinkage caused by the oxidation process causes the stress field 270b at the periphery or edges of the oxide layer 220b . In both instances, the stress fields 270a and 270b are located at an interface between oxide layer edge (220a, 220b) and a respective aperture region (230a, 230b) . In both cases, the residual non-oxidized native semiconductor material forms the aperture region, which is surrounded by the formed oxide layer.

[0038] While the formation of oxide layer 220a and oxide layer 230 each produce a respective stress field, the stress fields are not of the same magnitude. As can be seen in a visual comparison of the stress field 270a of FIGS. 3 and 4 and the stress field 270b of FIGS. 5 and 6, the amplitude of the stress field 270b formed at the (inner) edge of the aluminum oxide layer 220b (formed from aluminum arsenide) is notably greater than the stress field 270a formed at the (inner) edge of the aluminum oxide layer 220a (formed from aluminum gallium arsenide.) This difference of stress field strengths occurs because of the larger or greater shrinkage experienced by the oxide layer 220b formed from aluminum arsenide (AlAs) instead of aluminum gallium arsenide.

[0039] The influence and interaction of this stress field can have a significant effect on the electro-optical performance of a VCSEL. To illustrate, looking at FIG. 1 and VCSEL 100, the stress field can affect the divergence angle of the emitted beam 170 from the VCSEL in the far-field.

[0040] FIG. 7A shows an example of a single junction VCSEL 700a. FIG. 7B shows an example of a single junction VCSEL 700b. The single junction VCSELs 700a and 700b may be formed or implemented in a similar manner as the VCSEL 100 of FIG. 1, except for the oxide layers. In particular, the VCSEL 700a includes an oxide layer 130a formed aluminum gallium arsenide (AlGaAs) , similar or the same as the oxide layer 220a of FIGS. 3 and 4. The VCSEL 700b includes an oxide layer 130b formed aluminum arsenide (AlAs) like the oxide layer 220b of FIGS. 5 and 6. Accordingly, the VCSEL 700a includes a stress field 135a similar to the stress field 170a exhibited by the oxide layer 220a, and therefore is located at least at the (inner) edge of oxide layer 130a.

[0041] The VCSEL 700b includes a stress field 135b like the stress field 170a exhibited by the oxide layer 220b. The stress field 170 according can also be located at least at the edge of oxide layer 130b which can be an inner periphery or inner peripheral region of the oxide layer 130b. This inner peripheral region can form around the aperture region 150. The aperture region 150 in this case can be substantially made of aluminum and arsenic, e.g., aluminum arsenide.

[0042] As a result, the VCSELs 700a and 700b emit light or light beams with differing divergence angles. In particular, the VCSEL 700a has a light beam 170a with a wider (far-field) divergence angle. For example, at a given far-field distance, the breadth or diameter of the generated light beam 170a is X. At the same far-field distance, the light beam 170b has a breadth or dimeter of X' , which can be substantially less than X, for at example 20% to 30% less.

[0043] FIG. 7A shows the stress field 135a presenting around the edges of the oxide layer 130a, at the interface of the oxide layer 130a and the aperture region 150. In this instance, the stress field 130a can be considered as being relatively small so that the interaction with the optical field or optical cavity of the VCSELs does not affect the wider divergence angle produced by the emitted beam 170a.

[0044] In FIG. 7B, the stress field 135b also presents around the edges of the oxide layer 130b, e.g., at the interface of the periphery of the aluminum oxide layer 130b and the aperture region 150. As previously described, the aluminum oxide layer 130b includes an ( inner ) peripheral region that can surround the aperture region 150 . Between the peripheral region and the aperture region the stress field 135 can reside .

[0045] In this case , the stress field 135b in this case is much stronger and hence exhibits a much stronger stress , e . g . , Tresca stress . In at least one example , the amplitude of the stress can reach up to 3 Gigapascals ( GPa ) . This stronger stress field 135b interacts with the optical field to much greater degree resulting in a narrower divergence angle of the emitted light beam 170b .

[0046] Consequently, for a single j unction VCSEL, the formation of the oxide layer with a strong stress field can have considerable or notable influence on the far- field divergence angle of emitted light .

[0047] Nevertheless , beam divergence or beam divergence control becomes an issue in the context of multi unction VCSELs . FIG . 8 depicts a multi unction VCSEL 800 . The VCSEL 800 may be similar to the VCSEL 100 except for the existence of multiple j unctions . Accordingly, the VCSEL 800 includes a multi j unction active region having a plurality of sets or sections , where each set or section includes an oxide layer 130a, an aperture region 150 residing within the oxide layer 130 , a MQW 120 , and a tunnel j unction 125 .

[0048] The oxide layer 130a is an aluminum oxide layer formed from aluminum gallium arsenide .

[0049] For the VCSEL 800 , the cumulative ef fect of the stress fields from the plurality of oxide layers 130a on the far- field divergence angle of emitted light is minimal . That is , other existing factors of the VCSEL 800 have a larger overall impact on the far- field divergence angle . For example, the divergence angle in such a structure can be notably influenced by the effective index step. The lateral effective index step depends on configuration of the oxide aperture fronts relative to each other. Different effective index profiles can affect the divergence angle differently, which, for example, can result in either a wider or narrower divergence angle. In general, a more uncontrollable divergence angle can emerge from such a multi j unction VCSEL.

[0050] FIGS. 9A-9C respectively show VCSELS 900a-900c which are different variations of the multi j unction VCSEL 800. The VCSELs 900a-900c each have aluminum oxide layers 130a formed from aluminum gallium oxide as described herein. However, the VCSELs 900a to 900c respectively have different lateral effective index profiles (LEIPs) 910a-910c.

[0051] A LEIP describes the variation of the effective refractive index within the lateral or transverse direction of a waveguide or optical structure. The effective refractive index is a measure of how light propagates through an optical structure, taking into account the refractive indices of the materials and the geometry of the optical structure .

[0052] FIG. 9A shows a VCSEL 900a which has a squared shaped LEIP 910a. This LEIP 910a results from configuration of the oxide layers 130a and corresponding apertures 150 which are aligned in the VCSEL 900a. In particular, the peripheral region or inner edges of each oxide layers 130a are aligned vertically, over each other, in the

[0001] direction.

[0053] FIG. 9B shows another VCSEL 900b which is associated with having a ramped-plateau shaped LEIP 910b. The oxide layers 130a and corresponding apertures 150 are in configuration in which they are not aligned vertically, unlike the situation of the layers 130a of FIG. 9A. Instead in FIG 9B, starting from an upper most oxide layer 130a and moving down vertically down along the

[0001] direction, the edges of the successive oxide layers 130a spread further apart relative to the previously above or immediately higher oxide layer 130a in the

[0001] direction. The spread occurs laterally along the

[0110] direction. That is, moving vertically down from the anode 165 to the cathode 160, the apertures 150 become greater or longer laterally (in the

[0110] direction) which results in the ramped LEIP 910b.

[0054] FIG. 9C shows another VCSEL 900c which is associated with the LEIP 910c. In this example, the oxide layers 130a and corresponding apertures 150 are also not aligned, unlike the oxide layers of FIG. 9A.

[0055] In this case, starting from upper most oxide layer 130a (oxide layer closest to anode 165) and moving down vertically along the

[0001] direction, the edges of the oxide layers 130a again keep spreading further apart laterally, along the

[0110] direction. However, after a certain amount, the oxide layers 130a begin to close or tighten together laterally up to a certain point, and then begin spreading apart laterally.

[0056] Said differently, along a vertical direction from the anode 165 to the cathode 160, the apertures 150 repeatedly become longer laterally (in the

[0110] direction) and shorter laterally, which results in the LEIP 910c.

[0057] However, in each of these cases or VCSELs 900a-900c, the divergence of the emitted light 170 may remain undesirably too large, e.g., greater than 35 degrees.

[0058] FIGS. 10A-10C respectively show VCSELS lOOOa-lOOOc according to aspects of the present disclosure. The VCSELs lOOOa-lOOc are multi j unction VCSELs, similar to VCSEL 800, except that they include aluminum oxide layers 130b formed from an oxidation process ( e . g . , wet oxidation process ) using aluminum arsenide as the native semiconductor layer as described in accordance with embodiments herein .

[0059] The VCSELs l O O Oa- l O O Oc respectively have LEIPs l O l Oa- l O l Oc which correspond to the LEIPs 910a- 910c . That is , the LEIP 1010a of VCSEL 1000a is the same or similar to the LEIP 910a of the VCSEL 900a . Further, the LEIPs 1010b and 1010c, of VCSELs 1000b and 1000c are respectively the same or like the LEIPs 910b and 910c, of VCSELs 900b and 900c .

[0060] Accordingly, for the VCSEL 1000a, the configuration of its aluminum oxide layers 130b is similar to the configuration of the oxide layers 130a of the VCSEL 900a, resulting in a square shaped LEIP 1010a .

[0061] However, the emitted light 170 of the VCSEL 1000a can reali ze a much smaller divergence or a smaller divergence angle than the corresponded light emitted from the VCSEL 900a .

[0062] For the VCSEL 1000b, the aluminum oxide layers 130b has a configuration similar to the configuration of the oxide layers 130a of the VCSEL 900b . Hence the VCSEL 1000b has a ramped-plateau shaped LEIP 1010b similar to the LEIP 910b of the VCSEL 900b .

[0063] Similar to the VCSEL 1000a, emitted light 170 produced by the VCSEL 1000b has a smaller divergence or divergence angle for its emitted light 170 in comparison to the emitted light of the VCSEL 900b .

[0064] Further, for the VCSEL 1000c, the configuration of the aluminum oxide layers 130b are similar to the configuration of the oxide layers 130a of the VCSEL 900b . Hence the VCSEL 1000c has a LEIP 1010c comparable to the LEIP 910c of the VCSEL 900b. In this case also, emitted light 170 produced by the VCSEL 1000c has a smaller divergence or divergence angle for its emitted light 170 in comparison to the emitted light of the VCSEL 900c.

[0065] Without being bound by theory, the VCSELs lOOOa-lOOOc can realize reduced or narrower divergence angles of their emitted light or light beams 170 by virtue of the stress fields 135b produced by the aluminum oxide layer 130b.

[0066] The stress fields 135b have a strong interaction with the optical mode(s) inside the VCSELs lOOOa-lOOOc, e.g., inside a cavity. This strong interaction can consistently lead to narrower divergence angles for emitted light 170. Further, the stress fields interactions can neutralize the varying effect of the effective index step profile on the divergence angle .

[0067] In short, the VCSELs lOOOa-lOOOc as well as other variations thereof, can experience smaller or narrow (far-field) divergence angles by incorporating or using oxide layers having or producing strong stress fields.

[0068] The stress fields produced by the oxide layers 130b of the VCSELs lOOOa-lOOOc can have a strength of at least 2 Gigapascals (GPa) , e.g., 2 GPa to 3 GPa, or 3 GPa or greater in some instances.

[0069] By contrast, the VCSELs 900a-900c, or other similar VCSELs with the oxide layers 135a exhibit weaker stress fields. In general, the aluminum oxide layer 135a, e.g., produced from aluminum gallium arsenide, may produce a stress field with a strength of less than 1 GPa.

[0070] In general, the stress fields of oxide layers described herein can have varying strengths due to the varying contraction experienced during the formation of the oxide layers. For example, the oxide layers 130a, formed from aluminum gallium arsenide (AlxGa!-xAs wherein, 0.98<x<l) experiences a volume or thickness contraction of approximately five percent (5%) .

[0071] By contrast, the oxide layers 130b, formed or based on aluminum arsenide (AlAs) , experience a volume or thickness contraction of approximately twelve percent (12%) . This greater shrinkage or contraction yields a stronger stress filed which in turn can bring forth narrower divergence or divergence angles.

[0072] For example, for a single- j unction VCSEL, such as the VCSEL 700a depicted in FIG. 7A, which has an aluminum oxide layer 130a formed from aluminum gallium arsenide, the far field divergence angle is greater than 25 degrees. This divergence angle can be too high for many applications. Similarly, for the multi j unction VCSELs, such as the one depicted in FIGS. 9A-9C, the far field divergence angle is also greater than 35 degrees, which similarly is too high.

[0073] By contrast a single junction VCSELs using an oxide layer producing a high stress field (at least 2 GPa) , can result in smaller divergence or divergence angles.

[0074] The single junction VCSEL 700b, such as the one shown in FIG. 7B which includes an oxide layer 130b, producing a high stress field, can result in the VCSEL 700b having a divergence angle of less than 20 degrees for its emitted light 170. This improved and narrower divergence angle is a result of the aluminum oxide layer 130b (formed from AlAs) which generates a high stress field interacting and influencing the optical field (s) within the VCSEL 700b.

[0075] Similarly, multi unction VCSELs such as the multi unction VCSELs lOOOa-lOOOc including a plurality of oxide layers 130b producing high stress fields (e.g., at least 2 GPa) also results in the emitted light 170 having a smaller far- field divergence angle . For instance , for the multi j unction VCSELs l O O Oa- l O O Oc each can have a far- field divergence angles of less than 20 degrees . The narrower divergence angles results from the aluminum oxide layers 130b having being formed from AlAs .

[0076] FIG . 11 shows a method 1100 according to at least one example of the present disclosure . The method 1100 is for forming a vertical-cavity surface-emitting laser (VCSEL ) and includes at 1110 , providing a substrate .

[0077] At 1120 , the method 1100 includes forming a first reflector structure formed above a first surface of the substrate and includes at 1130 , forming a second reflector structure formed above the first surface of the substrate .

[0078] At 1140 , the method 1100 includes forming a multi j unction active region formed above the first surface of substrate between the first reflector structure and the second reflector structure .

[0079] The forming of the multi j unction active region at 1140 further includes at 1150 , forming a plurality of multiplequantum-wells (MQWs ) regions , and includes , at 1160 , forming a plurality of oxide layers each comprising a peripheral region and an aperture region, wherein the peripheral region surrounds the aperture region and, wherein an edge between the peripheral region and the aperture region is a stress field of at least 2 Gigapascals .

[0080] Any of the aspects , examples , and / or embodiments described herein may be suitable or appropriately combined .

[0081] The word "exemplary" is used herein to mean " serving as an example , instance , or illustration . " Any example or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other examples or designs .

[0082] For the purposes of the present disclosure, the phrase "A and / or B" means (A) , (B) , or (A and B) . For the purposes of the present disclosure, the phrase "A, B, and / or C" means (A) , (B) , (C) , (A and B) , (A and C) , (B and C) , or (A, B, and C) .

[0083] Reference to "one embodiment" or "an embodiment" in the present disclosure means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase "in one embodiment" or "in an embodiment" are not necessarily all referring to the same embodiment. The appearances of the phrase "for example," "in an example, " or "in some examples" are not necessarily all referring to the same example.

[0084] The words "plurality" and "multiple" in the description or the claims expressly refer to a quantity greater than one. The terms "group (of) ", "set [of] ", "collection (of) ", "series (of)", "sequence (of)", "grouping (of)", etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state "plurality" or "multiple" likewise refers to a quantity equal to or greater than one.

[0085] The term "connected" can be understood in the sense of a (e.g. mechanical, optical and / or electrical) , e.g. direct or indirect, connection and / or interaction. For example, several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain) . As used herein, unless otherwise specified the use of the ordinal adjectives "first", "second", "third" etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.

[0086] As utilized herein, terms "module", "component," "system," "circuit, " "element, " "slice, " "circuitry, " and the like are intended to refer to a set of one or more electronic components, a computer-related entity, hardware, software (e.g., in execution) , and / or firmware. For example, circuitry or a similar term can be a processor, a process running on a processor, a controller, an object, an executable program, a storage device, and / or a computer with a processing device. By way of illustration, an application running on a server and the server can also be circuitry. One or more circuits can reside within the same circuitry, and circuitry can be localized on one computer and / or distributed between two or more computers. A set of elements or a set of other circuits can be described herein, in which the term "set" can be interpreted as "one or more."

[0087] Such electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors. The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, circuitry can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute executable instructions stored in computer readable storage medium and / or firmware that confer (s) , at least in part, the functionality of the electronic components. As another example, circuitry or similar term can be implemented in hardware such as application specific integrated circuit (ASIC) , programmable gate array (PGA) , discrete digital circuits, etc.) or in a combination of hardware and software (e.g., a software model executed by a corresponding processor) .

[0088] The term "semiconductor substrate" can mean any construction comprising semiconductor material, for example, a silicon substrate with or without an epitaxial layer, a silicon-on- insulator substrate containing a buried insulator layer, or a substrate with a silicon germanium layer.

[0089] A lateral direction is understood to mean a direction that runs, in particular, parallel to a main extension surface of the component, in particular of a layer. A vertical direction is understood to mean a direction that is oriented, in particular, perpendicular to the main extension surface of the component and / or layer. The vertical direction and the lateral direction are approximately orthogonal to each other.

[0090] Further, spatially relative terms, such as "beneath, " "below, " "lower, " "above, " "upper" and the like, may be used herein for ease of description to describe one element or feature's relationship to another element (s) or feature (s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly .

[0091] The term "data" as used herein may be understood to include information in any suitable analog or digital form, e.g., provided as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, and the like. Further, the term "data" may also be used to mean a reference to information, e . g . , in form of a pointer . The term data, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art .

[0092] As used herein, a signal that is " indicative of" a value or other information may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and / or cause a responsive action in a component receiving the signal . The signal may be stored or buf fered in computer readable storage medium prior to its receipt by the receiving component and the receiving component may retrieve the signal from the storage medium . Further, a "value" that is " indicative of" some quantity, state , or parameter may be physically embodied as a digital signal , an analog signal , or stored bits that encode or otherwise communicate the value .

[0093] Unless otherwise stated, the words "about" and " substantially" as used herein are to be construed as meaning the normal measuring and / or fabrication limitations related to the value or condition which the word "about" or " substantially" modi fies . Unless expressly stated otherwise , the term "embodiment" is used herein to mean an embodiment of the present disclosure .

[0094] As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to change characteristics such as phase , amplitude , frequency, and so on . The signal may be referred to as the same signal even as such characteristics are adapted . In general , so long as a signal continues to encode the same information, the signal may be considered as the same signal . For example , a transmit signal may be considered as referring to the transmit signal in baseband, intermediate , and radio frequencies . While the above descriptions and connected figures may depict device components as separate elements , skilled persons will appreciate the various possibilities to combine or integrate discrete features , functions into a single element . Such may include combining two or more components into a single component . Conversely, skilled persons will recogni ze the possibility to separate a single element into two or more discrete elements , such as splitting a single component into two or more separate components .

[0095] It is appreciated that implementations of methods detailed herein are exemplary in nature , and are thus understood as capable of being implemented in a corresponding device . Likewise , it is appreciated that implementations of devices detailed herein are understood as capable of being implemented as a corresponding method . It is thus understood that a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method .

[0096] All acronyms defined in the above description additionally hold in all claims included herein .

[0097] While embodiments of the present disclosure have been described above , it is obvious that further embodiments may be implemented . For example , further embodiments may comprise any subcombination of features recited in the claims or any subcombination of elements described in the examples given above . Accordingly, this spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein .

[0098] While the disclosure has been particularly shown and described with reference to speci fic embodiments , it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims . The scope of the disclosure is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced .

[0099] Reference Numeral List

[0100] 100 VCSEL

[0101] 105 p-type DBR

[0102] 110 n-type DBR

[0103] 112 first layer of 105

[0104] 114 second layer of 105

[0105] 120 MQW layer

[0106] 125 tunnel junction

[0107] 130, 130a, 130b oxide layer

[0108] 135a, b, stress field

[0109] 140 substrate

[0110] 150 aperture region

[0111] 160 cathode

[0112] 165 anode

[0113] 170, 170a, 170b light beam

[0114] 205 spacer

[0115] 210 layer

[0116] 220a oxide layer

[0117] 220b oxide layer

[0118] 230a residual material / aperture region

[0119] 230b residual material / aperture region

[0120] 270a, b stress field

[0121] 700a, 700b VCSEL 800 VCSEL

[0122] 900a, 900b, 900c VCSEL

[0123] 910a, 910b, 910c lateral effective index profiles (LEIPs)

[0124] 1000a, 1000b, 1000c VCSEL

[0125] 1010a, 1010b, 1010c lateral effective index profiles (LEIPs) 1100 method

Claims

CLAIMS1 . A vertical-cavity surface-emitting laser (VCSEL ) comprising : a substrate ; a first reflector structure formed above a first surface of the substrate ; a second reflector structure formed above the first surface of the substrate ; a multi j unction active region formed above the first surface of substrate between the first reflector structure and the second reflector structure , the multi- j unction active region comprising : a plurality of multiple-quantum-wells (MQWs ) regions ; a plurality of oxide layers each comprising a peripheral region and an aperture region, wherein the peripheral region surrounds the aperture region, and wherein an edge between the peripheral region and the aperture region is a stress field of at least 2 Gigapascals .2 . The VCSEL of claim 1 , wherein the peripheral region of each the plurality of oxide layers comprises aluminum oxide .3 . The VCSEL of claim 1 ,wherein the aperture region of each the plurality of oxide layers comprises aluminum and arsenic.

4. The VCSEL of claim 3, wherein the aperture region of each the plurality of oxide layers is substantially aluminum arsenide.

5. The VCSEL of any of claims 1 to 4, wherein the plurality multi j unction active region having a plurality of sets or sections, where each set or section includes an oxide layer.

6. The VCSEL of any of claims 1 to 4, wherein multi j unction active region comprises a plurality of tunnel junction regions.

7. The VCSEL of claim 6, wherein the multi unction active region comprises alternating sections of the tunnel junction regions, the oxide layers, and the MQW regions.

8. The VCSEL of claim 7, wherein the alternating sections of the multi j unction active region alternate along an emission direction of the VCSEL, the emission region being perpendicular to the first surface of the substrate.

9. The VCSEL of any of claims 1 to 4,wherein the substrate comprises a semiconductor substrate .10 . The VCSEL of claim 9 , wherein the semiconductor substrate is a gallium arsenide substrate .11 . The VCSEL of any of claims 1 to 4 , wherein the first mirror structure comprises a first distributed Bragg reflector ( DBR) having a first conductivity type , and wherein the second mirror structure comprises a second DBR having a second conductivity type , wherein the first conductivity type is opposite to the second conductivity type .12 . The VCSEL of claim 11 , wherein the first DBR and / or the second DBR comprise alternating layers of aluminum gallium arsenide (AlGaAs ) and gallium arsenide ( GaAs ) .13 . The VCSEL of any of claims 1 to 4 , wherein at least two aperture regions from the plurality of oxide layers of the multi j unction region are not aligned from a view facing the first surface of the substrate .14 . The VCSEL of any of claims 1 to 4 , further comprising :an anode disposed over the first surface of the substrate and disposed on or over the first reflector structure ; and a cathode disposed on or over a second surface of the substrate , the second surface being opposite to the first surface of the substrate .15 . The VCSEL of any of claims 1 to 4 , wherein the stress field is at least 3 Gigapascals .16 . The VCSEL of any of claims 1 to 4 , wherein the VCSEL has a beam divergence angle less than 20 degrees .17 . A method for forming a vertical-cavity surface-emitting laser, the method comprising : providing a substrate ; forming a first reflector structure formed above a first surface of the substrate ; forming a second reflector structure formed above the first surface of the substrate ; and forming a multi j unction active region formed above the first surface of substrate between the first reflector structure and the second reflector structure , comprising : forming a plurality of multiple-quantum-wells(MQWs ) regions , andforming a plurality of oxide layers each comprising a peripheral region and an aperture region, wherein the peripheral region surrounds the aperture region and, wherein an edge between the peripheral region and the aperture region is a stress field of at least 2 Gigapascals .18 . The method of claim 17 , wherein forming each of the plurality oxide layers comprises forming the peripheral region and the aperture region from a first layer comprising aluminum arsenide .19 . The method of claim 18 , wherein forming the peripheral region and the aperture region from a first layer comprises applying an oxidation process the first layer .20 . The method of claim 19 , wherein applying the oxidation process comprise applying a wet oxidation process to the first layer .21 . The method of claim 18 , wherein applying the oxidation process causes forming the peripheral region and the aperture region .22 . The method of claim 21 ,wherein the formed peripheral region is substantially aluminum oxide .23 . The method of claim 21 , wherein dimensions of the formed peripheral region are shrunk compared to the first layer .24 . The method of claim 23 , wherein at least a thickness or width of the formed peripheral region is shrunk by at least 10% compared to a thickness or width of the first layer .25 . The method of any of claims 17 to 24 , wherein the aperture region comprises substantially aluminum arsenide .26 . The method of any of claims 17 to 24 , wherein forming the first mirror structure comprises a forming first distributed Bragg reflector ( DBR) having a first conductivity type , and wherein forming the second mirror structure comprises forming a second DBR having a second conductivity type , wherein the first conductivity type is opposite to the second conductivity type .27 . The method of any of claims 17 to 24 , wherein forming the multi j unction active region further comprises forming a plurality of tunnel j unction regions so that the multi unction active region comprises alternating sections of the tunnel j unction regions , the oxide layers , and the MQW regions .28 . The method of any of claims 17 to 24 , further comprising : forming an anode on or over the first surface of the substrate and disposed on or over the first reflector structure ; and forming a cathode on or over a second surface of the substrate , the second surface being opposite to the first surface of the substrate .29 . The method of any of claims 17 to 24 , wherein the substrate comprises a semiconductor substrate .30 . The method of claim 29 , wherein the semiconductor substrate is a gallium arsenide substrate .31 . The method of any of claims 17 to 24 , wherein at least two aperture regions from the plurality of oxide layers of the multi j unction region are not aligned from a view facing the first surface of the substrate .

32. The method of any of claims 17 to 24, wherein the stress field is at least 3 Gigapascals.

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