Method for manufacturing semiconductor device

Abstract

A method for manufacturing a semiconductor device according to the present disclosure comprises: a step for forming a lower resist layer (4) on a substrate (1) that has a plurality of electrode parts (2, 2a) on the surface thereof, and patterning the lower resist layer (4) so as to have a first opening part that corresponds to the shape of an air bridge (7) which connects the plurality of electrode parts (2, 2a); a step for forming a power supply layer (5) on the lower resist layer (4) that includes the first opening part; a step for forming an upper resist layer (6) on the power supply layer (5), and patterning the upper resist layer (6) so as to have a second opening part that corresponds to the shape of the air bridge (7); a step for forming the air bridge (7) by forming a plating film on the power supply layer (5) in the second opening part; and a step for removing at least the upper resist layer (6) by means of injection of dry ice particles.

Description

Semiconductor device manufacturing method

[0001] The present disclosure relates to a method for manufacturing a semiconductor device.

[0002] In recent years, advances have been made in multilevel technology using digital coherent technology to accommodate increasing communication capacity. For example, Mach-Zehnder optical modulators, which can control both the amplitude and phase of light and generate zero-chirp optical modulated signals, are used as multilevel optical modulators. Furthermore, the response speed required of optical modulators continues to increase in order to increase the signal capacity per unit time. Therefore, there is a demand for optical modulators that can input modulated electrical signals of 64 GBaud or 96 GBaud or more with low loss and generate high-speed modulated optical signals through electro-optical interaction.

[0003] To realize the optical modulator capable of the above-mentioned high-speed response, Mach-Zehnder optical modulators equipped with traveling-wave electrodes have been actively developed. By applying a high-frequency transmission line structure optimized for differential signal drive to the traveling-wave electrodes of Mach-Zehnder optical modulators, drive by a differential driver with high power efficiency is realized. To achieve higher high-frequency characteristics in such structures, it is ideal to reduce capacitance by incorporating a hollow structure (air bridge) as the line connecting the traveling-wave electrodes and the driver's electrode pads. However, forming an air bridge in a semiconductor device with severe unevenness, such as a Mach-Zehnder optical modulator, requires low damage and improved resist removability.

[0004] As a resist removal method that causes little damage and has excellent resist removability, for example, the lift-off method described in Patent Document 1 discloses a manufacturing method that improves lift-off properties by spraying dry ice (CO2) particles onto a photoresist that is a lift-off pattern on a Si wafer, thereby removing the photoresist together with a metal film on the photoresist.

[0005] Japanese Patent Application Laid-Open No. 2000-058546

[0006] The lift-off method described in Patent Document 1 processes a metal film into a predetermined shape using lift-off, and does not disclose or anticipate the application of the lift-off method to an air bridge.

[0007] A typical manufacturing method for forming an air bridge involves sequentially forming a lower resist layer, a power supply layer, and an upper resist layer, followed by forming wiring electrodes such as plated wiring. However, this manufacturing method has the problem that it is difficult to use wet etching to remove the upper resist layer in order to prevent side etching of the lower resist layer. On the other hand, even if dry etching such as asher is used to remove the upper resist layer, there is a problem that resist deterioration occurs due to thermal damage to the lower resist layer, which deteriorates resist removability.

[0008] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a method for reproducibly manufacturing a semiconductor device including an air bridge that has excellent reliability and pressure resistance characteristics by applying dry ice cleaning as a method for removing at least the upper layer resist when forming an air bridge.

[0009] A method for manufacturing a semiconductor device according to the present disclosure is a method for manufacturing a semiconductor device including an air bridge, comprising the steps of: forming a lower-layer resist on a substrate having a plurality of electrode portions on its surface, and patterning a first opening in the lower-layer resist corresponding to the shape of the air bridge connecting the plurality of electrode portions; depositing a power supply layer on the lower-layer resist including the first opening; forming an upper-layer resist on the power supply layer, and patterning a second opening in the upper-layer resist corresponding to the shape of the air bridge; forming a plating film on the power supply layer within the second opening, thereby forming the air bridge; and removing at least the upper-layer resist by spraying dry ice particles.

[0010] According to the semiconductor device manufacturing method of the present disclosure, dry ice cleaning is used as a method for removing at least the upper layer resist, thereby achieving the effect of enabling semiconductor devices with excellent reliability and voltage resistance characteristics and a low defect rate to be manufactured with good reproducibility.

[0011] 1 is a top view illustrating the structure of a Mach-Zehnder optical modulator as an example of a semiconductor device according to a first embodiment. FIG. 2 is an enlarged top view of a portion of the Mach-Zehnder optical modulator as an example of a semiconductor device according to the first embodiment, where an air bridge is formed. FIG. 3 is a cross-sectional view of a typical air bridge in a semiconductor device. FIG. 4 is a process flow diagram illustrating a manufacturing process of an air bridge in a manufacturing method of a semiconductor device according to the first embodiment. FIG. 5 is a cross-sectional view illustrating a manufacturing process of an air bridge in a manufacturing method of a semiconductor device according to the first embodiment. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an air bridge in a manufacturing method of a semiconductor device according to the first embodiment. FIG. 7 is a cross-sectional view illustrating a manufacturing process of an air bridge in a manufacturing method of a semiconductor device according to the first embodiment. FIG. 8 is a cross-sectional view illustrating a manufacturing process of an air bridge in a manufacturing method of a semiconductor device according to the first embodiment. FIG. 9 is a cross-sectional view illustrating a manufacturing process of an air bridge in a manufacturing method of a semiconductor device according to the first embodiment. 10A to 10C are cross-sectional views illustrating a method for manufacturing an air bridge in a method for manufacturing a semiconductor device according to a second embodiment. 10B to 10C are cross-sectional views illustrating a method for manufacturing an air bridge in a method for manufacturing a semiconductor device according to a second embodiment. 10C to 10D are cross-sectional views illustrating a method for manufacturing an air bridge in a method for manufacturing a semiconductor device according to a second embodiment.

[0012] First Embodiment Fig. 1 is a top view showing the structure of a Mach-Zehnder optical modulator 101, which is an example of a semiconductor device according to the first embodiment. Fig. 2 is an enlarged top view of a portion where an air bridge is formed in the Mach-Zehnder optical modulator 101, which is an example of a semiconductor device according to the first embodiment. Fig. 2 corresponds to the region surrounded by a dotted line in Fig. 1.

[0013] <Structure of a Mach-Zehnder Optical Modulator as an Example of a Semiconductor Device> A Mach-Zehnder optical modulator 101 includes an optical input waveguide 102 that guides light incident from the outside, an optical output waveguide 103 that outputs processed light to the outside, and an MMI (Multi-Mode Inverter) that splits the input light into two lights. The optical waveguide is made up of a multi-mode fiber (MMI) coupler 104 that combines two input beams of light into one beam of light, a pair of traveling-wave electrodes 108 and 109 that apply an electric signal to the optical waveguide to modulate the light propagating through the optical waveguide, arm waveguides 106 and 107 that guide the modulated light to a subsequent stage, ground lines 110 and 111 that supply a ground potential, a termination resistor 112, phase adjusters 113 and 114 that adjust the phase of the modulated light, a metal electrode 115, a mesa (separation groove) 116, an electrode pad 117, an air bridge 118, and an insulating protective film 120 that protects the surface.

[0014] As shown in FIG. 2, an air bridge 118 is formed above the optical input waveguide 102 to electrically connect the electrode pad 117 and the traveling wave electrode 109 .

[0015] 3 is a cross-sectional view of a typical air bridge 7 used in a semiconductor device manufactured by the semiconductor device manufacturing method according to the first embodiment. The air bridge 7 includes a processed substrate 1 (hereinafter also referred to as a substrate) on which various components necessary for the semiconductor device are formed, a traveling-wave electrode 2 and electrode pads 2a (hereinafter simply referred to as electrode pads 2a) for drivers and the like formed on the surface of the processed substrate 1, an insulating protective film 3 covering the surface of the processed substrate 1 and having openings for the traveling-wave electrode 2 and the electrode pads 2a, respectively, a power supply layer 5 electrically connected to the traveling-wave electrode 2 and the electrode pads 2a through the openings in the insulating protective film 3 and spatially separated from the insulating protective film 3 between the traveling-wave electrode 2 and the electrode pads 2a, and an air bridge 7 formed on the power supply layer 5. The air bridge 7 and the power supply layer 5 in close contact with the lower part of the air bridge 7 may be collectively referred to as an air bridge. The traveling-wave electrode 2 and the electrode pads 2a are also collectively referred to as an electrode portion.

[0016] <Processed Substrate> The processed substrate 1 is processed to correspond to the semiconductor device to be manufactured. An example of the processed substrate 1 is a substrate that uses an epitaxial crystal growth substrate made mainly of a III-V group compound semiconductor such as gallium nitride (GaN) or indium phosphide (InP) and has already been subjected to recrystallization growth or substrate processing to correspond to the element structure of the semiconductor device to be manufactured.

[0017] For example, in the case of a GaN-based semiconductor device, epitaxial crystal growth of aluminum gallium nitride (AlGaN) or aluminum nitride (AlN) is carried out on a GaN-on-SiC (silicon nitride) substrate or a GaN-on-Si (silicon) substrate to form a field effect transistor (HEMT: High Electron Mobility Transistor) structure in which gate, source, and drain electrodes are already formed, and this serves as the processed substrate 1.

[0018] Examples of optical elements include a distributed feedback laser (DFB), an electro-absorption modulator integrated laser (EML), and a Mach-Zehnder optical modulator.

[0019] A quantum well (MQW: Multi Quantum Well) active layer made of a III-V group compound semiconductor such as aluminum gallium indium arsenide (AlGaInAs) or indium gallium arsenide phosphide (InGaAsP) is formed on an InP substrate as an optical waveguide, and then a recrystallized grown substrate on which a block layer, contact layer, etc. are formed is subjected to ridge processing as an optical waveguide and traveling wave electrode, and this substrate is used as a processed substrate 1.

[0020] <Method for Manufacturing Air Bridge> In the method for manufacturing a semiconductor device according to the first embodiment, a Mach-Zehnder optical modulator using an InP substrate is taken as an example of a semiconductor device. The manufacturing process of the air bridge in the manufacturing process of the Mach-Zehnder optical modulator will be described below.

[0021] 4 is a process flow diagram illustrating the air bridge manufacturing process in the semiconductor device manufacturing method according to the first embodiment. The air bridge manufacturing process includes a processing substrate fabrication process ST101, a protective film formation process ST102, a lower-layer resist pattern formation process ST103, a power supply layer formation process ST104, an upper-layer resist pattern formation process ST105, an air bridge formation process ST106, an upper-layer resist removal process ST107, a power supply layer removal process ST108, and a lower-layer resist removal process ST109. Each process will be described in detail below.

[0022] <Processed Substrate Fabrication Step ST101> First, a processed substrate 1 corresponding to the Mach-Zehnder optical modulator to be manufactured is fabricated using a known fabrication method. Recrystallization growth is an example of processing corresponding to a Mach-Zehnder optical modulator. Figure 5 is a cross-sectional view of the processed substrate 1 after recrystallization growth and processing into a Mach-Zehnder optical modulator have already been completed. Note that in Figure 5, the various components in the processed substrate 1 that are used to form the Mach-Zehnder optical modulator are omitted.

[0023] 6 shows a cross-sectional view of a processed substrate 1 on which a traveling-wave electrode 2 and an electrode pad 2a are formed as an example of a processed substrate 1 compatible with a Mach-Zehnder optical modulator. The traveling-wave electrode 2 and the electrode pad 2a may be formed by, for example, vapor deposition or sputtering. A metal material that is stable as a wiring electrode is suitable for forming the traveling-wave electrode 2 and the electrode pad 2a. Specifically, an alloy using multiple metals such as gold (Au), titanium (Ti), aluminum (Al), platinum (Pt), and nickel (Ni) is used.

[0024] <Protective Film Forming Step ST102> An insulating protective film 3 is formed on the surface of the processed substrate 1 on which the traveling-wave electrode 2 and the electrode pad 2a are formed, for the purpose of improving reliability and withstand voltage characteristics and suppressing process damage. The insulating protective film 3 has openings corresponding to the traveling-wave electrode 2 and the electrode pad 2a, respectively. FIG. 7 is a cross-sectional view after the insulating protective film 3 and the openings are formed. Film types that are frequently used for the insulating protective film 3 include oxide films such as silicon oxide (SiO) and aluminum oxide (AlO), and nitride films such as silicon nitride (SiN) and AlN. Film types for the insulating protective film 3 of the present disclosure may also include oxides or nitrides of elements selected from Si, Al, Ti, tantalum (Ta), tungsten (W), molybdenum (Mo), and zirconium (Zr).

[0025] The insulating protective film 3 may be formed by plasma-enhanced chemical vapor deposition (PE-CVD), catalytic chemical vapor deposition (Cat-CVD), sputtering, atomic layer deposition (ALD), or the like. A laminated film of two or three layers of different film types may also be used. Furthermore, multiple film formation methods may be selected. One example of selecting multiple film formation methods is a method in which a SiN film is formed by PE-CVD, and then an AlO film is formed by ALD.

[0026] <Lower-Layer Resist Pattern Formation Step ST103> A lower-layer resist 4 is formed by applying a resist to the entire surface of the processing substrate 1 on which the insulating protective film 3 has been formed. Using photolithography and etching techniques, openings for electrode portions (first openings), i.e., resist patterns for openings for electrode portions, are formed in the lower-layer resist 4 at locations corresponding to the traveling-wave electrode 2 and electrode pad 2a connected by the air bridge 7. Figure 8 is a cross-sectional view after the openings for electrode portions (first openings) have been formed in the lower-layer resist 4.

[0027] In the lower-layer resist pattern formation step ST103, a negative resist, which can be easily made thick, is often used as the resist because the film thickness of the lower-layer resist 4 is approximately equal to the height of the air bridge 7. However, for optical elements such as Mach-Zehnder optical modulators, a resin with excellent flatness, such as polyimide or benzocyclobutene (BCB), may also be used because the lower-layer resist also serves to bridge high-step portions such as high mesa ridges.

[0028] <Power Supply Layer Formation Step ST104> A power supply layer 5a, which will be required in the subsequent plating step, is formed on the lower resist layer 4 with electrode openings. FIG. 9 shows a cross-sectional view of the power supply layer 5a after it has been formed. In the power supply layer formation step ST104, if the air bridge 7 is several micrometers or more high or if the air bridge 7 is formed on a high-step portion such as a high mesa ridge, it is desirable to form the power supply layer 5a by sputtering, taking into consideration coverage of the resist side surfaces. However, if there are no high-step portions on the processing substrate 1, deposition methods, etc., may be used instead of sputtering. Furthermore, the type of metal material used for the power supply layer 5a is preferably an alloy, such as Ti / Au, that uses multiple metals such as Au, Ti, Al, Pt, and Ni.

[0029] <Upper-Layer Resist Pattern Formation Process ST105> Next, a resist is applied onto the power supply layer 5a to form an upper-layer resist 6. Using photolithography and etching, a resist pattern corresponding to the shape of the air bridge 7, i.e., an opening (second opening), is formed in the upper-layer resist 6. FIG. 10 is a cross-sectional view of the upper-layer resist 6 after a pattern corresponding to the shape of the air bridge is formed. The thickness of the upper-layer resist 6 must be determined taking into account the thickness of the air bridge 7, but there are no particular restrictions on the type of resist. However, it is a necessary condition that the material for the upper-layer resist 6 is resistant to the electrolyte used when forming the air bridge by electrolytic plating or electroless plating, which will be described later.

[0030] <Air Bridge Formation Step ST106> Electrolytic plating or electroless plating is used to form an air bridge 7 made of a plating film on the power supply layer 5a exposed at the bottom of the air bridge pattern (second opening) of the upper resist layer 6. FIG. 11 is a cross-sectional view of the processed substrate 1 including the air bridge 7 after the air bridge has been formed. Examples of plating materials include Ni, Au, chromium (Cr), zinc (Zn), and tin (Sn). Note that Au is most commonly used as the metal plating that forms the air bridge in semiconductor surface processing.

[0031] <Top-Layer Resist Removal Process ST107> Next, the top-layer resist 6 is removed. FIG. 12 is a cross-sectional view of the top-layer resist 6 after removal. For resist removal, wet etching is typically used. However, air bridges 7 generally tend to have high-level patterns. When wet etching is used to process areas with high levels of level, some areas are more susceptible to penetration of the wet etching solution than others. Therefore, when air bridges are formed using wet etching, etching unevenness and resist residues occur within the wafer surface, which can lead to process defects or reliability problems in subsequent processes.

[0032] To address this problem, a method of removing the resist by dry etching using an asher or the like is often applied. However, for example, the lower resist layer 4 may be thermally damaged by the dry etching and altered, and resist residue may be generated when the lower resist layer is removed, which may result in problems that cause breakdowns such as a decrease in the breakdown voltage of the semiconductor device.

[0033] To solve the above-mentioned problems, in the method for manufacturing a semiconductor device according to the first embodiment, the resist is removed by spraying dry ice particles onto the surface (hereinafter referred to as dry ice cleaning). A possible mechanism for removing the resist by dry ice cleaning is that the dry ice particles penetrate into the lower part of the resist when sprayed and then expand when vaporized, thereby peeling off the resist.

[0034] Dry ice cleaning causes no damage due to high temperatures, and does not damage the air bridge 7 made of the plating film formed by plating. In addition, there is absolutely no unintended etching effect such as side etching of the power supply layer 5 a and the lower resist layer 4.

[0035] In addition to the above-mentioned effects, dry ice cleaning can also simultaneously remove dust and other foreign matter adhering to the wafer surface, which can unintentionally act as a mask during subsequent processes such as ion milling, thereby eliminating foreign matter that could cause processing abnormalities.

[0036] In other words, by using dry ice cleaning when removing the upper resist layer, it is possible to suppress deterioration of the lower resist layer and improve resist removability. Furthermore, as a secondary effect of dry ice cleaning, it is also possible to suppress surface foreign matter. As a result, it is possible to improve the reliability and voltage resistance characteristics of semiconductor devices, reduce the defect rate, and realize a reduction in capacitance, which is a characteristic of air bridges.

[0037] Figure 13 shows an example of a dry ice cleaning method. As shown in Figure 13, dry ice particles are sprayed from a fixed direction against a 3-inch InP wafer 15 on which a processing substrate 1 has been formed, while the spray nozzle is moved back and forth from the side opposite the orientation flat to the orientation flat. This is because spraying is limited to one direction to prevent re-adhesion of resist, foreign matter, etc. However, when removing the lower resist layer 4 (described later), it is necessary to remove the lower resist layer 4 formed directly below the piers of the air bridge 7. Therefore, it is important to spray the dry ice particles perpendicular to the direction in which the air bridge 7 is formed, i.e., parallel to the extension direction of the air bridge.

[0038] In addition to the above-mentioned spraying conditions, other dry ice particle spraying conditions include the spray nozzle, spray pressure, particle size, distance between the wafer and nozzle, dew condensation prevention, and on-wafer stage feed speed. The detailed settings of each item must be changed appropriately depending on the width, size, film thickness, etc. of the air bridge 7. For example, when used in a manufacturing method for a Mach-Zehnder optical modulator, which is an example of a semiconductor device, it is preferable to apply conditions such as a dry ice particle spray pressure of 1 MPa or less and particle size of 30 μm or less.

[0039] <Power Supply Layer Removal Step ST108> After removing the upper resist layer 6 using dry ice cleaning, unnecessary portions of the power supply layer 5a are removed. FIG. 14 is a cross-sectional view of the power supply layer 5a after the unnecessary portions have been removed. The method for removing the power supply layer 5a depends on the type of metal material constituting the power supply layer 5a. Selectively removing the power supply layer 5a using wet etching is not particularly suitable because it can cause side etching of the power supply layer 5a below the plating film, which can lead to plating peeling. Furthermore, it is difficult to remove the metal material constituting the power supply layer 5a using dry etching. Therefore, physically removing the unnecessary portions of the power supply layer 5a using a method such as ion milling is the most common and preferred method.

[0040] <Lower-Layer Resist Removal Step ST109> Finally, the lower-layer resist 4 is removed. By removing the lower-layer resist 4, the air bridge 7 is completed. That is, FIG. 3 is a cross-sectional view of the completed air bridge. Regarding the method of removing the lower-layer resist 4, it is necessary to remove the resist that has infiltrated under the air bridge 7, so in the past, removal by wet etching was essential. However, if wet etching alone is used to remove resist that has been hardened, or altered, by ion milling, there is a high possibility of defects such as resist residue in the hardened and altered resist portions occurring.

[0041] Therefore, in the method for manufacturing a semiconductor device according to the first embodiment, when removing the lower resist layer 4, a two-stage etching method is used in which the hardened portions of the lower resist layer 4 are first removed by dry ice cleaning, and then the resist below the air bridges 7 is removed by wet etching. As a result, the generation of resist residue below the air bridges 7 can be suppressed, so there is no damage to the semiconductor surface, and it is possible to prevent the generation of foreign matter on the surface, thereby eliminating all causes of defects related to air bridge formation. Through the above steps, the air bridges 7 are completed on the processed substrate 1.

[0042] <Effects of First Embodiment> As described above, according to the method for manufacturing a semiconductor device according to the first embodiment, dry ice cleaning is applied as a method for removing at least the upper layer resist, and therefore, an effect is achieved in that a semiconductor device having excellent reliability and voltage resistance characteristics and a low defect rate can be easily manufactured.

[0043] Second Embodiment The air bridge 7a used in a semiconductor device manufactured by a method for manufacturing a semiconductor device according to a second embodiment is identical in shape to the air bridge 7 shown in Figure 3. The method for manufacturing a semiconductor device according to the second embodiment differs in that the air bridge 7a is not formed by plating as in the first embodiment, but is instead fabricated using a vapor deposition method and a wet lift-off method. The wet lift-off method is an example of lift-off.

[0044] When forming the air bridge 7a using the vapor deposition method and the wet lift-off method, it is possible to use only a two-layer resist without using a power supply layer. In this case, it is important to devise a resist configuration and to use a method that has high lift-off properties. In the manufacturing method of the semiconductor device according to the second embodiment, high lift-off properties are achieved by using dry ice cleaning to lift off the metal film that constitutes the air bridge. The air bridge formation process in the manufacturing method of the semiconductor device according to the second embodiment will be described below.

[0045] 15 is a process flow diagram illustrating the air bridge manufacturing process in the semiconductor device manufacturing method according to the second embodiment. The air bridge manufacturing process includes the following steps: a processed substrate fabrication step ST201, a protective film formation step ST202, a lower-layer resist pattern formation step ST203, an upper-layer resist pattern formation step ST204, an air bridge formation step ST205, a lift-off step ST206, and a remaining resist removal step ST207. The steps up to the processed substrate fabrication step ST201 and the protective film formation step ST202 are common to the steps in the semiconductor device manufacturing method according to the first embodiment, and therefore will not be described here. The steps from the lower-layer resist pattern formation step ST203 onwards will be described in detail below.

[0046] <Lower-Layer Resist Pattern Formation Step ST203> A resist is applied to the entire surface of the processing substrate 1 on which the insulating protective film 3 is formed, forming a lower-layer resist 4a. Using photolithography and etching techniques, resist patterns, i.e., openings (first openings) for the electrodes, are formed in the lower-layer resist 4 at locations corresponding to the traveling-wave electrode 2 and electrode pad 2a connected by the air bridge 7a. Figure 16 is a cross-sectional view after the openings (first openings) for the electrodes have been formed. In the lower-layer resist pattern formation step ST203, the film thickness of the lower-layer resist 4a is approximately equal to the height of the air bridge 7, so a negative resist, which can be easily thickened, is often used. However, for the lower-layer resist 4a, a positive resist, etc., may be used instead of a negative resist, taking into account the ease of lift-off performed in a subsequent step.

[0047] <Upper-Layer Resist Pattern Formation Process ST204> Next, resist is applied onto the lower-layer resist 4a to form an upper-layer resist 8. Using photolithography and etching, openings (second openings) corresponding to the shape of the air bridge are formed in the upper-layer resist 8. Figure 17 is a cross-sectional view after the air bridge pattern has been formed in the upper-layer resist 8. Unlike the semiconductor device manufacturing method according to the first embodiment, no plating is used, and therefore there is no need to form a power supply layer.

[0048] The thickness of the upper resist layer 8 must be determined taking into consideration the thickness of the air bridge 7a. Furthermore, it is preferable to use a resist material that forms an inverse tapered shape for the upper resist layer 8 in order to improve lift-off properties. It is also important to use a resist material that expands when subjected to a thermal history such as baking, thereby achieving a shape in which the upper resist layer 8 expands relative to the lower resist layer 4a.

[0049] <Air Bridge Formation Step ST205> Using the air bridge pattern (second opening) of the upper resist layer 8 as a mask, the air bridge metal film 9 is formed by vapor deposition or the like. Figure 18 is a cross-sectional view of the processed substrate 1 including the air bridge metal film 9 after the air bridge metal film 9 has been formed. Unlike the plating film of the first embodiment, it is difficult to increase the thickness of the air bridge metal film 9. However, the air bridge metal film 9 can be alloyed.

[0050] For example, as a specific example of the metal material of the air bridge metal film 9, an alloy using Au, Ti, Al, Pt, Ni, etc., which is the same metal material as the traveling wave electrode 2 and the electrode pad 2a, may be used. However, if a highly isotropic sputtering method or the like is used as a method for forming the air bridge metal film 9, there is a high possibility that the metal film will adhere to the side walls of the resist, causing problems such as burrs and poor lift-off. Therefore, it is preferable to use a vapor deposition method, which has a higher anisotropy than the sputtering method, as a method for forming the air bridge metal film 9.

[0051] <Lift-off process ST206> After forming the air bridge metal film 9, the upper resist layer 8 and the lower resist layer 4a are simultaneously removed by dry ice cleaning. Figure 19 is a cross-sectional view of the air bridge formed by the evaporated film after lift-off is completed. The method of dry ice cleaning can be the same as that described in the first embodiment, i.e., the method shown in Figure 13.

[0052] In the first embodiment, the upper resist layer 6 and the lower resist layer 4 are removed, in principle, by separate dry ice cleaning. On the other hand, in the second embodiment, the upper resist layer 8 and the lower resist layer 4a can be simultaneously removed by a single dry ice cleaning. Therefore, in the second embodiment, the air bridge can be formed in fewer steps than in the first embodiment, thereby reducing the manufacturing cost of the semiconductor device.

[0053] <Residual Resist Removal Step ST207> After lift-off by dry ice cleaning, the resist remaining under the air bridge 7a is removed by wet etching. Through the above steps, the air bridge 7a is completed.

[0054] Effect of Second Embodiment As described above, according to the manufacturing method of the semiconductor device of the second embodiment, lift-off using dry ice cleaning is applied when forming the air bridge, and therefore the number of steps can be reduced compared to the first embodiment. Furthermore, the power supply layer that is necessary for plating film formation in the first embodiment is not necessary in the second embodiment, and therefore the electrode etching step using ion milling is not necessary and there is no concern about deterioration of the resist, etc., so that an effect is achieved in that a manufacturing method can be obtained that can easily manufacture a semiconductor device that is free from damage to the surface of the semiconductor layer and has excellent reliability.

[0055] In the first and second embodiments, a Mach-Zehnder optical modulator has been described as an example of a semiconductor device to be manufactured. However, the manufacturing methods of the semiconductor device according to the first and second embodiments can be applied to any semiconductor device having an air bridge other than a Mach-Zehnder optical modulator.

[0056] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.

[0057] Therefore, countless variations not illustrated are conceivable within the scope of the technology of the present disclosure, including, for example, cases where at least one component is modified, added, or omitted, and even cases where at least one component is extracted and combined with a component of another embodiment.

[0058] 1 Processing substrate, 2, 108, 109 Traveling wave electrode, 2a, 117 Electrode pad, 3, 120 Insulating protective film, 4, 4a Lower layer resist, 5, 5a Power supply layer, 6, 8 Upper layer resist, 7, 7a, 118 Air bridge, 9 Metal film for air bridge, 15 3-inch InP wafer, 101 Mach-Zehnder type optical modulator, 102 Optical input waveguide, 103 Optical output waveguide, 104, 105 MMI coupler, 106, 107 Arm waveguide, 110, 111 Ground line, 112 Termination resistor, 113, 114 Phase adjuster, 115 Metal electrode, 116 Mesa (separation groove)

Claims

1. A method for manufacturing a semiconductor device including an air bridge, the method comprising: forming a lower resist on a substrate having a plurality of electrode portions on its surface; patterning a first opening corresponding to the shape of the air bridge connecting between the plurality of electrode portions in the lower resist; forming a power supply layer on the lower resist including the first opening; forming an upper resist on the power supply layer; patterning a second opening corresponding to the shape of the air bridge in the upper resist; forming the air bridge by forming a plating film on the power supply layer within the second opening; and removing at least the upper resist by injecting dry ice particles.

2. The method for manufacturing a semiconductor device according to claim 1, wherein at least a part of the lower resist is removed by injecting the dry ice particles in addition to removing the upper resist.

3. The method for manufacturing a semiconductor device according to claim 2, further comprising a step of removing the remaining lower resist by wet etching after removing at least a part of the lower resist by injecting the dry ice particles.

4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the dry ice particles are injected from a direction perpendicular to the direction in which the air bridge is bridged.

5. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, further comprising a step of removing an unnecessary portion in the power supply layer after removing the upper resist.

6. A method for manufacturing a semiconductor device including an air bridge, the method comprising: forming a lower resist on a substrate having a plurality of electrode portions on its surface; patterning a first opening corresponding to the shape of the air bridge connecting between the plurality of electrode portions in the lower resist; forming an upper resist on the lower resist including the first opening; patterning a second opening corresponding to the shape of the air bridge in the upper resist; forming a metal film on the upper resist including the second opening; and forming the air bridge by lift-off removing the upper resist and the lower resist by injecting dry ice particles.

7. The manufacturing method of the semiconductor device according to claim 6, wherein the metal film is formed by a vapor deposition method.

8. The manufacturing method of the semiconductor device according to any one of claims 1 to 7, wherein each part constituting the Mach-Zehnder type optical modulator is pre-processed on the substrate.

9. The manufacturing method of the semiconductor device according to any one of claims 1 to 8, wherein dry ice particles are jetted onto the wafer from a certain direction while reciprocating the jet nozzle from the anti-orifice side to the orifice side with respect to the wafer on which the substrate is formed.

10. The manufacturing method of the semiconductor device according to claim 9, wherein the certain direction is a direction parallel to the extending direction of the air bridge.

11. The manufacturing method of the semiconductor device according to any one of claims 1 to 10, wherein an insulating protective film is formed on the substrate.

12. The manufacturing method of the semiconductor device according to any one of claims 1 to 11, wherein the air bridge is applied to the electrode portion including the traveling wave electrode of the Mach-Zehnder type optical modulator.

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