Power conversion device

Abstract

Provided is a power conversion device (100) which is configured by arranging a plurality of power semiconductor modules close to each other, and in which thermal interferences between the power semiconductor modules during charging and discharging can be leveled. The power conversion device is characterized by comprising: a power conversion unit having a first semiconductor module (106a) and a fourth semiconductor module (106b) through which substantially the same amount of current passes during operation, and a second semiconductor module (106c) and a third semiconductor module (106d) through which substantially the same amount of current passes during operation; and a cooling body (115) on which the first semiconductor module, the second semiconductor module, the third semiconductor module, and the fourth semiconductor module are disposed. A third thermal interference between the second semiconductor module and the third semiconductor module is smaller than a first thermal interference between the first semiconductor module and the second semiconductor module and a second thermal interference between the third semiconductor module and the fourth semiconductor module.

Description

Power Conversion Device

[0001] The present invention relates to the configuration of a power conversion device, and more particularly to a technique that is effective when applied to a power conversion device configured by arranging a plurality of power semiconductor modules closely together.

[0002] Three-level inverters, a type of power conversion device, are widely used in power conditioners, etc. as devices that convert AC power and DC power. Power conversion using a three-level inverter controls the operation of power semiconductor modules used in the power conversion circuit to perform the desired power conversion.

[0003] For example, it is possible to connect a storage battery to the DC side of a three-level inverter and control the switching operation so that the power stored in the storage battery is discharged to the AC side. Conversely, it is also possible to connect the AC side to the power grid, receive AC power from the power grid, convert it to DC using the three-level inverter, and charge the storage battery.

[0004] During this power conversion process, power loss, or heat generation, occurs in the power semiconductor module. If heat generation continues, the temperature of the power semiconductor module rises, and if it exceeds a certain temperature, the power semiconductor module will be damaged. To prevent damage, it is necessary to maintain the temperature below a certain level. For this reason, a cooling device such as a heat sink is connected to the power semiconductor module to maintain the power semiconductor module below a certain level. Generally, as the amount of heat generated increases, the heat sink tends to become larger, so it is necessary to design an appropriate heat sink according to the amount of heat generated.

[0005] Background art in this technical field includes, for example, technology such as that disclosed in Patent Document 1. Patent Document 1 focuses on the fact that the heat generation timing (phase) of the U phase, V phase, and W phase of a two-level inverter is shifted by 120 degrees, and proposes a means for arranging the power semiconductor modules of the U phase, V phase, and W phase at equal distances to increase the cooling efficiency of the heat sink.

[0006] Japanese Patent Application Laid-Open No. 2005-117783

[0007] In a three-level inverter, a circuit is constructed by combining four power semiconductor modules to output a DC high-side voltage, a low-side voltage, and an intermediate voltage. Of these, the power semiconductor modules that turn on when outputting a high-side voltage and a low-side voltage are called outer arms, and the power semiconductor module that turns on when outputting an intermediate voltage is called inner arms.

[0008] When a three-level inverter discharges, the effective current flowing through the outer arm increases, so the loss in the outer arm tends to be greater than that in the inner arm. On the other hand, when charging, the effective current in the inner arm increases, so the relationship between the magnitude of loss during charging and discharging is reversed. In inverter devices that operate in this manner, the heat sinks are generally designed to accommodate the loss during discharge in the outer arm and the loss during charging in the inner arm.

[0009] However, the heat sink performance is excessive, that is, it is excessively large, in the outer arm during charging and in the inner arm during discharging.

[0010] Therefore, an object of the present invention is to provide a power conversion device that is configured by arranging a plurality of power semiconductor modules closely together, and that is capable of leveling out the thermal interference between the power semiconductor modules during charging and discharging.

[0011] In order to solve the above problems, the present invention provides a power conversion unit having a first semiconductor module and a fourth semiconductor module, which pass approximately the same amount of current during operation, and a second semiconductor module and a third semiconductor module, which pass approximately the same amount of current during operation, and a cooling body in which the first semiconductor module, the second semiconductor module, the third semiconductor module, and the fourth semiconductor module are arranged, wherein the third thermal interference between the second semiconductor module and the third semiconductor module is smaller than the first thermal interference between the first semiconductor module and the second semiconductor module and the second thermal interference between the third semiconductor module and the fourth semiconductor module.

[0012] According to the present invention, it is possible to realize a power conversion device that is configured by arranging a plurality of power semiconductor modules closely together, and that is capable of leveling out thermal interference between the power semiconductor modules during charging and discharging.

[0013] This makes it possible to suppress the maximum temperature rise that accompanies power conversion, which contributes to the miniaturization of cooling devices such as heat sinks and the miniaturization of power conversion devices that include cooling devices.

[0014] Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments.

[0015] 7 is a circuit diagram showing a schematic configuration of a power conversion device according to a first embodiment of the present invention. FIG. 8 is a diagram showing an example of a power semiconductor module constituting the power conversion device of FIG. 1. FIG. 9 is a diagram showing an example of an instantaneous current waveform and an effective current waveform of an outer arm during discharge of the power conversion device of FIG. 1. FIG. 10 is a diagram showing an example of an instantaneous current waveform and an effective current waveform of an inner arm during discharge of the power conversion device of FIG. 1. FIG. 11 is a diagram showing an example of loss during discharge of the power conversion device of FIG. 1. FIG. 12 is a diagram showing an example of loss during charging of the power conversion device of FIG. 1. FIG. 13 is a diagram showing an example of an implementation of a power semiconductor module and a heat sink in the power conversion device of FIG. 1. FIG. 14 is a diagram showing a simulation result of temperature rise in the implementation example of FIG. 15. FIG. 16 is a diagram showing an example of an implementation of a power semiconductor module and a heat sink in a power conversion device according to a second embodiment of the present invention. FIG. 17 is a diagram showing an example of an implementation of a power semiconductor module and a heat sink in a power conversion device according to a third embodiment of the present invention.

[0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description of overlapping parts will be omitted.

[0017] First Embodiment A power conversion device according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 8. FIG.

[0018] FIG. 1 is a circuit diagram showing a schematic configuration of a power conversion device 100 according to this embodiment.

[0019] 1 , the DC side of the power conversion device 100 of this embodiment is connected to a storage battery 104, and the AC side is connected to a power grid 103. DC power supplied from the DC-side storage battery 104 is received from the DC side of the power conversion device 100. The power conversion device 100 converts the DC power from the storage battery 104 into three-phase AC power and supplies it to the power grid 103.

[0020] 1, the power conversion device 100 is configured to output power at three levels of potential: a high level potential, an intermediate potential, and a low level potential. Specifically, the power conversion device 100 has a three-level inverter circuit that performs power conversion based on the input of a positive side, which is a DC voltage input from the positive electrode of the storage battery 104, and the input of the opposite negative side, and outputs three levels of potential.

[0021] In this configuration, the inner arm is configured such that an IGBT 101c and a diode 102d are connected in series with each other, and an IGBT 101d and a diode 102c are connected in series with each other, and are connected in anti-parallel. When outputting a high level or a low level, current flows through one element of either the IGBT 101a or the IGBT 101b. This configuration is generally called a T-type three-level.

[0022] 1, one IGBT 101 (101a to 101d) and one diode 102 (102a to 102d) are paired to form one power semiconductor module 106. Note that in FIG. 1, only the power semiconductor module combining the IGBT 101d and the diode 102d is denoted by the reference numeral 106.

[0023] The IGBT 101a and the diode 102a form a first semiconductor module (reference numeral 106a in FIG. 7 , which will be described later). The IGBT 101c and the diode 102c form a second semiconductor module (reference numeral 106c in FIG. 7 , which will be described later). The IGBT 101d and the diode 102d form a third semiconductor module (reference numeral 106d in FIG. 7 , which will be described later). The IGBT 101b and the diode 102b form a fourth semiconductor module (reference numeral 106b in FIG. 7 , which will be described later).

[0024] The power conversion unit of the power conversion device 100 is composed of a first semiconductor module (IGBT 101a and diode 102a), a second semiconductor module (IGBT 101c and diode 102c), a third semiconductor module (IGBT 101d and diode 102d), and a fourth semiconductor module (IGBT 101b and diode 102b).

[0025] The first semiconductor module (IGBT 101a and diode 102a) and the fourth semiconductor module (IGBT 101b and diode 102b) have approximately the same amount of current passing therethrough during operation of the power conversion device 100. The second semiconductor module (IGBT 101c and diode 102c) and the third semiconductor module (IGBT 101d and diode 102d) have approximately the same amount of current passing therethrough during operation of the power conversion device 100.

[0026] Each power semiconductor module 106 constituting the power conversion device 100 is controlled to be turned on and off by a gate drive signal 113 output from a gate drive circuit 112 .

[0027] FIG. 2 is a diagram showing an example of the power semiconductor module 106 that constitutes the power conversion device 100 of FIG.

[0028] 2, the power semiconductor module 106 includes a pair of an IGBT 101 and a diode 102 that constitute the power conversion device 100. Inside the power semiconductor module 106, the IGBT 101 and the diode 102 are connected in semi-parallel, and the collector 107, the emitter 108, and the gate 109 of the IGBT 101 are configured to be electrically connectable to the outside of the power semiconductor module 106 via their respective terminals.

[0029] 2, a heat dissipation surface 111 is provided on the back surface of the power semiconductor module 106. The heat dissipation surface 111 is thermally connected to the IGBT 101 and the diode 102, and heat generated by the IGBT 101 and the diode 102 is dissipated to the outside through the heat dissipation surface 111.

[0030] 2, the power semiconductor module 106 has mounting holes 110, and can be attached and fixed to a cooling device such as a heat sink using fasteners such as screws and the mounting holes 110. This fixation allows the heat dissipation surface 111 to come into contact with the heat sink, so that heat generated by the IGBTs 101 and diodes 102 is transferred to the heat sink through the heat dissipation surface 111 and dissipated to the outside.

[0031] In this embodiment, an example is shown in which one power semiconductor module 106 is used per arm, but it is also possible to connect two or more power semiconductor modules 106 in parallel to one arm for purposes such as increasing the output capacity of the power conversion device.

[0032] The instantaneous current and effective current during discharge of the power conversion device 100 will be described with reference to FIGS. 3 and 4. FIG.

[0033] Figure 3 shows an example of an instantaneous current waveform 201 and an effective current waveform 202 of the outer arm when the power conversion device 100 is discharging, and Figure 4 shows an example of an instantaneous current waveform 203 and an effective current waveform 204 of the inner arm when the power conversion device 100 is discharging.

[0034] 3 shows the current flowing through the IGBT 101a during operation in the discharge mode, and it can be seen that the on-time of the IGBT 101a is long in the region where the instantaneous current value 201 is relatively large. Therefore, the effective current value 202, which is expressed as the product of the on-duty of the IGBT 101a (on-time per carrier period) and the instantaneous current value 201, becomes large in the region where the instantaneous current value is large.

[0035] On the other hand, Figure 4 shows the current flowing through IGBT 101d, which switches in pairs with IGBT 101a (turns off when IGBT 101a turns on, and turns on when IGBT 101a turns off). In this figure, the on time of IGBT 101d is long in the region where the instantaneous current value 203 is relatively small, and the effective current value 204 is small overall.

[0036] Therefore, the effective current value for one AC cycle is larger in the former (IGBT 101a) than in the latter (IGBT 101d).

[0037] There is a similar deviation in the effective current values ​​of the IGBT 101b and the IGBT 101c which switches in pairs with the IGBT 101b.

[0038] As a result of this imbalance in the effective current value, in the discharge mode of a T-type three-level power converter, the loss in the inner arm is smaller than the loss in the outer arm. On the other hand, in the charge mode, in which power is sent from the AC side to the DC side, the effective current value and loss in the inner arm are larger than those in the outer arm. The magnitude relationship between the loss in the outer arm and the loss in the inner arm is reversed between the charge mode and the discharge mode.

[0039] In other words, the power conversion device 100 has an operating method in which the amount of current flowing in the outer arm is greater than the amount of current flowing in the inner arm, and an operating method in which the amount of current flowing in the outer arm is smaller than the amount of current flowing in the inner arm.

[0040] Figure 5 shows an example of calculation of losses in the outer and inner arms in discharge mode for a T-type three-level power converter. As shown in Figure 5, the outer arm has larger losses than the inner arm, and in this example, the difference is about 1.5 times.

[0041] Figure 6 shows an example of calculation of losses in the outer and inner arms in the charging mode of a T-type three-level power converter. As shown in Figure 6, the inner arm has larger losses than the outer arm, and in this example, the difference is about 1.5 times.

[0042] To deal with such losses, the inner arm must be equipped with a heat sink that takes into account the losses during charging, when the greatest losses occur. On the other hand, the outer arm must be equipped with a heat sink that takes into account the losses during discharging. However, in operating modes with small losses, the heat sink's performance becomes excessive, which poses a problem of increasing the size of the power conversion device.

[0043] Therefore, in this embodiment, the power conversion device 100 is implemented in a configuration as shown in FIG.

[0044] FIG. 7 is a diagram showing an example of how the power semiconductor module 106 and the heat sink 115 are mounted in the power conversion device 100. As shown in FIG.

[0045] 7, a device block 114a is configured by closely arranging a power semiconductor module 106a, which is one outer arm, and a power semiconductor module 106c, which is one inner arm, in one pair. Furthermore, a device block 114b is configured by closely arranging a power semiconductor module 106b, which is another outer arm, and a power semiconductor module 106d, which is another inner arm, in one pair.

[0046] In device block 114a, the distance between power semiconductor module 106a constituting the outer arm and power semiconductor module 106c constituting the inner arm is defined as α. Also, in device block 114b, the distance between power semiconductor module 106b constituting the outer arm and power semiconductor module 106d constituting the inner arm is defined as α. Furthermore, when the distance between device blocks 114a and 114b is defined as β, the distance β is configured to be greater than the distance α (β>α).

[0047] 7, a total of four power semiconductor modules 106a to 106d are arranged in a line on a printed circuit board 105, linearly spaced apart by distances α and β, and the four power semiconductor modules 106a to 106d are connected to a single heat sink 115 for heat dissipation. Cooling air 116 flows parallel to the heat sink 115, dissipating heat from the heat sink 115 to the outside. The power semiconductor modules 106a to 106d are also arranged in a substantially linear fashion with respect to the heat sink 115 in the order of semiconductor module 106a, semiconductor module 106c, semiconductor module 106d, and semiconductor module 106b.

[0048] Each of the device blocks 114a, 114b is configured as a set of an outer arm and an inner arm arranged closely together, so that the total loss within each device block is such that the imbalance between the loss during charging and the loss during discharging is smaller than when the outer arm and the inner arm are each separate.

[0049] Furthermore, because the distance β between the device blocks 114a and 114b is set larger than the distance α within each device block, thermal interference is smaller between the device blocks than within each device block (between the outer arm and the inner arm). For example, during charging, the fin thermal resistance of the inner arm is reduced compared to when α = β or α > β, thereby suppressing temperature rise. On the other hand, for the outer arm, the fin thermal resistance appears to increase because thermal interference from the inner arm is greater than when α = β or α > β.

[0050] FIG. 8 shows example calculation results of temperature rise using a thermal fluid simulation during charging when the loss in the inner arm is larger than the loss in the outer arm in the cases of α>β and α<β (the configuration of FIG. 7).

[0051] The temperature rise of the inner arms (power semiconductor modules 106c, 106d) was smaller when α<β than when α>β, while the temperature rise of the outer arms (power semiconductor modules 106a, 106b) was larger when α<β than when α>β.

[0052] Therefore, by making α<β (the configuration of Figure 7), the difference between the temperature rise of the outer arm and the temperature rise of the inner arm is reduced, and the maximum temperature rise can be suppressed, which has the effect of improving the utilization efficiency of the heat sink.

[0053] As described above, the power conversion device 100 of this embodiment includes a power conversion unit having the first semiconductor module 106a and the fourth semiconductor module 106b, which pass approximately the same amount of current during operation, and the second semiconductor module 106c and the third semiconductor module 106d, which pass approximately the same amount of current during operation, and a cooling body (heat sink 115) on which the first semiconductor module 106a, the second semiconductor module 106c, the third semiconductor module 106d, and the fourth semiconductor module 106b are arranged, and is configured so that the third thermal interference between the second semiconductor module 106c and the third semiconductor module 106d is smaller than the first thermal interference between the first semiconductor module 106a and the second semiconductor module 106c and the second thermal interference between the third semiconductor module 106d and the fourth semiconductor module 106b.

[0054] This makes it possible to equalize the thermal interference between the power semiconductor modules 106 during charging and discharging of the power conversion device 100. As a result, it is possible to suppress the maximum temperature rise that accompanies power conversion, which contributes to the miniaturization of cooling devices such as the heat sink 115, as well as the miniaturization of the power conversion device 100 including the cooling device.

[0055] Second Embodiment A power conversion device according to a second embodiment of the present invention will be described with reference to FIG.

[0056] FIG. 9 is a diagram showing an example of mounting the power semiconductor module 106 and the heat sink 115 in the power converter 100 of this embodiment.

[0057] 9, in the power conversion device 100 of this embodiment, the power semiconductor modules 106a to 106d are arranged at equal distances (equal intervals) in the order of outer arm, inner arm, inner arm, outer arm. The heat sink 115 also includes a high cooling performance region 301 in which heat dissipation fins are densely arranged to enhance cooling capacity, and a low cooling performance region 302 in which the heat dissipation fins are sparsely arranged compared to region 301.

[0058] The high cooling performance area 301 is disposed between the device block 114a and the other device block 114b, and the low cooling performance area 302 is disposed within each of the device blocks 114a and 114b.

[0059] In other words, the heat sink 115 has a larger number of heat dissipation fins arranged between semiconductor module 106c and semiconductor module 106d (five in FIG. 9 ) than the number of heat dissipation fins arranged between semiconductor module 106a and semiconductor module 106c (two in FIG. 9 ) and the number of heat dissipation fins arranged between semiconductor module 106d and semiconductor module 106b (two in FIG. 9 ).

[0060] By adopting such an arrangement, thermal interference between device blocks 114a, 114b can be suppressed more than thermal interference within each device block 114a, 114b, so as in Example 1, the difference between the temperature rise of the outer arm and the temperature rise of the inner arm is reduced, and the maximum temperature rise can be suppressed.

[0061] Third Embodiment A power conversion device according to a third embodiment of the present invention will be described with reference to FIG.

[0062] FIG. 10 is a diagram showing an example of mounting the power semiconductor module 106 and the heat sink 115 in the power converter 100 of this embodiment.

[0063] 10 , the power conversion device 100 of this embodiment includes a heat sink 115 configured such that a heat dissipation fin 402 is sandwiched between two heat dissipation bases 401. A device block 114a is placed on one of the heat dissipation bases 401, and a device block 114b is placed on the other heat dissipation base 401.

[0064] The cooling air 116 flows through the heat sink 115 between the device blocks 114a and 114b, thereby suppressing thermal interference between the device blocks 114a and 114b.

[0065] The present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations.

[0066] 100... power conversion device, 101, 101a, 101b, 101c, 101d... IGBT, 102, 102a, 102b, 102c, 102d... diode, 103... power system, 104... storage battery, 105... printed circuit board, 106, 106a, 106b, 106c, 106d... power semiconductor module, 107... collector (terminal), 108... emitter (terminal), 109... gate (terminal), 110...mounting hole, 111...heat dissipation surface, 112...gate drive circuit, 113...gate drive signal, 114, 114a, 114b...device block, 115...heat sink, 116...cooling air, 201, 203...instantaneous current value (waveform), 202, 204...effective current value (waveform), 301...high cooling performance area, 302...low cooling performance area, 401...heat dissipation base, 402...heat dissipation fins.

Claims

1. A power conversion device comprising: a first semiconductor module and a fourth semiconductor module through which substantially equal currents pass during operation, and a second semiconductor module and a third semiconductor module through which substantially equal currents pass during operation; a cooling body on which the first semiconductor module, the second semiconductor module, the third semiconductor module, and the fourth semiconductor module are arranged; wherein a third thermal interference between the second semiconductor module and the third semiconductor module is smaller than a first thermal interference between the first semiconductor module and the second semiconductor module and a second thermal interference between the third semiconductor module and the fourth semiconductor module.

2. The power conversion device according to claim 1, wherein the first semiconductor module, the second semiconductor module, the third semiconductor module, and the fourth semiconductor module are arranged substantially linearly on the cooling body in this order.

3. The power conversion device according to claim 1, wherein the first semiconductor module and the fourth semiconductor module function as outer arms of the power conversion device, and the second semiconductor module and the third semiconductor module function as inner arms of the power conversion device.

4. The power conversion device according to claim 1, wherein a third distance between the second semiconductor module and the third semiconductor module is larger than a first distance between the first semiconductor module and the second semiconductor module and a second distance between the third semiconductor module and the fourth semiconductor module.

5. The power conversion device according to claim 1, having: a first operation method in which the current flowing through the first semiconductor module and the fourth semiconductor module is larger than the current flowing through the second semiconductor module and the third semiconductor module; and a second operation method in which the current flowing through the first semiconductor module and the fourth semiconductor module is smaller than the current flowing through the second semiconductor module and the third semiconductor module.

6. The power conversion device according to claim 1, wherein the cooling body has higher cooling performance between the second semiconductor module and the third semiconductor module than the cooling performance between the first semiconductor module and the second semiconductor module and the cooling performance between the third semiconductor module and the fourth semiconductor module.

7. The power conversion device according to claim 6, wherein the cooling body has a larger number of heat dissipation fins arranged between the second semiconductor module and the third semiconductor module than the number of heat dissipation fins arranged between the first semiconductor module and the second semiconductor module and the number of heat dissipation fins arranged between the third semiconductor module and the fourth semiconductor module.

8. The power conversion device according to claim 1, comprising: a first heat dissipation base on which the first semiconductor module and the second semiconductor module are arranged; a second heat dissipation base on which the third semiconductor module and the fourth semiconductor module are arranged; and heat dissipation fins arranged between the first heat dissipation base and the second heat dissipation base.

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