Semiconductor device

The semiconductor device enhances reliability by using a second bonding material with higher wettability and a bus bar opening structure to improve bonding strength and reduce cracking, addressing the issues of poor solder wettability and bubble formation.

WO2025154363A1PCT designated stage expired Publication Date: 2025-07-24SUMITOMO ELECTRIC INDUSTRIES LTD
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Patent Information

Application Number
PCT/JP2024/039226
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-19
Filing Date
2024-11-05
Publication Date
2025-07-24

AI Technical Summary

Technical Problem

The poor wettability of solder to the substrate in semiconductor devices leads to reduced joining strength, bubble formation, and potential cracking, compromising the reliability and long-term stability of the device.

Method used

A semiconductor device design that uses a second bonding material with higher wettability to the insulating substrate than the first bonding material to join the bus bar and substrate, combined with a bus bar opening and groove structure to enhance bonding strength and reduce bubble formation, using materials like silver brazing for the second bonding material.

Benefits of technology

The design improves the reliability and long-term stability of the semiconductor device by increasing bonding strength and reducing the risk of cracks and bubble-related damage.

✦ Generated by Eureka AI based on patent content.

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Abstract

This semiconductor device comprises: an insulating substrate; an electrode plate provided on the insulating substrate; a bus bar joined to the electrode plate; a semiconductor chip placed on the bus bar; a first joining material that joins the electrode plate and the semiconductor chip; and a second joining material that exhibits higher wettability with respect to the insulating substrate than the first joining material and that joins the electrode plate and the insulating substrate. The second joining material is disposed on the insulating substrate, in at least a portion of the periphery of the electrode plate. The bus bar and the insulating substrate are joined by the first joining material via the second joining material.
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Description

Semiconductor Devices

[0001] This disclosure relates to a semiconductor device. This application claims priority to Japanese Application No. 2024-6760, filed on January 19, 2024, and incorporates by reference all of the contents of said Japanese application.

[0002] A technique relating to a semiconductor module has been disclosed (see, for example, Patent Document 1). The semiconductor module disclosed in Patent Document 1 includes a substrate, leads provided on the substrate, and a semiconductor element mounted on the leads.

[0003] WO2017 / 122491

[0004] A semiconductor device according to the present disclosure includes an insulating substrate, an electrode plate provided on the insulating substrate, a bus bar joined to the electrode plate, a semiconductor chip mounted on the bus bar, a first bonding material bonding the electrode plate to the semiconductor chip, and a second bonding material having higher wettability with respect to the insulating substrate than the first bonding material and bonding the electrode plate to the insulating substrate. The second bonding material is disposed on the insulating substrate and at least partially around the electrode plate. The bus bar and the insulating substrate are bonded to each other by the first bonding material via the second bonding material.

[0005] FIG. 1 is a schematic cross-sectional view of a semiconductor device in a first embodiment. FIG. 2 is a schematic plan view of a bus bar included in the semiconductor device shown in FIG. 1. FIG. 3 is a schematic side view of the bus bar included in the semiconductor device shown in FIG. 1. FIG. 4 is a schematic perspective view showing a bus bar included in the semiconductor device and its peripheral structure. FIG. 5 is a schematic cross-sectional view showing the bus bar shown in FIG. 4 and part of its peripheral structure. FIG. 6 is a schematic cross-sectional view showing the bus bar shown in FIG. 4 and part of its peripheral structure.

[0006] [Problem to be Solved by the Present Disclosure] According to Patent Document 1, a bus bar, called a lead, is provided with an opening smaller than the semiconductor element, and a conductive bonding material, such as solder, is inserted into the opening to electrically bond the semiconductor element to a pad electrode disposed on a substrate via the solder. In this case, the bus bar and substrate are also bonded using solder. However, solder has poor wettability to the substrate, which reduces the bond strength of the bus bar to the substrate. Furthermore, poor wettability can leave air bubbles beneath the solder. When the temperature rises, the air bubbles expand, damaging the solder and potentially causing cracks. Under these circumstances, stable long-term use becomes difficult, resulting in a loss of reliability as a semiconductor device.

[0007] Therefore, one object is to provide a semiconductor device that can improve reliability.

[0008] [Effects of the Present Disclosure] According to such a semiconductor device, it is possible to improve reliability.

[0009] [Description of Embodiments of the Present Disclosure] (1) A semiconductor device according to the present disclosure includes an insulating substrate, an electrode plate provided on the insulating substrate, a bus bar joined to the electrode plate, a semiconductor chip mounted on the bus bar, a first bonding material bonding the electrode plate to the semiconductor chip, and a second bonding material having higher wettability with respect to the insulating substrate than the first bonding material and bonding the electrode plate to the insulating substrate. The second bonding material is disposed on the insulating substrate and at least partially around the electrode plate. The bus bar and the insulating substrate are bonded by the first bonding material via the second bonding material.

[0010] In the semiconductor device, the bus bar and the insulating substrate are bonded by the first bonding material via the second bonding material. Because the second bonding material has higher wettability with respect to the insulating substrate than the first bonding material, the first and second bonding materials can increase the bonding strength between the bus bar and the insulating substrate. Furthermore, the risk of air bubbles remaining below the first bonding material can be reduced. This reduces damage to the first bonding material caused by the presence of air bubbles during temperature rise. Therefore, the semiconductor device can be used stably for a long period of time. As a result, the reliability of the semiconductor device can be improved.

[0011] (2) In the above (1), a plating may be disposed on the surface of the second bonding material. This can further increase the bonding strength between the first bonding material and the second bonding material. Therefore, reliability can be further improved.

[0012] (3) In the above (1) or (2), the bus bar may have an opening penetrating the semiconductor chip in the thickness direction. By doing so, the first bonding material can be disposed in the opening, thereby reducing the interface between the first bonding material and the sealing resin. This reduces the risk of cracks occurring in the first bonding material. Furthermore, the first bonding material can be reliably positioned. Therefore, the bus bar and the insulating substrate can be more reliably bonded. Therefore, long-term use can be more reliably achieved, and reliability can be further improved.

[0013] (4) In the above (3), the size of the opening may be larger than the electrode plate but smaller than the semiconductor chip. By doing so, the opening can be filled with the first bonding material while the electrode plate is placed inside the opening, thereby bonding the electrode plate and the semiconductor chip. In this case, the interface where the first bonding material contacts the sealing resin can be more reliably reduced. Therefore, the risk of cracks occurring in the first bonding material can be reliably reduced.

[0014] (5) A semiconductor device according to the present disclosure includes an insulating substrate, an electrode plate provided on the insulating substrate, a bus bar joined to the electrode plate, a semiconductor chip mounted on the bus bar, and a sealing resin that seals at least a portion of the insulating substrate, a portion of the bus bar, and the semiconductor chip. The bus bar has an opening that is larger than the electrode plate but smaller than the semiconductor chip when viewed in the thickness direction of the semiconductor chip. The bus bar is provided on the insulating substrate so that the electrode plate fits into the opening. A first bonding material is filled into the opening. The semiconductor chip is mounted on the bus bar so as to cover the opening. The semiconductor device further includes a second bonding material that has higher wettability with the insulating substrate than the first bonding material and bonds the electrode plate to the insulating substrate. The second bonding material is disposed on the insulating substrate around at least a portion of the periphery of the electrode plate. The bus bar and the insulating substrate are bonded by the first bonding material via the second bonding material.

[0015] Such a semiconductor device can be used stably for a long period of time, and therefore the reliability of the semiconductor device can be improved.

[0016] (6) In any of the above (1) to (5), the bus bar may be recessed in a region facing the insulating substrate and provided with a groove extending from the outer surface to the opening. This allows the first bonding material to flow more easily into the opening by utilizing the groove. This improves productivity and reduces the risk of air bubbles remaining.

[0017] (7) In any of the above (1) to (6), the distance between the outer edge of the electrode plate and the outer edge of the second bonding material may be 0.5 mm or more when viewed in a direction perpendicular to the thickness direction of the semiconductor chip and in the direction in which the groove extends. This reduces the risk of bonding between the first bonding material and the insulating substrate without the second bonding material, even if the bonding area of ​​the first bonding material expands in the direction in which the groove extends. Therefore, the bus bar and the insulating substrate can be more reliably bonded.

[0018] (8) In any of the above (1) to (7), the distance between the outer edge of the electrode plate and the outer edge of the second bonding material may be 0.5 mm or more when viewed in a direction perpendicular to the thickness direction of the semiconductor chip and perpendicular to the direction in which the groove extends. This reduces the risk of the first bonding material and the insulating substrate being bonded without the second bonding material even if the bonding area of ​​the first bonding material expands in the direction perpendicular to the direction in which the groove extends. Therefore, the bus bar and the insulating substrate can be more reliably bonded.

[0019] (9) In any of the above (1) to (8), the first bonding material may be solder. The second bonding material may be silver brazing material. Such first bonding material and second bonding material are preferably used when bonding a bus bar and an insulating substrate in a semiconductor device.

[0020] [Details of the Embodiments of the Present Disclosure] Next, embodiments of the semiconductor device of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference characters, and description thereof will not be repeated.

[0021] (Embodiment 1) A semiconductor device according to embodiment 1 of the present disclosure will be described. FIG. 1 is a schematic cross-sectional view of the semiconductor device according to embodiment 1. FIG. 2 is a schematic plan view of a bus bar (described later) included in the semiconductor device shown in FIG. 1. FIG. 3 is a schematic side view of the bus bar (described later) included in the semiconductor device shown in FIG. 1. In FIG. 1 and subsequent drawings, the direction indicated by arrow Z indicates the thickness direction of a semiconductor chip (described later), the direction indicated by arrow X indicates the extension direction of a bus bar (described later), and the direction indicated by arrow Y indicates the width direction of the bus bar. The directions indicated by arrow X, arrow Y, and arrow Z are all orthogonal to each other. FIG. 1 is a cross-sectional view taken along the X-Z plane including the bus bar. FIG. 3 is a view seen from the direction indicated by arrow III in FIG. 2.

[0022] 1, 2, and 3, semiconductor device 10a according to the first embodiment includes substrate 11a, electrode plates 12a, 12b, and 12c, bus bars 13a and 13b, semiconductor chip 14a, first bonding material 15a, second bonding material 16a, and sealing resin 17a. Substrate 11a includes insulating substrate 21a and metal plate 22a that functions as a heat sink. Insulating substrate 21a and metal plate 22a are stacked. In other words, substrate 11a has a structure in which insulating substrate 21a and metal plate 22a are stacked. Semiconductor device 10a may further include other electrode plates, semiconductor chips, bus bars, etc.

[0023] The electrode plates 12a, 12b, and 12c are provided on the insulating substrate 21a via second bonding materials 16a, 16b, and 16c, respectively. The electrode plates 12a, 12b, and 12c are bonded to the insulating substrate 21a by the second bonding materials 16a, 16b, and 16c, respectively. In this embodiment, the electrode plates 12a, 12b, and 12c are spaced apart from each other. The surfaces of the second bonding materials 16a, 16b, and 16c are plated. That is, the surfaces of the second bonding materials 16a, 16b, and 16c are plated. In this embodiment, the entire surface of the second bonding material 16c is plated. The second bonding materials 16a, 16b, and 16c are made of a material that has higher wettability with respect to the insulating substrate 21a than the first bonding material 15a, such as a silver brazing material. In this embodiment, the second bonding materials 16a, 16b, and 16c are silver brazing materials.

[0024] The second bonding material 16a is disposed on the insulating substrate 21a and around the electrode plate 12a. In this embodiment, the area of ​​the second bonding material 16a is configured to be larger than the area of ​​the electrode plate 12a when viewed in the Z direction. That is, in this embodiment, the second bonding material 16a is disposed between the electrode plate 12a and the insulating substrate 21a and around the electrode plate 12a when viewed in the thickness direction of the semiconductor chip 14a.

[0025] Busbar 13a and busbar 13b each have a shape formed by bending a strip-shaped metal plate. Busbar 13a is joined to electrode plate 12a. Busbar 13b is electrically connected to electrode plate 12c. Busbar 13b is electrically connected to electrode plate 12c by wire 19a. The structure of busbar 13a will be described in detail later.

[0026] The semiconductor chip 14a is placed on the bus bar 13a. The semiconductor chip 14a may be, for example, a transistor, specifically a vertical transistor such as a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor). Note that the semiconductor chip 14a may also be a diode, specifically, for example, an SBD (Schottky Barrier Diode). In this embodiment, the semiconductor chip 14a has a rectangular shape when viewed in the thickness direction (Z direction). The semiconductor chip 14a is bonded to the electrode plate 12a by a first bonding material 15a. That is, the first bonding material 15a bonds the electrode plate 12a and the semiconductor chip 14a. The first bonding material 15a may be, for example, solder. In this embodiment, the first bonding material 15a is solder.

[0027] The sealing resin 17a seals a portion of the insulating substrate 21a, the bus bars 13a and 13b, and the semiconductor chip 14a. The sealing resin 17a is configured to cover the entire metal plate 22a, leaving one surface in the thickness direction of the metal plate 22a, specifically the surface on which the insulating substrate 21a is not disposed, and the tip sides of the bus bars 13a and 13b exposed. The sealing resin 17a may be, for example, a thermosetting resin, specifically an epoxy resin.

[0028] Here, the configuration of bus bar 13a and its surroundings will be described. Fig. 4 is a schematic perspective view showing bus bar 13a included in semiconductor device 10a and its surrounding structure. Figs. 5 and 6 are schematic cross-sectional views showing part of bus bar 13a and its surrounding structure shown in Fig. 4, respectively. Fig. 5 is a cross-sectional view taken along the X-Z plane. Fig. 6 is a cross-sectional view taken along line VI-VI parallel to the Y-Z plane in Fig. 5.

[0029] 4, 5, and 6, the busbar 13a includes a first region 31a that is completely covered by the sealing resin 17a, a second region 32a that is partially exposed from the sealing resin 17a, and a third region 33a that is a bent portion located between the first region 31a and the second region 32a. The third region 33a is inclined when viewed from the side. The busbar 13a has an opening 24a that penetrates the semiconductor chip 14a in the thickness direction (Z direction). The opening 24a has a rectangular shape and is provided in the second region 32a of the busbar 13a. The size of the opening 24a is larger than that of the electrode plate 12a and the semiconductor chip 14a.

[0030] The busbar 13a is recessed in a region facing the insulating substrate 21a and has grooves 25a extending from the outer surface to the opening 24a. The grooves 25a have a rectangular cross section and are provided so as to extend in the Y direction. A pair of grooves 25a is provided on each of a pair of side walls 26a, 26b included in the second region 32a that constitutes the opening 24a.

[0031] When viewed in a direction perpendicular to the thickness direction of the semiconductor chip 14a and in the direction in which the groove 25a extends (Y direction), the distance D between the outer edge 34a of the electrode plate 12a and the outer edge 35a of the second bonding material 16a is 1 In this embodiment, the distance D 1 In addition, when viewed in a direction (X direction) perpendicular to the thickness direction of the semiconductor chip 14a and perpendicular to the direction in which the groove 25a extends, the distance D between the outer edge 36a of the electrode plate 12a and the outer edge 37a of the second bonding material 16a is 3 mm or more. 2 In this embodiment, the distance D 2 is 3 mm or more.

[0032] The first bonding material 15a fills the opening 24a, and the bus bar 13a and the insulating substrate 21a are bonded to each other by the first bonding material 15a with the second bonding material 16a interposed therebetween.

[0033] An example of a manufacturing method for the semiconductor device 10a having the above configuration is briefly described below. First, a substrate 11a is prepared, in which an insulating substrate 21a and a metal plate 22a are laminated. Then, a second bonding material 16a is screen-printed on the insulating substrate 21a to form patterns of electrode plates 12a, 12b, and 12c. Then, a metal plate, e.g., a copper plate, that will later become electrode plates 12a, 12b, and 12c is bonded by active metal bonding. Resist pattern printing and copper etching are then performed to form electrode plates 12a, 12b, and 12c on the second bonding material 16a. Then, a plating process is performed. Next, a bus bar 13a is positioned so that the electrode plate 12a is positioned within the opening 24a, and the opening 24a is filled with a first bonding material 15a. Then, a semiconductor chip 14a is placed so as to cover the opening 24a of the bus bar 13a. Before or after this process, the electrode plate 12c and the bus bar 13b are electrically connected by wire 19a using wire bonding. Then, the first bonding material 15a is melted by heating, and the bus bar 13a and the insulating substrate 21a are bonded by the first bonding material 15a. At this time, the melted first bonding material 15a flows out of the grooves 25a to some extent. The semiconductor chip 14a is then sealed with sealing resin 17a, thereby obtaining the semiconductor device 10a configured as described above.

[0034] In the semiconductor device 10a, the bus bar 13a and the insulating substrate 21a are bonded to each other by the first bonding material 15a via the second bonding material 16a. Because the second bonding material 16a has higher wettability with respect to the insulating substrate 21a than the first bonding material 15a, the first bonding material 15a and the second bonding material 16a can increase the bonding strength between the bus bar 13a and the insulating substrate 21a. This also reduces the risk of air bubbles remaining beneath the first bonding material 15a. This reduces damage to the first bonding material 15a caused by the presence of air bubbles during temperature rise. Therefore, the semiconductor device 10a can be used stably for a long period of time. As described above, the semiconductor device 10a can achieve improved reliability.

[0035] In this embodiment, plating is provided on the surface of the second bonding material 16a, which can further increase the bonding strength between the first bonding material 15a and the second bonding material 16a, thereby further improving reliability.

[0036] In this embodiment, the bus bar 13a has an opening 24a penetrating through the semiconductor chip 14a in the thickness direction. Therefore, by disposing the first bonding material 15a within the opening 24a, the interface between the first bonding material 15a and the sealing resin 17a can be reduced. This reduces the risk of cracks occurring in the first bonding material 15a. Furthermore, the first bonding material 15a can be reliably positioned. Therefore, the bus bar 13a and the insulating substrate 21a can be more reliably bonded. This allows for more reliable long-term use and improved reliability.

[0037] In this embodiment, the size of the opening 24a is larger than the electrode plate 12a but smaller than the semiconductor chip 14a. Therefore, with the electrode plate 12a accommodated in the opening 24a, the opening 24a can be filled with the first bonding material 15a to bond the electrode plate 12a and the semiconductor chip 14a. In this case, the interface where the first bonding material 15a contacts the sealing resin 17a can be more reliably reduced. Therefore, the risk of cracks occurring in the first bonding material 15a can be reliably reduced.

[0038] In this embodiment, the busbar 13a is recessed in a region facing the insulating substrate 21a and has a groove 25a extending from the outer surface to the opening 24a. This allows the first bonding material 15a to flow more easily into the opening 24a by utilizing the groove 25a. This improves productivity and reduces the risk of air bubbles remaining.

[0039] In this embodiment, when viewed in a direction perpendicular to the thickness direction of the semiconductor chip 14a and in the direction in which the groove portion 25a extends, the distance D between the outer edge 34a of the electrode plate 12a and the outer edge 35a of the second bonding material 16a is 1 is 0.5 mm or more. Therefore, even if the bonding area of ​​the first bonding material 15a expands in the extending direction of the groove portion 25a, it is possible to reduce the risk of bonding between the first bonding material 15a and the insulating substrate 21a without the second bonding material 16a. Therefore, it is possible to more reliably bond the bus bar 13a and the insulating substrate 21a.

[0040] In this embodiment, when viewed in a direction perpendicular to the thickness direction of the semiconductor chip 14a and perpendicular to the direction in which the groove 25a extends, the distance D between the outer edge 36a of the electrode plate 12a and the outer edge 37a of the second bonding material 16a is 2 is 0.5 mm or more. Therefore, even if the bonding area of ​​the first bonding material 15a expands in the direction perpendicular to the extension direction of the groove portion 25a, it is possible to reduce the risk of bonding between the first bonding material 15a and the insulating substrate 21a without the second bonding material 16a. Therefore, it is possible to more reliably bond the bus bar 13a and the insulating substrate 21a.

[0041] The semiconductor device according to the present disclosure includes an insulating substrate, an electrode plate provided on the insulating substrate, a bus bar joined to the electrode plate, a semiconductor chip mounted on the bus bar, and a sealing resin that seals at least a portion of the insulating substrate, a portion of the bus bar, and the semiconductor chip. The bus bar has an opening that is larger than the electrode plate but smaller than the semiconductor chip when viewed in the thickness direction of the semiconductor chip. The bus bar is provided on the insulating substrate so that the electrode plate fits into the opening. A first bonding material is filled into the opening. The semiconductor chip is mounted on the bus bar so as to cover the opening. The semiconductor device further includes a second bonding material that has higher wettability with the insulating substrate than the first bonding material and bonds the electrode plate to the insulating substrate. The second bonding material is disposed on the insulating substrate around at least a portion of the periphery of the electrode plate. The bus bar and the insulating substrate are bonded by the first bonding material via the second bonding material.

[0042] Such a semiconductor device can be used stably for a long period of time, and therefore the reliability of the semiconductor device can be improved.

[0043] In this embodiment, the first bonding material 15a is solder, and the second bonding material 16a is silver brazing material. Such first bonding material 15a and second bonding material 16a are preferably used when bonding the bus bar 13a and the insulating substrate 21a in the semiconductor device 10a.

[0044] While the above embodiment uses solder as the first bonding material and silver brazing material as the second bonding material, the present invention is not limited to this. Alternatively, the second bonding material may be a material that has higher wettability with respect to the insulating substrate than solder, such as silver brazing material. Furthermore, a material other than solder, such as nano-silver paste, may be used as the first bonding material.

[0045] In the above embodiment, the bus bar is provided with a single rectangular opening, but this is not limiting and a simple notch may be used. Alternatively, a plurality of openings may be arranged side by side. In this case, the plurality of openings may each be elongated holes extending in the direction of extension of the bus bar. Alternatively, a plurality of comb-like notches may be provided. Alternatively, no opening may be provided. Alternatively, no groove may be provided.

[0046] It should be understood that the embodiments disclosed herein are illustrative in all respects and are not limiting in any respect. The scope of the present invention is defined not by the above description but by the claims, and it is intended to include all modifications within the meaning and scope of the claims.

[0047] 10a semiconductor device, 11a substrate, 12a, 12b, 12c electrode plate, 13a, 13b bus bar, 14a semiconductor chip, 15a first bonding material, 16a, 16b, 16c second bonding material, 17a sealing resin, 19a wire, 21a insulating substrate, 22a metal plate, 24a opening, 25a groove portion, 26a, 26b side wall portion, 31a first region, 32a second region, 33a third region, 34a, 35a, 36a, 37a outer edge, D 1 , D 2 distance.

Claims

1. An insulating substrate, an electrode plate provided on the insulating substrate, a bus bar joined to the electrode plate, a semiconductor chip placed on the bus bar, a first bonding material for joining the electrode plate and the semiconductor chip, and a second bonding material having a higher wettability with respect to the insulating substrate than the first bonding material and for joining the electrode plate and the insulating substrate, wherein the second bonding material is disposed on at least a part of the periphery of the electrode plate on the insulating substrate, and the bus bar and the insulating substrate are joined by the first bonding material via the second bonding material. A semiconductor device.

2. The semiconductor device according to claim 1, having plating disposed on the surface of the second bonding material.

3. The semiconductor device according to claim 1 or claim 2, wherein the bus bar is disposed at a position overlapping the semiconductor chip when viewed in the thickness direction of the semiconductor chip, and an opening penetrating in the thickness direction of the semiconductor chip is provided.

4. The semiconductor device according to claim 3, wherein the size of the opening is larger than the electrode plate and smaller than the semiconductor chip.

5. An insulating substrate, an electrode plate provided on the insulating substrate, a bus bar joined to the electrode plate, a semiconductor chip placed on the bus bar, and a sealing resin for sealing at least a part of the insulating substrate, a part of the bus bar, and the semiconductor chip, wherein the bus bar is provided with an opening that is larger than the electrode plate and smaller than the semiconductor chip when viewed in the thickness direction of the semiconductor chip, the bus bar is provided on the insulating substrate such that the electrode plate fits into the opening, the opening is filled with a first bonding material, the semiconductor chip is placed on the bus bar so as to cover the opening, further comprising a second bonding material having a higher wettability with respect to the insulating substrate than the first bonding material and for joining the electrode plate and the insulating substrate, wherein the second bonding material is disposed on at least a part of the periphery of the electrode plate on the insulating substrate, and the bus bar and the insulating substrate are joined by the first bonding material via the second bonding material. A semiconductor device.

6. The semiconductor device according to any one of claims 3 to 5, wherein the bus bar has a recess in a region facing the insulating substrate and a groove portion extending from the outer surface to the opening.

7. The semiconductor device according to claim 6, wherein a distance between an outer edge of the electrode plate and an outer edge of the second bonding material is 0.5 mm or more when viewed in a direction perpendicular to a thickness direction of the semiconductor chip and from a direction in which the groove portion extends.

8. The semiconductor device according to claim 6, wherein a distance between an outer edge of the electrode plate and an outer edge of the second bonding material is 0.5 mm or more when viewed in a direction perpendicular to a direction perpendicular to a thickness direction of the semiconductor chip and from a direction in which the groove portion extends.

9. The semiconductor device according to any one of claims 1 to 8, wherein the first bonding material is solder and the second bonding material is a silver brazing material.

Citation Information

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