Semiconductor device

The semiconductor device addresses electrical stability issues by using a joining member with conductive and heat conduction portions to maintain the same potential between the heat sink and cooling module, preventing corona discharge and enhancing reliability.

WO2025154399A1PCT designated stage expired Publication Date: 2025-07-24FUJI ELECTRIC CO LTD
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Patent Information

Application Number
PCT/JP2024/041777
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-17
Filing Date
2024-11-26
Publication Date
2025-07-24

AI Technical Summary

Technical Problem

Existing semiconductor devices face issues with electrical stability due to potential differences between the heat sink and cooling module, leading to corona discharge and reduced reliability.

Method used

A semiconductor device design incorporating a joining member with a heat conduction portion and a conductive portion that connects the heat dissipation surface of the heat sink to the cooling surface, ensuring both are at the same potential, using materials like epoxy resin and conductive fillers such as silver, copper, or alloys to prevent corona discharge.

Benefits of technology

The design enhances electrical stability by preventing corona discharge, maintaining reliability, and ensuring effective heat dissipation and electrical connectivity between the heat sink and cooling module.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a semiconductor device that is electrically stable. A semiconductor device (1) includes: a heat dissipation plate (22) including a heat dissipation surface (22a); a cooling module (3) including a cooling surface (3a) on which the heat dissipation surface (22a) of the heat dissipation plate (22) is disposed; and a bonding member (4) provided between the heat dissipation surface (22a) and the cooling surface (3a). The bonding member (4) includes: a heat conduction portion (4a) that bonds the heat dissipation surface (22a) and the cooling surface (3a); and a conductive portion (4b) that is directly connected to the heat dissipation plate (22) and the cooling surface (3a), respectively. Therefore, the heat dissipation plate (22) and the cooling module (3) can have the same potential.
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Description

Semiconductor Devices

[0001] The present invention relates to a semiconductor device.

[0002] The semiconductor device includes a laminated substrate in which a metal plate, an insulating layer, and a conductive plate are stacked in this order from bottom to top, and a semiconductor chip disposed on the conductive plate. The semiconductor device further includes a heat sink on which the laminated substrate is disposed, a case disposed on the heat sink to house the laminated substrate and the semiconductor chip, and screws for fastening the case to the heat sink. The screws and the metal plate are connected by a conductive connecting member (see, for example, Patent Documents 1, 2, and 3).

[0003] In another semiconductor device, a conductive plate is placed on the back side of a laminated substrate on a cooler via a thermal compound containing high-dielectric-constant particles with a relative dielectric constant of 10 or more, and the cooler is sealed with a sealing member (see, for example, Patent Document 4).

[0004] In another semiconductor device, a back electrode is bonded to the back surface of an insulating substrate with a brazing material and is placed on a metal base via solder. A solder resist is applied around the solder. In this case, the distance between the edge of the brazing material and the side surface of the insulating substrate is smaller than the distance between the edge of the solder resist on the solder side and the side surface of the insulating substrate (see, for example, Patent Document 5).

[0005] JP 2020-87966 A JP 2022-48552 A JP 2022-18033 A JP 2019-41013 A JP 2019-80014 A

[0006] An object of the present invention is to provide an electrically stable semiconductor device.

[0007] According to one aspect of the present invention, a semiconductor device is provided, comprising: a heat sink including a heat dissipation surface; a cooling module including a cooling surface on which the heat dissipation surface of the heat sink is arranged; and a joining member provided between the heat dissipation surface and the cooling surface, wherein the joining member includes a heat conductive portion joining the heat dissipation surface and the cooling surface, and a conductive portion directly connected to the heat sink and the cooling surface, respectively.

[0008] The heat conducting portion of the joining member has insulating properties and is bonded to the heat dissipation surface and the cooling surface. The heat conducting portion of the joining member is made of epoxy resin as a main component.

[0009] The conductive portion of the joining member is composed of the same main component as the heat-conducting portion and contains a conductive filler material, which is mainly composed of silver, copper, gold, nickel, chromium, aluminum, or an alloy containing at least one of these elements.

[0010] The conductive portion of the joining member is mainly composed of a conductive material, and the conductive material is any one of solder, metal particle paste, and conductive adhesive.

[0011] The metal particles constituting the metal particle paste are silver, copper, or an alloy containing either of these. The joining member has a shape that matches the heat dissipation surface of the heat dissipation plate in a plan view.

[0012] The joining member includes the conductive portion along the outer edge of the heat dissipation surface of the heat dissipation plate.The joining member includes the conductive portion along the annular shape continuous with the outer edge of the heat dissipation surface of the heat dissipation plate.

[0013] The heat dissipation surface of the heat dissipation plate has a rectangular shape in a plan view, and the joining member includes the conductive portion along an outer edge of the heat dissipation surface of the heat dissipation plate. The joining member also includes the heat conduction portion in an area excluding the conductive portion.

[0014] The bonding member includes the heat conduction portion and the conductive portion in contact with each other, the bonding member includes the heat conduction portion and the conductive portion with a gap therebetween, and the semiconductor module includes the heat sink and a sealing member that seals the heat sink and has the heat dissipation surface exposed from a sealing lower surface, and the bonding member has a shape that is wider than the heat dissipation surface of the heat sink in a plan view.

[0015] The joining member includes the conductive portion in a range that contacts the heat dissipation surface of the heat dissipation plate in a plan view.

[0016] In addition, the heat conduction portion of the joining member has a shape wider than the heat dissipation surface when viewed in a plane, and the conductive portion of the joining member connects the cooling surface and the side of the heat dissipation plate along the portion of the heat conduction portion that extends beyond the heat dissipation plate.

[0017] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions.

[0018] The disclosed technique makes the semiconductor device electrically stable. The above and other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings illustrating preferred embodiments of the present invention by way of example.

[0019] 1 is a side cross-sectional view of a semiconductor device according to a first embodiment; FIG. 2 is a plan view of a cooling surface of the semiconductor device according to the first embodiment; FIG. 3 is a flowchart showing a manufacturing method of a semiconductor device according to the first embodiment; FIG. 4 is a side cross-sectional view of a semiconductor module according to the first embodiment; FIG. 5 is a rear view of a semiconductor module according to the first embodiment; FIG. 6 is a view (part 1) for explaining a coating process according to the first embodiment; FIG. 7 is a view (part 2) for explaining a coating process according to the first embodiment; FIG. 8 is a view (part 3) for explaining a coating process according to the first embodiment; FIG. 9 is a view (part 4) for explaining a coating process according to the first embodiment; FIG. 10 is a side cross-sectional view of a semiconductor device according to a reference example; FIG. 11 is a plan view of a cooling surface of a semiconductor device according to a reference example; FIG. 12 is a side cross-sectional view of a semiconductor device according to a second embodiment; FIG. 13 is a plan view of a cooling surface of a semiconductor device according to the second embodiment; FIG. 14 is a view (part 1) for explaining a coating process according to a third embodiment; FIG. 15 is a view (part 2) for explaining a coating process according to the third embodiment; FIG. 16 is a side cross-sectional view of a semiconductor device according to the third embodiment; FIG. 10 is a plan view of a cooling surface of a semiconductor device of a fourth embodiment. FIG. 11 is a side cross-sectional view of a semiconductor device of a fifth embodiment. FIG. 12 is a back view of a semiconductor module of the fifth embodiment. FIG. 13 is a side cross-sectional view of a semiconductor device of a sixth embodiment. FIG. 14 is a back view of a semiconductor module of the sixth embodiment. FIG. 15 is a side view of a semiconductor device of the sixth embodiment. FIG. 16 is a diagram (part 1) for explaining a coating process of the sixth embodiment. FIG. 17 is a diagram (part 2) for explaining a coating process of the sixth embodiment. FIG. 18 is a diagram for explaining an attachment process of the sixth embodiment.

[0020] Hereinafter, embodiments will be described with reference to the drawings. In the following description, the terms "front surface" and "top surface" refer to the X-Y plane facing upward (+Z direction) in the semiconductor device 1 shown in the drawings. Similarly, "top" refers to the upward direction (+Z direction) in the semiconductor device shown in FIG. 1. The terms "back surface" and "bottom surface" refer to the X-Y plane facing downward (-Z direction) in the semiconductor device 1 shown in FIG. 1. Similarly, "bottom" refers to the downward direction (-Z direction) in the semiconductor device 1 shown in FIG. 1. As necessary, the same orientations as above will be used in all drawings. The terms "higher" and "upper" refer to the upper position (+Z direction) in the semiconductor device 1 shown in FIG. 1. Similarly, the terms "lower" and "lower" refer to the lower position (-Z direction) in the semiconductor device 1 shown in FIG. 1. The terms "front surface," "top surface," "top," "back surface," "bottom surface," "bottom," and "side surface" are merely convenient expressions for specifying relative positional relationships and do not limit the technical concept of the present invention. For example, "up" and "down" do not necessarily mean the vertical direction relative to the ground. In other words, the directions of "up" and "down" are not limited to the direction of gravity. In the following description, "main component" refers to a component containing 80 vol% or more. "Approximately the same" means that the difference is within a range of ±10%. "Perpendicular," "orthogonal," and "parallel" mean that the difference is within a range of ±10°.

[0021] [First embodiment] A semiconductor device 1 according to a first embodiment will be described with reference to Figures 1 and 2. Figure 1 is a side cross-sectional view of the semiconductor device according to the first embodiment. Figure 2 is a plan view of the cooling surface of the semiconductor device according to the first embodiment. Note that Figure 2 is a cross-sectional view of the semiconductor device 1 in Figure 1 taken along the X-Y plane indicated by the dashed dotted line. That is, Figure 2 is a plan view of the cooling surface 3a on which the joining members 4 of the cooling module 3 are provided. Figure 1 is a cross-section taken along the dashed dotted line I1-I1 in Figure 2, viewed in the +Y direction.

[0022] The semiconductor device 1 includes a semiconductor module 2, a cooling module 3, and a joining member 4 that fixes the semiconductor module 2 and the cooling module 3. The semiconductor device 1 may include other necessary components in addition to these.

[0023] The semiconductor module 2 includes semiconductor chips 10a, 10b, 10d, and 10e, an insulating circuit board 20, a printed circuit board 30, and a sealing member 35 that seals them. The semiconductor chips 10a, 10b, 10d, and 10e may be power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) primarily composed of silicon carbide. The body diode of the power MOSFET may function as a free-wheeling diode (FWD). Each of the semiconductor chips 10a, 10b, 10d, and 10e includes, for example, an input electrode (drain electrode) as a main electrode on the back surface and an output electrode (source electrode) and a control electrode (gate electrode) as main electrodes on the front surface. The control electrode may be located at the center of one edge of the front surface of the semiconductor chips 10a, 10b, 10d, and 10e or offset from the center along the edge.

[0024] The semiconductor chips 10a, 10b, 10d, and 10e may also include a switching element primarily made of silicon. The switching element is, for example, an RC (Reverse-Conducting)-IGBT (Insulated Gate Bipolar Transistor). The RC-IGBT is a semiconductor element in which an IGBT and an FWD are arranged in anti-parallel within a single chip.

[0025] Each of the semiconductor chips 10a, 10b, 10d, and 10e has an input electrode (collector electrode) as a main electrode on its back surface, and an output electrode (emitter electrode) and a control electrode (gate electrode) as main electrodes on its front surface. As in the case of a power MOSFET, the control electrode may be provided at the center of one side of the front surface of each of the semiconductor chips 10a, 10b, 10d, and 10e or offset from the center along the side.

[0026] The semiconductor chips 10a, 10b, 10d, and 10e may be semiconductor chips primarily made of silicon and each including a pair of switching elements and diode elements. Specifically, the semiconductor chips 10a and 10d may be switching elements, and the semiconductor chips 10b and 10e may be diode elements. The switching elements may be, for example, power MOSFETs or IGBTs. The semiconductor chips including the switching elements may have, for example, an input electrode (a drain electrode in a power MOSFET or a collector electrode in an IGBT) as a main electrode on the back surface, and a gate electrode (a source electrode in a power MOSFET or an emitter electrode in an IGBT) as a control electrode and an output electrode (a source electrode in a power MOSFET or an emitter electrode in an IGBT) as a main electrode on the front surface. The diode elements may be, for example, Schottky Barrier Diodes (SBDs) or P-intrinsic-N (PiN) diodes used as FWDs. A semiconductor chip including a diode element has an output electrode (cathode electrode) as a main electrode on the back surface and an input electrode (anode electrode) as a main electrode on the front surface.

[0027] The semiconductor chips 10a, 10b and the semiconductor chips 10d, 10e may be joined to the conductive circuit patterns 23a, 23b (described later) with solder 12, respectively. The solder 12 is composed of solder components. The solder components include lead-free solder primarily composed of a predetermined alloy. The predetermined alloy includes tin. Such alloys include, for example, at least one of a tin-silver alloy, a tin-silver-copper alloy, a tin-zinc-bismuth alloy, a tin-copper alloy, a tin-silver-indium-bismuth alloy, and a tin-antimony alloy. Furthermore, such solder components may include additives. Examples of additives include nickel, germanium, cobalt, or silicon. Therefore, examples of the solder components include tin and at least one of silver, zinc, copper, bismuth, indium, and antimony. Furthermore, the solder components may include, for example, at least one of nickel, germanium, cobalt, and silicon. Furthermore, the solder 12 may be replaced with a sintered body. When joining is performed using a sintered body, the sintered material is, for example, a powder of silver, iron, copper, aluminum, titanium, nickel, tungsten, or molybdenum.

[0028] The insulating circuit board 20 includes an insulating plate 21, a heat sink 22, and conductive circuit patterns 23a and 23b. The insulating plate 21 and the heat sink 22 are rectangular in plan view. The corners of the insulating plate 21 and the heat sink 22 may be round-chamfered or C-chamfered. The size of the heat sink 22 is smaller than the size of the insulating plate 21 in plan view, and it is formed inside the insulating plate 21.

[0029] The insulating plate 21 may be, for example, a ceramic substrate. The ceramic substrate is made of ceramic with good thermal conductivity. The ceramic is made of a material containing, for example, aluminum oxide, aluminum nitride, or silicon nitride as its main component. The insulating plate 21 has a rectangular shape in plan view. Examples of the insulating circuit board 20 including the insulating plate 21 having such a configuration include a DCB (Direct Copper Bonding) substrate and an AMB (Active Metal Brazed) substrate.

[0030] The insulating plate 21 may be made of a resin. The resin may be a material with low thermal resistance and high insulation properties. Examples of such resins include thermosetting resins. The thermosetting resin may further contain a filler. The thermal resistance of the insulating plate 21 can be further reduced by controlling the material and content of the filler. Furthermore, depending on the material and content of the filler, the linear expansion coefficient of the insulating plate 21 can be made approximately equal to the linear expansion coefficients of the heat sink 22 and the conductive circuit patterns 23a and 23b described below. By reducing the difference in linear expansion coefficients in this way, the insulating circuit board 20 can reduce the occurrence of warping due to the difference in linear expansion coefficients even when thermal changes occur. Note that the difference in linear expansion coefficients in this case may be within an error range of 10% or more and 50% or less.

[0031] Examples of the thermosetting resin include at least one of epoxy resin, cyanate resin, polyimide resin, benzoxazine resin, unsaturated polyester resin, phenol resin, melamine resin, silicone resin, maleimide resin, acrylic resin, and polyamide resin. The filler is composed of at least one of an oxide and a nitride. Examples of the oxide include silicon oxide and aluminum oxide. Examples of the nitride include silicon nitride, aluminum nitride, and boron nitride. Furthermore, the filler may be hexagonal boron nitride.

[0032] The thickness of the insulating plate 21 depends on the rated voltage of the semiconductor device 1. That is, the higher the rated voltage of the semiconductor device 1, the thicker the insulating plate 21 needs to be. On the other hand, it is necessary to make the insulating plate 21 as thin as possible to reduce thermal resistance.

[0033] The heat sink 22 is made of a metal with excellent thermal conductivity. Examples of such materials include copper, aluminum, or an alloy containing at least one of these. Here, copper is included. Furthermore, to improve corrosion resistance, the surface of the heat sink 22 may be plated. In this case, the plating material includes nickel. Examples of such plating materials include nickel, nickel-phosphorus alloy, and nickel-boron alloy. The heat sink 22 includes a heat dissipation surface 22a on its underside. This heat dissipation surface 22a may be substantially flat. The heat dissipation surface 22a also serves as the underside of the insulating circuit board 20. Furthermore, the heat dissipation surface 22a of the heat sink 22 is exposed from the sealing underside 35a of the sealing member 35, which will be described later. In this case, the heat dissipation surface 22a of the heat sink 22 may protrude outward from the sealing underside 35a of the sealing member 35, or may be flush with the sealing underside 35a of the sealing member 35. In this embodiment, the heat dissipation surface 22 a of the heat dissipation plate 22 is flush with the sealing lower surface 35 a of the sealing member 35 .

[0034] The semiconductor chips 10a, 10b and the semiconductor chips 10d, 10e are disposed on the conductive circuit patterns 23a, 23b, respectively. The conductive circuit patterns 23a, 23b are formed over the entire surface of the insulating plate 21 except for the edges. Preferably, in a plan view, the ends of the conductive circuit patterns 23a, 23b facing the outer periphery of the insulating plate 21 overlap the outer periphery of the heat sink 22. This maintains a stress balance between the insulating circuit board 20 and the heat sink 22 on the back surface of the insulating plate 21. Damage to the insulating plate 21, such as excessive warping and cracking, is further suppressed.

[0035] The conductive circuit patterns 23a, 23b are made of a material with excellent conductivity. Examples of such materials include copper, aluminum, or an alloy containing at least one of these. The conductive circuit patterns 23a, 23b can also be plated with a material with excellent corrosion resistance. Examples of such materials include nickel, nickel-phosphorus alloy, and nickel-boron alloy. The conductive circuit patterns 23a, 23b for the insulating plate 21 are obtained by forming a metal plate on the front surface of the insulating plate 21 and then etching or other processes on the metal plate. Alternatively, the conductive circuit patterns 23a, 23b may be cut out from a metal plate in advance and bonded to the front surface of the insulating plate 21. The conductive circuit patterns 23a, 23b included in the semiconductor device 1 of this embodiment are merely an example. The number, shape, size, and other factors of the conductive circuit patterns may be appropriately selected as needed.

[0036] Although not shown in detail, the printed circuit board 30 includes an insulating layer and multiple upper circuit pattern layers formed on the front surface of the insulating layer. The printed circuit board 30 may also include multiple lower circuit pattern layers on the back surface of the insulating layer. Such a printed circuit board 30 faces the front surface of the insulating circuit board 20 in a plan view. The printed circuit board 30 is electrically connected to the output electrodes, input electrodes, and control electrodes of the semiconductor chips 10a, 10b, 10d, and 10e. Note that the conductive posts 31a, 31b, 31d, and 31e shown in FIG. 1 are merely examples, and the printed circuit board 30 may also include conductive posts not shown in FIG. 1. The upper portions of the conductive posts 31a, 31b, 31d, and 31e, along with the conductive posts not shown, are electrically connected to the upper and lower circuit pattern layers of the printed circuit board 30, and the lower portions are connected to the output and control electrodes of the semiconductor chips 10a, 10b, 10d, and 10e by solder 32. The solder components of the solder 32 are the same as those of the solder 12. The solder 32 may be replaced with the sintered body described above.

[0037] For example, the printed circuit board 30 is electrically connected to the output electrodes on the front surfaces of the semiconductor chips 10a and 10b through conductive posts 31a and 31b, and to the output electrodes on the front surfaces of the semiconductor chips 10d and 10e through conductive posts 31d and 31e.

[0038] The printed circuit board 30 is electrically connected to the input electrodes on the rear surfaces of the semiconductor chips 10a and 10b via the conductive posts 31c and the conductive circuit patterns 23a, and is also electrically connected to the input electrodes on the rear surfaces of the semiconductor chips 10d and 10e via the conductive posts 31f and the conductive circuit patterns 23b.

[0039] The printed circuit board 30 is electrically connected to the control electrodes of the semiconductor chips 10a and 10b via conductive posts (not shown) and to the control electrodes of the semiconductor chips 10d and 10e via conductive posts (not shown).

[0040] The sealing member 35 seals the entire insulating circuit board 20, the semiconductor chips 10a, 10b, 10d, and 10e, and the printed circuit board 30. Various terminals, for example, for input, output, and control, may protrude from the upper surface of the sealing member 35 as needed. The sealing member 35 may have, for example, a rectangular parallelepiped shape and includes a flat sealing lower surface 35a. The heat dissipation surface 22a of the heat sink 22 of the insulating circuit board 20 is exposed from the sealing lower surface 35a of the sealing member 35.

[0041] Such a sealing member 35 may be a thermosetting resin containing a filler. That is, the sealing member 35 is composed mainly of an insulating filler (described later) and a resin (thermosetting resin). In this case, the thermosetting resin is, for example, an epoxy resin, a phenolic resin, a maleimide resin, or a polyester resin. The filler may be mainly composed of an insulating ceramic having high thermal conductivity. Examples of such a filler include silicon oxide, aluminum oxide, boron nitride, and aluminum nitride. The content of the filler is 10% by volume or more and 70% by volume or less of the entire sealing member 35.

[0042] The semiconductor module 2 having such a configuration is one example. For example, although not shown, the semiconductor module 2 may be configured in such a manner that a DCB substrate and a semiconductor chip are arranged in this order on a heat dissipation base, the DCB substrate and the semiconductor chip are wired, a case surrounding these is arranged on the heat dissipation base, and the inside of the case is sealed with a sealing member. In this case, the lower surface of the heat dissipation base corresponds to the heat dissipation surface 22a of the heat dissipation plate 22.

[0043] The cooling module 3 has a cooling surface 3a on its upper surface on which the heat dissipation surface 22a of the semiconductor module 2 is disposed. The cooling surface 3a is wider and generally flat than the sealing lower surface 35a, which is the back surface of the semiconductor module 2. The cooling module 3 may be, for example, a heat dissipation base equipped with heat dissipation fins, or a cooling device in which a refrigerant circulates inside.

[0044] The bonding member 4 is provided between the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2 and the cooling surface 3a of the cooling module 3. That is, the shape and size of the bonding member 4 in a plan view in the -Z direction substantially match the shape and size of the heat dissipation surface 22a of the heat sink 22. The bonding member 4 may be in contact with the sealing lower surface 35a around the heat dissipation surface 22a of the semiconductor module 2. The maximum size of the bonding member 4 in a plan view in the -Z direction may correspond to the sealing lower surface 35a of the semiconductor module 2.

[0045] The joining member 4 includes a heat conducting portion 4a and an electrically conductive portion 4b. The heat conducting portion 4a thermally connects the heat dissipation surface 22a of the heat sink 22 and the cooling surface 3a of the cooling module 3. As shown in FIGS. 1 and 2 , the heat conducting portion 4a is provided inside the cooling surface 3a of the cooling module 3 (and the heat dissipation surface 22a of the semiconductor module 2) and has a rectangular shape in plan view, similar to the cooling surface 3a (and the heat dissipation surface 22a). Note that the corners of the rectangular heat conducting portion 4a may be rounded. Furthermore, the shape of the heat conducting portion 4a in plan view is not limited to a rectangular shape, as long as it is included inside the cooling surface 3a of the cooling module 3.

[0046] The heat conducting portion 4a may be made of a material that has thermal conductivity, insulation, and adhesive properties. The thermal conductivity may be 10 W / mK or more. A material that can achieve this thermal conductivity may be selected. The adhesive strength is, for example, 10 MPa or more. Note that the adhesive strength here refers to tensile adhesive strength. Such a material may, for example, contain resin as its main component. This resin may be, for example, epoxy resin. Therefore, the heat conducting portion 4a of the joining member 4 is adhered to the heat dissipation surface 22a of the heat sink 22 and the cooling surface 3a of the cooling module 3, respectively.

[0047] The conductive portion 4b is directly connected to the heat sink 22 and the cooling surface 3a of the cooling module 3. In the first embodiment, as shown in FIG. 2 , the conductive portion 4b is annular in plan view, continuous with the cooling surface 3a of the cooling module 3, and is provided so as to surround the periphery of the heat conduction portion 4a. That is, the conductive portion 4b is in continuous annular contact along the outer edge of the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2. In other words, in plan view, the outer periphery of the conductive portion 4b may approximately coincide with the outer periphery of the heat dissipation surface 22a of the heat sink 22. In this case, the entire boundary of the conductive portion 4b with the heat conduction portion 4a is in contact with the heat conduction portion 4a. The outer corners of the conductive portion 4b may be rounded. By rounding the corners of the heat conduction portion 4a and the conductive portion 4b of the joining member 4 in this manner, stress concentration at the corners can be prevented. This can prevent the joining member 4 from peeling off from the heat dissipation surface 22a and the cooling surface 3a.

[0048] The conductive portion 4b is preferably made of a conductive material and further has adhesive properties. Examples of such conductive materials include the aforementioned solder, metal particle paste, and conductive adhesive. Examples of the metal particle paste include pastes of silver, copper, or alloys containing at least one of these. The diameter of these particles may be less than 10 μm. The conductive adhesive may be composed of the same main components as the thermally conductive portion 4a and may contain a conductive filler. The conductive filler may be, for example, a metal. Examples of metals include silver, copper, gold, nickel, chromium, aluminum, or alloys containing at least one of these. Furthermore, if the base material of the conductive portion 4b is the same as that of the thermally conductive portion 4a, the adhesion between the conductive portion 4b and the thermally conductive portion 4a is improved. Furthermore, if the rigidity of the conductive portion 4b is higher than that of the thermally conductive portion 4a, the conductive portion 4b surrounds the thermally conductive portion 4a, thereby fixing the thermally conductive portion 4a to the conductive portion 4b. This prevents the thermally conductive portion 4a from peeling off.

[0049] With such joining member 4, heat generated from the semiconductor module 2 is conducted from the heat dissipation surface 22a of the heat sink 22 through the heat conduction portion 4a to the cooling surface 3a of the cooling module 3, where it is cooled. Furthermore, the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2 is electrically connected to the cooling surface 3a of the cooling module 3 via the conductive portion 4b. That is, the heat sink 22 of the semiconductor module 2 and the cooling surface 3a of the cooling module 3 are at the same potential due to the conductive portion 4b.

[0050] Next, a manufacturing method of the semiconductor device 1 will be described with reference to FIG. 3 . FIG. 3 is a flowchart showing the manufacturing method of the semiconductor device according to the first embodiment. First, a preparation step is performed to prepare components of the semiconductor device 1 (step S1). Examples of the components prepared here include the semiconductor chips 10a, 10b, 10d, and 10e that constitute the semiconductor module 2, the insulating circuit board 20, the printed circuit board 30 on which the conductive posts 31a, 31b, 31c, 31d, 31e, and 31f are provided, the sealing member 35, and the bonding member 4. Another example is the cooling module 3. Components not listed here that are necessary for manufacturing the semiconductor device 1 may also be prepared. Manufacturing equipment used in manufacturing the semiconductor device 1 may also be prepared. Examples of the manufacturing equipment include a coating device for applying solder and a molding device for sealing with a sealing member.

[0051] Next, a semiconductor module assembly process is performed to assemble the semiconductor module 2 (step S2). The semiconductor module assembly process includes the following steps: First, the semiconductor chips 10a, 10b, 10d, and 10e are bonded to the insulating circuit substrate 20 (step S2a). This step S2a will be described with reference to FIG. 4. FIG. 4 is a diagram for explaining the semiconductor module assembly process according to the first embodiment.

[0052] The semiconductor chips 10a, 10b, 10d, and 10e are joined to the conductive circuit patterns 23a and 23b of the insulating circuit board 20 via solder 12. Conventional solder joining may be used for this joining. As a result, as shown in Figure 4, a structure is obtained in which the semiconductor chips 10a and 10b are joined to the conductive circuit pattern 23a of the insulating circuit board 20 via solder 12, and the semiconductor chips 10d and 10e are joined to the conductive circuit pattern 23b via solder 12.

[0053] Thereafter, conductive posts 31a, 31b, 31c, 31d, 31e, and 31f of printed circuit board 30 are bonded to semiconductor chips 10a and 10b, conductive circuit pattern 23a of insulating circuit board 20, semiconductor chips 10d and 10e, and conductive circuit pattern 23b of insulating circuit board 20 (step S2b). Step S2b will be described with reference to FIG. 5. FIG. 5 is a diagram for explaining the semiconductor module assembly process of the first embodiment.

[0054] Printed circuit board 30 is provided with conductive posts 31a, 31b, 31c, 31d, 31e, and 31f in advance. These conductive posts 31a, 31b, 31c, 31d, 31e, and 31f are joined with solder 32 to semiconductor chips 10a and 10b, conductive circuit pattern 23a of insulating circuit board 20, semiconductor chips 10d and 10e, and conductive circuit pattern 23b of insulating circuit board 20 using conventional soldering. This results in a structure in which printed circuit board 30 is attached to insulating circuit board 20 to which semiconductor chips 10a, 10b, 10d, and 10e are joined, as shown in FIG.

[0055] The final process of step S2 is sealing with a sealing member 35 (step S2c). This step S2c will be described with reference to FIGS. 6 and 7. FIG. 6 is a side cross-sectional view of the semiconductor module of the first embodiment. FIG. 7 is a rear view of the semiconductor module of the first embodiment. Note that FIG. 7 is a view of the semiconductor module 2 of FIG. 6 as viewed in the +Z direction, and is a plan view of the sealing lower surface 35a of the semiconductor module 2.

[0056] The structure obtained in step S2b is set, for example, in a predetermined mold. The mold is filled with a sealing member 35 to seal the structure. The mold is then removed to obtain the semiconductor module 2 shown in FIG. 6. In the semiconductor module 2, as shown in FIG. 7, the heat dissipation surface 22a of the heat sink 22 of the insulating circuit board 20 is exposed from the sealing lower surface 35a of the sealing member 35. The sealing lower surface 35a of the sealing member 35 and the heat dissipation surface 22a of the heat sink 22 form the same plane. The back surface of the semiconductor module 2 is composed of the sealing lower surface 35a of the sealing member 35 and the heat dissipation surface 22a of the heat sink 22.

[0057] Next, an application step of applying the bonding material 4 is performed (step S3). The bonding material 4 may be applied to either the heat dissipation surface 22a of the semiconductor module 2 or the cooling surface 3a of the cooling module 3. Here, the case of applying the bonding material 4 to the cooling surface 3a of the cooling module 3 will be described with reference to FIGS. 8 to 11. FIGS. 8 to 11 are diagrams for explaining the application step of the first embodiment. Note that FIGS. 8 and 10 are cross-sectional views taken along dashed lines I2-I2 and I3-I3 in FIGS. 9 and 11, respectively.

[0058] First, the conductive portion 4b is applied to the cooling surface 3a of the cooling module 3. To apply the conductive portion 4b to the cooling surface 3a, for example, a mask with an opening corresponding to the application area on the cooling surface 3a of the cooling module 3 is set on the cooling surface 3a of the cooling module 3. The conductive portion 4b is applied to the opening using a squeegee. When the mask is removed, the conductive portion 4b can be transferred to the application area, as shown in Figures 8 and 9. In this case, as described above, the conductive portion 4b is applied in a continuous ring shape on the cooling surface 3a corresponding to the outer edge of the heat dissipation surface 22a. Note that application may be performed using a dispenser or syringe instead of using a mask and squeegee.

[0059] Next, the thermally conductive portions 4a are applied to the cooling surface 3a of the cooling module 3. For example, a syringe is used to apply the thermally conductive portions 4a to the inside of the area surrounded by the conductive portions 4b of the cooling surface 3a. As a result, as shown in FIGS. 10 and 11 , the thermally conductive portions 4a are applied to, for example, five locations in the area surrounded by the conductive portions 4b. At this time, the five thermally conductive portions 4a are applied with a gap between them. There is also a gap between the five thermally conductive portions 4a and the conductive portions 4b. Note that, taking into consideration that the five thermally conductive portions 4a will be pressed and spread later, the five thermally conductive portions 4a may be applied so that they are higher than the conductive portions 4b, for example.

[0060] Next, an attachment process is performed in which the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2 is attached to the cooling surface 3a of the cooling module 3 via the bonding material 4 (step S4). First, the cooling module 3 with the bonding material 4 applied thereto is fixed to a predetermined fixing base, and the semiconductor module 2 is set from the sealing lower surface 35a side against the bonding material 4 applied to the cooling module 3. This causes the heat conductive portion 4a to wet and spread inside the conductive portion 4b.

[0061] Then, the structure including the cooling module 3 and the semiconductor module 2 arranged on the cooling surface 3a of the cooling module 3 via the bonding member 4 is heated. The heating temperature at this time is, for example, 200°C or less. This prevents the solder 12, 32 in the semiconductor module 2 from remelting. Also, at this time, the semiconductor module 2 is pressed against the cooling module 3 with a constant pressure. This makes it possible to control the thickness of the bonding member 4. By heating in this manner, the heat conductive portion 4a of the bonding member 4 hardens, bonding the semiconductor module 2 and the cooling module 3 together. In this manner, the semiconductor device 1 shown in FIGS. 1 and 2 is obtained.

[0062] Here, a semiconductor device 100 of a reference example will be described with reference to FIGS. 12 and 13. FIG. 12 is a side cross-sectional view of the semiconductor device of the reference example. FIG. 13 is a plan view of the cooling surface of the semiconductor device of the reference example. Note that FIGS. 12 and 13 correspond to FIGS. 1 and 2. Therefore, FIG. 13 is a cross-sectional view of the semiconductor device 100 of FIG. 12 in the X-Y plane represented by the dashed dotted line. That is, FIG. 13 is a plan view of the cooling surface 3a of the cooling module 3 to which the bonding member 400 is applied. FIG. 12 is a cross-section at the position of the dashed dotted line Y-Y in FIG. 13, viewed in the +Y direction.

[0063] The semiconductor device 100 of the reference example uses a bonding member 400 instead of the bonding member 4 of the semiconductor device 1. The semiconductor device 100 has the same configuration as the semiconductor device 1 except for the bonding member 400.

[0064] The bonding member 400 may be a thermal interface material (hereinafter referred to as TIM). The TIM used here is an insulating material such as thermally conductive grease, elastomer sheet, RTV (Room Temperature Vulcanization) rubber, gel, or phase change material. The bonding member 400 contacts the entire sealing lower surface 35a of the semiconductor module 2 to bond the semiconductor module 2 and the cooling module 3.

[0065] Such a semiconductor device 100 has a power conversion function and is applied with a high voltage. This causes polarization within the bonding member 400, generating a potential between the heat sink 22 and the cooling module 3. If a gap is present within the bonding member 400, corona discharge may occur. Corona discharge may cause damage, such as holes, to the cooling surface 3 a of the cooling module 3 or the bonding member 400. Such damage may result in electrical conduction between the heat sink 22 and the cooling module 3, reducing the reliability of the semiconductor device 100.

[0066] The semiconductor device 1 includes a heat sink 22 including a heat dissipation surface 22a, a cooling module 3 including a cooling surface 3a on which the heat dissipation surface 22a of the heat sink 22 is disposed, and a bonding member 4 provided between the heat dissipation surface 22a and the cooling surface 3a. The bonding member 4 includes a thermally conductive portion 4a that bonds the heat dissipation surface 22a and the cooling surface 3a, and a conductive portion 4b that directly connects the heat sink 22 and the cooling surface 3a, respectively. This allows the heat sink 22 and the cooling module 3 to be at the same potential, preventing the occurrence of corona discharge. The semiconductor device 1 is electrically stable, preventing a decrease in reliability.

[0067] Furthermore, the joining members 4 only need to include the conductive portion 4b to prevent the occurrence of corona discharge, and the thermally conductive portion 4a may be made of the TIM mentioned in the reference example, which broadens the range of choices for the thermally conductive portion 4a of the joining members 4.

[0068] Furthermore, since the joining member 4 only needs to include the conductive portion 4b, the conductive portion 4b does not necessarily have to be provided on the outer periphery of the joining member 4, nor does it have to be a continuous ring. The conductive portion 4b may be included in the portions of the joining member 4 that are directly connected to the heat sink 22 and the cooling surface 3a, respectively, and may have a shape that allows direct connection.

[0069] Alternatively, the entire joining member 4 may be made of a predetermined base material, and the conductive portion 4b may be introduced into the joining member 4 by biasing the distribution of the conductive filler material contained in the base material in the joining member 4.

[0070] Second Embodiment A semiconductor device according to a second embodiment will be described with reference to FIGS. 14 and 15. FIG. 14 is a side cross-sectional view of the semiconductor device according to the second embodiment. FIG. 15 is a plan view of the cooling surface of the semiconductor device according to the second embodiment. Note that FIGS. 14 and 15 correspond to FIGS. 1 and 2. Therefore, FIG. 15 is a cross-sectional view of the semiconductor device 1a in FIG. 14 taken along the X-Y plane indicated by the dashed dotted line. That is, FIG. 15 is a plan view of the cooling surface 3a of the cooling module 3. FIG. 14 is a cross-section taken along the dashed dotted line I4-I4 in FIG. 15, viewed in the +Y direction.

[0071] Similar to the semiconductor device 1 of the first embodiment, the semiconductor device 1a includes a semiconductor module 2, a cooling module 3, and a bonding member 4. The bonding member 4 also includes a heat-conducting portion 4a and a conductive portion 4b. However, in the bonding member 4 of the second embodiment, the heat-conducting portion 4a and the conductive portion 4b are not in contact with each other, but are spaced apart. For example, as shown in FIGS. 14 and 15 , the conductive portion 4b is continuously and annularly arranged along the outer edge of the heat dissipation surface 22a of the heat sink 22, similar to the first embodiment. Meanwhile, the heat-conducting portion 4a has a rectangular shape in plan view and is located inside the conductive portion 4b, with a gap 4c between it and the inner surface of the conductive portion 4b. Note that the shape of the heat-conducting portion 4a is not limited to that shown in FIGS. 14 and 15 , as long as the gap 4c is provided between the conductive portion 4b and the heat-conducting portion 4a. The gap 4c also depends on the shape of the heat-conducting portion 4a, and the shapes shown in FIGS. 14 and 15 are merely examples.

[0072] The thermally conductive portion 4a of the bonding member 4 may expand and contract in response to thermal changes during the manufacturing process of the semiconductor device 1a and during operation of the semiconductor device 1a. In particular, if the thermally conductive portion 4a expands, there is a risk of leakage to the outside. If the thermally conductive portion 4a leaks to the outside, it will contaminate the area around the semiconductor device 1a and result in loss. In the semiconductor device 1a of the second embodiment, leakage of the thermally conductive portion 4a is prevented, preventing impact on the surroundings and loss. Note that the gap 4c between the conductive portion 4b and the thermally conductive portion 4a does not necessarily have to be annular. It is sufficient to ensure a space that allows escape for the expanding thermally conductive portion 4a.

[0073] [Third Embodiment] A manufacturing method of a semiconductor device 1b according to a third embodiment will be described with reference to FIG. 3 . The semiconductor device 1b according to the third embodiment is manufactured taking into consideration the possibility of the insulating circuit board 20 warping downward, as will be described later. This semiconductor device 1b is also formed according to the flowchart shown in FIG. 3 for the first embodiment. The following mainly describes the manufacturing process that differs from the first embodiment.

[0074] 3, an application step of applying the bonding material 4 is performed (step S3). The bonding material 4 may be applied to either the heat dissipation surface 22a of the semiconductor module 2 or the cooling surface 3a of the cooling module 3. Here, the case where the bonding material 4 is applied to the cooling surface 3a of the cooling module 3 will be described with reference to FIGS. 16 and 17. FIGS. 16 and 17 are diagrams for explaining the application step of the third embodiment. Note that FIGS. 16 and 17 correspond to FIGS. 10 and 11. FIG. 16 is a cross-sectional view taken along the dashed dotted line I5-I5 in FIG. 17.

[0075] First, in the third embodiment, similarly to the first embodiment, the conductive portion 4b is applied to the cooling surface 3a of the cooling module 3. Next, the thermally conductive portion 4a is applied to the cooling surface 3a of the cooling module 3. For example, a syringe is used to apply the thermally conductive portion 4a to the inside of the conductive portion 4b of the cooling surface 3a. As a result, as shown in Figures 16 and 17, the thermally conductive portion 4a is applied to, for example, three locations in the area surrounded by the conductive portion 4b. The spacing between the thermally conductive portions 4a is wider than in the first embodiment, and the total volume of the thermally conductive portions 4a is smaller than in the first embodiment.

[0076] Next, an attachment step is performed in which the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2 is attached to the cooling surface 3a of the cooling module 3 via the bonding member 4 (step S4). This attachment step will be described with reference to Fig. 18. Fig. 18 is a side cross-sectional view of the semiconductor device of the third embodiment. This attachment step is performed in the same manner as in the first embodiment.

[0077] The semiconductor module 2 is placed on the sealing lower surface 35a against the bonding material 4 applied to the cooling module 3. This causes the thermally conductive portion 4a to wet and spread inside the conductive portion 4b. Then, as in the first embodiment, the structure including the cooling module 3 and the semiconductor module 2 placed on the cooling surface 3a of the cooling module 3 via the bonding material 4 is heated. This heating may cause the insulating circuit board 20 to warp downward due to differences in the linear expansion coefficients of the insulating plate 21, the heat sink 22, and the conductive circuit patterns 23a and 23b. When the insulating circuit board 20 warps downward, the thermally conductive portion 4a (its center in a plan view) is pressed. In this case, the amount of the bonding material applied to the thermally conductive portion 4a is reduced compared to the first embodiment, and there are many gaps. Therefore, the pressed heat conductive portion 4a does not leak from the conductive portion 4b, and fills the area defined by the heat dissipation surface 22a of the heat sink 22, the cooling surface 3a of the cooling module 3, and the conductive portion 4b, as shown in Fig. 18. That is, the heat conductive portion 4a may be arranged with a gap corresponding to the amount of warping of the insulating circuit board 20 (see Fig. 17). This gap provides a relief for the heat conductive portion 4a that is pressed when the insulating circuit board 20 warps downward.

[0078] In the semiconductor device 1b manufactured in this manner, the heat conduction portion 4a of the joining member 4 does not leak out, and the heat dissipation surface 22a of the downwardly curved heat sink 22 and the cooling surface 3a of the cooling module 3 can be joined without any gaps, thereby suppressing a decrease in heat dissipation performance.

[0079] [Fourth Embodiment] A semiconductor device according to a fourth embodiment will be described with reference to Fig. 19. Fig. 19 is a plan view of the cooling surface of the semiconductor device according to the fourth embodiment. Fig. 19 corresponds to Fig. 2. For a cross section of the semiconductor device taken along the dashed dotted line I6-I6 in Fig. 19, refer to Fig. 1.

[0080] The semiconductor device 1a of the fourth embodiment, like the semiconductor device 1 of the first embodiment, includes a semiconductor module 2 (not shown), a cooling module 3, and a bonding member 4. The bonding member 4 also includes a heat-conducting portion 4a and a conductive portion 4b. However, in the bonding member 4 of the fourth embodiment, linear conductive portions 4b are provided facing each other on the cooling surface 3a, and the heat-conducting portion 4a is provided between the facing conductive portions 4b. That is, the facing linear conductive portions 4b correspond to the opposing short sides of the heat-dissipating surface 22a of the heat sink 22. In plan view, the heat-conducting portion 4a corresponds to the entire heat-dissipating surface 22a between the facing conductive portions 4b. In the fourth embodiment, the heat-conducting portion 4a and the conductive portion 4b are in contact with each other. In this case, a gap may be provided between the heat-conducting portion 4a and the conductive portion 4b, as in the second embodiment.

[0081] In the fourth embodiment, the opposing conductive portions 4b correspond to opposing short sides of the heat dissipation surface 22a. However, the conductive portions 4b may correspond to opposing long sides of the heat dissipation surface 22a, or may correspond to at least one of one short side and one long side of the heat dissipation surface 22a. The heat conduction portions 4a may correspond to part or all of the area of ​​the heat dissipation surface 22a excluding the conductive portions 4b in a plan view.

[0082] In the fourth embodiment, the joining member 4 also includes a heat-conducting portion 4a that joins the heat dissipation surface 22a and the cooling surface 3a, and a conductive portion 4b that directly connects the heat dissipation plate 22 and the cooling surface 3a, respectively. This allows the heat dissipation plate 22 and the cooling module 3 to be at the same potential, preventing the occurrence of corona discharge. The semiconductor device of the fourth embodiment is electrically stable, preventing a decrease in reliability.

[0083] Fifth Embodiment A semiconductor device 1d according to a fifth embodiment will be described with reference to FIGS. 20 and 21. FIG. 20 is a side cross-sectional view of the semiconductor device according to the fifth embodiment. FIG. 21 is a rear view of the semiconductor module according to the fifth embodiment. FIG. 21 is a cross-sectional view of the semiconductor device 1d in FIG. 20 taken along the X-Y plane indicated by the dashed-dotted line. That is, FIG. 21 is a plan view of the sealing lower surface 35a of the semiconductor module 2. In FIG. 21, the dashed line in the heat conduction portion 4a indicates the position of the outer periphery of the heat dissipation surface 22a. FIG. 20 is a cross-section taken along the dashed-dotted line I7-I7 in FIG. 21, viewed in the +Y direction.

[0084] Similar to the semiconductor device 1 of the first embodiment, the semiconductor device 1d of the fifth embodiment includes a semiconductor module 2 and a cooling module 3. A bonding member 4 is provided between the sealing lower surface 35a of the semiconductor module 2 and the cooling surface 3a of the cooling module 3. Such a bonding member 4 also includes a heat-conducting portion 4a and an electrically conductive portion 4b.

[0085] In the fifth embodiment, the conductive portion 4b of the joining member 4 is provided on the heat dissipation surface 22a of the heat sink 22 in a plan view. The conductive portion 4b may be provided in one or more pieces as long as it penetrates the joining member 4 (heat conduction portion 4a) so as to directly connect the heat dissipation surface 22a of the heat sink 22 and the cooling surface 3a of the cooling module 3. The conductive portion 4b in FIGS. 20 and 21 is, for example, cylindrical and provided in a single piece. The conductive portion 4b is not limited to a cylindrical shape, and may be, for example, a columnar shape including a rectangular columnar shape, or a truncated cone shape. Furthermore, the connection direction between the heat dissipation surface 22a of the conductive portion 4b and the cooling surface 3a is not limited to being vertical (±Z direction), but may be inclined relative to the ±Z direction.

[0086] The heat conduction portion 4a may be provided on the heat dissipation surface 22a excluding the portion where the conductive portion 4b is provided in a plan view. The heat conduction portion 4a in Figures 20 and 21 is provided inside the sealing lower surface 35a, including the heat dissipation surface 22a excluding the portion where the conductive portion 4b is provided in a plan view. In other words, the heat conduction portion 4a has a shape wider than the heat dissipation surface 22a in a plan view. If the heat conduction portion 4a is made of the same base material as the sealing member 35, the bonding member 4 (heat conduction portion 4a) contacts the sealing lower surface 35a, ensuring a certain level of adhesion strength of the bonding member 4 (heat conduction portion 4a) to the semiconductor module 2.

[0087] In the fifth embodiment, the joining member 4 also includes a heat-conducting portion 4a that joins the heat dissipation surface 22a and the cooling surface 3a, and a conductive portion 4b that directly connects the heat dissipation plate 22 and the cooling surface 3a, respectively. This allows the heat dissipation plate 22 and the cooling module 3 to have the same potential, preventing the occurrence of corona discharge. The joining member 4 also ensures a reliable connection between the semiconductor module 2 and the cooling module 3. This makes the semiconductor device 1d electrically stable, making it difficult for the semiconductor module 2 and the cooling module 3 to separate, and preventing a decrease in reliability.

[0088] 20 and 21 show the case where the conductive portion 4b is in contact with and surrounded by the heat conducting portion 4a. A gap may be provided at the boundary between the conductive portion 4b and the heat conducting portion 4a, as in the second embodiment.

[0089] Sixth Embodiment A semiconductor device 1e according to a sixth embodiment will be described with reference to FIGS. 22 to 24. FIG. 22 is a cross-sectional side view of the semiconductor device according to the sixth embodiment. FIG. 23 is a rear view of the semiconductor module according to the sixth embodiment. FIG. 24 is a side view of the semiconductor device according to the sixth embodiment. FIG. 23 is a cross-sectional view of the semiconductor device 1e in FIG. 22 taken along the XY plane indicated by the dashed-dotted line. That is, FIG. 23 is a plan view of the sealing lower surface 35a of the semiconductor module 2. FIG. 22 is a cross-section taken along the dashed-dotted line I8-I8 in FIG. 23, viewed in the +Y direction. FIG. 24 is a side view of the semiconductor device 1e in FIG. 22 viewed in the -X direction.

[0090] The semiconductor device 1e includes a semiconductor module 2, a cooling module 3, and a bonding member 4 that fixes the semiconductor module 2 and the cooling module 3. As in the first embodiment, the semiconductor module 2 includes semiconductor chips 10a, 10b, 10d, and 10e, an insulating circuit board 20, a printed circuit board 30, and a sealing member 35 that seals them. However, a groove 35b (see FIGS. 25 and 26) is formed on the sealing lower surface 35a of the sealing member 35 included in the semiconductor module 2 of the semiconductor device 1e. The cooling module 3 is the same as in the first embodiment.

[0091] The bonding member 4 includes a heat conductive portion 4a and an electrically conductive portion 4b. The heat conductive portion 4a is provided so as to include the entire heat dissipation surface 22a of the heat sink 22 included in the semiconductor module 2. In other words, the heat conductive portion 4a may have a shape that is wider than the heat dissipation surface 22a in a plan view. Here, the heat conductive portion 4a is shown as being provided on the entire sealing lower surface 35a of the sealing member 35 included in the semiconductor module 2.

[0092] The conductive portion 4b connects the cooling surface 3a of the cooling module 3 and the side surface of the heat sink 22 along the portion of the heat conduction portion 4a that extends beyond the heat sink 22. For example, the conductive portion 4b is L-shaped in side view and includes a first portion 4b1 and a second portion 4b2, each of which is linear. The first portion 4b1 is provided in a region (space) defined by the groove 35b of the sealing member 35 of the semiconductor module 2, the heat sink 22 of the insulating circuit board 20, and the heat conduction portion 4a (described later). One inner end of the first portion 4b1 is connected to the side surface of the heat sink 22. The other outer end of the first portion 4b1 extends outward (in the +X direction) from the side surface of the sealing member 35 (and the heat conduction portion 4a).

[0093] The second portion 4b2 is provided on a side of the heat conduction portion 4a (described later). One upper end of the second portion 4b2 is integrally connected to the outer end of the first portion 4b1. The other lower end of the second portion 4b2 extends in the −Z direction and is connected to the cooling surface 3a of the cooling module 3.

[0094] Next, a method for manufacturing such a semiconductor device 1e will be described with reference to Fig. 3. The semiconductor device 1e is also formed in accordance with the flowchart of the first embodiment shown in Fig. 3. The following mainly describes the manufacturing steps that differ from those of the first embodiment.

[0095] After steps S1 and S2 described in FIG. 3, an application step of applying the bonding material 4 is performed (step S3). This application step will be described with reference to FIGS. 25 and 26. FIGS. 25 and 26 are diagrams for explaining the application step of the sixth embodiment. FIG. 26 is a rear view of the semiconductor module 2 of FIG. 25. FIG. 25 is a cross section taken along dashed line I9-I9 in FIG. 26, viewed in the +Y direction.

[0096] 25 and 26, grooves 35b may be formed perpendicularly from one short side of the heat dissipation surface 22a to the outside at an end of one short side of the sealing lower surface 35a in a plan view of the semiconductor module 2 formed in step S2, for example, by cutting. The grooves 35b may be formed at any location and in any number as long as they extend from the side surface of the sealing member 35 to the side surface of the heat dissipation surface 22a. Furthermore, the width of the grooves 35b (in the ±Y direction or ±X direction) may be any predetermined length.

[0097] The groove 35b does not necessarily have to be formed in the semiconductor module 2 in step S3. For example, during the sealing in step S2c, the groove 35b may be introduced by leaving a space in the semiconductor module 2 where the groove 35b is to be formed and sealing the semiconductor module 2 with the sealing member 35.

[0098] Next, the first portion 4b1 of the conductive portion 4b is applied to the groove 35b in the sealing lower surface 35a of the semiconductor module 2. The adhesive applied here may be, for example, a conductive adhesive. The outer end of the applied first portion 4b1 of the conductive portion 4b is exposed from the side surface of the sealing member 35.

[0099] Next, the thermally conductive portion 4a is applied to the region of the cooling surface 3a of the cooling module 3 where the sealing lower surface 35a is to be disposed. Alternatively, the thermally conductive portion 4a may be applied to the entire sealing lower surface 35a including the first portion 4b1 of the conductive portion 4b of the semiconductor module 2.

[0100] Next, an attachment step is performed in which the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2 is attached to the cooling surface 3a of the cooling module 3 via the heat conductive portion 4a of the bonding member 4 (step S4). This attachment step will be described with reference to FIG. 27 . FIG. 27 is a diagram for explaining the attachment step of the sixth embodiment. The attachment step is performed in the same manner as in the first embodiment, and as shown in FIG. 27 , the heat conductive portion 4a is provided between the sealing lower surface 35a including the first portion 4b1 of the conductive portion 4b of the semiconductor module 2 and the cooling surface 3a of the cooling module 3.

[0101] A second portion 4b2 of the conductive portion 4b is formed on the cooling surface 3a of the cooling module 3 from the outer end of the first portion 4b1 of the conductive portion 4b exposed from the side surface of the sealing member 35 of the semiconductor module 2 along the side of the heat conduction portion 4a. For example, a conductive adhesive may be applied as the second portion 4b2 from the outer end of the first portion 4b1 of the conductive portion 4b exposed from the side surface of the sealing member 35 of the semiconductor module 2 along the side of the heat conduction portion 4a to the cooling surface 3a of the cooling module 3. In this manner, the semiconductor device 1e shown in FIGS. 22 to 24 is obtained.

[0102] In the sixth embodiment, the joining member 4 also includes a heat-conducting portion 4a that joins the heat dissipation surface 22a and the cooling surface 3a, and a conductive portion 4b that directly connects the heat dissipation plate 22 and the cooling surface 3a, respectively. This allows the heat dissipation plate 22 and the cooling module 3 to be at the same potential, preventing the occurrence of corona discharge. The semiconductor device of the sixth embodiment is electrically stable, preventing a decrease in reliability.

[0103] The foregoing merely illustrates the principles of the present invention. Further, since numerous modifications and changes will be apparent to those skilled in the art, the present invention is not limited to the exact construction and application shown and described above, and all corresponding modifications and equivalents are deemed to be within the scope of the present invention as defined by the appended claims and their equivalents.

[0104] REFERENCE SIGNS LIST 1, 1a, 1b, 1d, 1e Semiconductor device 2 Semiconductor module 3 Cooling module 3a Cooling surface 4 Joining member 4a Heat conduction portion 4b Conductive portion 4b1 First portion 4b2 Second portion 4c Gap 10a, 10b, 10d, 10e Semiconductor chip 12 Solder 20 Insulated circuit board 21 Insulating plate 22 Heat sink 22a Heat dissipation surface 23a, 23b Conductive circuit pattern 30 Printed circuit board 31a, 31b, 31c, 31d, 31e, 31f Conductive post 32 Solder 35 Sealing member 35a Sealing lower surface 35b Groove

Claims

1. A semiconductor device, comprising: a heat sink including a heat dissipation surface; a cooling module including a cooling surface on which the heat dissipation surface of the heat sink is disposed; and a joining member provided between the heat dissipation surface and the cooling surface, wherein the joining member includes a heat conduction portion that joins the heat dissipation surface and the cooling surface, and conductive portions that are directly connected to the heat sink and the cooling surface, respectively.

2. The semiconductor device according to claim 1, wherein the heat conduction portion of the joining member has insulation properties and adheres to the heat dissipation surface and the cooling surface.

3. The semiconductor device according to claim 2, wherein the heat conduction portion of the joining member is composed mainly of an epoxy resin.

4. The semiconductor device according to claim 3, wherein the conductive portion of the joining member is composed of the same main component as the heat conduction portion and includes a conductive filler.

5. The semiconductor device according to claim 4, wherein the filler is composed mainly of silver, copper, gold, nickel, chromium, aluminum, or an alloy containing at least one of these.

6. The semiconductor device according to claim 1, wherein the conductive portion of the joining member is composed mainly of a conductive member.

7. The semiconductor device according to claim 6, wherein the conductive member is any one of solder, a metal particle paste, or a conductive adhesive.

8. The semiconductor device according to claim 7, wherein the metal particles constituting the metal particle paste are silver, copper, or an alloy containing any of these.

9. The semiconductor device according to claim 1, wherein the joining member has a shape that coincides with the heat dissipation surface of the heat sink in a plan view.

10. The semiconductor device according to claim 9, wherein the joining member includes the conductive portion along the outer edge of the heat dissipation surface of the heat sink.

11. The semiconductor device according to claim 10, wherein the joining member includes the conductive portion continuously along the outer edge of the heat dissipation surface of the heat sink in an annular shape.

12. The semiconductor device according to claim 10, wherein the heat dissipation surface of the heat sink has a rectangular shape in a plan view, and the joining member includes the conductive portion along the sides of the outer edge of the heat dissipation surface of the heat sink.

13. The semiconductor device according to claim 10, wherein the joining member includes the heat conduction portion in a range excluding the conductive portion.

14. The semiconductor device according to claim 10, wherein the joining member includes the heat conduction portion and the conductive portion in contact with each other.

15. The semiconductor device according to claim 10, wherein the joining member includes the heat conduction portion and the conductive portion with a gap therebetween.

16. The semiconductor device according to claim 1, comprising a semiconductor module including the heat sink and a sealing member that seals the heat sink and has a heat dissipation surface exposed from a lower sealing surface, wherein the joining member has a shape wider than the heat dissipation surface of the heat sink in a plan view.

17. The semiconductor device according to claim 16, wherein the joining member includes the conductive portion in a range in contact with the heat dissipation surface of the heat sink in a plan view.

18. The semiconductor device according to claim 1, wherein the heat conduction portion of the joining member has a shape wider than the heat dissipation surface in a plan view, and the conductive portion of the joining member connects the cooling surface and the side surface of the heat sink through a portion protruding from the heat sink of the heat conduction portion.

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