DC / DC converter, and DC / DC converter control method

The DC/DC converter with synchronized gate and screen signals stabilizes transformer current, addressing hard switching and efficiency loss, thereby enhancing conversion efficiency.

WO2025154413A1PCT designated stage expired Publication Date: 2025-07-24MITSUBISHI HEAVY IND LTD
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Patent Information

Application Number
PCT/JP2024/042517
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-16
Filing Date
2024-12-02
Publication Date
2025-07-24

AI Technical Summary

Technical Problem

Conventional DC/DC converters using the DAB method experience hard switching and efficiency loss due to voltage fluctuations and light load conditions, leading to power loss and reduced conversion efficiency.

Method used

A DC/DC converter with a control method that includes a transformer, primary-side and secondary-side bridge circuits, and a control unit that generates gate signals synchronized with screen signals to suppress hard switching, achieving soft switching by stabilizing transformer current near zero.

Benefits of technology

The solution effectively reduces losses and improves conversion efficiency by suppressing hard switching and enabling soft switching.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

This DC / DC converter comprises: a transformer; a primary-side bridge circuit that is connected to the primary side of the transformer and includes a plurality of switching elements that perform on / off switching by means of a gate signal; a secondary-side bridge circuit that is connected to the secondary side of the transformer and has a plurality of switching elements that perform on / off switching by means of a gate signal; and a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit. The control unit generates a gate signal, determines whether the positive / negative of the transformer current detected by the transformer is reversed, when it is determined that the transformer current is reversed, generates a screen signal for turning off a part of the generated gate signal in a screen period including a timing at which the positive / negative of the transformer current is reversed, combines the generated gate signal and the generated screen signal, and outputs the combined signal to the switching element.
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Description

DC / DC converter and method for controlling DC / DC converter

[0001] The present disclosure relates to a DC / DC converter and a method for controlling a DC / DC converter.

[0002] Conventionally, a dual active bridge (DAB) DC / DC converter has been known (see, for example, Patent Document 1). This DC / DC converter performs intermittent operation by alternately generating transmission periods and pause periods, and adjusts the length of the pause periods to adjust the transmission power. Furthermore, during intermittent operation, the DC / DC converter controls the first full-bridge circuit and the second full-bridge circuit so that hard switching occurs in a balanced manner between positive and negative polarities over time.

[0003] JP 2019-118234 A

[0004] Hard switching is likely to occur during voltage fluctuations (as shown in Figure 1, when the primary voltage V1 differs from the output voltage nV2, calculated by multiplying the secondary voltage V2 by the transformer turns ratio n) and under light loads. In other words, when voltage fluctuations occur, the transformer current changes more abruptly than when there is no voltage fluctuation (V1 = nV2). As a result, in DC / DC converters, diodes included in switching elements undergo recovery, temporarily entering a short-circuit state, i.e., hard switching, resulting in power loss and reduced conversion efficiency. Furthermore, under light loads, the transformer current decreases, and even a slight deviation of the primary and secondary voltages from the reference voltages makes the transformer current more likely to cross zero, i.e., reverse polarity. As a result, in DC / DC converters, diode recovery, similar to when voltage fluctuations occur, results in hard switching, resulting in power loss and reduced conversion efficiency.

[0005] Therefore, an object of the present disclosure is to provide a DC / DC converter and a control method for a DC / DC converter that can reduce losses and improve conversion efficiency by suppressing hard switching and using soft switching.

[0006] A DC / DC converter according to the present disclosure includes a transformer, a primary-side bridge circuit connected to the primary side of the transformer and having a plurality of switching elements that are switched on and off by a gate signal, a secondary-side bridge circuit connected to the secondary side of the transformer and having a plurality of switching elements that are switched on and off by a gate signal, and a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit, wherein the control unit generates the gate signal, determines whether or not a transformer current detected by the transformer will reverse in sign, and, if it determines that the transformer current will reverse, generates a screen signal to turn off a portion of the generated gate signal during a screen period that includes the timing at which the transformer current reverses in sign, and combines the generated gate signal with the generated screen signal to output the combined signal to the switching elements.

[0007] A control method for a DC / DC converter according to the present disclosure is a control method for a DC / DC converter including a transformer, a primary-side bridge circuit connected to the primary side of the transformer and having a plurality of switching elements that are switched on / off by a gate signal, a secondary-side bridge circuit connected to the secondary side of the transformer and having a plurality of switching elements that are switched on / off by a gate signal, and a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit, wherein the control unit generates the gate signal, determines whether or not a transformer current detected by the transformer will reverse in sign, and, if it determines that the transformer current will reverse, generates a screen signal for turning off a portion of the generated gate signal during a screen period that includes the timing at which the transformer current reverses in sign, and combines the generated gate signal with the generated screen signal to output the combined signal to the switching elements.

[0008] According to the present disclosure, by suppressing hard switching and using soft switching, it is possible to reduce losses and improve conversion efficiency.

[0009] FIG. 1 is a schematic diagram of a DC / DC converter according to this embodiment. FIG. 2 is a graph of a gate signal during boost operation in normal mode of the DC / DC converter. FIG. 3 is a graph of a gate signal during buck operation in normal mode of the DC / DC converter. FIG. 4 is a block diagram of a control device for a DC / DC converter according to this embodiment. FIG. 5 is a graph of a gate signal during boost operation in screen mode of the DC / DC converter. FIG. 6 is a graph of a gate signal during buck operation in screen mode of the DC / DC converter. FIG. 7 is a flowchart of an example of a control method for a DC / DC converter according to this embodiment. FIG. 8 is a flowchart of an example of a control method for a DC / DC converter according to this embodiment. FIG. 9 is a flowchart of an example of a control method for a DC / DC converter according to this embodiment. FIG. 10 is a flowchart of an example of a control method for a DC / DC converter according to this embodiment. FIG. 11 is a flowchart of an example of a control method for a DC / DC converter according to this embodiment.

[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. However, this disclosure is not limited to these embodiments. Furthermore, the components in the following embodiments include those that are easily replaceable by those skilled in the art, or those that are substantially identical. Furthermore, the components described below can be combined as appropriate, and when there are multiple embodiments, the respective embodiments can also be combined.

[0011] [Present Embodiment] A DC / DC converter 10 according to this embodiment is a so-called DAB (Dual Active Bridge) type bidirectional DC / DC converter. Fig. 1 is a schematic configuration diagram of the DC / DC converter according to this embodiment. The DC / DC converter 10 will be described with reference to Fig. 1.

[0012] (DC / DC Converter) The DC / DC converter includes a transformer 20, a primary bridge circuit 21, a secondary bridge circuit 22, and a control device 25 (see FIG. 4).

[0013] The transformer 20 has a primary coil W1 and a secondary coil W2. The winding ratio between the primary coil W1 and the secondary coil W2 is n:1, where the number of turns of the secondary coil W2 is 1. The transformer 20 also includes an inductor L 1 The primary coil W1 is connected to a primary bridge circuit 21 via an inductor L 2 A secondary bridge circuit 22 is connected to the secondary coil W2 via a

[0014] The primary-side bridge circuit 21 includes a first switching element Q1, a second switching element Q2, a third switching element Q3, a fourth switching element Q4, and a primary capacitor C1. The first switching element Q1 and the second switching element Q2 are connected in series, and the third switching element Q3 and the fourth switching element Q4 are connected in series. The first switching element Q1 and the second switching element Q2, the third switching element Q3 and the fourth switching element Q4, and the primary capacitor C1 are connected in parallel.

[0015] The anode side of the first switching element Q1 is connected to one terminal side of the primary coil W1 (inductor L 1 The cathode of the second switching element Q2 is connected to one terminal of the primary coil W1 and its anode is connected to the other terminal of the primary coil W1 via the fourth switching element Q4. The anode of the third switching element Q3 is connected to the other terminal of the primary coil W1 and its cathode is connected to one terminal of the primary coil W1 via the first switching element Q1. The cathode of the fourth switching element Q4 is connected to the other terminal of the primary coil W1 and its anode is connected to one terminal of the primary coil W1 via the second switching element Q2. The first switching element Q1 and the fourth switching element Q4 operate synchronously, and the second switching element Q2 and the third switching element Q3 operate synchronously.

[0016] The primary capacitor C1 is connected to the cathode side of the diode of the first switching element Q1 and the anode side of the diode of the second switching element Q2.

[0017] The secondary-side bridge circuit 22 includes a fifth switching element Q5, a sixth switching element Q6, a seventh switching element Q7, an eighth switching element Q8, and a secondary capacitor C2. The fifth switching element Q5 and the sixth switching element Q6 are connected in series, and the seventh switching element Q7 and the eighth switching element Q8 are connected in series. The fifth switching element Q5 and the sixth switching element Q6, the seventh switching element Q7 and the eighth switching element Q8, and the secondary capacitor C2 are connected in parallel.

[0018] The fifth switching element Q5 has an anode connected to one terminal side of the secondary coil W2 (inductor L 2 The sixth switching element Q6 has its cathode connected to one terminal of the secondary coil W2 and its anode connected to the other terminal of the secondary coil W2 via the eighth switching element Q8. The seventh switching element Q7 has its anode connected to the other terminal of the secondary coil W2 and its cathode connected to one terminal of the secondary coil W2 via the fifth switching element Q5. The eighth switching element Q8 has its cathode connected to the other terminal of the secondary coil W2 and its anode connected to one terminal of the secondary coil W2 via the sixth switching element Q6. The fifth switching element Q5 and the eighth switching element Q8 operate synchronously, and the sixth switching element Q6 and the seventh switching element Q7 operate synchronously.

[0019] The secondary capacitor C2 is connected to the cathode side of the diode of the seventh switching element Q7 and the anode side of the diode of the eighth switching element Q8.

[0020] These switching elements Q1 to Q8 include diodes, and are implemented by power semiconductor switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors). The switching elements Q1 to Q8 are switched on and off by inputting a gate signal.

[0021] For simplicity, the following description will be given assuming that the primary side is the input side and the secondary side is the output side. The power transmission direction will be described as the direction from the primary bridge circuit 21 to the secondary bridge circuit 22. However, the same control is performed in the reverse direction, i.e., when power is transmitted from the secondary bridge circuit 22 to the primary bridge circuit 21. When the power transmission direction is reversed, the corresponding switching elements (Q1 and Q5, Q2 and Q6, Q3 and Q7, Q4 and Q8) of the primary bridge circuit 21 and the secondary bridge circuit 22 are swapped, and the reverse flow of the transformer current iac (described later) is considered to be positive. The primary side voltage is V1, and the secondary side voltage is V2. In this embodiment, the boost operation of the DC / DC converter 10 takes the turns ratio into consideration and is an operation in which the output voltage nV2 is greater than the input voltage V1. In this embodiment, the step-down operation of the DC / DC converter 10 takes the turns ratio into consideration, and is an operation in which the output voltage nV2 is smaller than the input voltage V1.

[0022] Next, with reference to FIGS. 2 and 3 , gate signals during step-up operation and step-down operation in the normal mode of the DC / DC converter will be described. FIG. 2 is a graph of the gate signals during step-up operation in the normal mode of the DC / DC converter. FIG. 3 is a graph of the gate signals during step-down operation in the normal mode of the DC / DC converter. In FIGS. 2 and 3 , the gate signals input to the first switching element Q1 and the fourth switching element Q4 are designated as gate signals Vg(Q1, Q4). Similarly, the gate signals input to the second switching element Q2 and the third switching element Q3 are designated as gate signals Vg(Q2, Q3), the gate signals input to the fifth switching element Q5 and the eighth switching element Q8 are designated as gate signals Vg(Q5, Q8), and the gate signals input to the sixth switching element Q6 and the seventh switching element Q7 are designated as gate signals Vg(Q6, Q7). When the gate signal Vg is in a high state, the switching elements Q1 to Q8 are turned on, and when the gate signal Vg is in a low state, the switching elements Q1 to Q8 are turned off.

[0023] When the DC / DC converter is in normal mode and performing boost operation, the gate signal Vg changes over one control period as shown in FIG. 2 . Specifically, at the timing when the gate signal Vg (Q1, Q4) switches to a high state, the gate signals Vg (Q2, Q3) and Vg (Q5, Q8) are in a low state, and the gate signal Vg (Q6, Q7) is in a high state. After this, the gate signal Vg (Q6, Q7) switches to a low state, and then the gate signal Vg (Q5, Q8) switches to a high state. After a predetermined period has elapsed, the gate signal Vg (Q1, Q4) switches to a low state, and then the gate signal Vg (Q2, Q3) switches to a high state. After this, the gate signal Vg (Q5, Q8) switches to a low state, and then the gate signal Vg (Q6, Q7) switches to a high state. After a predetermined period has elapsed, the gate signal Vg (Q2, Q3) goes to a low state before the gate signal Vg (Q1, Q4) switches to a high state.

[0024] On the other hand, when the DC / DC converter is in normal mode and performing step-down operation, the gate signal Vg changes over one control period as shown in Fig. 3. The timing of switching the gate signal Vg on and off is almost the same as in Fig. 2, and therefore will not be described here.

[0025] When the DC / DC converter is operated in normal mode, recovery may occur in the diodes of the switching elements Q1 to Q8, resulting in hard switching. During step-up operation in FIG. 2, this occurs when the gate signals Vg (Q2, Q3) are on and when the gate signals Vg (Q1, Q4) are on. During step-down operation in FIG. 3, this occurs when the gate signals Vg (Q5, Q8) are on and when the gate signals Vg (Q6, Q7) are on. To prevent recovery from occurring, the control device (controller) 25 performs the following process when generating the gate signals. The control device 25 will now be described with reference to FIG. 4.

[0026] 4 is a block diagram of a control device for a DC / DC converter according to this embodiment. The control device 25 includes a gate signal generator 31, a transformer current detection circuit 32, a logic circuit 33, and a gate drive circuit 34.

[0027] The gate signal generating unit 31 is a processing unit that generates a gate signal Vg (original gate signal) with a duty ratio of approximately 50% used in normal DAB control, and is implemented, for example, by a microcomputer. A screen signal or a signal that can determine whether or not a screen signal is output is input to the gate signal generating unit 31 from a first logic circuit 33a (described later). The gate signal generating unit 31 switches between normal mode and screen mode based on whether or not a screen signal is input. In other words, when a screen signal is input, the gate signal generating unit 31 generates a gate signal Vg corresponding to the screen mode, whereas when a screen signal is not input, the gate signal generating unit 31 generates a gate signal Vg corresponding to the normal mode.

[0028] Here, the screen mode is a mode that suppresses occurrence of hard switching in the DC / DC converter 10. On the other hand, the normal mode is a mode in which the DC / DC converter 10 operates normally.

[0029] The transformer current detection circuit 32 detects the transformer current iac flowing through the transformer 20. The transformer current detection circuit 32 outputs to the logic circuit 33 a signal corresponding to the positive or negative value of the detected transformer current iac.

[0030] The logic circuit 33 receives a gate signal from the gate signal generating unit 31 and a signal corresponding to the positive or negative sign of the transformer current iac from the transformer current detecting circuit 32. Based on the input signal corresponding to the positive or negative sign of the transformer current iac, the logic circuit 33 determines whether to operate in the normal mode or the screen mode, and generates a screen signal if operating in the screen mode.

[0031] The logic circuit 33 includes a first logic circuit 33a and a second logic circuit 33b. The first logic circuit 33a is a circuit that generates a screen signal and has a boost logic 33a1 that generates a screen signal during boost operation and a step-down logic 33a2 that generates a screen signal during step-down operation. The second logic circuit 33b is a circuit that outputs an original gate signal in normal mode and outputs a gate signal that combines the original gate signal and the screen signal in screen mode. The second logic circuit 33b has a boost logic 33b1 that combines signals during boost operation and a step-down logic 33b2 that combines signals during step-down operation.

[0032] The gate drive circuit 34 is a circuit that drives the switching elements Q1 to Q8 based on the gate signal output from the second logic circuit 33b.

[0033] 5 and 6, the screen signal generated by the control device 25, the gate signal synthesized with the screen signal, and the transformer current iac will be described. Fig. 5 is a graph of the gate signal during voltage step-up operation in the screen mode of the DC / DC converter. Fig. 6 is a graph of the gate signal during voltage step-down operation in the screen mode of the DC / DC converter.

[0034] The screen signal generated during boost operation in the screen mode of the DC / DC converter 10 is the signal shown in FIG. 5 . Specifically, the screen signal goes high when the gate signal Vg (Q1, Q4) is high and the transformer current iac inverts from positive to negative. Thereafter, the screen signal goes low when the gate signal Vg (Q2, Q3) switches to high. The screen signal also goes high when the gate signal Vg (Q2, Q3) is high and the transformer current iac inverts from negative to positive. Thereafter, the screen signal goes low when the gate signal Vg (Q1, Q4) switches to high. The period during which the screen signal is high is referred to as the screening period.

[0035] During boost operation, the generated screen signal is combined with the gate signal Vg in the secondary-side bridge circuit 22. Specifically, when the screen signal is in a High state and the gate signal Vg (Q5, Q6, Q7, Q8) is also in a High state, the gate signal Vg (Q5, Q6, Q7, Q8) is set to a Low state in the section where the High states overlap. On the other hand, during boost operation, the generated screen signal is not combined with the gate signal Vg in the primary-side bridge circuit 21, and the original gate signal is output as is.

[0036] The screen signal generated during step-down operation in the screen mode of the DC / DC converter 10 is the signal shown in Fig. 6. Specifically, the screen signal goes high when the gate signal Vg (Q1, Q4) switches to high. Thereafter, the screen signal goes low when the gate signal Vg (Q5, Q8) switches to high. The screen signal also goes high when the gate signal Vg (Q2, Q3) switches to high. Thereafter, the screen signal goes low when the gate signal Vg (Q6, Q7) switches to high.

[0037] During step-down operation, the generated screen signal is combined with the gate signal Vg in the primary-side bridge circuit 21. Specifically, when the screen signal is in a high state and the gate signal Vg (Q1, Q2, Q3, Q4) is also in a high state, the gate signal Vg (Q1, Q2, Q3, Q4) is set to a low state in the section where the high states overlap. On the other hand, during step-down operation, the generated screen signal is not combined with the gate signal Vg in the secondary-side bridge circuit 22, and the original gate signal is output as is.

[0038] In this way, by switching the switching elements Q1 to Q8 on and off using a gate signal combined with a screen signal, the transformer current iac becomes stable near zero during voltage step-up operation and voltage step-down operation, the occurrence of recovery is suppressed, and soft switching (ZCS: Zero Current Switching) becomes possible.

[0039] (Control Method of DC / DC Converter) Next, a control method of the DC / DC converter 10 will be described with reference to Fig. 7 to Fig. 11. Fig. 7 to Fig. 11 are flowcharts of an example of a control method of the DC / DC converter according to this embodiment.

[0040] The control method shown in FIG. 7 involves the gate signal generation unit 31 determining whether the mode is normal or screen mode and generating a gate signal Vg. The gate signal generation unit 31 determines whether a screen signal has been input from the first logic circuit 33a (whether the screen period is greater than zero) (step S1). If the gate signal generation unit 31 determines that a screen signal has been input (step S1: Yes), it sets the operation mode of the DC / DC converter 10 to the screen mode and determines whether the output voltage is a desired output (step S2). If the gate signal generation unit 31 determines that the output voltage is a desired output (step S2: Yes), it generates a gate signal Vg corresponding to the screen mode and outputs it to the first logic circuit 33a and the second logic circuit 33b (step S3). On the other hand, if the gate signal generation unit 31 determines that the output voltage is not a desired output (step S2: No) in step S2, it adjusts the phase difference between the gate signals Vg to adjust the output voltage (step S4). Thereafter, the gate signal generating unit 31 generates a gate signal Vg in which the phase difference corresponding to the screen mode has been adjusted, and outputs the gate signal Vg to the first logic circuit 33a and the second logic circuit 33b (step S5).

[0041] If the gate signal generating unit 31 determines in step S1 that a screen signal has not been input (step S1: No), it sets the operation mode of the DC / DC converter 10 to the normal mode and determines whether the output voltage is the desired output (step S7). If the gate signal generating unit 31 determines that the output voltage is the desired output (step S7: Yes), it generates a gate signal Vg corresponding to the operation mode and outputs it to the first logic circuit 33a and the second logic circuit 33b (step S8). On the other hand, if the gate signal generating unit 31 determines in step S7 that the output voltage is not the desired output (step S7: No), it adjusts the phase difference between the gate signals Vg to adjust the output voltage (step S9). Thereafter, the gate signal generating unit 31 generates a gate signal Vg with the phase difference adjusted corresponding to the normal mode and outputs it to the first logic circuit 33a and the second logic circuit 33b (step S10).

[0042] After executing steps S3, S5, S8, and S10, the gate signal generating unit 31 ends the process of generating the gate signal Vg.

[0043] 8, the control method is a process of generating a screen signal in the boost logic 33a1 of the first logic circuit 33a when in the screen mode. The first logic circuit 33a determines whether the transformer current iac is positive or negative at the timing when the gate signal Vg (Q2, Q3) becomes high (when Q2, Q3 are ON) based on the original gate signal input from the gate signal generating unit 31 and the signal corresponding to the positive or negative of the transformer current iac input from the transformer current detecting circuit 32 (step S21).

[0044] When the first logic circuit 33a determines that the condition of step S21 is satisfied (step S21: Yes), it determines that the operation mode of the DC / DC converter 10 is the screen mode, generates a screen signal shown on the right side of Fig. 5, and outputs it to the gate signal generator 31 and the second logic circuit 33b (step S22). Specifically, the screen signal (second screen signal) generated in step S22 is a signal that goes to a high state when the gate signal Vg (Q2, Q3) is in a high state and the transformer current iac is inverted from negative to positive, and goes to a low state when the gate signal Vg (Q1, Q4) switches to a high state.

[0045] When the first logic circuit 33a determines that the condition of step S21 is not satisfied (step S21: No), it determines whether the transformer current iac is negative at the timing when the gate signal Vg (Q1, Q4) becomes high (when Q1, Q4 are ON) (step S23).

[0046] When the first logic circuit 33a determines that the condition of step S23 is satisfied (step S23: Yes), it determines that the operation mode of the DC / DC converter 10 is the screen mode, generates the screen signal shown on the left side of Fig. 5, and outputs it to the gate signal generator 31 and the second logic circuit 33b (step S22). Specifically, the screen signal (first screen signal) generated in step S22 is a signal that goes to a high state when the gate signal Vg (Q1, Q4) is in a high state and the transformer current iac is inverted from positive to negative, and goes to a low state when the gate signal Vg (Q2, Q3) switches to a high state.

[0047] If the first logic circuit 33a determines that the condition of step S23 is not satisfied (step S23: No), it determines that the operating mode of the DC / DC converter 10 is normal mode, generates a screen signal that is in a low state, and outputs it to the gate signal generating unit 31 and the second logic circuit 33b (step S24).

[0048] After executing steps S22 and S24, the first logic circuit 33a ends the process of generating the screen signal.

[0049] 9, the boost logic 33b1 of the second logic circuit 33b combines a gate signal with a screen signal. Based on the original gate signal Vg input from the gate signal generator 31 and the screen signal input from the first logic circuit 33a, the second logic circuit 33b determines whether the gate signal Vg (Q5, Q6, Q7, Q8) is in a high state and whether the screen signal is also in a high state (step S31). If the second logic circuit 33b determines that the condition of step S31 is satisfied (step S31: Yes), the second logic circuit 33b generates a gate signal Vg in which the gate signals Vg (Q5, Q6, Q7, Q8) are in a low state during the overlapping high-state intervals, and outputs the gate signal Vg to the gate drive circuit 34 (step S32). If the second logic circuit 33b determines that the condition of step S31 is not satisfied (step S31: No), it outputs the original gate signal Vg to the gate drive circuit 34 (step S33).

[0050] After executing steps S32 and S33, the second logic circuit 33b ends the process of combining the screen signal with the gate signal Vg.

[0051] 10, the control method is a process of generating a screen signal in the step-down logic 33a2 of the first logic circuit 33a when in the screen mode. The first logic circuit 33a determines whether the transformer current iac is negative or not when the gate signal Vg (Q5, Q8) becomes high (when Q5, Q8 are ON) based on the original gate signal input from the gate signal generating unit 31 and the signal corresponding to the positive or negative sign of the transformer current iac input from the transformer current detecting circuit 32 (step S41).

[0052] When the first logic circuit 33a determines that the condition of step S41 is satisfied (step S41: Yes), it determines that the operation mode of the DC / DC converter 10 is the screen mode, generates a screen signal shown on the left side of Fig. 6, and outputs it to the gate signal generator 31 and the second logic circuit 33b (step S42). Specifically, the screen signal (third screen signal) generated in step S42 is a signal that goes to a High state when the gate signal Vg (Q1, Q4) switches to a High state, and goes to a Low state when the gate signal Vg (Q5, Q8) switches to a High state.

[0053] When the first logic circuit 33a determines that the condition of step S41 is not satisfied (step S41: No), it determines whether the transformer current iac is positive or not at the timing when the gate signal Vg (Q6, Q7) becomes high (when Q6, Q7 are ON) (step S43).

[0054] If the first logic circuit 33a determines that the condition of step S43 is satisfied (step S43: Yes), it determines that the operation mode of the DC / DC converter 10 is the screen mode, generates a screen signal shown on the right side of Fig. 6, and outputs it to the gate signal generator 31 and the second logic circuit 33b (step S42). Specifically, the screen signal (fourth screen signal) generated in step S42 is a signal that goes to a High state when the gate signal Vg (Q2, Q3) switches to a High state, and goes to a Low state when the gate signal Vg (Q6, Q7) switches to a High state.

[0055] If the first logic circuit 33a determines that the condition of step S43 is not satisfied (step S43: No), it determines that the operating mode of the DC / DC converter 10 is normal mode, generates a screen signal that is in a low state, and outputs it to the gate signal generating unit 31 and the second logic circuit 33b (step S44).

[0056] After executing steps S42 and S44, the first logic circuit 33a ends the process of generating the screen signal.

[0057] 11 , the step-down logic 33b2 of the second logic circuit 33b combines a gate signal with a screen signal. Based on the original gate signal Vg input from the gate signal generator 31 and the screen signal input from the first logic circuit 33a, the second logic circuit 33b determines whether the gate signal Vg (Q1, Q2, Q3, Q4) is in a high state and whether the screen signal is also in a high state (step S51). If the second logic circuit 33b determines that the condition of step S51 is satisfied (step S51: Yes), the second logic circuit 33b generates a gate signal Vg in which the gate signals Vg (Q1, Q2, Q3, Q4) are in a low state during the overlapping high-state intervals, and outputs the gate signal Vg to the gate drive circuit 34 (step S52). If the second logic circuit 33b determines that the condition of step S51 is not satisfied (step S51: No), it outputs the original gate signal Vg to the gate drive circuit 34 (step S53).

[0058] After executing steps S52 and S53, the second logic circuit 33b ends the process of combining the gate signal Vg with the screen signal.

[0059] In this embodiment, the transformer current detection circuit 32 is used to detect the polarity of the transformer current iac, and the screening signal is generated based on the detection result, but this configuration is not particularly limited. The timing of the polarity reversal of the transformer current iac may be estimated using an estimator, and the screening signal may be generated based on the estimation result.

[0060] In addition, in this embodiment, the screening signal is generated so that the transformer current iac is stable near zero, but the screening signal may be generated so that the transformer current iac is a value offset from zero to a predetermined positive or negative value.

[0061] As described above, the DC / DC converter 10 and the control method for the DC / DC converter 10 according to this embodiment can be understood, for example, as follows.

[0062] A DC / DC converter 10 according to a first aspect includes a transformer 20, a primary-side bridge circuit 21 connected to the primary side of the transformer 20 and having a plurality of switching elements that are switched on and off by a gate signal Vg, a secondary-side bridge circuit 22 connected to the secondary side of the transformer 20 and having a plurality of switching elements that are switched on and off by a gate signal Vg, and a control unit (control device 25) that controls the primary-side bridge circuit 21 and the secondary-side bridge circuit 22. The control unit generates the gate signal Vg, determines whether or not a transformer current iac detected by the transformer 20 will reverse in sign, and, if it determines that the transformer current iac will reverse, generates a screen signal for turning off a part of the generated gate signal Vg during a screen period that includes a timing when the transformer current iac reverses in sign, and combines the generated gate signal Vg and the generated screen signal to output the result to the switching elements.

[0063] According to this configuration, hard switching that occurs when the transformer current iac reverses between positive and negative can be suppressed, and soft switching can be achieved, thereby reducing losses and improving conversion efficiency.

[0064] As a second aspect, in the DC / DC converter 10 according to the first aspect, the primary bridge circuit 21 has a first switching element Q1, a second switching element Q2, a third switching element Q3, and a fourth switching element Q4, the anode side of the first switching element Q1 is connected to one terminal side of a primary coil (primary coil W1) of the transformer 20, and the cathode side is connected to the other terminal side of the primary coil via the third switching element Q3, and the second switching element Q2 has a cathode side is connected to one terminal of the primary coil, and its anode side is connected to the other terminal of the primary coil via the fourth switching element Q4, the third switching element Q3 operates in synchronization with the second switching element Q2, and its anode side is connected to the other terminal of the primary coil, and its cathode side is connected to one terminal of the primary coil via the first switching element Q1, the fourth switching element Q4 operates in synchronization with the first switching element Q1, and its cathode side is connected to the The secondary bridge circuit 22 has a fifth switching element Q5, a sixth switching element Q6, a seventh switching element Q7, and an eighth switching element Q8, and the anode side of the fifth switching element Q5 is connected to one terminal side of the secondary coil (secondary coil W2) of the transformer 20, and the cathode side is connected to one terminal side of the secondary coil W2 via the seventh switching element Q7. The sixth switching element Q6 has a cathode connected to one terminal of the secondary coil and an anode connected to the other terminal of the secondary coil via the eighth switching element Q8, the seventh switching element Q7 operates in synchronization with the sixth switching element Q6, and has an anode connected to the other terminal of the secondary coil and a cathode connected to one terminal of the secondary coil via the fifth switching element Q5, and the eighth switching element Q8The sixth switching element Q5 operates in synchronization with the fifth switching element Q5, and has a cathode connected to the other terminal of the secondary coil and an anode connected to one terminal of the secondary coil via the sixth switching element Q6. If the voltage in the primary bridge circuit 21 is V1, the turns ratio of the number of turns of the primary coil to the number of turns of the secondary coil of the transformer 20 is n:1, and the voltage in the secondary bridge circuit 22 is V2, during a boost operation in which the voltage nV2 is greater than the voltage V1, if the transformer current iac reverses from positive to negative, the control unit generates a first screen signal that turns off the gate signal Vg of the fifth switching element Q5 and the eighth switching element Q8 during the screen period, and if the transformer current iac reverses from negative to positive, the control unit generates a second screen signal that turns off the gate signal Vg of the sixth switching element Q6 and the seventh switching element Q7 during the screen period.

[0065] According to this configuration, the first screen signal and the second screen signal can suitably suppress hard switching that occurs during voltage step-up operation.

[0066] As a third aspect, in the DC / DC converter 10 according to the second aspect, the first screen signal is a signal that turns on when the first switching element Q1 and the fourth switching element Q4 are on and the transformer current iac becomes negative, and that turns off when the second switching element Q2 and the third switching element Q3 are on.

[0067] According to this configuration, it is possible to generate a first screen signal that can effectively suppress hard switching.

[0068] As a fourth aspect, in the DC / DC converter 10 according to the second or third aspect, the second screen signal is a signal that is turned on when the second switching element Q2 and the third switching element Q3 are on and the transformer current iac becomes positive, and that is turned off when the first switching element Q1 and the fourth switching element Q4 are on.

[0069] According to this configuration, it is possible to generate a second screen signal that can effectively suppress hard switching.

[0070] As a fifth aspect, in the DC / DC converter 10 according to any one of the first to fourth aspects, the primary bridge circuit 21 has a first switching element Q1, a second switching element Q2, a third switching element Q3, and a fourth switching element Q4, the anode side of the first switching element Q1 is connected to one terminal side of a primary coil of the transformer 20, and the cathode side is connected to the other terminal side of the primary coil via the third switching element Q3, and the cathode side of the second switching element Q2 is connected to the The third switching element Q3 operates in synchronization with the second switching element Q2, and has an anode connected to the other terminal of the primary coil and a cathode connected to one terminal of the primary coil via the first switching element Q1. The fourth switching element Q4 operates in synchronization with the first switching element Q1, and has an anode connected to the other terminal of the primary coil and a cathode connected to one terminal of the primary coil via the first switching element Q1. The secondary-side bridge circuit 22 has a fifth switching element Q5, a sixth switching element Q6, a seventh switching element Q7, and an eighth switching element Q8, and the fifth switching element Q5 has an anode side connected to one terminal side of the secondary-side coil of the transformer 20, and a cathode side connected to the other terminal side of the secondary-side coil via the seventh switching element Q7, and the sixth switching element Q6, a seventh switching element Q7, and an eighth switching element Q8. The seventh switching element Q7 operates in synchronization with the sixth switching element Q6, has an anode connected to the other terminal of the secondary coil, and a cathode connected to one terminal of the secondary coil via the fifth switching element Q5, and the eighth switching element Q8 operates in synchronization with the fifth switching element Q5, and has an anode connected to the other terminal of the secondary coil and a cathode connected to one terminal of the secondary coil via the fifth switching element Q5.The sixth switching element Q6 has a cathode connected to the other terminal of the secondary coil and an anode connected to one terminal of the secondary coil via the sixth switching element Q6, the voltage in the primary bridge circuit 21 is V1, the turns ratio of the number of turns of the primary coil to the number of turns of the secondary coil of the transformer 20 is n:1, and the voltage in the secondary bridge circuit 22 is V2, when the voltage nV2 is lower than the voltage V1, the control unit generates the third screen signal that turns off the gate signal Vg of the first switching element Q1 and the fourth switching element Q4 during the screen period when the transformer current iac reverses from negative to positive, and generates the fourth screen signal that turns off the gate signal Vg of the second switching element Q2 and the third switching element Q3 during the screen period when the transformer current iac reverses from positive to negative.

[0071] According to this configuration, the third screen signal and the fourth screen signal can effectively suppress hard switching that occurs during voltage step-down operation.

[0072] As a sixth aspect, in the DC / DC converter 10 according to the fifth aspect, the third screen signal is a signal that is turned on when the first switching element Q1 and the fourth switching element Q4 are turned on, and that is turned off when the fifth switching element Q5 and the eighth switching element Q8 are turned on.

[0073] According to this configuration, it is possible to generate a third screen signal that can effectively suppress hard switching.

[0074] As a seventh aspect, in the DC / DC converter 10 according to the fifth or sixth aspect, the fourth screen signal is a signal that is turned on when the second switching element Q2 and the third switching element Q3 are turned on, and that is turned off when the sixth switching element Q6 and the seventh switching element Q7 are turned on.

[0075] According to this configuration, it is possible to generate a fourth screen signal that can effectively suppress hard switching.

[0076] A control method for a DC / DC converter according to an eighth aspect is a control method for a DC / DC converter including a transformer 20, a primary-side bridge circuit 21 connected to a primary side of the transformer 20 and having a plurality of switching elements that are switched on / off by a gate signal Vg, a secondary-side bridge circuit 22 connected to a secondary side of the transformer 20 and having a plurality of switching elements that are switched on / off by a gate signal Vg, and a control unit that controls the primary-side bridge circuit 21 and the secondary-side bridge circuit 22, in which the control unit generates the gate signal Vg, determines whether or not a transformer current iac detected by the transformer 20 will reverse in sign, and, if it determines that the transformer current iac will reverse, generates a screen signal for turning off a part of the generated gate signal Vg during a screen period that includes a timing when the transformer current iac reverses in sign, and outputs the generated gate signal Vg and the generated screen signal to the switching elements.

[0077] According to this configuration, hard switching that occurs when the transformer current iac reverses between positive and negative can be suppressed, and soft switching can be achieved, thereby reducing losses and improving conversion efficiency.

[0078] 10 DC / DC converter 20 Transformer 21 Primary side bridge circuit 22 Secondary side bridge circuit 25 Control device 31 Gate signal generating unit 32 Transformer current detection circuit 33 Logic circuit 33a First logic circuit 33a1 Step-up logic 33a2 Step-down logic 33b Second logic circuit 33b1 Step-up logic 33b2 Step-down logic 34 Gate drive circuit W1 Primary coil W2 Secondary coil Q1 to Q8 First to eighth switching elements

Claims

1. A DC / DC converter comprising: a transformer; a primary-side bridge circuit connected to the primary side of the transformer and having a plurality of switching elements that perform on / off switching according to a gate signal; a secondary-side bridge circuit connected to the secondary side of the transformer and having a plurality of switching elements that perform on / off switching according to a gate signal; and a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit, wherein the control unit generates the gate signal, determines whether the positive / negative of the transformer current detected by the transformer is reversed, and when it is determined that the transformer current is reversed, generates a screen signal for turning off a part of the generated gate signal during a screen period including the timing at which the transformer current is reversed between positive and negative, and synthesizes the generated gate signal and the generated screen signal and outputs the result to the switching elements.

2. The primary-side bridge circuit includes a first switching element, a second switching element, a third switching element, and a fourth switching element. The anode side of the first switching element is connected to one terminal side of the primary-side coil of the transformer, and the cathode side is connected to the other terminal side of the primary-side coil via the third switching element. The cathode side of the second switching element is connected to one terminal side of the primary-side coil, and the anode side is connected to the other terminal side of the primary-side coil via the fourth switching element. The third switching element operates in synchronization with the second switching element. The anode side of the third switching element is connected to the other terminal side of the primary-side coil, and the cathode side is connected to one terminal side of the primary-side coil via the first switching element. The fourth switching element operates in synchronization with the first switching element. The cathode side of the fourth switching element is connected to the other terminal side of the primary-side coil, and the anode side is connected to one terminal side of the primary-side coil via the second switching element. The secondary-side bridge circuit includes a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element. The anode side of the fifth switching element is connected to one terminal side of the secondary-side coil of the transformer, and the cathode side is connected to the other terminal side of the secondary-side coil via the seventh switching element. The cathode side of the sixth switching element is connected to one terminal side of the secondary-side coil, and the anode side is connected to the other terminal side of the secondary-side coil via the eighth switching element. The seventh switching element operates in synchronization with the sixth switching element. The anode side of the seventh switching element is connected to the other terminal side of the secondary-side coil, and the cathode side is connected to one terminal side of the secondary-side coil via the fifth switching element. The eighth switching element operates in synchronization with the fifth switching element. The cathode side of the eighth switching element is connected to the other terminal side of the secondary-side coil, and the anode side is connected to one terminal side of the secondary-side coil via the sixth switching element.Let the voltage in the primary-side bridge circuit be V1, the turns ratio of the number of turns of the primary-side coil to the number of turns of the secondary-side coil of the transformer be n:1, and the voltage in the secondary-side bridge circuit be V2. Then, the control unit, during the step-up operation when the voltage nV2 is greater than the voltage V1, when the transformer current reverses from positive to negative, generates the first blanking signal for turning off the gate signals of the fifth switching element and the eighth switching element during the blanking period; when the transformer current reverses from negative to positive, generates the second blanking signal for turning off the gate signals of the sixth switching element and the seventh switching element during the blanking period. The DC / DC converter according to claim 1.

3. The DC / DC converter according to claim 2, wherein the first screen signal becomes on at a timing when the first switching element and the fourth switching element are in an on state and the transformer current becomes negative, and becomes off at a timing when the second switching element and the third switching element are in an on state.

4. The DC / DC converter according to claim 2, wherein the second screen signal becomes on at a timing when the second switching element and the third switching element are in an on state and the transformer current becomes positive, and becomes off at a timing when the first switching element and the fourth switching element are in an on state.

5. The primary-side bridge circuit includes a first switching element, a second switching element, a third switching element, and a fourth switching element. The anode side of the first switching element is connected to one terminal side of the primary-side coil of the transformer, and the cathode side is connected to the other terminal side of the primary-side coil via the third switching element. The cathode side of the second switching element is connected to one terminal side of the primary-side coil, and the anode side is connected to the other terminal side of the primary-side coil via the fourth switching element. The third switching element operates in synchronization with the second switching element. The anode side is connected to the other terminal side of the primary-side coil, and the cathode side is connected to one terminal side of the primary-side coil via the first switching element. The fourth switching element operates in synchronization with the first switching element. The cathode side is connected to the other terminal side of the primary-side coil, and the anode side is connected to one terminal side of the primary-side coil via the second switching element. The secondary-side bridge circuit includes a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element. The anode side of the fifth switching element is connected to one terminal side of the secondary-side coil of the transformer, and the cathode side is connected to the other terminal side of the secondary-side coil via the seventh switching element. The cathode side of the sixth switching element is connected to one terminal side of the secondary-side coil, and the anode side is connected to the other terminal side of the secondary-side coil via the eighth switching element. The seventh switching element operates in synchronization with the sixth switching element. The anode side is connected to the other terminal side of the secondary-side coil, and the cathode side is connected to one terminal side of the secondary-side coil via the fifth switching element. The eighth switching element operates in synchronization with the fifth switching element. The cathode side is connected to the other terminal side of the secondary-side coil, and the anode side is connected to one terminal side of the secondary-side coil via the sixth switching element.Let the voltage in the primary-side bridge circuit be V1, the turns ratio of the number of turns of the primary-side coil to the number of turns of the secondary-side coil of the transformer be n:1, and the voltage in the secondary-side bridge circuit be V2. Then, the control unit, during the step-down operation when the voltage nV2 is smaller than the voltage V1, when the transformer current reverses from negative to positive, generates the third blanking signal that turns off the gate signals of the first switching element and the fourth switching element during the blanking period; when the transformer current reverses from positive to negative, generates the fourth blanking signal that turns off the gate signals of the second switching element and the third switching element during the blanking period. The DC / DC converter according to claim 1.

6. The DC / DC converter according to claim 5, wherein the third screen signal becomes on at a timing when the first switching element and the fourth switching element are in an on state, and becomes off at a timing when the fifth switching element and the eighth switching element are in an on state.

7. The fourth screen signal is a signal that becomes on at the timing when the second switching element and the third switching element are turned on, and becomes off at the timing when the sixth switching element and the seventh switching element are turned on. The DC / DC converter according to claim 5.

8. In a control method of a DC / DC converter including a transformer, a primary side bridge circuit having a plurality of switching elements connected to the primary side of the transformer and performing on / off switching by a gate signal, a secondary side bridge circuit having a plurality of switching elements connected to the secondary side of the transformer and performing on / off switching by a gate signal, and a control unit for controlling the primary side bridge circuit and the secondary side bridge circuit, the control unit generates the gate signal, determines whether the positive / negative of the transformer current detected by the transformer is inverted, and when it is determined that the transformer current is inverted, generates a screen signal for turning off a part of the generated gate signal in a screen period including the timing when the transformer current is inverted between positive and negative, and synthesizes the generated gate signal and the generated screen signal and outputs them toward the switching element. A control method of a DC / DC converter.

Citation Information

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