Circuit board and electronic control device

Abstract

In a circuit board (100), a first electronic component (2-1) is disposed on one surface layer of a dielectric layer (74), a second electronic component (2-2) is disposed on the other surface layer of the dielectric layer (74) at a position at least partially overlapping the first electronic component (2-1) in a direction orthogonal to the lamination direction of a plurality of conductor layers (73), and the conductor layers (73) include: removal parts (75-1, 75-2) from each of which a conductor pattern is removed in a range in which the first electronic component (2-1) and the second electronic component (2-2) overlap in a direction orthogonal to the lamination direction; and a porous part (76) in which a plurality of holes are formed in a range in which the first electronic component (2-1) and the second electronic component (2-2) overlap in a direction orthogonal to the lamination direction.

Description

Circuit board and electronic control unit

[0001] The present invention relates to a circuit board such as a printed circuit board or a flexible printed circuit board, and to an electronic control device equipped with the same.

[0002] In recent years, autonomous driving assistance systems for automobiles have become increasingly sophisticated, with Level 2+ autonomous driving, which is becoming increasingly common in general vehicles, achieving hands-free driving, and Level 3 autonomous driving, which is becoming eyes-free. To achieve these functions, the Autonomous Driving Electrical Control Unit (AD-ECU) and the Advanced Driver-Assistance System ECU (ADAS-ECU) are connected via cables to numerous sensors, such as cameras, LiDAR, and sonar, to acquire information from the outside world.

[0003] Furthermore, as new functions such as connectivity, personalization, and infotainment increase, automotive electrical / electronic (E / E) architectures are changing to a vehicle-centralized "zone architecture" that integrates ECUs for processing powertrain, body, and safety domains into the vehicle's central computer. As a result, the integrated ECU, which serves as the vehicle's central computer, will be connected by numerous cables for the purpose of backbone transmission between the integrated ECU, which serves as the vehicle's central computer, and the zone ECUs located in each zone within the vehicle.

[0004] Due to space constraints inside vehicles, AD / ADAS-ECUs and integrated ECUs need to be made smaller. However, as the number of cable connections to the ECU increases, the number of cable connectors installed around the ECU housing also increases. Therefore, an increase in the number of cables leads to an increase in the size of the ECU housing.

[0005] Examples of cables used in such cable communications include coaxial cables, twisted pair cables, and STP (Shielded Twist Pair) cables. Coaxial cables are cables in which a single signal wire is covered with a ground shield. Twisted pair cables are cables in which differential wiring consisting of a pair of positive (P) and negative (N) wires is twisted into a twisted pair. STP cables are cables in which a ground shield is covered around a twisted pair cable.

[0006] Examples of communication standards that use coaxial cables include GMSL and MIPI A-Phy, which are used to communicate image data from camera sensors. Camera sensor communication aims to reduce the weight of in-vehicle cables by eliminating the cable that supplies power to the camera. To achieve this, it is common to use Power over Coax (PoC) technology to superimpose signals and power on the same coaxial cable.

[0007] Furthermore, typical communication standards that use twisted pair cables or STP cables include in-vehicle Ethernet, typified by 100BASE-T1, which transmits data at 100 Mbps, and 1000BASE-T1, which transmits data at 1 Gbps. Even for these standards, standardization is underway for Power over Data Line (PoDL), a technology that transmits power by superimposing it on the cable used for signal transmission, in order to reduce the weight of in-vehicle cables.

[0008] FIG. 1 shows an example of an ECU connected to multiple communication cables for various communication standards. This example shows a configuration capable of connecting eight coaxial cables. In practice, twisted pair cables and STP cables are commonly used in addition to coaxial cables. The housing 7 of the ECU shown in FIG. 1 has eight housing-side connectors 8 on its side to connect eight coaxial cables 10 to the housing 7. Inserting cable-side connectors 9 into these housing-side connectors 8 enables cable communication between the ECU and an external device. As can be seen from FIG. 1 , the width of the housing 7 is almost entirely occupied by connector vias (mounting holes), and increasing the number of cable communication channels has been a major challenge in miniaturizing ECUs.

[0009] To address these issues, the use of multi-pole connectors, which allow connection to multiple cables with a single connector, is becoming more common. Figure 2 shows an example of an ECU that uses a multi-pole connector. In this example, three 4-pole connectors attached to coaxial cables are used, allowing the connection of 12 channels of coaxial cables. In practice, however, twisted pair cables and STP cables are commonly used in addition to coaxial cables.

[0010] The ECU housing 7 shown in Fig. 2 has three housing-side 4-pole connectors 11 on the side of the housing to connect 12 channels of coaxial cables 10 to the housing. Inserting a cable-side 4-pole connector 12 into these housing-side 4-pole connectors 11 enables cable communication between the ECU and an external device. As can be seen from Fig. 2, although the number of channels is increased compared to the example in Fig. 1, the width of the housing 7 is narrower than in Fig. 1, and the 4-pole connectors contribute to making the housing 7 more compact.

[0011] However, the use of such multi-pole connectors poses challenges in terms of component packaging density on the printed circuit board (PCB) inside the ECU housing. An example of this is described with reference to FIG. 3 . FIG. 3 is a top view of an example of a printed circuit board 1 in which a 4-pole connector is used and filter components are mounted only on the surface. FIG. 3 also shows a configuration example in which a 4-pole connector is used to connect coaxial cables to four channels. In the printed circuit board 1 inside the ECU, four signal lines from the housing-side 4-pole connector 11 are connected to the communication LSI 16 mounted on the printed circuit board 1 using signal wiring 13-1 to 13-4 on the printed circuit board 1 to transmit signals from the four coaxial cables to the communication LSI 16 mounted on the printed circuit board 1.

[0012] Furthermore, when using PoC communication, which uses coaxial cables for power superposition, components called PoC filters (14-1 to 14-4) are required to connect the signal line and the power line. One terminal of each filter component is connected to the signal line (signal wiring 13-1 to 13-4) and the other terminal is connected to the power line (power line connection vias 15-1 to 15-4). PoC filters include inductors (coils), capacitors, and ESD protection elements. Filter components used in PoC filters are often relatively large, measuring a few millimeters square. Therefore, when multiple filter components are mounted on the same board, the area occupied by those filter components (the length perpendicular to the stacking direction) becomes larger than the width of the 4-pole connector, hindering high-density connector mounting and limiting the miniaturization of ECU housings.

[0013] One way to solve this problem is to mount filter components on both sides of the board, as shown in Figure 4. Figure 4 is a top view showing an example of a printed circuit board 1 in which filter components are mounted on both the front and back sides when using a 4-pole connector.

[0014] In order to transmit signals from four channels of coaxial cables to a communication LSI 16 mounted on the printed circuit board 1 in the ECU shown in FIG. 4, four signal wires 13-1 to 13-4 from the housing-side four-pole connector 11 are connected to the communication LSI 16 using signal wires 13-1 to 13-2 on the surface layer of the printed circuit board 1 and signal wires 18-1 to 18-2 on the back layer.

[0015] Furthermore, of the four PoC filters (filter components) used for PoC communications, which superimposes power over a coaxial cable, two (filter components 14-2 and 14-3) are mounted on the front layer, and the remaining two (filter components 14-1 and 14-4) are mounted on the back layer. At this time, filter components 14-2 and 14-3 and filter components 14-1 and 14-4 are arranged so that they overlap when viewed from the top of the printed circuit board 1. By doing so, the size of the area occupied by the filter components can be kept to approximately the same width as the connector.

[0016] However, double-sided mounting of filter components like this poses problems in terms of the signal quality characteristics of high-speed communication signals. When mounting filter components, two issues must be considered from the perspective of signal quality: impedance mismatch and crosstalk. Regarding the first issue, impedance mismatch, because filter components are connected to signal wiring, if parasitic capacitance is created between the filter components and the conductor pattern on the printed circuit board, impedance will decrease for high-frequency signals. The conductor pattern is a ground pattern or signal wiring pattern made of a conductor layer. Regarding the second issue, crosstalk, if electromagnetic coupling occurs between multiple filter components, noise from other signal lines will degrade waveform quality. For this reason, it is necessary to ensure isolation between each signal line.

[0017] Regarding the first issue of impedance mismatch, one mounting method (Prior Art (1)) involves drilling holes in the conductor pattern directly below the filter component to avoid capacitive coupling between the wiring, such as a coil, within the filter component and the conductor pattern on the printed circuit board. The issues with double-sided component mounting in the prior art are explained using FIG. 5 . FIG. 5 is a cross-sectional view of a printed circuit board according to Prior Art (1). In FIG. 5 , a filter component 2-1 is mounted on the front surface of the dielectric layer 4 (the board body) of the printed circuit board 1, and a filter component 2-2 is mounted on the back surface. Multiple conductor layers 3 are formed within the dielectric layer 4. The conductor layers 3 form ground patterns or signal wiring patterns. Generally, a highly conductive metal is used for the conductor layers 3. As mentioned above, to avoid coupling between a filter component measuring several millimeters square and the conductor pattern, a distance of millimeters is required between the filter component and the conductor pattern.

[0018] However, the thickness of the printed circuit board 1 (dielectric layer 4) typically used in ECUs is thin, ranging from approximately 1.6 mm to 2.0 mm. Therefore, when filter components 2-1 and 2-2 are mounted on both sides and holes are drilled in the conductor pattern (conductor layer 3) from each side, the conductor pattern removal section 5 appears to penetrate from the front to the back, as shown in Figure 5 . The conductor pattern removal section 5 is formed by removing a portion of the conductor layer 3 that constitutes the conductor pattern. In this case, it is possible to reduce the capacitive coupling between the filter components 2-1 and 2-2 and the conductor pattern within the printed circuit board 1. However, because there is no electromagnetic barrier between the two, electromagnetic coupling occurs between the filter components 2-1 and 2-2, resulting in the problem of crosstalk.

[0019] In contrast, a board configuration that takes crosstalk into consideration will be described using FIG. 6 . FIG. 6 is a diagram showing a cross section of a printed circuit board according to prior art (2). In the example shown in FIG. 6 , a shielding layer 6 that acts as an electromagnetic shield is disposed in the center of the dielectric layer 4 of the printed circuit board 1, between the filter component 2-1 mounted on the front surface and the filter component 2-2 mounted on the back surface (prior art (2)). This method avoids electromagnetic coupling between the filter components 2-1 and 2-2 and sufficiently reduces crosstalk. However, the removal depth of the conductor pattern removal portion 5-1 directly below the filter component 2-1 and the conductor pattern removal portion 5-2 directly above the filter component 2-2 is shallower than in prior art (1). This poses a problem: increased capacitive coupling between the filter components 2-1 and 2-2 and the conductor patterns.

[0020] The technology described in Patent Document 1 is known as background technology related to the present invention. In the printed wiring board described in Patent Document 1, in a passive element array consisting of multiple coils, in order to ensure isolation between the passive elements and their terminals, the coils and terminals are arranged in a manner that is offset vertically and horizontally. This ensures isolation between the input / output terminals of adjacent coil elements and between the coils.

[0021] International Publication No. 2017 / 179590

[0022] In the technology of Patent Document 1, the opposing area is reduced by shifting the arrangement of the coils and the arrangement of the coil electrodes left and right and up and down, thereby suppressing electromagnetic coupling. However, shifting the arrangement of the coils and the arrangement of the coil electrodes left and right and up and down (especially left and right) increases the board size of the printed wiring board.

[0023] Given the above situation, there has been a demand for a method that can achieve both high-density mounting of filter components mounted on circuit boards associated with cable communications and high-frequency electrical characteristics.

[0024] In order to solve the above problems, one aspect of the present invention provides a circuit board in which multiple conductor layers, each having a conductor pattern formed therein, are stacked, and multiple electronic components, to which signal wiring for transmitting signals is connected, are arranged on the surface layers of the dielectric layers. In this circuit board, a first electronic component is arranged on one surface layer of the dielectric layers, and a second electronic component is arranged on the other surface layer of the dielectric layers in a position at least partially overlapping with the first electronic component in a direction perpendicular to the stacking direction of the conductor layers. The multiple conductor layers include a removed portion in which the conductor pattern is removed in an area where the first electronic component and the second electronic component overlap in the direction perpendicular to the stacking direction, and a porous portion in which multiple holes are formed in an area where the first electronic component and the second electronic component overlap in the direction perpendicular to the stacking direction.

[0025] According to at least one aspect of the present invention, it is possible to achieve both high-density mounting of electronic components, such as filter components mounted on a circuit board associated with cable communication, and high-frequency electrical characteristics. Other objects, configurations, and advantages will become apparent from the following description of the preferred embodiment of the present invention.

[0026] FIG. 1 is a diagram showing an ECU housing of a conventional technology utilizing a single-pole cable connector. FIG. 2 is a diagram showing a conventional technology utilizing a multi-pole cable connector. FIG. 3 is a top view showing an example of a printed circuit board in the case where a filter component is mounted only on the surface when a 4-pole connector is used. FIG. 4 is a top view showing an example of a printed circuit board in the case where a filter component is mounted on both the front and back surfaces when a 4-pole connector is used. FIG. 5 is a diagram showing a cross section of a printed circuit board according to conventional technology (1). FIG. 6 is a diagram showing a cross section of a printed circuit board according to conventional technology (2). FIG. 7 is a cross section showing an example of a printed circuit board according to a first embodiment of the present invention. FIG. 8 is a diagram showing an example of the effect of the printed circuit board of the present invention. FIG. 9 is a top view showing an example of a printed circuit board according to a second embodiment of the present invention. FIG. 10 is a cross section showing an example of a printed circuit board according to a third embodiment of the present invention. FIG. 11 is a cross section showing an example of a printed circuit board according to a fourth embodiment of the present invention. FIG. 12 is a top view showing an example of a printed circuit board according to a fifth embodiment of the present invention. FIG. 13 is a top view showing an example of a printed circuit board according to a sixth embodiment of the present invention. FIG. 14 is a diagram showing a top view of an example of a printed circuit board according to a seventh embodiment of the present invention and an example of the effect of hole size. FIG. 15 is a top view showing an example of a printed circuit board according to an eighth embodiment of the present invention.

[0027] Hereinafter, examples of modes for carrying out the present invention (hereinafter referred to as "embodiments") will be described with reference to the accompanying drawings. In this specification and the accompanying drawings, identical or similar components are given the same reference numerals, and redundant explanations may be omitted or only explanations focusing on the differences may be given. Furthermore, when there are multiple identical or similar components, they may be described using the same reference numerals with different subscripts. Note that when it is not necessary to distinguish between these multiple components, the subscripts may be omitted in the description. The number of each component may be singular or plural unless otherwise specified.

[0028] First Embodiment First, a printed circuit board according to a first embodiment of the present invention will be described with reference to FIGS. 7 and 8 . The present invention relates to a printed circuit board for a signal transmission device or a signal transmission system. The printed circuit board is intended to be mounted in various ECUs, such as an automated driving electronic control unit (AD-ECU) or an advanced driver assistance system electronic control unit (ADAS-ECU). While an example in which the present invention is applied to a printed circuit board will be described below, the present invention may also be applied to a flexible printed circuit board (PCB). This also applies to other embodiments.

[0029] FIG. 7 is a cross-sectional view showing an example of a printed circuit board 100 according to a first embodiment of the present invention. The printed circuit board 100 has a filter component 2-1 mounted on the front surface of a dielectric layer 74 (board body) and a filter component 2-2 mounted on the rear surface. Multiple conductor layers 73 are formed inside the dielectric layer 74. A ground pattern or a signal wiring pattern is formed on the conductor layer 73 as a conductor pattern. A metal with high conductivity is used for the conductor layer 73. The filter components 2-1 and 2-2 on one surface and the other surface (rear surface) of the dielectric layer 74 are arranged so that they partially or completely overlap when viewed from above (in the stacking direction). Furthermore, conductor pattern removal sections 75-1 and 75-2 are provided for the filter components 2-1 and 2-2 in the conductor layer 73, which is an inner layer of the printed circuit board 100 (dielectric layer 4), from the surface layers to the intermediate layer, to prevent the conductor patterns from overlapping directly below the filter components.

[0030] Furthermore, the intermediate layer is characterized by the placement of a porous ground pattern 76 with many holes drilled in the conductor layer 73. Note that the porous ground pattern is used here to represent a ground pattern that is generally used as a shield, but the same effect can be achieved by substituting a power supply pattern that is electrically connected at low impedance by a decoupling capacitor or the like to the ground pattern.

[0031] Although an example of a porous ground pattern formed on two conductor layers 73 is shown here, it may be formed on a single layer. The effects of forming a single layer will be described in the explanation of another embodiment (second embodiment).

[0032] Note that this configuration describes only a portion of a printed circuit board, and components other than those described here (e.g., LSIs, capacitors, power supply ICs, etc.) may be added, and the number of conductor layers on the printed circuit board does not need to be the same. Examples of filter components include PoC filters, PoDL filters, ESD protection elements, and common mode choke coils, and the present invention may be applied to one or more of these. Furthermore, the present invention may also be applied to other components having similar functions.

[0033] Here, the effect of the printed circuit board of the present invention will be described with reference to Fig. 8. Fig. 8 is a graph showing an example of the effect of the printed circuit board of the present invention. In the upper graph of Fig. 8, the vertical axis represents impedance Zo [Ω] and the horizontal axis represents time [ns]. In the lower graph of Fig. 8, the vertical axis represents crosstalk S ４１ The horizontal axis represents frequency [Hz].

[0034] The upper part of Figure 8 shows an example of the results of measuring the impedance of the wiring portion of a printed circuit board using a method called Time Domain Reflectometry (TDR). Note that this example shows the measurement results for a single signal wiring line. It is desirable for the impedance of the "signal wiring section" to be as close as possible to the reference impedance of 50 Ω, but as shown in the upper part of Figure 8, the impedance of the "filter mounting section" generally drops due to parasitic capacitance between the component and the board. If the impedance drops beyond a certain level and falls below the criteria (standard value), it will cause problems in terms of signal quality.

[0035] The results for conventional technology (1) (characteristics 85 shown by the dashed line in the figure) are for a printed circuit board with the cross-sectional configuration shown in Figure 5, as described above. By removing a large portion of the conductor pattern directly below the filter components, the impact of impedance reduction is minimized. On the other hand, the results for conventional technology (2) (characteristics 86 shown by the dashed line in the figure) are for the board cross-sectional configuration shown in Figure 6, as described above. When removing the conductor pattern directly below the filter components, the conductor pattern was left in the intermediate layer, which increased the impact of impedance reduction and reached the criterion.

[0036] In contrast, the present invention (characteristic 80 shown by the solid line in the figure) is the result for the printed circuit board with the cross-sectional configuration shown in Figure 7 mentioned above. Although not as great as prior art (1), the present invention employs a porous ground pattern in the intermediate layer, thereby reducing the opposing area between the component and the metal surface, and as a result, reducing parasitic capacitance. Therefore, the present invention achieves an impedance improvement of about 1 to 2 Ω compared to prior art (2), achieving an impedance that exceeds the criteria.

[0037] Next, the S parameter (S ４１ This figure shows an example of measurement results for the amount of coupling in decibels at angular frequencies using the frequency parameter '(1 / 2 GHz)'. Note that this figure also shows an example of measurement results for a single signal line. In this figure, the smaller the crosstalk, the better. As an example, the crosstalk criteria for a certain communication standard are shown by the dashed line, and this standard specifies that the crosstalk should be -60 dB or less up to 1 MHz. If crosstalk occurs at a specific frequency that exceeds this criteria, it becomes a problem.

[0038] The results for prior art (1) (characteristics 87 indicated by the dashed-dotted line in the figure) are for a printed circuit board with the cross-sectional configuration shown in Figure 5, as previously described. By removing a large portion of the conductor pattern directly below the filter components, the electromagnetic coupling between the front and back components increases. In this case, the amount of crosstalk exceeds the criteria at frequencies above approximately 1 GHz, which poses a problem in terms of signal quality. On the other hand, prior art (2), although not shown in the lower graph of Figure 8, leaves the conductor pattern in the intermediate layer directly below the filter components, which functions as a shielding layer, achieving crosstalk of less than -200 dB, which is not a problem.

[0039] In contrast, the present invention (characteristics 81 shown by the solid line in the figure: present invention (1); characteristic 82 shown by the dashed line: present invention (2)) is the result for the printed circuit board with the cross-sectional configuration shown in Figure 7 described above. By adopting the porous ground pattern 76 in the intermediate layer, a crosstalk reduction effect of -60 dB to -100 dB is obtained compared to the conventional technology (1), achieving a crosstalk amount below the criteria. The difference in effect between present invention (1) and present invention (2) is due to the difference in the way the holes are formed in the porous ground pattern. This will be described in detail in the second embodiment and beyond. Regarding the characteristic 80 in the upper graph of Figure 8, similar results are obtained for both present invention (1) and present invention (2).

[0040] As described above, the circuit board (e.g., printed circuit board 100) according to the first embodiment is a circuit board in which a plurality of conductor layers (conductor layers 73) each having a conductor pattern formed therein are stacked within a dielectric layer (dielectric layer 74), and a plurality of electronic components to which signal wiring for transmitting signals is connected are arranged on the surface layers of the dielectric layers, and has the following configuration: In this circuit board, a first electronic component (e.g., filter component 2-1) is arranged on one surface layer of the dielectric layer, and a second electronic component (e.g., filter component 2-2) is arranged on the other surface layer of the dielectric layer in a position at least partially overlapping with the first electronic component in a direction perpendicular to the stacking direction of the conductor layers. The plurality of conductor layers include removed portions (conductor pattern removed portions 75-1, 75-2) in which the conductor pattern is removed in an area where the first electronic component and the second electronic component overlap in a direction perpendicular to the stacking direction, and a porous portion (perforated ground pattern 76) in which a plurality of holes is formed in an area where the first electronic component and the second electronic component overlap in a direction perpendicular to the stacking direction.

[0041] In this way, by adopting the configuration according to this embodiment in a printed circuit board, it is possible to bring both the impedance and crosstalk specifications closer to appropriate values, even in a high-density board mounting state in which filter components are mounted on both sides, thereby improving the overall signal quality of the printed circuit board.

[0042] In this embodiment, the mounting positions of the filter components are intentionally aligned on the front and back of the printed circuit board (dielectric layer), thereby improving the mounting density. As a result, this embodiment can achieve signal transmission performance of, for example, Gbps-class cable transmission, while also achieving a reduction in the size of the printed circuit board and the ECU housing by improving the board wiring density (see, for example, FIGS. 12 and 13).

[0043] In the present embodiment, an example has been described in which a perforated ground pattern having a number of holes drilled in the conductor layer 73 used as a ground is disposed in the intermediate layer of the printed circuit board 100 (dielectric layer 4), but the present invention is not limited to this example. For example, the present invention does not exclude a configuration in which a signal wiring pattern having a number of holes drilled in the conductor layer 73 for transmitting signals is disposed in the intermediate layer of the dielectric layer 4 to improve impedance and crosstalk.

[0044] In addition, in this embodiment, the conductor layer 73 is configured so that all of the pores are blocked when viewed from directly above the conductor layer 73, but the present invention is also effective when it has only a conductor layer with pores that do not completely block the conductor layer 73 when viewed from directly above the conductor layer 73. It is advisable to calculate, through experiments, simulations, etc., how many pores remain when viewed from directly above the conductor layer 73 while still achieving the effects of the present invention.

[0045] Second Embodiment Next, a porous ground pattern of a printed circuit board according to a second embodiment of the present invention will be described with reference to Fig. 9. The overall configuration of the printed circuit board of this embodiment is the same as that of the first embodiment.

[0046] FIG. 9 is a top view showing an example of a printed circuit board according to a second embodiment of the present invention. FIG. 9 shows an example of a printed circuit board configuration in which only the perforated ground pattern portion is cut out and viewed from directly above (in the stacking direction) the corresponding conductor layer 73. In this embodiment, the holes are circular. Furthermore, a feature of the perforated ground pattern is that holes 90 in the upper conductor layer 73 and holes 91 in the lower conductor layer 73 are arranged so as not to overlap each other when viewed from above. Of the crosstalk characteristics shown in FIG. 8, characteristic 82 of present invention (2) is according to the second embodiment.

[0047] The characteristic 81 of the present invention (1) is the characteristic obtained when the positions (lateral positions) of the holes in the upper conductor layer 73 and the lower conductor layer 73 completely overlap. These two porous ground patterns provide roughly similar impedance characteristics. In other words, by ensuring that the positions of the holes in the adjacent conductor layers 73 do not overlap, the shielding effect of the porous ground pattern composed of two layers can be improved by -40 dB.

[0048] As described above, in the circuit board (e.g., printed circuit board 100) according to the second embodiment, the plurality of conductor layers (conductor layer 73) include a first conductor layer (e.g., an upper layer) including a first porous portion in which a plurality of holes (holes 90) are formed, and a second conductor layer (e.g., a lower layer) adjacent to the first conductor layer in the stacking direction. The second conductor layer includes a second porous portion in which a plurality of holes (holes 91) are formed so as not to overlap with the plurality of holes (holes 90) formed in the first porous portion included in the first conductor layer in a direction perpendicular to the stacking direction.

[0049] If the porous ground pattern 76 is constructed using only one conductor layer 73 instead of two layers, the positions of the holes cannot be shifted, and therefore only the effect of the present invention (1) (characteristic 81) in Figure 8 can be obtained.

[0050] In this embodiment, the shape of the holes formed in the conductor layer 73 is described as a circle, but the shape of the holes is arbitrary. However, a circle is desirable in order to minimize the path of eddy currents that flow around the holes to achieve shielding properties. Circular holes can provide shielding effects up to higher frequencies.

[0051] Third Embodiment Next, a printed circuit board according to a third embodiment of the present invention will be described with reference to FIG.

[0052] 10 is a cross-sectional view showing an example of a printed circuit board 100A according to a third embodiment of the present invention. In the printed circuit board 100A, filter components 2-1 and 2-2 are arranged on one surface and the other surface of a dielectric layer 74 (substrate body) so that they partially or completely overlap when viewed from above. Furthermore, for the filter components 2-1 and 2-2, conductor pattern removal sections 75-1 and 75-2 are provided in the inner conductor layer 73 of the printed circuit board 100A, from the surface layers to the intermediate layer, directly below the filter components, so that the conductor patterns (at the positions of the holes in the upper and lower layers) do not overlap.

[0053] The conductor layers 73 have a total of N layers. Furthermore, a porous ground pattern 76 formed by drilling a large number of holes in the conductor layer 73 is disposed in the intermediate layer of the dielectric layer 74. This embodiment is characterized in that the conductor layers 73 on which the porous ground pattern 76 is formed are N / 2 and N / 2+1 layers, counting from the first layer on which the filter component 2-1 is mounted.

[0054] In this way, by providing the porous ground pattern 76 in the two layers just between the dielectric layers 74, the problem of impedance mismatch caused by the conventional uniform shield layer for the filter components 2-1 and 2-2 can be solved.

[0055] (When a porous ground pattern is formed in two conductor layers) As described above, in the circuit board (e.g., printed circuit board 100A) according to the third embodiment, the plurality of conductor layers (conductor layers 73) are made up of N layers, and the conductor layers located on the (N / 2)th and (N / 2+1)th layers from one surface of the dielectric layer (dielectric layer 74) correspond to the first and second conductor layers, and the other conductor layers include removed portions. For example, if there are six conductor layers 73, the third and fourth conductor layers 73 counting from one surface layer have porous portions (porous ground pattern 76).

[0056] (When forming a porous ground pattern in one conductor layer) When the porous ground pattern 76 is formed in only one conductor layer 73, the following configuration can be used. In the printed circuit board, the plurality of conductor layers (conductor layers 73) consists of N layers, and the conductor layer located at the N / 2th or (N / 2+1)th layer from one surface of the dielectric layer (dielectric layer 74) includes a porous portion (porous ground pattern 76), and the other conductor layers include removed portions (conductor pattern removed portions 75-1, 75-2). For example, when there are six conductor layers 73, only the third conductor layer 73 counting from one surface layer has a porous portion (porous ground pattern 76).

[0057] Fourth Embodiment Next, a printed circuit board according to a fourth embodiment of the present invention will be described with reference to FIG. 11 . FIG. 11 is a cross-sectional view showing an example of a printed circuit board 100B according to the fourth embodiment of the present invention. In the printed circuit board 100B, a filter component 2-1 and a filter component 2-2A are arranged on one surface and the other surface of the circuit board, respectively, so that they partially or completely overlap when viewed from above. A comparison of the sizes of the filter component 2-1 and the filter component 2-2A shows that the filter component 2-1 is larger. When using a multi-pole connector that combines different transmission standards, the specifications of the filter components will also differ, and there are cases where it becomes necessary to mount filter components of different sizes on both sides.

[0058] Furthermore, for the filter components 2-1 and 2-2A, conductor pattern removal sections 75-1A and 75-2A are provided in the conductor layer 73, which is an inner layer of the printed circuit board, from between the surface layers to the intermediate layer so that the conductor patterns do not overlap directly below the filter components. Furthermore, the conductor layer 73 has a total of N layers.

[0059] Furthermore, a porous ground pattern 76A, which is a conductor pattern with numerous holes, is arranged on the intermediate layer. The conductor layer on which this porous ground pattern 76A is arranged is characterized by being arranged at least N / 2+1 layers, counting from the first layer on which the larger filter component 2-1 is mounted. Generally, the larger the filter component, the larger the area facing the conductor layer 73, resulting in larger parasitic capacitance. Therefore, it is desirable to provide a conductor pattern removal portion 75-1A deeper directly below larger filter components. This solves the problem of impedance mismatch caused by the conventional uniform shielding layer for the filter components 2-1 and 2-2A.

[0060] (When a Perforated Ground Pattern is Formed in Two Conductive Layers) As described above, in a circuit board (e.g., printed circuit board 100B) according to the fourth embodiment, the plurality of conductor layers (conductor layers 73) are composed of N layers, and when the first electronic component (filter component 2-1) is larger in size in the direction perpendicular to the stacking direction than the second electronic component (filter component 2-2A), the first conductor layer (e.g., upper layer) and the second conductor layer (e.g., lower layer) are located at least on the (N / 2+1)th layer from the surface layer on which the first electronic component is located on the dielectric layer (dielectric layer 74), and the other conductor layers include removed portions (conductor pattern removed portions 75-1A, 75-2A). For example, when there are six conductor layers 73, the fourth and fifth conductor layers 73 counting from one surface layer have porous portions (perforated ground patterns 76A).

[0061] (When a porous ground pattern is formed in one conductor layer) Note that when the porous ground pattern 76 is formed in only one conductor layer 73, the following configuration can be used. In a printed circuit board, when the plurality of conductor layers (conductor layers 73) is composed of N layers and the first electronic component (filter component 2-1) is larger in size in the direction perpendicular to the stacking direction than the second electronic component (filter component 2-2A), the conductor layer located at the (N / 2+1)th layer or higher from the surface layer on which the first electronic component is located in the dielectric layer (dielectric layer 74) includes a porous portion (porous ground pattern 76A), and the other conductor layers include removed portions (conductor pattern removed portions 75-1A, 75-2A). For example, when there are six conductor layers 73, only the fourth conductor layer 73 counting from one surface layer has a porous portion (porous ground pattern 76A).

[0062] Fifth Embodiment Next, a printed circuit board according to a fifth embodiment of the present invention will be described with reference to FIG. 12 . FIG. 12 is a top view showing an example of a printed circuit board 100C according to the fifth embodiment of the present invention. The printed circuit board 100C in the ECU transmits signals from four channels of coaxial cables to a communication LSI 16 mounted on the printed circuit board 100C. To this end, the four signal lines from the housing-side four-pole connector 11 are connected to the communication LSI 16 using signal wiring 13-1 to 13-2 on the surface layer and signal wiring 18-1 to 18-2 on the back layer of the printed circuit board 100C.

[0063] Furthermore, of the four PoC filters (filter components) used for PoC communication, which superimposes power over a coaxial cable, two (filter components 14-2 and 14-3) are mounted on the front layer, and the remaining two (filter components 14-1 and 14-4) are mounted on the back layer. By arranging filter components 14-2 and 14-3 and their corresponding filter components 14-1 and 14-4 so that they overlap on both sides of the printed circuit board 100C, the size of the area occupied by the four filter components 14-1 to 14-4 can be kept to approximately the same width as the connector.

[0064] In this configuration, two sets of wiring where the pins of the housing-side four-pole connector 11 are adjacent are paired with a surface wiring and a back wiring, and a porous ground pattern common to the filter components 14-1 to 14-4 connected to each is formed on the inner layer.

[0065] As described above, in a circuit board (e.g., printed circuit board 100C) according to the fifth embodiment, a multipolar connector (e.g., housing-side 4-pole connector 11) that can connect multiple coaxial cables and a communication circuit (communication LSI 16) are mounted on the circuit board. In this circuit board, the number of poles M (e.g., 4 poles) of the multipolar connector is a multiple of 2, and the multipolar connector and the communication circuit are connected by signal wires (signal wires 13-1 to 13-2, 18-1 to 18-2) in the same number as the number of poles M, and one or more electronic components are connected to each of the signal wires. Of the electronic components, one electronic component (filter components 14-2, 14-3) connected to the adjacent signal wiring is mounted on the surface of the dielectric layer (dielectric layer 74), and the other electronic component (filter components 14-1, 14-4) connected to the adjacent signal wiring is mounted on the back surface of the dielectric layer, and the electronic components mounted on the front and back surfaces of the dielectric layer are positioned so as to overlap in a direction perpendicular to the stacking direction of the conductor layer (conductor layer 73).

[0066] With this configuration, the printed circuit board 100C according to this embodiment can mount the filter components 14-1 to 14-4 at a high density, while connecting the housing-side 4-pole connector 11 and the communication LSI 16. In this example, a porous ground pattern 76-1 common to the filter components 14-1 and 14-2 is formed on an inner layer, and a porous ground pattern 76-2 common to the filter components 14-3 and 14-4 is formed on a separate inner layer.

[0067] In this embodiment, a four-pole connector has been described as an example, but the number of channels (pole numbers) is not limited to this example and may be two, three, four or more.

[0068] Sixth Embodiment Next, a printed circuit board according to a sixth embodiment of the present invention will be described with reference to Fig. 13 . Fig. 13 is a top view showing an example of a printed circuit board 100D according to the sixth embodiment of the present invention. The printed circuit board 100D in the ECU transmits signals from two channels of differential cables to a communication LSI 16 mounted on the printed circuit board 100D. To this end, the printed circuit board 100D in the ECU connects two pairs of differential signal wiring from a housing-side two-pole differential connector 130 to the communication LSI 16 using a surface layer differential pair wiring 131 and a bottom layer differential pair wiring 132 on the printed circuit board 100D.

[0069] The connection from the front layer to the back layer is switched using differential signal connection vias 133-1 and 133-2. In differential cable communication, in order to cut common mode components that cause noise radiation and immunity (Electromagnetic Susceptibility: EMS), it is common to insert a common mode choke coil between the housing-side two-pole differential connector 130 and the communication LSI 16. The common mode choke coil is a four-terminal component that has two pairs of coils built in.

[0070] In this configuration, filter component 134-1, which is a common mode choke coil for the surface layer differential wiring, is mounted on the surface layer, and filter component 134-2, which is a common mode choke coil for the bottom layer differential wiring, is mounted on the bottom layer. By arranging these filter components 134-1 and 134-2 so that their horizontal positions overlap on both sides of the printed circuit board 100D, it is possible to limit the expansion to approximately the same as the connector width.

[0071] In this configuration, two pairs of differential pair wirings 131, 132, each with adjacent pins of the case-side bipolar differential connector 130, are paired with a surface wiring and a back wiring, and a common porous ground pattern is formed on an inner layer for the filter components 134-1, 134-2 connected to each. The front-side filter component 134-1 is connected to the case-side bipolar differential connector 130 and the communication LSI 16 by the differential pair wiring 131. The back-side filter component 134-2 is connected to the case-side bipolar differential connector 130 by the differential pair wiring 132 via a differential signal connecting via 133-1, and is connected to the communication LSI 16 by the differential pair wiring 132 via a differential signal connecting via 133-2.

[0072] As described above, in a circuit board (e.g., printed circuit board 100D) according to the sixth embodiment, a multipolar differential connector (e.g., chassis-side bipolar differential connector 130) to which a plurality of differential cables can be connected, and a communication circuit (communication LSI 16) are mounted on the circuit board. In this circuit board, the number of differential pairs M (e.g., two pairs) of the multipolar differential connector is a multiple of two, and the multipolar differential connector and the communication circuit are connected by the same number of differential pairs (differential pairs 131, 132) as the number of differential pairs M, and one or more electronic components are connected to each of the differential pairs. One of the electronic components (filter component 134-1) connected to adjacent differential pairs is mounted on the front surface of the dielectric layer, and the other of the electronic components (filter component 134-2) connected to the adjacent differential pair is mounted on the back surface of the dielectric layer, and the electronic components mounted on the front and back surfaces of the dielectric layer are positioned so as to overlap in a direction perpendicular to the stacking direction of the conductor layers.

[0073] With this configuration, the printed circuit board 100D according to this embodiment can mount the filter components 134-1 and 134-2 at high density, while connecting the housing-side two-pole differential connector 130 and the communication LSI 16. In this example, a porous ground pattern 76 common to the filter components 134-1 and 134-2 is formed on an inner layer.

[0074] In the present embodiment, an example in which there are two pairs of differential wiring pairs has been described, but the number of pairs of differential wiring pairs is not limited to this example, and may be three or more.

[0075] Seventh Embodiment Next, a printed circuit board according to a seventh embodiment of the present invention will be described with reference to Fig. 14. In particular, a preferred example of the size of holes formed in the porous ground pattern will be described.

[0076] 14 is a top view showing an example of a printed circuit board according to a seventh embodiment of the present invention, along with a diagram illustrating an example of the effect of hole size. Fig. 14 shows an example of a printed circuit board configuration in which only the perforated ground pattern portion is cut out and viewed from directly above the corresponding conductor layer 73. In this embodiment, the holes are circular. Furthermore, within the perforated ground pattern 76B, the holes 90 in the upper conductor layer 73 and the holes 91 in the lower conductor layer 73 are positioned so that they do not overlap each other when viewed from above.

[0077] Here, the lower part of Figure 14 shows a graph representing crosstalk characteristics when the diameter of holes 90 and 91 is changed, for example, in the range of 0.5 to 2.0 mm. As with Figure 8 described above, characteristic 87 is an example for conventional technology (1). As can be seen from this graph, the smaller the hole diameter, the greater the crosstalk reduction effect. As can be seen from the graph at the bottom of Figure 14, when the hole diameter is Φ2.0 mm or less, a certain amount of crosstalk reduction effect is obtained compared to conventional technology (1), and this hole size serves as an indicator. For example, near 20 GHz, where crosstalk increases rapidly, it is desirable to have a hole diameter of 1.0 mm or less, taking into account tolerances.

[0078] Eighth Embodiment Next, a printed circuit board according to an eighth embodiment of the present invention will be described with reference to Fig. 15. In particular, a preferred example of a porous ground pattern and the size of the holes formed therein will be described.

[0079] 15 is a top view showing an example of a printed circuit board according to an eighth embodiment of the present invention. Fig. 15 shows an example of a state in which only the porous ground pattern portion is cut out from the configuration of the printed circuit board and viewed from directly above the corresponding conductor layer 73. In this embodiment, the holes are circular. Furthermore, of the porous ground pattern, holes 90-1 and 90-2 on the upper layer and holes 91-1 and 91-2 on the lower layer are arranged so that they do not overlap each other when viewed from above.

[0080] Here, in Fig. 15, the component mounting area 150 is indicated by a dashed line. A feature of this embodiment is that the diameter of the porous ground pattern directly below the component mounting area is different from the diameter of the porous ground pattern arranged around it, as shown in Fig. 15. The diameter Φ_1 of the holes 90-2 and 91-2 on the inside of the component mounting area 150 is smaller than the diameter Φ_2 of the holes 90-1 and 91-1 on the outside.

[0081] The effect of this configuration is that it is possible to further suppress the impedance drop due to parasitic capacitance while maintaining the crosstalk reduction effect. As mentioned above, the smaller the hole diameter, the greater the crosstalk reduction effect, so it is better to have a small diameter ground hole directly below the component placement. On the other hand, when considering the electric field coupling between the filter component and the conductor pattern, the electric field lines spread outward due to the fringe effect, so the coupling due to this outward spreading of the electric field lines can be effectively reduced. As a result, this embodiment has the effect of further suppressing the drop in parasitic capacitance component.

[0082] As described above, in the printed circuit board of this embodiment, in the perforated ground pattern 76B, the diameter of the holes (holes 90-2, 91-2) located outside the area overlapping the electronic component in a direction perpendicular to the stacking direction of the conductor layer 73 is larger than the diameter of the holes (holes 90-2, 91-2) located within the area overlapping the electronic component.

[0083] Although the present invention has been described above with reference to an on-board ECU (on-board device), it can also be used in other applications that use similar communication systems. For example, the present invention can be equally effective in communication between an industrial robot and an electronic camera.

[0084] The present invention is not limited to the above-described embodiments, and various other modifications and applications are possible without departing from the spirit of the invention as defined in the claims. For example, the above-described embodiments have been described in detail and specifically to clearly explain the present invention, and are not necessarily limited to those including all of the components described. Furthermore, it is possible to replace part of the configuration of one embodiment with a component of another embodiment. It is also possible to add a component of another embodiment to the configuration of one embodiment. It is also possible to add, replace, or delete other components from part of the configuration of each embodiment.

[0085] In the above-described embodiment, the control lines and information lines are those that are considered necessary for the explanation, and not all control lines and information lines in the product are necessarily shown. In reality, it can be considered that almost all components are connected to each other.

[0086] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0087] Furthermore, in this specification, terms such as "parallel" and "orthogonal" are used, but these terms do not mean only "parallel" and "orthogonal" in the strict sense, but also include the meanings of "parallel" and "orthogonal" in the strict sense, and further include the meanings of "approximately parallel" and "approximately orthogonal" within the range in which they can perform their functions.

[0088] 100, 100A to 100D...printed circuit board, 2-1, 2-2...filter component, 73...conductor layer, 74...dielectric layer, 75-1, 75-2...conductor pattern removal portion, 76...porous ground pattern

Claims

1. A circuit board in which a plurality of conductor layers having conductor patterns formed inside a dielectric layer are laminated, and a plurality of electronic components to which signal wirings for transmitting signals are connected are arranged on the surface layer of the dielectric layer, wherein a first electronic component is arranged on one surface layer of the dielectric layer, and a second electronic component is arranged on the other surface layer of the dielectric layer at a position where at least a part thereof overlaps with the first electronic component in a direction orthogonal to the lamination direction of the conductor layers, wherein the plurality of conductor layers include a removal part in which the conductor pattern is removed in a range where the first electronic component and the second electronic component in the direction orthogonal to the lamination direction overlap, and a porous part in which a plurality of holes are formed in a range where the first electronic component and the second electronic component in the direction orthogonal to the lamination direction overlap.

2. The circuit board according to claim 1, wherein the plurality of conductor layers include a first conductor layer including a first porous part in which a plurality of holes are formed, and a second conductor layer adjacent to the first conductor layer in the lamination direction, wherein the second conductor layer includes a second porous part in which a plurality of holes are formed so that positions in a direction orthogonal to the lamination direction do not overlap with the plurality of holes formed in the first porous part included in the first conductor layer.

3. The circuit board according to claim 1, wherein the plurality of conductor layers are composed of N layers, and a conductor layer located at the N / 2-th layer or the (N / 2 + 1)-th layer from one surface layer of the dielectric layer includes the porous part, and the other conductor layers include the removal part.

4. The circuit board according to claim 2, wherein the plurality of conductor layers are composed of N layers, and conductor layers located at the N / 2-th layer and the (N / 2 + 1)-th layer from one surface layer of the dielectric layer correspond to the first conductor layer and the second conductor layer, and the other conductor layers include the removal part.

5. The circuit board according to claim 1, wherein the plurality of conductor layers are composed of N layers, when the size of the first electronic component in a direction orthogonal to the lamination direction is larger than that of the second electronic component, a conductor layer located at the (N / 2 + 1)-th layer or higher from the surface layer of the dielectric layer where the first electronic component is arranged includes the porous part, and the other conductor layers include the removal part.

6. The plurality of conductor layers consists of N layers. When the size of the first electronic component in the direction orthogonal to the stacking direction is larger than that of the second electronic component, the first conductor layer and the second conductor layer are located in the (N / 2 + 1)-th layer or higher from the surface layer of the dielectric layer where the first electronic component is disposed, and the other conductor layers include the removal portion. The circuit board according to claim 2.

7. A multi-pole connector capable of connecting a plurality of coaxial cables and a communication circuit are mounted on the circuit board. The number of poles M of the multi-pole connector is a multiple of 2. The multi-pole connector and the communication circuit are connected by the same number of signal wirings as the number of poles M. One or more of the above-mentioned electronic components are connected to each of the signal wirings. One of the electronic components connected to the adjacent signal wirings among the electronic components is mounted on the surface of the dielectric layer, and the other electronic component connected to the adjacent signal wirings among the electronic components is mounted on the back surface of the dielectric layer. The positions of the electronic components mounted on the surface and the back surface of the dielectric layer in the direction orthogonal to the stacking direction of the conductor layers overlap. The circuit board according to claim 1.

8. A multi-pole differential connector capable of connecting a plurality of differential cables and a communication circuit are mounted on the circuit board. The number of differential pairs M of the multi-pole differential connector is a multiple of 2. The multi-pole differential connector and the communication circuit are connected by the same number of differential pair wirings as the number of differential pairs M. One or more of the above-mentioned electronic components are connected to each of the differential pair wirings. One of the electronic components connected to the adjacent differential pair wirings among the electronic components is mounted on the surface of the dielectric layer, and the other electronic component connected to the adjacent differential pair wirings among the electronic components is mounted on the back surface of the dielectric layer. The positions of the electronic components mounted on the surface and the back surface of the dielectric layer in the direction orthogonal to the stacking direction of the conductor layers overlap. The circuit board according to claim 1.

9. The shape of the holes in the porous portion is circular, and the diameter of the holes is 2.0 mm or less. The circuit board according to claim 1.

10. The shape of the holes in the porous portion is circular, and the diameter of the holes outside the region overlapping the electronic component is larger than the diameter of the holes within the region overlapping the electronic component in the direction orthogonal to the stacking direction. The circuit board according to claim 2.

11. An electronic control device comprising a circuit board in which a plurality of conductor layers each having a conductor pattern formed therein are laminated, and a plurality of electronic components to which signal wirings for transmitting signals are connected are disposed on a surface layer of the dielectric layer, wherein a first electronic component is disposed on one surface layer of the dielectric layer, a second electronic component is disposed at a position overlapping at least a part of the first electronic component in a direction orthogonal to the lamination direction of the conductor layers on the other surface layer of the dielectric layer, the plurality of conductor layers include a removal portion in which the conductor pattern is removed in a range where the first electronic component and the second electronic component overlap in a direction orthogonal to the lamination direction, and a porous portion in which a plurality of holes are formed in a range where the first electronic component and the second electronic component overlap in a direction orthogonal to the lamination direction.

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