Semiconductor device and method for manufacturing semiconductor device
The semiconductor device addresses electric field concentration issues by varying the carrier concentration and depth of the low-concentration layer radially to match electric field distribution, enhancing breakdown voltage and reducing leakage current.
Patent Information
- Application Number
- PCT/JP2024/002031
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-01-24
- Publication Date
- 2025-07-31
AI Technical Summary
Existing semiconductor devices using oxide semiconductors face challenges in effectively relaxing electric field concentration at the termination portion, leading to dielectric breakdown at lower than expected voltages, and existing termination structures do not consider the position of electric field concentration points.
A semiconductor device with a termination structure that includes a low-concentration layer under the insulating film, where the carrier concentration and depth of the low-concentration layer vary radially to match the electric field distribution, and is formed through controlled annealing processes using protective films of varying thickness or density.
Effectively relaxes the electric field under the electrode, reducing leakage current and increasing the breakdown voltage of the semiconductor device.
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Figure JP2024002031_31072025_PF_FP_ABST
Abstract
Description
Semiconductor device and method for manufacturing the same
[0001] The present disclosure relates to a semiconductor device having an oxide semiconductor as a base material.
[0002] For example, gallium oxide (Ga 2 O 3 Semiconductor devices for power control (hereinafter also referred to as "power devices") using oxide semiconductors such as SiO2 as a base material have been proposed. In power devices, an electric field is likely to concentrate at the termination, and when the electric field concentrates at the termination, dielectric breakdown occurs at a voltage lower than the theoretical breakdown voltage. For this reason, a structure for alleviating electric field concentration (hereinafter referred to as "termination structure") may be provided at the termination of the power device. Designing the termination structure is an essential technology for improving the breakdown voltage of power devices, and various termination structures have been proposed.
[0003] For example, Patent Document 1 and Non-Patent Document 1 listed below disclose a semiconductor device having a high-resistance layer (low-concentration layer) with a low carrier concentration as a termination structure below an end of a Schottky electrode formed on an oxide semiconductor substrate.
[0004] In Patent Document 1, a method for forming a high-resistance layer is adopted in which a groove is formed in a portion of an oxide semiconductor substrate where the high-resistance layer is to be formed, and the high-resistance layer is formed in the groove by epitaxial growth, which requires complicated processing to form the high-resistance layer.
[0005] In Non-Patent Document 1, a method is adopted in which an oxide semiconductor substrate is annealed in an oxygen atmosphere to increase the resistance of the surface layer of the oxide semiconductor substrate, thereby forming a high-resistance layer. During the annealing process, a mask made of a silicon oxide film and a polycrystalline silicon film is formed on the oxide semiconductor substrate, so that the high-resistance layer is formed locally.
[0006] Japanese Patent Application Laid-Open No. 2018-137393
[0007] Qiming He et al., Proc 1-3(Oral), The 4th International Workshop on Gallium Oxide and Related Materials
[0008] One technique for suppressing electric field concentration under the electrode edge is to extend the electrode edge onto the insulating film to function as a field plate (FP). By providing a field plate at the electrode edge, the electric field concentration points under the electrode edge are dispersed, and the electric field is alleviated.
[0009] In a structure that includes a field plate at the end of an electrode, the position of the electric field concentration point changes depending on the configuration of the field plate (e.g., the shape of the insulating film below the field plate). Therefore, it is preferable to appropriately set the configuration of the termination structure provided below the end of the electrode depending on the position of the electric field concentration point. In the technologies of Patent Document 1 and Non-Patent Document 1, the carrier concentration of the high-resistance layer that is the termination structure is uniform, and the position of the electric field concentration point is not taken into consideration.
[0010] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a semiconductor device having a termination structure that can more effectively reduce the electric field under the end of an electrode.
[0011] The semiconductor device according to the present disclosure includes an oxide semiconductor layer, an electrode formed on the oxide semiconductor layer, an insulating film formed on the oxide semiconductor layer with an end of the electrode resting on top of it, and a low-concentration layer formed below the insulating film in a surface layer portion of the oxide semiconductor layer and having a locally low carrier concentration, wherein at least one of the carrier concentration and the depth of the low-concentration layer varies in a direction from the inner periphery to the outer periphery of the low-concentration layer.
[0012] According to the present disclosure, the electric field under the edge of the electrode can be effectively alleviated.
[0013] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings.
[0014] 1 is a diagram showing a configuration of a semiconductor device according to a first embodiment; FIG. 2 is a diagram showing a modified example of the semiconductor device according to the first embodiment; FIG. 3 is a diagram showing a modified example of the semiconductor device according to the first embodiment; FIG. 4 is a diagram showing a configuration of a semiconductor device according to a second embodiment; FIG. 5 is a diagram showing a modified example of the semiconductor device according to the second embodiment; FIG. 6 is a diagram showing a modified example of the semiconductor device according to the second embodiment; FIG. 7 is a diagram showing a method for manufacturing a semiconductor device according to a third embodiment; FIG. 8 is a diagram showing a method for manufacturing a semiconductor device according to the third embodiment; FIG. 9 is a diagram showing a method for manufacturing a semiconductor device according to the third embodiment; FIG. 10 is a diagram showing a method for manufacturing a semiconductor device according to the third embodiment; FIG. 11 is a diagram showing a method for manufacturing a semiconductor device according to the fourth embodiment; FIG. 12 is a diagram showing a method for manufacturing a semiconductor device according to the fourth embodiment; FIG. 13 is a diagram showing a method for manufacturing a semiconductor device according to the fourth embodiment; FIG. 14 is a diagram showing a method for manufacturing a semiconductor device according to the fourth embodiment.
[0015] <First Preferred Embodiment> Fig. 1 is a diagram showing the configuration of a Schottky barrier diode, which is a semiconductor device according to a first preferred embodiment. Fig. 1 shows the right half of a cross section of the semiconductor device. That is, the semiconductor device according to the first preferred embodiment has a rotationally symmetric structure with respect to the axis of dashed line C at the left end of Fig. 1.
[0016] 1, the semiconductor device is formed using an oxide semiconductor layer 1 that is configured by a semiconductor substrate 11 made of an oxide semiconductor and an epitaxially grown layer 12 made of an oxide semiconductor epitaxially grown on the semiconductor substrate 11. In this embodiment, the oxide semiconductor that configures the oxide semiconductor layer 1 (semiconductor substrate 11 and epitaxially grown layer 12) is gallium oxide (Ga 2 O 3 ) However, the crystal type of the oxide semiconductor is not limited to α-type, β-type, etc., and may be other than gallium oxide. Furthermore, the oxide semiconductor may be formed only by the epitaxial growth layer 12 without including the semiconductor substrate 11.
[0017] The semiconductor substrate 11 and the epitaxial growth layer 12 have N-type conductivity. The epitaxial growth layer 12 has a lower carrier concentration than the semiconductor substrate 11 and functions as a drift layer of a Schottky barrier diode. Hereinafter, the surface of the oxide semiconductor layer 1 facing the epitaxial growth layer 12 will be referred to as the upper surface (front surface), and the surface facing the oxide semiconductor layer 1 will be referred to as the lower surface (back surface).
[0018] On the top surface of the oxide semiconductor layer 1, there are provided a surface electrode 2 which is an anode electrode (Schottky electrode), and a silicon oxide (SiO 2 ) is formed on the oxide semiconductor layer 1. An end 2a of the surface electrode 2 rides on the insulating film 3 and functions as a field plate (FP). Hereinafter, the end 2a of the surface electrode 2 riding on the insulating film 3 will be referred to as an "FP portion." In addition, a back electrode 5 serving as a cathode electrode (ohmic electrode) is formed on the lower surface of the oxide semiconductor layer 1.
[0019] In this embodiment, the portion of the insulating film 3 below the FP portion 2a, i.e., the portion on which the surface electrode 2 rides, is stepped and has steps. While FIG. 1 shows an example in which the insulating film 3 has only one step, the number of steps may be multiple or zero (i.e., the thickness of the insulating film 3 is uniform). The shape of the portion of the insulating film 3 below the FP portion 2a may also be inclined. The electric field distribution under the end of the surface electrode 2 (e.g., the position of the electric field concentration point, the electric field strength at the electric field concentration point, etc.) varies depending on the length of the FP portion 2a, the thickness of the insulating film 3, the number of steps in the insulating film 3, the width, height, and gradient of the slope.
[0020] A low-concentration layer 4 (high-resistance layer), which is a region with a locally low carrier concentration, is formed as a termination structure in a portion below the insulating film 3 in the surface portion of the oxide semiconductor layer 1 (the surface portion of the epitaxial growth layer 12). The carrier concentration of the low-concentration layer 4 is lower than, for example, a portion of the oxide semiconductor layer 1 directly below the surface electrode 2 (a portion where the low-concentration layer 4 is not formed).
[0021] The FP portion 2a of the surface electrode 2 extends above the low-concentration layer 4 via the insulating film 3. Conversely, the low-concentration layer 4 is formed below the FP portion 2a. As described above, the semiconductor device has a rotationally symmetric structure with respect to the axis of dashed line C in Fig. 1 , and therefore, in a plan view, the insulating film 3 and the low-concentration layer 4 are disposed on the outer periphery of the surface electrode 2 so as to surround the surface electrode 2.
[0022] As shown in Fig. 1, the depth of the low-concentration layer 4 varies in a direction from the inner periphery to the outer periphery of the low-concentration layer 4. Hereinafter, the direction from the inner periphery to the outer periphery of the low-concentration layer 4 will be referred to as the "radial direction." In Fig. 1, the depth of the low-concentration layer 4 varies stepwise (i.e., in a stepped manner) along the radial direction, being deeper at the inner periphery and shallower at the outer periphery.
[0023] The radial depth distribution of the low-concentration layer 4 is set according to the electric field distribution under the end of the surface electrode 2, which is determined by the length of the FP portion 2a, the thickness of the insulating film 3, the number of steps in the insulating film 3, the width, height, and gradient of the inclination. Depending on the electric field distribution under the end of the surface electrode 2, the depth of the low-concentration layer 4 may be shallower in the inner periphery and deeper in the outer periphery, as shown in FIG. 2. Alternatively, as shown in FIGS. 3 and 4, the depth of the low-concentration layer 4 may vary continuously (i.e., in a gradient) along the radial direction. In FIGS. 2, 3, and 4, the thickness of the insulating film 3 is thin in the inner periphery and thicker in the outer periphery. However, the thickness of the insulating film 3 may be thicker in the inner periphery and thinner in the outer periphery, as long as the depth of the low-concentration layer 4 is varied.
[0024] In the semiconductor device according to this embodiment, the radial depth distribution of the low concentration layer 4 is appropriately set in accordance with the electric field distribution below the end of the surface electrode 2, thereby more effectively alleviating the electric field below the end of the surface electrode 2 than when the depth distribution is uniform. This is expected to result in a semiconductor device with a lower leakage current and a higher breakdown voltage.
[0025] In this embodiment, an example has been shown in which the depth of the low concentration layer 4 monotonically increases or decreases along the radial direction, but the depth of the low concentration layer 4 may change in any way as long as it can effectively alleviate the electric field.
[0026] Second Embodiment Fig. 5 is a diagram showing the configuration of a Schottky barrier diode, which is a semiconductor device according to a second embodiment. Fig. 5 shows the right half of a cross section of the semiconductor device. That is, the semiconductor device according to the second embodiment has a rotationally symmetric structure with respect to the dashed line C at the left end of Fig. 5. Fig. 5 also shows a graph of the relationship between the distance from the inner circumferential end of the low-concentration layer 4 and the carrier concentration of the low-concentration layer 4.
[0027] The configuration of the semiconductor device according to the second embodiment is the same as that of the semiconductor device according to the first embodiment, except for the low concentration layer 4. Therefore, the description of the portions other than the low concentration layer 4 will be omitted here.
[0028] 5, in the second embodiment, the carrier concentration of the low-concentration layer 4 varies in the direction (radial direction) from the inner periphery to the outer periphery of the low-concentration layer 4. In FIG. 5, the carrier concentration of the low-concentration layer 4 varies stepwise along the radial direction so as to be low in the inner periphery and high in the outer periphery.
[0029] The radial carrier concentration distribution of the low-concentration layer 4 is set according to the electric field distribution under the end of the surface electrode 2, which is determined by the length of the FP portion 2a, the thickness of the insulating film 3, the number, width, height, and gradient of the steps of the insulating film 3, etc. Depending on the electric field distribution under the end of the surface electrode 2, the carrier concentration of the low-concentration layer 4 may be made higher in the inner peripheral portion and lower in the outer peripheral portion, as shown in Figure 6. Alternatively, the carrier concentration of the low-concentration layer 4 may change continuously along the radial direction, as shown in Figures 7 and 8.
[0030] In the semiconductor device according to this embodiment, the radial carrier concentration distribution of the low concentration layer 4 is appropriately set in accordance with the electric field distribution below the end of the surface electrode 2, thereby making it possible to more effectively alleviate the electric field below the end of the surface electrode 2 than when the carrier concentration distribution is uniform.
[0031] In this embodiment, an example has been shown in which the carrier concentration of the low concentration layer 4 monotonically increases or decreases along the radial direction, but the carrier concentration of the low concentration layer 4 may change in any way as long as the electric field can be effectively alleviated.
[0032] Although the first embodiment shows an example in which the depth of the low-concentration layer 4 varies in the radial direction and the second embodiment shows an example in which the carrier concentration of the low-concentration layer 4 varies in the radial direction, both the carrier concentration and the depth of the low-concentration layer 4 may vary in the radial direction. In other words, it is sufficient that at least one of the carrier concentration and the depth of the low-concentration layer 4 varies in the radial direction.
[0033] Third Preferred Embodiment In a third preferred embodiment, a method for manufacturing the semiconductor device according to the first and second preferred embodiments will be described. Here, a method for manufacturing the semiconductor device shown in FIG.
[0034] First, an N-type oxide semiconductor layer 1 made of a semiconductor substrate 11 and an epitaxially grown layer 12 is prepared. Then, as shown in Fig. 9, a back surface electrode 5 is formed on the lower surface of the oxide semiconductor layer 1, and an insulating film 3 made of silicon oxide is formed on the upper surface of the oxide semiconductor layer 1. The insulating film 3 is formed so as to cover the entire upper surface of the oxide semiconductor layer 1. At this time, the insulating film 3 is formed thickly on the region where the low-concentration layer 4 is not formed and thinly on the region where the low-concentration layer 4 is formed.
[0035] The insulating film 3 functions as a protective film that protects the upper surface of the oxide semiconductor layer 1 from the annealing treatment in the next step. The thickness of the insulating film 3 on the region where the low-concentration layer 4 is not formed, such as the region where the front electrode 2 is formed (i.e., the region where the front electrode 2 is in contact with the oxide semiconductor layer 1) excluding the FP portion 2a, is set to be sufficiently thick as long as the surface layer portion of the oxide semiconductor layer 1 below it does not have a low carrier concentration due to the annealing treatment. The thickness of the insulating film 3 on the region where the low-concentration layer 4 is formed is set according to the depth of the low-concentration layer 4 to be formed. In other words, the deeper the region where the low-concentration layer 4 is formed, the thinner the thickness of the insulating film 3 formed thereon.
[0036] Therefore, when the depth of the low-concentration layer 4 is changed along the radial direction, the thickness of the insulating film 3 is changed along the radial direction. When the depth of the low-concentration layer 4 is changed stepwise along the radial direction as in the semiconductor device of Fig. 1, the thickness of the insulating film 3 is changed stepwise along the radial direction as in Fig. 9. Furthermore, although not shown, if the thickness of the insulating film 3 is changed continuously along the radial direction, the depth of the low-concentration layer 4 can also be changed continuously along the radial direction as in the semiconductor device of Fig. 3 or 4.
[0037] The insulating film 3 having a thickness that varies in parts can be formed, for example, by repeating the deposition and patterning of silicon oxide multiple times. Alternatively, by applying a patterning technique using a halftone mask, the insulating film 3 having a thickness that varies in parts can be formed by depositing silicon oxide and patterning it only once.
[0038] 10, the oxide semiconductor layer 1, the upper surface of which is covered with the insulating film 3, is then annealed in an oxygen atmosphere. This annealing reduces the carrier concentration in the surface portion on the upper surface of the oxide semiconductor layer 1, forming a low-concentration layer 4. However, in the region covered with an insulating film 3 that is thicker than the insulating film 3 above the region where the low-concentration layer 4 is to be formed, or that is sufficiently thick, the carrier concentration is not reduced, and the low-concentration layer 4 is formed locally. In the thinner portion of the insulating film 3, the low-concentration layer 4 is formed deep, and the depth of the low-concentration layer 4 changes stepwise in the radial direction, as shown in FIG. 11. The annealing reduces the carrier concentration in the silicon oxide (SiO 2 ) becomes closer to the stoichiometric composition, the electric field relaxation effect is improved, and an improvement in the breakdown voltage of the semiconductor device can be expected.
[0039] 12, the insulating film 3 is removed from the region where the front electrode 2 is to be in contact with the oxide semiconductor layer 1. Then, as shown in Fig. 13, the front electrode 2 is formed in the portion where the insulating film 3 has been removed, with its end portion lying on the insulating film 3, thereby completing the configuration of the semiconductor device shown in Fig. 1.
[0040] In the manufacturing method described above, the position and depth of the low-concentration layer 4 are controlled by the thickness of the insulating film 3 (silicon oxide film) that serves as a protective film during annealing. However, the position and depth of the low-concentration layer 4 can also be controlled by the density of the insulating film 3 that serves as a protective film during annealing. Specifically, the density of the insulating film 3 in the region where the low-concentration layer 4 is not formed is set sufficiently high within a range that does not cause the surface layer of the oxide semiconductor layer 1 underneath to have a low carrier concentration during annealing. Furthermore, the density of the insulating film 3 in the region where the low-concentration layer 4 is formed is set according to the depth of the low-concentration layer 4 to be formed. In other words, the deeper the region where the low-concentration layer 4 is formed, the lower the density of the insulating film 3 formed thereon.
[0041] Therefore, when the depth of the low-concentration layer 4 is changed along the radial direction, the density of the insulating film 3 is changed along the radial direction. When the depth of the low-concentration layer 4 is changed stepwise along the radial direction as in the semiconductor device of Figure 1, the density of the insulating film 3 is changed stepwise along the radial direction. Furthermore, if the density of the insulating film 3 is changed continuously along the radial direction, the depth of the low-concentration layer 4 can also be changed continuously along the radial direction as in the semiconductor device of Figure 3 or Figure 4.
[0042] The insulating film 3 having partially different densities can be formed, for example, by repeating silicon oxide film formation and patterning multiple times while changing the density of the silicon oxide. The density of the silicon oxide can be adjusted by changing the source gas, the partial pressure ratio of the source gas, the film formation method (e.g., CVD (chemical vapor deposition), sputtering, etc.). Note that even if a portion of the insulating film 3 is formed from low-density silicon oxide, the silicon oxide will be compacted and its density will be improved by annealing, and it will eventually become high-density silicon oxide, so it is thought that there will be no adverse effect on the breakdown voltage of the semiconductor device.
[0043] Furthermore, by appropriately combining the method of controlling the position and depth of the low-concentration layer 4 by the thickness of the insulating film 3 and the method of controlling the position and depth by the density of the insulating film 3, it is possible to form low-concentration layers 4 with various depth and concentration distributions, such as the low-concentration layer 4 of uniform depth and varying carrier concentration in the radial direction as in the second embodiment (FIGS. 5 to 8).
[0044] Fourth Preferred Embodiment In a fourth preferred embodiment, another method for manufacturing the semiconductor device according to the first and second preferred embodiments will be described. Here, a method for manufacturing the semiconductor device shown in FIG.
[0045] First, an N-type oxide semiconductor layer 1 made of a semiconductor substrate 11 and an epitaxially grown layer 12 is prepared. Then, as shown in Fig. 9, a backside electrode 5 is formed on the lower surface of the oxide semiconductor layer 1, and a protective film 3a made of single crystal silicon, polycrystalline silicon, microcrystalline silicon, or amorphous silicon (hereinafter simply referred to as "silicon") is formed on the upper surface of the oxide semiconductor layer 1. The protective film 3a is formed so as to cover the entire upper surface of the oxide semiconductor layer 1. At this time, the protective film 3a is formed thick on regions where the low-concentration layer 4 is not formed and thin on regions where the low-concentration layer 4 is formed.
[0046] The protective film 3a functions as a protective film that protects the upper surface of the oxide semiconductor layer 1 from the annealing treatment in the next step. The thickness of the protective film 3a on the region where the low-concentration layer 4 is not formed is set to be sufficiently thick within a range in which the carrier concentration of the surface layer of the oxide semiconductor layer 1 underneath is not reduced by the annealing treatment. The thickness of the protective film 3a on the region where the low-concentration layer 4 is formed is set according to the depth of the low-concentration layer 4 to be formed. In other words, the deeper the region where the low-concentration layer 4 is formed, the thinner the thickness of the protective film 3a formed thereon.
[0047] Therefore, when the depth of the low-concentration layer 4 is changed along the radial direction, the thickness of the protective film 3a is changed along the radial direction. When the depth of the low-concentration layer 4 is changed stepwise along the radial direction as in the semiconductor device of Figure 1, the thickness of the protective film 3a is changed stepwise along the radial direction as in Figure 14. Furthermore, although not shown, if the thickness of the protective film 3a is changed continuously along the radial direction, the depth of the low-concentration layer 4 can also be changed continuously along the radial direction as in the semiconductor device of Figure 3 or Figure 4.
[0048] The protective film 3 a having partially different thicknesses can be formed, for example, by repeating silicon film deposition and patterning multiple times. Alternatively, by applying a patterning technique using a halftone mask, the protective film 3 a having partially different thicknesses can be formed by performing silicon film deposition and patterning only once.
[0049] 15, the oxide semiconductor layer 1, the upper surface of which is covered with the protective film 3a, is subjected to an annealing treatment in an oxygen atmosphere. This annealing treatment reduces the carrier concentration in the surface portion on the upper surface of the oxide semiconductor layer 1, forming a low-concentration layer 4. However, in the region covered with a sufficiently thick protective film 3a, the carrier concentration is not reduced, and the low-concentration layer 4 is formed locally. Since the low-concentration layer 4 is formed deep in the thin portion of the protective film 3a, the depth of the low-concentration layer 4 changes stepwise along the radial direction, as shown in FIG. 16. Furthermore, in the above annealing treatment, the silicon in the protective film 3a is oxidized and chemically changed to silicon oxide, and the protective film 3a is changed into an insulating film 3 made of silicon oxide. The annealing treatment reduces the silicon oxide (SiO 2 ) becomes closer to the stoichiometric composition, the electric field relaxation effect is improved, and an improvement in the breakdown voltage of the semiconductor device can be expected.
[0050] The subsequent steps are the same as those in Embodiment 3. That is, as shown in Fig. 12, the insulating film 3 is removed from the region where the front surface electrode 2 is to be in contact with the oxide semiconductor layer 1, and as shown in Fig. 13, the front surface electrode 2 is formed in the portion where the insulating film 3 has been removed, with its end portion running onto the insulating film 3. This completes the configuration of the semiconductor device shown in Fig. 1.
[0051] In the manufacturing method described above, the position and depth of the low-concentration layer 4 are controlled by the thickness of the protective film 3a (single-crystal silicon, polycrystalline silicon, microcrystalline silicon, or amorphous silicon) during the annealing treatment. However, the position and depth of the low-concentration layer 4 can also be controlled by the density of the protective film 3a. Specifically, the density of the protective film 3a in the region where the low-concentration layer 4 is not formed is set sufficiently high within a range that does not cause the surface portion of the oxide semiconductor layer 1 underneath to have a low carrier concentration due to the annealing treatment. Furthermore, the density of the protective film 3a in the region where the low-concentration layer 4 is formed is set according to the depth of the low-concentration layer 4 to be formed. In other words, the deeper the region where the low-concentration layer 4 is formed, the lower the density of the protective film 3a formed thereon.
[0052] Therefore, when the depth of the low-concentration layer 4 is changed along the radial direction, the density of the protective film 3a is changed along the radial direction. When the depth of the low-concentration layer 4 is changed stepwise along the radial direction as in the semiconductor device of Figure 1, the density of the protective film 3a is changed stepwise along the radial direction. Furthermore, if the density of the protective film 3a is changed continuously along the radial direction, the depth of the low-concentration layer 4 can also be changed continuously along the radial direction as in the semiconductor device of Figure 3 or Figure 4.
[0053] The protective film 3a having partially different densities can be formed, for example, by repeating silicon deposition and patterning multiple times while changing the silicon density. The silicon density can be adjusted by changing the source gas, the partial pressure ratio of the source gas, the film deposition method (e.g., CVD, sputtering, etc.), etc. Note that even if a portion of the protective film 3a is formed from low-density silicon, the silicon oxide converted from the silicon can be compacted by annealing, improving its density and ultimately becoming high-density silicon oxide.
[0054] Furthermore, by appropriately combining the method of controlling the position and depth of the low-concentration layer 4 by the thickness of the protective film 3a and the method of controlling the position and depth by the density of the protective film 3a, it is possible to form low-concentration layers 4 with various depth and concentration distributions, such as the low-concentration layer 4 having a uniform depth but varying carrier concentration in the radial direction as in embodiment 2 (FIGS. 5 to 8). Furthermore, by appropriately changing the density of the protective film 3a in particular, it is possible to form the low-concentration layer 4 shallower in the thin portion of the insulating film 3 and deeper in the thick portion of the insulating film 3, as shown in FIGS.
[0055] According to the fourth embodiment, the insulating film 3 can be formed using a material other than silicon oxide, which has the effect of easing restrictions on the manufacturing process of the semiconductor device.
[0056] In the first to fourth embodiments, a Schottky barrier diode has been shown as an example of a semiconductor device. However, the technology according to the present disclosure can also be applied to, for example, a metal oxide semiconductor field effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT). In such cases, the source electrode of the MOSFET or the emitter electrode of the IGBT corresponds to the surface electrode. A P-type or N-type well region or source region of the MOSFET, or a P-type or N-type base region or emitter region of the IGBT, is formed in the surface layer of the oxide semiconductor layer 1 near the dashed line C, which is the axis of rotational symmetry in FIG. 1 , i.e., inside (covered portion of) the surface electrode 2.
[0057] It should be noted that the embodiments can be freely combined, and the embodiments can be modified or omitted as appropriate.
[0058] The above description is illustrative in all respects, and it is understood that countless variations not illustrated can be envisioned.
[0059] REFERENCE SIGNS LIST 1 oxide semiconductor layer, 2 front surface electrode, 2a FP portion, 3 insulating film, 3a protective film, 4 low concentration layer, 5 back surface electrode, 11 semiconductor substrate, 12 epitaxial growth layer
Claims
1. An oxide semiconductor layer, an electrode formed on the oxide semiconductor layer, an insulating film formed on the oxide semiconductor layer with the end of the electrode riding thereon, and a low-concentration layer formed in a portion under the insulating film in the surface layer portion of the oxide semiconductor layer where the carrier concentration is locally low, and at least one of the carrier concentration and the depth of the low-concentration layer changes in a direction from the inner periphery to the outer periphery of the low-concentration layer, a semiconductor device.
2. The semiconductor device according to claim 1, wherein at least one of the carrier concentration and the depth of the low-concentration layer changes stepwise in a direction from the inner periphery to the outer periphery of the low-concentration layer.
3. The semiconductor device according to claim 1, wherein at least one of the carrier concentration and the depth of the low-concentration layer changes continuously in a direction from the inner periphery to the outer periphery of the low-concentration layer.
4. The semiconductor device according to any one of claims 1 to 3, wherein the thickness of the portion of the insulating film where the electrode rides thereon changes in a direction from the inner periphery to the outer periphery of the low-concentration layer.
5. The semiconductor device according to claim 4, wherein the portion of the insulating film where the electrode rides thereon has a stepped shape that thickens in a direction from the inner periphery to the outer periphery of the low-concentration layer.
6. The semiconductor device according to any one of claims 1 to 5, wherein the oxide semiconductor layer is made of gallium oxide.
7. A method of manufacturing a semiconductor device, comprising: (a) a step of covering an oxide semiconductor layer with a protective film; (b) a step of annealing in an oxygen atmosphere to lower the carrier concentration of the surface layer portion of the oxide semiconductor layer covered with the protective film; (c) a step of removing a part of the protective film and forming an electrode with an end riding on the protective film on the oxide semiconductor layer in the portion where the protective film has been removed and on the protective film, and at least one of the thickness and density of the protective film formed in the step (a) changes in a direction from the electrode formation region to the outside, and the thickness and density of the portion of the protective film removed in the step (c) are set within a range where the surface layer portion of the underlying oxide semiconductor layer is not lowered in carrier concentration in the step (b).
8. The method of manufacturing a semiconductor device according to claim 7, wherein at least one of the thickness and density of the protective film formed in the step (a) changes stepwise in a direction from the electrode formation region to the outside.
9. The manufacturing method of the semiconductor device according to claim 8, wherein at least one of the thickness and density of the protective film formed in the step (a) continuously changes in a direction from the formation region of the electrode toward the outside.
10. The manufacturing method of the semiconductor device according to any one of claims 7 to 9, wherein in the step (a), the protective film is formed of silicon oxide.
11. The manufacturing method of the semiconductor device according to any one of claims 7 to 9, wherein in the step (a), the protective film is formed of single crystal silicon, polycrystalline silicon, microcrystalline silicon, or amorphous silicon, and the protective film chemically changes to silicon oxide by the annealing treatment in the step (b).
12. The manufacturing method of the semiconductor device according to any one of claims 7 to 11, wherein the oxide semiconductor layer is made of gallium oxide.
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