Vertical-cavity surface-emitting laser

Abstract

The present disclosure relates to a vertical-cavity surface-emitting laser. The vertical-cavity surface-emitting laser comprises a first distributed Bragg reflector (12), an active layer (13), an oxide layer (14) and a second distributed Bragg reflector (15) that are located on the front surface of a substrate (11) and are sequentially stacked in a direction away from the substrate (11). The active layer (13) comprises a first heterojunction layer (131), a quantum well layer (132) and a second heterojunction layer (133) that are sequentially stacked in a direction away from the substrate (11), wherein materials of the first heterojunction layer (131) and the second heterojunction layer (133) both comprise aluminum gallium arsenide, and the aluminum composition in the first heterojunction layer (131) and the second heterojunction layer (133) gradually increases in a direction away from the quantum well layer (132).

Description

Vertical Cavity Surface Emitting Lasers

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The present disclosure claims priority to U.S. patent application No. 63 / 626,181, filed with the U.S. Patent Office on January 29, 2024, with the invention title “High speed VCSEL with narrow SCH layers,” and Chinese patent application No. 202411581627.0, filed with the China Patent Office on November 6, 2024, with the invention title “Vertical Cavity Surface Emitting Laser,” the entire contents of which are incorporated by reference into the present disclosure. Technical Field

[0003] The present disclosure relates to the field of semiconductor lasers, and in particular to a vertical cavity surface emitting laser. Background Art

[0004] VCSEL (Vertical-Cavity Surface-Emitting Laser) is the full name of vertical cavity surface emitting laser, which is a type of semiconductor laser. Its basic structure mainly includes an active layer and a DBR (Distributed Bragg Reflector-DBR) reflector with optical feedback function.

[0005] VCSEL can generate a circular light spot that is easy to couple with optical fibers. It has many advantages, such as high modulation rate, low transmission loss, high temperature stability, low threshold current, low power consumption, high reliability and easy integration with other optical devices.

[0006] However, with the development of high-speed data communication technology, the market has put forward higher requirements on the bandwidth supported by VCSEL. Therefore, how to increase the bandwidth supported by VCSEL without increasing the size of VCSEL has become one of the important research and development directions. Summary of the Invention

[0007] According to some embodiments, a first aspect of the present disclosure provides a vertical cavity surface emitting laser, comprising a first distributed Bragg reflector, an active layer, an oxide layer, and a second distributed Bragg reflector located on the front side of a substrate and stacked sequentially in a direction away from the substrate; the active layer comprises a first heterojunction layer, a quantum well layer, and a second heterojunction layer stacked sequentially in a direction away from the substrate; wherein the materials of the first heterojunction layer and the second heterojunction layer both include aluminum gallium arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases in a direction away from the quantum well layer.

[0008] According to some embodiments, the first heterojunction layer includes a first portion located between a central cross section thereof and the quantum well layer, and an aluminum component ratio of the first portion in the first heterojunction layer is 10%-40%.

[0009] According to some embodiments, the second heterojunction layer includes a first portion located between a central cross section thereof and the quantum well layer, and an aluminum component ratio of the first portion in the second heterojunction layer is 10%-40%.

[0010] According to some embodiments, the aluminum content in the first heterojunction layer and the second heterojunction layer increases linearly or gradiently in a direction away from the quantum well layer.

[0011] According to some embodiments, the quantum well layer includes sub-quantum well layers and barrier layers that are alternately stacked in a direction away from the substrate; wherein, in the quantum well layer, the top sub-quantum well layer is adjacent to the second heterojunction layer, and the bottom sub-quantum well layer is adjacent to the first heterojunction layer.

[0012] According to some embodiments, the quantum well layer includes a first aluminum gallium arsenide barrier layer and a second aluminum gallium arsenide barrier layer, the first aluminum gallium arsenide barrier layer is located between the bottom sub-quantum well layer and the first heterojunction layer; the second aluminum gallium arsenide barrier layer is located between the top sub-quantum well layer and the second heterojunction layer; the aluminum component in the first aluminum gallium arsenide barrier layer accounts for 10%-40%; the aluminum component in the second aluminum gallium arsenide barrier layer accounts for 10%-40%.

[0013] According to some embodiments, the barrier layer includes aluminum gallium arsenide or aluminum gallium arsenide phosphide; wherein the aluminum composition in the barrier layer remains constant along a direction away from the quantum well layer.

[0014] According to some embodiments, the oxide layer includes a light exit hole; the light exit hole is located within an orthographic projection of the second distributed Bragg reflector on the top surface of the oxide layer.

[0015] According to some embodiments, the ratio of the maximum opening size to the minimum opening size of the light exit hole is 1.25-1.35.

[0016] According to some embodiments, the vertical cavity surface emitting laser further includes a first contact layer and a second contact layer, wherein the first contact layer is located on the top surface of the first distributed Bragg reflector and surrounds the active layer; and the second contact layer is located on the top surface of the second distributed Bragg reflector and surrounds the light exit hole.

[0017] According to some embodiments, the first contact layer includes aluminum gallium arsenide or aluminum gallium arsenide phosphide; and the aluminum component in the first contact layer accounts for 10%-40%.

[0018] According to some embodiments, the second contact layer includes aluminum gallium arsenide or aluminum gallium arsenide phosphide; and the aluminum component in the second contact layer accounts for 10%-40%.

[0019] According to some embodiments, a second aspect of the present disclosure provides a laser array, comprising a plurality of vertical cavity surface emitting lasers as described in any of the aforementioned embodiments arranged in rows and columns; wherein the vertical cavity surface emitting lasers located in the same row are all connected to the corresponding row selection line; the vertical cavity surface emitting lasers located in the same column are all connected to the corresponding column selection line; the vertical cavity surface emitting lasers in different rows are respectively connected to different row selection lines; the vertical cavity surface emitting lasers in different columns are respectively connected to different column selection lines; and the vertical cavity surface emitting lasers connected to the selected row selection line and the selected column selection line are selected by selecting a row selection line and a column selection line.

[0020] According to some embodiments, a third aspect of the present disclosure provides a light emitting device, including:

[0021] A vertical cavity surface emitting laser as described in any one of the preceding embodiments.

[0022] According to some embodiments, a fourth aspect of the present disclosure provides a light emitting device, including:

[0023] A laser array as described in any one of the preceding embodiments.

[0024] The details of one or more embodiments of the present disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the present disclosure will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, without paying any creative work, they can also obtain drawings of other embodiments based on these drawings.

[0026] 1 to 3 are schematic longitudinal cross-sectional views of a vertical cavity surface emitting laser provided in different embodiments of the present disclosure;

[0027] FIG4 is a schematic diagram showing a three-dimensional structure of a vertical cavity surface emitting laser provided in one embodiment of the present disclosure;

[0028] FIG5 is a schematic diagram showing the variation of the refractive index of the heterojunction layer and the active layer in a VCSEL provided in an embodiment of the present disclosure with respect to position, wherein (1) is a schematic diagram showing the variation of the refractive index of the heterojunction layer and the active layer in a VCSEL capable of supporting 50G bandwidth in the related art with respect to position, and (2) is a schematic diagram showing the variation of the refractive index of the heterojunction layer and the active layer in an embodiment of the present disclosure with respect to position;

[0029] FIG6 is a schematic top view of a laser array provided in one embodiment of the present disclosure;

[0030] FIG7 is a schematic longitudinal cross-sectional view of a laser array provided in another embodiment of the present disclosure, wherein FIG7 may be a schematic longitudinal cross-sectional view taken along the AA′ direction shown in FIG6 ;

[0031] FIG8 is a schematic flow chart showing a method for preparing a vertical cavity surface emitting laser provided in one embodiment of the present disclosure. DETAILED DESCRIPTION

[0032] To facilitate understanding of the present disclosure, a more comprehensive description of the present disclosure will be provided below with reference to the accompanying drawings. The drawings illustrate preferred embodiments of the present disclosure. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this disclosure pertains. The terms used herein in the specification of this disclosure are for the purpose of describing specific embodiments only and are not intended to limit this disclosure. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0034] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it may be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there may be no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part.

[0035] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," etc., may be used herein for convenience of description to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the drawings is flipped, then the elements or features described as "under" or "beneath" or "beneath" the other elements will be oriented as "over" the other elements or features. Thus, the exemplary terms "under" and "under" may include both the upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or in other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0036] The purpose of the terms used herein is only to describe specific embodiments and is not intended to limit the present disclosure. When used herein, the singular forms "a", "an", and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0037] Embodiments of the application are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the present disclosure. As such, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the present disclosure should not be limited to the specific shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the actual shapes of the regions of the device and are not intended to limit the scope of the present disclosure.

[0038] The multi-layer structure described in the embodiment of the present disclosure can be formed layer by layer or formed as a whole; wherein two adjacent layer structures can be in contact or isolated from each other.

[0039] The vertical substrate described in the embodiment of the present disclosure may be a vertical substrate upper surface, and the parallel substrate may be a parallel substrate upper surface.

[0040] Please refer to Figures 1 to 7. It should be noted that the figures provided in this embodiment are merely schematic illustrations of the basic concept of the present disclosure. Although the figures only show components related to the present disclosure and are not drawn according to the number, shape, and size of components in actual implementation, the type, quantity, and proportion of each component in actual implementation may be changed arbitrarily, and the component layout may also be more complex.

[0041] Since the advent of the information age, the rapid development of internet technology has effectively driven the demand for high-speed data communications. Major network giants have also established ultra-large-scale data centers, which in turn has placed higher demands on high-speed data transmission systems. The establishment of high-bandwidth, low-power data communication systems is one of the inevitable trends in the future development of high-speed data communications.

[0042] VCSELs can generate a circular light spot that is easily coupled to optical fibers. They offer numerous advantages, including high modulation rate, low transmission loss, high temperature stability, low threshold current, low power consumption, high reliability, and ease of integration with other optical devices. Therefore, mainstream high-speed communication applications currently use vertical-cavity surface-emitting lasers (VCSELs) as light sources.

[0043] The basic structure of a VCSEL consists of an active layer and a DBR (Distributed Bragg Reflector) reflector with optical feedback. The active layer is sandwiched between two DBRs, forming a Fabry-Perot resonant cavity. The excitation source generates optical gain through spontaneous emission from the gain medium in the active layer. Light waves within the cavity reflect between the top and bottom DBRs, forming a stable standing wave. This wave is amplified through stimulated emission, ultimately generating laser light.

[0044] Please refer to Figure 1. In some embodiments, a vertical cavity surface emitting laser is provided, including a first distributed Bragg reflector 12, an active layer 13, an oxide layer 14, and a second distributed Bragg reflector 15, which are located on the front side of a substrate 11 and stacked in sequence along a direction away from the substrate 11 (for example, the oz direction); the active layer 13 includes a first heterojunction layer 131, a quantum well layer 132, and a second heterojunction layer 133, which are stacked in sequence along a direction away from the substrate 11; wherein the materials of the first heterojunction layer 131 and the second heterojunction layer 133 both include aluminum gallium arsenide, and the aluminum component (for example, the aluminum atomic content) in the first heterojunction layer 131 and the second heterojunction layer 133 gradually increases along the direction away from the quantum well layer 132.

[0045] Continuing with reference to FIG1 , the active layer 13 is configured to include a quantum well layer 132 located between a first heterojunction layer 131 and a second heterojunction layer 133 , and the materials of the first heterojunction layer 131 and the second heterojunction layer 133 are configured to include aluminum gallium arsenide, and the aluminum content in the first heterojunction layer 131 and the second heterojunction layer 133 gradually increases in a direction away from the quantum well layer 132 . This reduces the time it takes for carriers to enter the active layer 13 via the first heterojunction layer 131 or the second heterojunction layer 133 , thereby increasing the bandwidth supported by the VCSEL without increasing the volume of the VCSEL.

[0046] As an example, please continue to refer to Figure 1. The substrate 11 can be made of semiconductor material, insulating material, semi-insulating material or any combination thereof. The substrate 11 can be a single-layer structure or a multi-layer structure. For example, the substrate 11 can be a gallium arsenide (GaAs) substrate, an indium phosphide (InP) substrate or other III / V semiconductor substrate or II / VI semiconductor substrate. The type of substrate should not limit the scope of protection of the present disclosure. The substrate 11 may include one or more components such as word lines, bit lines and transistors, which are not closely related to the invention of this solution and are therefore omitted.

[0047] As an example, please continue to refer to Figure 1. One or more components such as word lines, bit lines and transistors generally need to be prepared in the substrate 11. In order to reduce the lattice mismatch between the first distributed Bragg reflector 12 and the substrate 11, or to reduce the adverse effects of possible defects in the substrate 11 on the first distributed Bragg reflector 12, a buffer layer (not shown) can be set between the substrate 11 and the first distributed Bragg reflector 12 to effectively improve the yield and reliability of the semiconductor device.

[0048] As an example, please continue to refer to Figure 1. The central cross-section of the quantum well region of the quantum well layer 132 is located within the antinode interval of the standing wave electric field of the vertical cavity surface emitting laser; the position of the antinode is z, and the antinode interval is [z-λ / 8, z+λ / 8], where λ is the wavelength of the standing wave, so as to avoid energy loss in the internal film layer as much as possible and improve the light output efficiency and quality of the VCSEL.

[0049] Continuing with FIG1 , in some embodiments, the first heterojunction layer 131 includes a first portion (not shown) located between its central cross section and the quantum well layer 132. The aluminum content of the first portion of the first heterojunction layer 131 is 10%-40%. For example, the aluminum content of the first portion of the first heterojunction layer 131 can be 10%, 20%, 30%, or 40%, etc.

[0050] For example, referring to FIG1 , the aluminum component (e.g., the aluminum atomic content) in the first portion of the first heterojunction layer 131 can be set to 10%, and the aluminum component in the remaining portion of the first heterojunction layer 131 can be set to 90%. By setting the aluminum component content in the portion of the first heterojunction layer 131 near the quantum well layer 132 to be relatively low, the aluminum component content in the portion of the first heterojunction layer 131 away from the quantum well layer 132 is relatively high. This reduces the time it takes for carriers to enter the active layer 13 through the first heterojunction layer 131 without changing the thickness of the first heterojunction layer 131, thereby increasing the bandwidth supported by the VCSEL without increasing the volume of the VCSEL.

[0051] 1 , in some embodiments, the second heterojunction layer 133 includes a first portion located between its central cross section and the quantum well layer 132. The aluminum content of the first portion of the second heterojunction layer 133 is 10%-40%. For example, the aluminum content of the first portion of the second heterojunction layer 133 can be 10%, 20%, 30%, or 40%, etc.

[0052] For example, referring to FIG1 , the aluminum component ratio of the first portion of the second heterojunction layer 133 can be set to 10%, and the aluminum component ratio of the remaining portion of the second heterojunction layer 133 can be set to 90%. By setting the portion of the second heterojunction layer 133 close to the quantum well layer 132 to have a relatively low aluminum component ratio, the aluminum component ratio of the portion of the second heterojunction layer 133 away from the quantum well layer 132 is made relatively high. This reduces the time it takes for carriers to enter the active layer 13 through the second heterojunction layer 133 without changing the thickness of the second heterojunction layer 133, thereby increasing the bandwidth supported by the VCSEL without increasing the volume of the VCSEL.

[0053] 1 , in some embodiments, the aluminum component in the first heterojunction layer 131 and the second heterojunction layer 133 increases linearly or gradiently in a direction away from the quantum well layer 132 , thereby meeting the process preparation requirements of different application scenarios.

[0054] Please refer to Figure 2. In some embodiments, the quantum well layer 132 includes sub-quantum well layers 1321 and barrier layers 1322 that are alternately stacked in a direction away from the substrate 11; wherein, in the quantum well layer 132, the top sub-quantum well layer 1321 is adjacent to the second heterojunction layer 133, and the bottom sub-quantum well layer 1321 is adjacent to the first heterojunction layer 131.

[0055] Referring to FIG. 3 , in some embodiments, the quantum well layer 132 includes a first aluminum gallium arsenide barrier layer 1323 and a second aluminum gallium arsenide barrier layer 1324. The first aluminum gallium arsenide barrier layer 1323 is located between the bottom sub-quantum well layer 1321 and the first heterojunction layer 131; the second aluminum gallium arsenide barrier layer 1324 is located between the top sub-quantum well layer 1321 and the second heterojunction layer 133. The aluminum component ratio in the first aluminum gallium arsenide barrier layer 1323 can be set to be the same as the aluminum component ratio in the first part of the second heterojunction layer 133.

[0056] For example, the aluminum content in the first AlGaAs barrier layer may be set to be 10%-40%. For example, the aluminum content in the first AlGaAs barrier layer may be set to be 10%, 20%, 30%, or 40%.

[0057] For example, the aluminum content in the second AlGaAs barrier layer may be set to be 10%-40%. For example, the aluminum content in the second AlGaAs barrier layer may be set to be 10%, 20%, 30%, or 40%.

[0058] 3 , in some embodiments, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be greater than 0 and less than 25 nm; the thickness of the barrier layer 1322 can be greater than 0 and less than 20 nm. For example, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be set to 5 nm, 10 nm, 15 nm, 20 nm, or 25 nm, and the thickness of the barrier layer 1322 can be set to 5 nm, 10 nm, 15 nm, or 20 nm, and the like.

[0059] 3 , in some embodiments, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be greater than 0 and less than 20 nm; the thickness of the barrier layer 1322 can be greater than 0 and less than 15 nm. For example, the thickness of the first heterojunction layer 131 or the second heterojunction layer 133 can be set to 5 nm, 10 nm, 15 nm, or 20 nm, and the thickness of the barrier layer 1322 can be set to 5 nm, 10 nm, or 15 nm, and the like.

[0060] 3 , in some embodiments, the barrier layer 1322 includes aluminum gallium arsenide or aluminum gallium arsenide phosphide; wherein the aluminum component in the barrier layer 1322 remains constant along a direction away from the quantum well layer 132 .

[0061] 4 , in some embodiments, the oxide layer 14 includes a light exit hole 141 ; the oxide layer 14 has at least optical and electrical confinement effects. The light exit hole 141 is located within the orthographic projection of the second DBR 15 on the top surface of the oxide layer 14 .

[0062] In some embodiments, the ratio of the maximum opening size to the minimum opening size of the light exit hole is 1.25-1.35. For example, the ratio of the maximum opening size to the minimum opening size of the light exit hole is 1.25, 1.30, or 1.35.

[0063] In some embodiments, the opening size of the light exit hole is 6 micrometers to 9 micrometers. For example, the opening size of the light exit hole can be 6 micrometers, 7 micrometers, 8 micrometers, or 9 micrometers.

[0064] Referring to Figure 4, in some embodiments, the vertical cavity surface emitting laser further includes a first contact layer 161 and a second contact layer 162. The first contact layer 161 is located on the top surface of the first distributed Bragg reflector 12 and surrounds the active layer 13; the second contact layer 162 is located on the top surface of the second distributed Bragg reflector 15 and surrounds the light output hole 141.

[0065] Referring to Figure 4 , in some embodiments, the conductivity type of the first contact layer 161 and the first distributed Bragg reflector 12 are both n-type. The thickness of the first contact layer 161 is an integer multiple of half a wavelength, which is half the wavelength of the standing wave electric field of the vertical cavity surface emitting laser. This prevents mutual suppression of reflected waves and improves the light extraction efficiency of the vertical cavity surface emitting laser.

[0066] In some embodiments, the first contact layer includes aluminum gallium arsenide or aluminum gallium arsenide phosphide; the aluminum content of the first contact layer is the same as the aluminum content of the first portion of the first heterojunction layer. For example, the aluminum content of the first contact layer can be set to 10%-40%.

[0067] In some embodiments, the second contact layer includes aluminum gallium arsenide or aluminum gallium arsenide phosphide; the aluminum content of the second contact layer is the same as the aluminum content of the first portion of the second heterojunction layer. For example, the aluminum content of the second contact layer can be set to 10%-40%.

[0068] As an example, please continue to refer to Figures 1 to 3. The optical thickness of the active layer 13, the optical thickness of the first distributed Bragg reflector 12, and the optical thickness of the second distributed Bragg reflector 14 jointly define the resonant cavity wavelength of the VCSEL, which can be designed to be within the emission wavelength range of the active layer 13 to achieve laser emission.

[0069] As an example, the central cross-section of the quantum well region of the quantum well layer is located within the antinode interval of the standing wave electric field of the vertical cavity surface emitting laser; the position of the antinode is z, and the antinode interval is [z-λ / 8, z+λ / 8], where λ is the wavelength of the standing wave, so as to avoid energy loss in the internal film layer as much as possible and improve the light output efficiency and quality of the VCSEL.

[0070] In some embodiments, please continue to refer to Figures 1 to 3. The first distributed Bragg reflector 12 may include a stacked multi-layer first reflective layer (not shown), the first reflective layer including a first sub-reflective layer (not shown) and a second sub-reflective layer (not shown) with different refractive indices. The first sub-reflective layer in the first distributed Bragg reflector 12 is adjacent to the substrate 11; the first sub-reflective layer adjacent to the first reflective layer is adjacent to the second sub-reflective layer; the first sub-reflective layer includes indium gallium phosphide, and the lattice constant of the compound in the second sub-reflective layer is greater than the lattice constant of indium gallium phosphide.

[0071] In some embodiments, please continue to refer to Figures 1 to 3. The first sub-reflective layer includes indium gallium phosphide, and the lattice constant of the compound in the second sub-reflective layer is greater than the lattice constant of indium gallium phosphide, which can make the stresses in the first reflective layer of the first distributed Bragg reflector 12 offset each other and reduce the warping. The current related vertical cavity surface emitting laser can obtain a very high reflectivity (>99%) by alternately growing an epitaxial layer reflector made of two materials with different refractive indices according to an optical thickness of one-quarter wavelength, which can meet the special requirements of the device structure for the reflector. However, due to the lattice difference between the substrate and the epitaxial layer, stress accumulates in each thin epitaxial layer. At the same time, because the overall thickness of the epitaxial layer reflector is too thick, the warping of the epitaxial wafer becomes larger, thereby affecting the yield of the semiconductor chip. In the vertical cavity surface emitting laser of the disclosed embodiment, a stacked multi-layer first reflective layer is provided in the first distributed Bragg reflector 12. The first reflective layer includes a first sub-reflective layer and a second sub-reflective layer having different refractive indices. The first sub-reflective layer in the first distributed Bragg reflector 12 is adjacent to the substrate 11, and the first sub-reflective layer of the adjacent first reflective layer is adjacent to the second sub-reflective layer. The lattice constant of the compound in the second sub-reflective layer is set to be greater than the lattice constant of the indium gallium phosphide. This can offset the stresses between the sub-reflective layers in the first distributed Bragg reflector 12, reduce the degree of warping, and improve the yield of the semiconductor chip.

[0072] In some embodiments, please continue to refer to Figures 1 to 3. The second distributed Bragg reflector 14 includes a stacked multi-layer second reflective layer (not shown). The second reflective layer includes a third sub-reflective layer (not shown) and a fourth sub-reflective layer (not shown) with different refractive indices. The third sub-reflective layer adjacent to the second reflective layer is adjacent to the fourth sub-reflective layer. The third sub-reflective layer and the fourth sub-reflective layer both include aluminum gallium arsenide, and the aluminum content of the third sub-reflective layer and the fourth sub-reflective layer is different.

[0073] For example, the third and fourth sub-reflecting layers include AlxGa1-xAs. The AlxGa1-xAs material is formed by uniformly recombination of AlAs and GaAs, and has advantages such as high carrier mobility, a controllable Al composition, and minimal lattice mismatch with GaAs. The AlxGa1-xAs in the third sub-reflecting layer has x < 0.1, while the AlxGa1-xAs in the fourth sub-reflecting layer has x > 0.9. The third sub-reflecting layer with a high refractive index is grown alternately with the fourth sub-reflecting layer with a low refractive index. This can increase the number of cycles to achieve high reflectivity, thus meeting the special requirements of the VCSEL structure for reflectors.

[0074] In some embodiments, the first sub-reflective layer includes InyGa1-yP, wherein y∈[0, 0.48], for example, 0, 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4 or 0.48, etc.

[0075] In some embodiments, the second sub-reflective layer includes aluminum arsenide or aluminum gallium arsenide.

[0076] As an example, the first sub-reflection layer can be In0.48Ga0.52P, and the substrate can be GaAs. The lattice constant of In0.48Ga0.52P is smaller than that of the GaAs substrate, and the first sub-reflection layer is subjected to tensile stress. The second sub-reflection layer includes AlxGa1-xAs, usually x>0.9, and the lattice constant of the second sub-reflection layer is greater than that of In0.48Ga0.52P. The second sub-reflection layer is subjected to compressive stress. In this way, the tensile stress and compressive stress in each DBR period (i.e., the first reflective layer) offset each other, reducing the warping of the epitaxial wafer.

[0077] Specifically, for a VCSEL with a wavelength of 940 nm, the refractive index difference between high- and low-Al composition AlGaAs is approximately 0.465, and the refractive index difference between In0.48Ga0.52P and AlGaAs is approximately 0.246. Using InGaP as the DBR material allows for sufficient reflectivity while maintaining a low warpage even with a thicker DBR.

[0078] Please refer to Figure 5. In some embodiments, Figure (1) in Figure 5 is a schematic diagram of the change of the refractive index of the heterojunction layer and the active layer in the VCSEL that can support 50G bandwidth in the related art. Figure (2) in Figure 5 is a schematic diagram of the change of the refractive index of the heterojunction layer and the active layer in the embodiment of the present disclosure. By comparing Figure (1) and Figure (2) in Figure 5, it can be clearly found that the embodiment of the present disclosure is provided with an active layer including a quantum well layer located between the first heterojunction layer and the second heterojunction layer, and the materials of the first heterojunction layer and the second heterojunction layer both include aluminum gallium arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases in the direction away from the quantum well layer, thereby reducing the time for carriers to enter the active layer through the first heterojunction layer or the second heterojunction layer, and can effectively increase the bandwidth supported by the VCSEL without increasing the volume of the VCSEL.

[0079] In some embodiments, a laser array is provided, comprising a plurality of vertical cavity surface emitting lasers as described in any of the foregoing embodiments arranged in rows and columns; wherein the vertical cavity surface emitting lasers located in the same row are all connected to the corresponding row selection line; the vertical cavity surface emitting lasers located in the same column are all connected to the corresponding column selection line; the vertical cavity surface emitting lasers in different rows are respectively connected to different row selection lines; the vertical cavity surface emitting lasers in different columns are respectively connected to different column selection lines; by selecting a row selection line and a column selection line to select the vertical cavity surface emitting lasers connected to the selected row selection line and the selected column selection line, a common anode driving mode can be realized, and an N-type transistor with a faster response speed is used to drive the light-emitting structure of the vertical cavity surface emitting laser, thereby reducing the volume of the driving system while increasing the driving frequency and speed of the VCSEL. By arranging that the vertical cavity surface emitting lasers located in the same row are connected to the corresponding row selection line, the vertical cavity surface emitting lasers located in the same column are connected to the corresponding column selection line, the vertical cavity surface emitting lasers in different rows are connected to different row selection lines, and the vertical cavity surface emitting lasers in different columns are connected to different column selection lines, when a vertical cavity surface emitting laser fails, the faulty laser can be quickly located, thereby improving the operating efficiency of the device.

[0080] As an example, please refer to Figures 6 and 7. The first vertical cavity surface emitting laser 100a, the second vertical cavity surface emitting laser 100b, the third vertical cavity surface emitting laser 100c, the fourth vertical cavity surface emitting laser 100d, the fifth vertical cavity surface emitting laser 100e, and the sixth vertical cavity surface emitting laser 100f arranged in rows and columns share an anode electrode; among the first vertical cavity surface emitting laser 100a, the second vertical cavity surface emitting laser 100b, the third vertical cavity surface emitting laser 100c, the fourth vertical cavity surface emitting laser 100d, the fifth vertical cavity surface emitting laser 100e, and the sixth vertical cavity surface emitting laser 100f, the cathode electrodes of any adjacent vertical cavity surface emitting lasers are insulated from each other, which facilitates independent cathode driving of different VCSELs while simplifying the anode drive, thereby meeting the drive control requirements of the customized light output solution of the laser array.

[0081] As an example, adjacent vertical cavity surface emitting lasers include an isolation structure, which extends along a direction perpendicular to the substrate (for example, the oz direction) to the top surface of the first distributed Bragg reflector, thereby avoiding mutual influence between adjacent VCSELs while simplifying the structure and preparation process steps of the laser array.

[0082] As an example, please continue to refer to Figures 6 and 7. The isolation structure can be an isolation trench. An isolation trench is provided between the first vertical cavity surface emitting laser 100a and the second vertical cavity surface emitting laser 100b. The isolation trench extends along a direction perpendicular to the substrate (for example, the oz direction) to the top surface of the first distributed Bragg reflector 12; the active layer 13a, the oxide layer 14a, and the second distributed Bragg reflector 15a of the first vertical cavity surface emitting laser 100a are isolated and insulated from the active layer 13b, the oxide layer 14b, and the second distributed Bragg reflector 15b of the second vertical cavity surface emitting laser 100b via the isolation trench; the first vertical cavity surface emitting laser 100a and the second vertical cavity surface emitting laser 100b share the substrate 11 and the first distributed Bragg reflector 12, thereby simplifying the preparation process and cost of the laser array.

[0083] In some embodiments, a light emitting device is provided, comprising the vertical cavity surface emitting laser as described in any one of the aforementioned embodiments.

[0084] In some embodiments, a light emitting device is provided, comprising the laser array as described in any one of the preceding embodiments.

[0085] As an example, referring to FIG8 , a method for preparing a vertical cavity surface emitting laser is provided, including:

[0086] Step S602: providing a substrate;

[0087] Step S604: A first distributed Bragg reflector, an active layer, an oxide layer, and a second distributed Bragg reflector are formed on the front surface of the substrate, which are stacked in sequence along a direction away from the substrate; the active layer includes a first heterojunction layer, a quantum well layer, and a second heterojunction layer, which are stacked in sequence along a direction away from the substrate; wherein the materials of the first heterojunction layer and the second heterojunction layer both include aluminum gallium arsenide, and the aluminum content in the first heterojunction layer and the second heterojunction layer gradually increases along the direction away from the quantum well layer.

[0088] As an example, please continue to refer to Figure 8. By setting the active layer to include a quantum well layer located between the first heterojunction layer and the second heterojunction layer, and setting the materials of the first heterojunction layer and the second heterojunction layer to include aluminum gallium arsenide, and the aluminum component in the first heterojunction layer and the second heterojunction layer gradually increases in the direction away from the quantum well layer, the time for carriers to enter the active layer through the first heterojunction layer or the second heterojunction layer is reduced, thereby increasing the bandwidth supported by the VCSEL without increasing the volume of the VCSEL.

[0089] It should be understood that although the various steps in the flow chart of Figure 8 are shown in sequence according to the instructions of the arrows, these steps are not necessarily performed in sequence according to the order indicated by the arrows. Unless otherwise specified herein, the execution of these steps is not strictly limited in order, and these steps can be performed in other orders. Moreover, at least a portion of the steps in Figure 8 may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times, and the execution order of these steps or stages is not necessarily performed in sequence, but can be performed in turn or alternately with at least a portion of the steps or stages in other steps.

[0090] Please note that the above embodiments are for illustrative purposes only and are not intended to limit the present disclosure.

[0091] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0092] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0093] The above-described embodiments merely represent several implementation methods of the present disclosure. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present disclosure, all of which fall within the scope of protection of the present disclosure. Therefore, the scope of protection of the patent disclosed herein shall be determined by the appended claims.

Claims

1. A vertical cavity surface emitting laser, wherein: The device comprises a first distributed Bragg reflector, an active layer, an oxide layer, and a second distributed Bragg reflector, which are located on the front surface of the substrate and stacked in sequence in a direction away from the substrate; The active layer includes a first heterojunction layer, a quantum well layer, and a second heterojunction layer stacked in sequence in a direction away from the substrate; Materials of the first heterojunction layer and the second heterojunction layer both include aluminum gallium arsenide, and the aluminum content in the first heterojunction layer and the second heterojunction layer gradually increases in a direction away from the quantum well layer.

2. The vertical cavity surface emitting laser according to claim 1, wherein: The first heterojunction layer includes a first portion located between a central cross section thereof and the quantum well layer, The aluminum component of the first portion of the first heterojunction layer accounts for 10%-40%; and / or The second heterojunction layer includes a first portion located between a central cross section thereof and the quantum well layer, The aluminum component in the first portion of the second heterojunction layer accounts for 10%-40%.

3. The vertical cavity surface emitting laser according to claim 1, wherein: The aluminum components in the first heterojunction layer and the second heterojunction layer increase linearly or gradiently in a direction away from the quantum well layer.

4. The vertical cavity surface emitting laser according to any one of claims 1 to 3, wherein: The quantum well layer comprises sub-quantum well layers and barrier layers alternately stacked in sequence in a direction away from the substrate; In the quantum well layer, the top sub-quantum well layer is adjacent to the second heterojunction layer, and the bottom sub-quantum well layer is adjacent to the first heterojunction layer.

5. The vertical cavity surface emitting laser according to any one of claims 1 to 4, wherein: The quantum well layer comprises: a first aluminum gallium arsenide barrier layer, located between the bottom sub-quantum well layer and the first heterojunction layer; a second aluminum gallium arsenide barrier layer, located between the top sub-quantum well layer and the second heterojunction layer; The aluminum component in the first aluminum gallium arsenide barrier layer accounts for 10%-40%; The aluminum component in the second aluminum gallium arsenide barrier layer accounts for 10%-40%.

6. The vertical cavity surface emitting laser according to any one of claims 1 to 5, wherein: The barrier layer comprises aluminum gallium arsenide or aluminum gallium arsenide phosphide; The aluminum composition in the barrier layer remains unchanged along a direction away from the quantum well layer.

7. The vertical cavity surface emitting laser according to any one of claims 1 to 6, wherein: The oxide layer includes a light exit hole; The light exit hole is located within the orthographic projection of the second distributed Bragg reflector on the top surface of the oxide layer.

8. The vertical cavity surface emitting laser according to claim 7, wherein: The ratio of the maximum opening size to the minimum opening size of the light exit hole is 1.25-1.

35.

9. The vertical cavity surface emitting laser according to any one of claims 1 to 7, wherein: Also includes: a first contact layer, located on a top surface of the first distributed Bragg reflector and surrounding the active layer; and The second contact layer is located on the top surface of the second distributed Bragg reflector and surrounds the light exit hole.

10. The vertical cavity surface emitting laser according to claim 9, wherein: The first contact layer comprises aluminum gallium arsenide or aluminum gallium arsenide phosphide; the aluminum component in the first contact layer accounts for 10%-40%; and / or The second contact layer includes aluminum gallium arsenide or aluminum gallium arsenide phosphide; the aluminum component in the second contact layer accounts for 10%-40%.

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