Plasma processing apparatus and ring assembly

Abstract

Provided is technology with which it is possible to reduce particle generation. This plasma processing apparatus comprises: a chamber; a substrate supporting part which is disposed in the chamber and includes a substrate supporting surface for supporting a substrate; a first ring member which is disposed surrounding the substrate supporting surface on the substrate supporting part, has a first surface roughness, and is conductive; and a second ring member which is disposed surrounding the first ring member on the substrate supporting part, has insulating properties, and has a second surface roughness rougher than the first surface roughness in at least a portion of the surface of the second ring member, said second surface roughness being at least 4 µm and at most 8 µm.

Description

Plasma processing apparatus and ring assembly

[0001] SUMMARY OF THE INVENTION Exemplary embodiments of the present disclosure relate to a plasma processing apparatus and a ring assembly.

[0002] US Pat. No. 5,699,949 describes a method for surface finishing components useful in plasma processing equipment.

[0003] US Patent Application Publication No. 2004 / 0238487

[0004] The present disclosure provides a technique that can reduce particle generation.

[0005] In one exemplary embodiment of the present disclosure, there is provided a plasma processing apparatus including: a chamber; a substrate support disposed within the chamber and including a substrate support surface that supports a substrate; a first ring member disposed on the substrate support around the substrate support surface, the first ring member having a first surface roughness and being conductive; and a second ring member disposed on the substrate support around the first ring member, the second ring member being insulating, at least a portion of the surface of the second ring member having a second surface roughness that is rougher than the first surface roughness, the second surface roughness being 4 μm or more and 8 μm or less.

[0006] According to one exemplary embodiment of the present disclosure, a technique can be provided that can reduce particle generation.

[0007] It is a diagram for explaining an example of the configuration of a plasma processing system. It is a diagram for explaining an example of the configuration of a capacitively coupled plasma processing apparatus. It is an enlarged view of a part of an example of the configuration of a ring assembly 112. It is a flowchart showing an example of a plasma processing method.

[0008] Hereinafter, each embodiment of the present disclosure will be described.

[0009] In one exemplary embodiment, a plasma processing apparatus is provided, comprising: a chamber; a substrate support disposed within the chamber and including a substrate support surface for supporting a substrate; a first ring member disposed on the substrate support around the substrate support surface, the first ring member having a first surface roughness and being electrically conductive; and a second ring member disposed on the substrate support around the first ring member, the second ring member being electrically insulating, at least a portion of a surface of the second ring member having a second surface roughness that is rougher than the first surface roughness, the second surface roughness being 4 μm or more and 8 μm or less.

[0010] In one exemplary embodiment, the first ring member comprises silicon.

[0011] In one exemplary embodiment, the second ring member comprises quartz.

[0012] In one exemplary embodiment, the second ring member includes an inner side facing the first ring member and an outer side opposite the inner side, and at least the outer side of the surface of the second ring member has the second surface roughness.

[0013] In one exemplary embodiment, the second ring member includes an upper surface continuous with the inner and outer side surfaces, at least a portion of the upper surface further having a second surface roughness.

[0014] In one exemplary embodiment, the upper surface has a second surface roughness in a portion that is continuous with the outer side surface.

[0015] In one exemplary embodiment, the upper surface includes a first portion and a second portion, the first portion being a continuous surface from the inner side surface and an upwardly sloping surface, and the second portion being a continuous surface from the first portion and the outer side surface and perpendicular to the outer side surface.

[0016] In one exemplary embodiment, the second surface roughness is greater than or equal to 5 μm and less than or equal to 7 μm.

[0017] In one exemplary embodiment, the second surface roughness is 6 μm.

[0018] In one exemplary embodiment, at least a portion of the surface of the second ring member has a sandblasted surface finish.

[0019] In one exemplary embodiment, a ring assembly is provided, the ring assembly including: a first ring member disposed on a substrate support including a substrate support surface for supporting a substrate, the substrate support being disposed in a chamber of a plasma processing apparatus, the first ring member having a first surface roughness and being electrically conductive; and a second ring member disposed on the substrate support around the first ring member, the second ring member being electrically insulating, at least a portion of a surface of the second ring member having a second surface roughness that is rougher than the first surface roughness, the second surface roughness being between 4 μm and 8 μm.

[0020] Hereinafter, each embodiment of the present disclosure will be described in detail with reference to the drawings. In each drawing, the same or similar elements are designated by the same reference numerals, and redundant explanations will be omitted. Unless otherwise specified, the positional relationships, such as up, down, left, and right, will be described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual ratios, and the actual ratios are not limited to the ratios shown in the drawings.

[0021] FIG. 1 is a diagram illustrating an exemplary configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 (described later), and the gas exhaust port is connected to an exhaust system 40 (described later). The substrate support 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.

[0022] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma generated in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), surface wave plasma (SWP), or the like. Various types of plasma generators may be used, including alternating current (AC) plasma generators and direct current (DC) plasma generators. In one embodiment, the AC signal (AC power) used in the AC plasma generator has a frequency in the range of 100 kHz to 10 GHz. Thus, AC signals include radio frequency (RF) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0023] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 may be implemented by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and execute the read program to perform various control operations. This program may be stored in the storage unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a random access memory (RAM), a read-only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).

[0024] The following describes a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1. Fig. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0025] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0026] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

[0027] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that the annular region 111b may also be provided by another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Furthermore, at least one RF / DC electrode coupled to an RF power supply 31 and / or a DC power supply 32, which will be described later, may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or a DC signal, which will be described later, is supplied to the at least one RF / DC electrode, the RF / DC electrode is also called a bias electrode. Note that the conductive member of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Furthermore, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.

[0028] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0029] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0030] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0031] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

[0032] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, thereby attracting ion components in the formed plasma to the substrate W.

[0033] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0034] The second RF generator 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0035] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to the at least one lower electrode and configured to generate a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to the at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0036] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generator for generating the sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have either positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generating units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b.

[0037] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0038] Figure 3 is an enlarged view of a portion of an example configuration of the ring assembly 112. Figure 3 also illustrates a portion of the substrate W and a portion of an example configuration of the substrate support 11. The ring assembly 112 may include an edge ring 113 and a cover ring 114. The edge ring 113 is an example of a first ring member. The cover ring 114 is an example of a second ring member.

[0039] The edge ring 113 may be disposed around the substrate support surface (central region 111a) on the substrate support 11. In one embodiment, the substrate support surface has a circular shape in a plan view, and the edge ring 113 has a ring shape in a plan view. The edge ring 113 may be made of a conductive material. In one embodiment, the edge ring 113 is made of a material containing silicon. As an example, the edge ring 113 may be made of silicon (Si) or silicon carbide (SiC). The edge ring 113 has a surface roughness Ra1. The surface roughness Ra1 is an example of a first surface roughness. In one embodiment, the surface roughness Ra1 of the edge ring 113 may be 0.2 μm to 0.8 μm.

[0040] The cover ring 114 may be disposed around the edge ring 113 on the substrate support 11. In one embodiment, the cover ring 114 may be configured to cover a portion of the side surface of the substrate support 11. In one embodiment, the cover ring 114 has a ring shape in a plan view. The cover ring 114 may also include an inner side surface 114 a, an outer side surface 114 b, and a top surface 114 c.

[0041] The inner side surface 114a may be a surface facing the edge ring 113. The inner side surface 114a may be a surface that is approximately perpendicular to the substrate support surface of the substrate support portion 11. The outer side surface 114b may be a surface of the cover ring 114 that is opposite to the inner side surface 114a. That is, the inner side surface 114a and the outer side surface 114b may exist concentrically around the center of the substrate support surface in a plan view.

[0042] The top surface 114c may include a first portion 114c-1 and a second portion 114c-2. The first portion 114c-1 may be a surface that continues from the inner side surface 114a. The first portion 114c-1 may be an inclined surface. That is, the first portion 114c-1 may be a surface that becomes higher from the inner side surface 114a toward the second portion 114c-2. The second portion 114c-2 may be a surface that is approximately perpendicular to the outer side surface 114b. That is, the second portion 114c-2 may be a surface that is parallel to the substrate support surface.

[0043] The cover ring 114 may be made of an insulating material. As an example, the cover ring 114 may be made of quartz. At least a portion of the cover ring 114 has a surface roughness Ra2. The surface roughness Ra2 is an example of a second surface roughness. As an example, the cover ring 114 may have the surface roughness Ra2 on at least a portion of the outer side surface 114b and at least a portion of the second portion 114c-2 of the upper surface 114c. At least a portion of the second portion 114c-2 may be a portion of the second portion 114c-2 that is continuous with the outer side surface 114b. In one embodiment, the cover ring 114 may have the surface roughness Ra2 on the entire upper surface 114c and the outer side surface 114b.

[0044] The surface roughness Ra2 is different from the surface roughness Ra1. The surface roughness Ra2 may be rougher than the surface roughness Ra1. As an example, the surface roughness Ra2 may be 4 μm to 8 μm, 5 μm to 7 μm, or approximately 6 μm. The surface condition of the cover ring 114 having the surface roughness Ra2 may be formed by sandblasting, as an example. As an example, the sandblasting may be performed on a portion or a part of the surface of the cover ring 114 that is exposed to the space in the plasma processing chamber 10.

[0045] 4 is a flowchart showing an example of a plasma processing method. The plasma processing method shown in FIG. 4 (hereinafter also referred to as "the method") may be, for example, a plasma process for etching a substrate. The method includes a step (ST1) of positioning a ring assembly, a step (ST2) of preparing a substrate, and a step (ST3) of generating plasma. The method may be performed by the plasma processing system or plasma processing apparatus described with reference to FIGS. 1 and 2. Positioning the ring assembly in step ST1 may be performed manually by an operator.

[0046] First, in step ST1, the ring assembly 112 is disposed. First, the edge ring 113 is disposed around the substrate processing surface on the substrate support 11. Next, the cover ring 114 is disposed around the edge ring 113. After the ring assembly 112 is disposed, the pressure inside the plasma processing chamber 10 may be reduced.

[0047] Next, in step ST2, a substrate W is prepared. The preparation of the substrate W includes placing the substrate W on a substrate support surface. As an example, the substrate W is a substrate including a film to be etched and a mask placed on the film to be etched.

[0048] Next, in step ST3, plasma is generated in the plasma processing chamber 10. In step ST3, first, a processing gas is supplied into the plasma processing chamber 10. The processing gas can be appropriately selected based on the film to be etched and / or the mask included in the substrate W. Next, a source RF signal is supplied to the upper electrode or the lower electrode. As a result, plasma is generated from the processing gas in the plasma processing chamber 10. Note that in step ST3, a bias signal may be supplied to the lower electrode.

[0049] According to one embodiment of the present disclosure, the surface roughness Ra2 of the cover ring 114 is set to 4 μm or more and 8 μm or less. This makes it possible to reduce the likelihood of products and / or by-products adhering to the cover ring 114 during plasma processing being peeled off from the cover ring 114. This in turn makes it possible to reduce the generation of particles during plasma processing. Furthermore, by setting the surface roughness Ra2 of the cover ring 114 to 5 μm or more and 7 μm or less, this peeling can be further reduced or prevented.

[0050] The present disclosure may include, for example, the following configurations.

[0051] (Supplementary Note 1) A plasma processing apparatus comprising: a chamber; a substrate support portion disposed within the chamber and including a substrate support surface that supports a substrate; a first ring member disposed on the substrate support portion around the substrate support surface, the first ring member having a first surface roughness and being conductive; and a second ring member disposed on the substrate support portion around the first ring member, the second ring member being insulating, at least a portion of a surface of the second ring member having a second surface roughness that is rougher than the first surface roughness, the second surface roughness being 4 μm or more and 8 μm or less.

[0052] (Supplementary Note 2) The plasma processing apparatus according to Supplementary Note 1, wherein the first ring member includes silicon.

[0053] (Supplementary Note 3) The plasma processing apparatus according to Supplementary Note 1 or 2, wherein the second ring member includes quartz.

[0054] (Appendix 4) The plasma processing apparatus according to any one of Appendices 1 to 3, wherein the second ring member includes an inner side surface facing the first ring member and an outer side surface opposite the inner side surface, and at least the outer side surface of the surface of the second ring member has the second surface roughness.

[0055] (Supplementary Note 5) The plasma processing apparatus according to Supplementary Note 4, wherein the second ring member includes an upper surface that is continuous with the inner side surface and the outer side surface, and at least a portion of the upper surface further has the second surface roughness.

[0056] (Supplementary Note 6) The plasma processing apparatus according to Supplementary Note 5, wherein the upper surface has the second surface roughness in a portion continuing from the outer side surface.

[0057] (Supplementary Note 7) The plasma processing apparatus according to Supplementary Note 6, wherein the upper surface includes a first portion and a second portion, the first portion being a slope that continues from the inner side surface and extends upward, and the second portion being a surface that continues from the first portion and the outer side surface and is perpendicular to the outer side surface.

[0058] (Supplementary Note 8) The plasma processing apparatus according to any one of Supplementary Notes 1 to 7, wherein the second surface roughness is 5 μm or more and 7 μm or less.

[0059] (Supplementary Note 9) The plasma processing apparatus according to Supplementary Note 8, wherein the second surface roughness is 6 μm.

[0060] (Supplementary Note 10) The plasma processing apparatus according to Supplementary Notes 1 to 9, wherein at least a portion of the surface of the second ring member has a sandblasted surface state. (Supplementary Note 11) A ring assembly comprising: a first ring member disposed on a substrate support portion around a substrate support surface including a substrate support surface that supports a substrate, the substrate support portion being disposed in a chamber of the plasma processing apparatus, the first ring member having a first surface roughness and being conductive; and a second ring member disposed on the substrate support portion around the first ring member, the second ring member being insulating, at least a portion of the surface of the second ring member having a second surface roughness that is rougher than the first surface roughness, the second surface roughness being 4 μm or more and 8 μm or less.

[0061] The exemplary embodiments described above may be modified in various ways without departing from the scope and spirit of the present disclosure. For example, some components in one embodiment may be added to other embodiments within the scope of ordinary creativity of a person skilled in the art. Also, some components in one embodiment may be replaced with corresponding components in other embodiments.

[0062] 1: Plasma processing apparatus, 11: Substrate support, 112: Ring assembly, 113: Edge ring, 114: Cover ring, 114a: Inner side surface, 114b: Outer side surface, 114c: Upper surface, 114c-1: First portion, 114c-2: Second portion, W: Substrate

Claims

1. A plasma processing apparatus comprising: a chamber; a substrate support portion disposed within the chamber and including a substrate support surface for supporting a substrate; a first ring member disposed on the substrate support portion around the substrate support surface, the first ring member having a first surface roughness and being conductive; and a second ring member disposed on the substrate support portion around the first ring member, the second ring member being insulating, at least a portion of the surface of the second ring member having a second surface roughness that is rougher than the first surface roughness, the second surface roughness being 4 μm or more and 8 μm or less.

2. The plasma processing apparatus of claim 1, wherein said first ring member comprises silicon.

3. The plasma processing apparatus of claim 2, wherein said second ring member comprises quartz.

4. A plasma processing apparatus as described in claim 1, wherein the second ring member includes an inner side surface facing the first ring member and an outer side surface opposite the inner side surface, and at least the outer side surface of the surface of the second ring member has the second surface roughness.

5. The plasma processing apparatus according to claim 4, wherein said second ring member includes an upper surface continuous with said inner side surface and said outer side surface, and at least a portion of said upper surface further has said second surface roughness.

6. The plasma processing apparatus according to claim 5, wherein the upper surface has the second surface roughness in a portion continuing from the outer side surface.

7. The plasma processing apparatus according to claim 6, wherein the upper surface includes a first portion and a second portion, the first portion being a sloped surface that continues from the inner side surface and extends upward, and the second portion being a surface that continues from the first portion and the outer side surface and is perpendicular to the outer side surface.

8. The plasma processing apparatus according to any one of claims 1 to 7, wherein the second surface roughness is 5 μm or more and 7 μm or less.

9. The plasma processing apparatus according to claim 8, wherein the second surface roughness is 6 μm.

10. The plasma processing apparatus of claim 1, wherein at least a portion of the surface of said second ring member has a sandblasted surface condition.

11. A ring assembly comprising: a first ring member disposed on a substrate support part around a substrate support surface that supports a substrate, the first ring member having a first surface roughness and being electrically conductive; and a second ring member disposed on the substrate support part around the first ring member, the second ring member having insulating properties, at least a portion of the surface of the second ring member having a second surface roughness that is rougher than the first surface roughness, the second surface roughness being 4 μm or more and 8 μm or less.

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