Power amplifier, radio frequency front-end module and electronic device

Abstract

Disclosed in the present application are a power amplifier, a radio frequency front-end module and an electronic device. The power amplifier comprises a first amplifier, a second amplifier, a first transformer, a second transformer and a first capacitor, wherein a first end of a secondary coil of the second transformer, a second end of a secondary coil of the first transformer and a first end of the first capacitor are coupled to one point, and a second end of the first capacitor is grounded, so that the first capacitor, a parasitic inductor of the secondary coil of the first transformer and a parasitic inductor of the secondary coil of the second transformer form a T-type network; and the T-type network is used for transforming a load impedance into a load impedance required by the first amplifier, and thus the T-type network is used to achieve the effect of an equivalent λ / 4 transmission line to replace the λ / 4 transmission line. Inductors in a T-type network are parasitic inductors of secondary coils, which can eliminate the area for additional inductors, thereby lowering costs and reducing the area.

Description

A power amplifier, radio frequency front-end module and electronic equipment

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of the People's Republic of China on February 6, 2024, with application number 202410168826.2 and application name "A power amplifier, RF front-end module and electronic device", the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of power amplification technology, and in particular to a power amplifier, a radio frequency front-end module, and an electronic device. Background Art

[0004] In RF front-end modules, the power amplifier is a key component that determines the module's energy efficiency. Generally, the efficiency of traditional power amplifiers decreases as power back-off occurs. However, using Doherty power amplifiers to implement load modulation can effectively improve the power amplifier's back-off efficiency. However, to achieve load modulation, it is usually necessary to set a quarter-wavelength (λ / 4) transmission line or an equivalent impedance transformation network at the output of the Doherty power amplifier to perform load impedance modulation to achieve impedance matching. Therefore, more matching devices are required in the Doherty power amplifier to meet the impedance matching requirements, resulting in increased cost and area of ​​the Doherty power amplifier. Summary of the Invention

[0005] The present application provides a power amplifier, a radio frequency front-end module, and an electronic device to reduce costs and area.

[0006] In a first aspect, an embodiment of the present application provides a power amplifier, comprising: a first amplifier, a second amplifier, a first transformer, a second transformer, and a first capacitor, wherein the output end of the first amplifier is coupled to at least one end of the primary coil of the first transformer, the output end of the second amplifier is coupled to at least one end of the primary coil of the second transformer, the first end of the secondary coil of the first transformer is a first output end, the second end of the secondary coil of the first transformer is coupled to a point with the first end of the secondary coil of the second transformer, and the first end of the first capacitor, the second end of the secondary coil of the second transformer is grounded, and the second end of the first capacitor is grounded. Based on this, the first amplifier amplifies the radio frequency signal and couples it to the secondary coil of the first transformer through the primary coil of the first transformer, and the second amplifier amplifies the radio frequency signal and couples it to the secondary coil of the second transformer through the primary coil of the second transformer, and then the first and second transformers are coupled in series to achieve power synthesis of the first and second amplifiers, and the radio frequency signal after power synthesis is output to the power output end through the first end of the secondary coil of the first transformer. Furthermore, a T-type network is formed by the first capacitor, the parasitic inductance of the secondary coil of the first transformer, and the parasitic inductance of the secondary coil of the second transformer. The T-type network is used to transform the load impedance into the load impedance required by the first amplifier. This arrangement reuses the parasitic inductance of the secondary coil of the first transformer and the parasitic inductance of the secondary coil of the second transformer to form a T-type network. The T-type network transforms the load impedance into the load impedance required by the first amplifier, thereby achieving the equivalent effect of a λ / 4 transmission line using the T-type network, replacing the λ / 4 transmission line. Furthermore, the inductance in the T-type network is the parasitic inductance of the secondary coil, not an additional impedance matching element provided in the T-type network. This reduces the area required for the additional inductor in chip integration design, and reduces the BOM cost of the additional inductor if integrated as discrete devices. In addition, the only additional impedance matching element in the T-type network is the first capacitor. Therefore, the T-type network does not need to have more impedance matching elements to achieve the effect of an equivalent λ / 4 transmission line to replace the λ / 4 transmission line, thereby reducing costs and area.

[0007] In some embodiments, the first amplifier and the second amplifier are designed to be completely symmetrical, and the first transformer and the second transformer are also designed to be completely symmetrical, so that the matching network design can be compact and the device can be designed to be completely symmetrical for the main and auxiliary power amplifiers.

[0008] The power amplifier in the embodiment of the present application may be a Doherty power amplifier, which can achieve efficiency improvement during power back-off.

[0009] In some embodiments, the first amplifier, the second amplifier, the first transformer, the second transformer, and the first capacitor are packaged together, thereby improving integration and forming a chip.

[0010] In some embodiments, the device further includes a circuit board, wherein the first capacitor, the ground terminal, and the first output terminal are disposed on the circuit board. The first amplifier, the second amplifier, the first transformer, and the second transformer are packaged together and coupled to the first capacitor. The first end of the secondary coil of the first transformer is coupled to the first output terminal on the circuit board, and the second end of the secondary coil of the second transformer is coupled to the ground terminal on the circuit board. With this arrangement, the first amplifier, the second amplifier, the first transformer, and the second transformer can be packaged together to form a chip. Furthermore, by placing some components on the circuit board, the chip size can be reduced.

[0011] In some embodiments, the device further includes a first switch and a second switch, wherein the first end of the first switch is coupled to the first end of the first capacitor, and the second end of the first switch is grounded. Furthermore, the second end of the secondary coil of the second transformer is grounded via the second switch, and the second end of the secondary coil of the second transformer is a second output end. With this arrangement, the power amplifier in the embodiment of the present application can be switched from a Doherty power amplifier to a multi-channel multiple-input multiple-output (MIMO) power amplifier by turning the first switch and the second switch on and off, thereby enabling the same power amplifier in the embodiment of the present application to be applied to different application scenarios.

[0012] In order to set the power amplifier in the embodiment of the present application as a Doherty power amplifier, in some embodiments, in response to the first switch being disconnected and the second switch being turned on, the second end of the secondary coil of the first transformer and the first end of the secondary coil of the second transformer are coupled to the first capacitor, and the second end of the secondary coil of the second transformer is grounded. Based on this, the power amplifier in the embodiment of the present application is set as a Doherty power amplifier.

[0013] In order to configure the power amplifier in the embodiments of the present application as a MIMO power amplifier, in some embodiments, in response to the first switch being turned on and the second switch being turned off, the second end of the secondary coil of the first transformer and the first end of the secondary coil of the second transformer are coupled to the ground terminal, and the second end of the secondary coil of the second transformer is coupled to the second output terminal. Based on this, the power amplifier in the embodiments of the present application is configured as a MIMO power amplifier.

[0014] In some embodiments, the first amplifier, the second amplifier, the first transformer, the second transformer, the first capacitor, the first switch, and the second switch are packaged together, thereby improving integration and forming a chip.

[0015] In some embodiments, the system further includes a second capacitor and a third capacitor, wherein the first end of the second capacitor is coupled to or grounded with the first end of the primary coil of the first transformer, and the second end of the second capacitor is coupled to the second end of the primary coil of the first transformer. Furthermore, the first end of the third capacitor is coupled to or grounded with the first end of the primary coil of the second transformer, and the second end of the third capacitor is coupled to the second end of the primary coil of the second transformer. With this arrangement, the parasitic inductance of the secondary coil of the first transformer is adjusted by the second capacitor, and the parasitic inductance of the secondary coil of the second transformer is adjusted by the third capacitor.

[0016] In some embodiments, the capacitance value of the first capacitor, the capacitance value of the second capacitor, and the capacitance value of the third capacitor are adjustable respectively, so that by adjusting the capacitance value of the second capacitor, the parasitic inductance of the secondary coil of the first transformer is tuned, and by adjusting the capacitance value of the third capacitor, the parasitic inductance of the secondary coil of the second transformer is tuned, and then combined with the tuning of the first capacitor, the frequency selection characteristics of the T-type network are adjusted, that is, a multi-band adjustable T-type network is realized, so that the power amplifier of the embodiment of the present application achieves a broadband power amplifier effect.

[0017] In some embodiments, the output impedance Ropt (ie, the optimal load impedance of the transistor) of the power amplifier can be adjusted by adjusting the capacitance values ​​of the first capacitor CZ, the second capacitor CM, and the third capacitor CA.

[0018] In some embodiments, at least one of the first capacitor, the second capacitor, and the third capacitor is configured as a switched capacitor array, so that the switched capacitor array can be switched according to an operating frequency of the power amplifier.

[0019] In some embodiments, at least one of the first capacitor, the second capacitor, and the third capacitor may also be configured as a variable capacitor, and may also be switched according to the operating frequency of the power amplifier.

[0020] In some embodiments, the input of the first amplifier is a differential input, the output of the first amplifier is a differential output, and the differential output of the first amplifier is coupled to the first and second ends of the primary coil of the first transformer, respectively. The center tap of the primary coil of the first transformer is coupled to the first power supply. This configuration enables the first amplifier to achieve differential input and output.

[0021] In some embodiments, the input of the second amplifier is a differential input, the output of the second amplifier is a differential output, and the differential output of the second amplifier is coupled to the first and second ends of the primary coil of the second transformer, with a center tap of the primary coil of the second transformer being coupled to the second power supply. This configuration enables the second amplifier to achieve differential input and output.

[0022] In some embodiments, the output end of the first amplifier is coupled to the second end of the primary coil of the first transformer, and the first end of the primary coil of the first transformer is used to couple to the first power supply. This configuration enables the first amplifier to achieve single-ended input and single-ended output.

[0023] In some embodiments, the output end of the second amplifier is coupled to the second end of the primary coil of the second transformer, and the first end of the primary coil of the second transformer is used to couple to the second power supply. This configuration enables the second amplifier to achieve single-ended input and single-ended output.

[0024] In some embodiments, the first end of the primary coil of the first transformer may be a positive pole, and the second end of the primary coil of the first transformer may be a negative pole. Alternatively, the first end of the primary coil of the first transformer may be a negative pole, and the second end of the primary coil of the first transformer may be a positive pole.

[0025] In some embodiments, the first end of the primary coil of the second transformer may be its positive pole, and the second end of the primary coil of the second transformer may be its negative pole. Alternatively, the first end of the primary coil of the second transformer may be its negative pole, and the second end of the primary coil of the second transformer may be its positive pole.

[0026] In some embodiments, the first transformer is configured as a balun coil, so that the balun coil is used as an output matching transformer of the first amplifier.

[0027] In some embodiments, the second transformer is configured as a balun coil, so that the balun coil is used as an output matching transformer of the second amplifier.

[0028] In a second aspect, an embodiment of the present application further provides a power amplifier, comprising a first amplifier, a second amplifier, a first transformer, a second transformer, and a circuit board. The output end of the first amplifier is coupled to at least one end of the primary coil of the first transformer, the output end of the second amplifier is coupled to at least one end of the primary coil of the second transformer, the first end of the secondary coil of the first transformer is a first output end, and the second end of the secondary coil of the first transformer is coupled to the first end of the secondary coil of the second transformer at a point. Furthermore, the first output end, the second output end, and the ground end are disposed on the circuit board. Furthermore, the first amplifier, the second amplifier, the first transformer, and the second transformer are packaged together, and the second end of the secondary coil of the first transformer and the first end of the secondary coil of the second transformer are coupled to the ground end on the circuit board. The first end of the secondary coil of the first transformer is coupled to the first output end, and the second end of the secondary coil of the second transformer is coupled to the second output end. With this configuration, the power amplifier in the embodiment of the present application can be configured as a MIMO power amplifier.

[0029] Moreover, the implementation of other structures in the embodiment of the second aspect can refer to the implementation of the corresponding structure in any embodiment of the first aspect, and the details are not repeated here.

[0030] In a third aspect, embodiments of the present application further provide a radio frequency front-end module, comprising a power amplifier. The power amplifier is the power amplifier described in the first aspect or any embodiment thereof. Alternatively, the power amplifier is the power amplifier described in the second aspect or any embodiment thereof.

[0031] In a fourth aspect, an embodiment of the present application further provides an electronic device, the electronic device including a radio frequency front-end module, wherein the radio frequency front-end module is the radio frequency front-end module in any embodiment of the third aspect above.

[0032] In addition, the technical effects of the corresponding schemes in the third and fourth aspects can refer to the technical effects that can be obtained by the corresponding schemes in the first and second aspects, and the repeated parts will not be described in detail. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] FIG1 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

[0034] FIG2 is a schematic diagram of the structure of a power amplifier provided in an embodiment of the present application;

[0035] FIG3 is a schematic diagram of a structure of a T-type network provided in an embodiment of the present application;

[0036] FIG4 is a structural diagram of a Cascode+Stack structure;

[0037] FIG5 is a schematic diagram of another structure of a power amplifier provided in an embodiment of the present application;

[0038] FIG6 is a schematic diagram of another structure of a power amplifier provided in an embodiment of the present application;

[0039] FIG7 is another structural diagram of the Cascode+Stack structure;

[0040] FIG8 is a schematic diagram of another structure of a power amplifier provided in an embodiment of the present application;

[0041] FIG9 a is a schematic structural diagram of the power amplifier shown in FIG8 when it is configured as a Doherty power amplifier;

[0042] FIG9 b is a schematic structural diagram of the power amplifier shown in FIG8 when it is configured as a MIMO power amplifier;

[0043] FIG10 is a schematic diagram of another structure of a power amplifier provided in an embodiment of the present application;

[0044] FIG11 is a schematic diagram of another structure of a power amplifier provided in an embodiment of the present application;

[0045] FIG12 is another structural diagram of a power amplifier provided in an embodiment of the present application.

[0046] Figure 100: Baseband chip; 200: Radio frequency system; 210: Radio frequency transceiver unit; 220: Radio frequency front-end module; 221: Transmitting link; 222: Receiving link; 230: Antenna system; 231: Main antenna; 232: Diversity antenna; 10: Power amplifier; 11M: First amplifier; 11A: Second amplifier; 12M: First transformer; 12A: Second transformer; 20: Packaged device; 30: Circuit board; CZ: First capacitor; PZ: Amplifier unit; O1 / O2 / O3 / O4: Differential output terminal; VDDM: First power supply; VDDA: Second power supply; CM: Second capacitor; CA: Third capacitor; M0: Node; RFZ1: First power transfer terminal; RFZ2: Second power transfer terminal; INM / INM1 / INM2: First power input terminal; INA / INA1 / INA2: Second power input terminal; RFO1: First output terminal; RFO2: Second output terminal. DETAILED DESCRIPTION

[0047] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings. The specific operating methods in the method embodiments can also be applied to device embodiments or system embodiments. It should be noted that in the description of the present application, "at least one" means one or more, where "multiple" means two or more. In view of this, in the embodiments of the present application, "multiple" can also be understood as "at least two". "And / or" describes the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / ", unless otherwise specified, generally indicates that the previous and next associated objects are in an "or" relationship. In addition, words such as "first" and "second" are only used for the purpose of distinguishing the description, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order. In addition, in the embodiments of the present application, "coupling" refers to electrical connection, and the coupling of two electrical components can be a direct or indirect connection between the two electrical components. For example, the coupling of A and B can be either a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components. For example, the coupling of A and B can also be a direct connection between A and C, and a direct connection between C and B, with A and B being connected through C.

[0048] It should be noted that the same reference numerals in the drawings of this application represent the same or similar structures, and thus their repeated description will be omitted. The words expressing positions and directions described in this application are all explained using the drawings as examples, but they can be modified as needed, and such modifications are included in the scope of protection of this application. The drawings of this application are only for illustrative purposes and do not represent true proportions.

[0049] The power amplifiers provided in the embodiments of the present application can be applied to electronic devices with radio frequency capabilities. For example, the electronic devices may be cellular phones, smartphones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like. It should be noted that the power amplifiers provided in the embodiments of the present application are intended to include, but are not limited to, applications in these and any other suitable types of electronic devices with radio frequency capabilities.

[0050] Figure 1 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Referring to Figure 1, the electronic device may include: a baseband chip 100 and a radio frequency system 200, wherein the radio frequency system 200 is coupled to the baseband chip 100. For example, the radio frequency system 200 includes: a radio frequency transceiver unit 210, a radio frequency front-end module 220, and an antenna system 230. The baseband chip 100 is coupled to the radio frequency transceiver unit 210, which is coupled to the radio frequency front-end module 220. The radio frequency front-end module 220 is also coupled to the antenna system 230. The antenna system 230 is used to transmit and receive radio frequency signals. For example, the antenna system 230 includes multiple (e.g., four) antennas, each configured to transmit radio frequency signals in different frequency bands. The radio frequency transceiver unit 210 is coupled to the side of the radio frequency front-end module 220 facing away from the antenna, and the radio frequency front-end module 220 is coupled to the antenna via an external interface. The radio frequency front-end module 220 includes a transmit chain 221 and a receive chain 222. The number of the transmitting chain 221 and the receiving chain 222 can be one or more. The transmitting chain 221 can be used to transmit radio frequency signals in multiple frequency bands to transmit the radio frequency signals to the antenna system 230. The receiving chain 222 can receive radio frequency signals in multiple frequency bands to receive the radio frequency signals transmitted by the antenna system 230.

[0051] The baseband chip 100 can be located on the main circuit board of an electronic device and is used to process digital baseband signals and encode and decode digital baseband signals. The RF transceiver unit 210 and the RF front-end module 220 are also located on the main circuit board. The RF transceiver unit 210 is used to convert digital baseband and analog RF signals, processing the digital baseband signals emitted by the baseband chip 100 into analog RF signals, which are then transmitted to the transmit chain 221 of the RF front-end module 220. Alternatively, the RF transceiver unit 210 is also used to receive analog RF signals transmitted by the receive chain 222, convert the analog RF signals into digital baseband signals, and then transmit them to the baseband chip 100. For example, the multiple antennas in the antenna system 230 can be divided into a main antenna 231 and a diversity antenna 232. The RF front-end module 220 is used to amplify, filter, and perform other processing on the analog RF signals before transmitting them to the main antenna 231, or to receive analog RF signals from the main antenna 231 and the diversity antenna 232, thereby performing other processing on the analog RF signals.

[0052] The baseband chip 100 and the RF system 200 can constitute the wireless communication system conducting end of the electronic device. When the antenna system 230 receives the RF signal (i.e., the received signal) and sends the received signal to the RF front-end module 220, the RF front-end module 220 can amplify, filter, mix, and process the received signal through the RF device in the receiving link 222, and then input it into the baseband chip 100 for demodulation. Correspondingly, when the RF transceiver unit 210 receives the RF signal (i.e., the transmitted signal) output by the baseband chip 100, it mixes, amplifies, filters, and processes the transmitted signal, and outputs it to the corresponding transmit link 221 in the RF front-end module 220 through the frequency band in which the transmitted signal is located, and sends the transmitted signal to the corresponding main antenna 231 through the transmit link 221 for transmission. The RF transceiver unit 210 is also used to control the switching of the transmit link 221 and the receive link 222 in the RF front-end module 220. Exemplarily, the RF transceiver unit 210 may include but is not limited to an RF transceiver. In this way, the electronic device can wirelessly communicate with network devices or other electronic devices through the wireless network through the wireless communication system transmission end to complete the information transmission and reception between the network devices or other electronic devices. Among them, the network devices may include servers or base stations.

[0053] For example, the transmit chain 221 may include, but is not limited to, a power amplifier 10, a filter, and a radio frequency switch coupled in sequence, and the receive chain 222 may include, but is not limited to, a low-noise amplifier, a filter, and a radio frequency switch coupled in sequence. Alternatively, in some embodiments, the transmit chain 221 and the receive chain 222 may also take other different forms. In this embodiment, the components of the transmit chain 221 and the receive chain 222 are not further limited; for details, reference may be made to the descriptions in existing related technologies.

[0054] It is worth mentioning that FIG1 is only an exemplary diagram of a structural form of an electronic device. In a specific implementation, the receiving link 222 may not be provided in the RF front-end module 220, and the diversity antenna may not be provided in the antenna system 230. In addition, in actual applications, the baseband chip 100, the RF transceiver unit 210, and the RF front-end module 220 may be provided in different chips respectively, or the baseband chip 100, the RF transceiver unit 210, and the RF front-end module 220 may be integrated into the same chip in pairs, or the baseband chip 100, the RF transceiver unit 210, and the RF front-end module 220 may be integrated into the same chip in order to improve the integration level.

[0055] However, in current RF front-end module power amplifiers, to reduce power consumption during power back-off, a λ / 4 transmission line or equivalent impedance transformation network is typically connected in series at the amplifier's output to modulate the load impedance. After combining, the impedance matching circuit matches the transmission impedance again for transmission. This typically requires more impedance matching components to meet the impedance matching requirements, increasing both the cost and area of ​​the power amplifier 10. To this end, an embodiment of the present application provides a power amplifier 10 that can be used in a transmit link. In this power amplifier 10, a T-type network is formed to achieve λ / 4 impedance matching, thereby reducing cost and area.

[0056] FIG2 is a schematic diagram of the structure of a power amplifier provided in an embodiment of the present application. Referring to FIG2 , the power amplifier 10 may include: a first amplifier 11M, a second amplifier 11A, a first transformer 12M, a second transformer 12A, and a first capacitor CZ. The input of the first amplifier 11M is coupled to a first power input (e.g., INM1, INM2), and the output of the first amplifier 11M is coupled to the primary winding of the first transformer 12M. Furthermore, the input of the second amplifier 11A is coupled to a second power input (e.g., INA1, INA2), the output of the second amplifier 11A is coupled to the primary winding of the second transformer 12A, the first end of the secondary winding of the second transformer 12A and the second end of the secondary winding of the first transformer 12M are coupled to a node M0, the second end of the secondary winding of the second transformer 12A is grounded, and the first end of the secondary winding of the first transformer 12M is a first output terminal RFO1. Based on this, the RF signal is input into the first amplifier 11M through the first power input end (for example, INM1, INM2), the first amplifier 11M amplifies the RF signal and then couples it to the secondary coil of the first transformer 12M through the primary coil of the first transformer 12M, and the RF signal is input into the second amplifier 11A through the second power input end (for example, INA1, INA2), the second amplifier 11A amplifies the RF signal and then couples it to the secondary coil of the second transformer 12A through the primary coil of the second transformer 12A, and then the secondary coils of the first transformer 12M and the second transformer 12A are coupled in series to realize power synthesis of the first amplifier 11M and the second amplifier 11A, and the RF signal after power synthesis is output through the first end of the secondary coil of the first transformer 12M.

[0057] Furthermore, a first end of the first capacitor CZ is coupled to the node M0, and a second end of the first capacitor CZ is grounded. Based on this, the parasitic inductance of the secondary winding of the first transformer 12M and the parasitic inductance of the secondary winding of the second transformer are reused, so that the first capacitor CZ, the parasitic inductance of the secondary winding of the first transformer 12M, and the parasitic inductance of the secondary winding of the second transformer 12A form a T-type network. The T-type network transforms the load impedance to the load impedance required by the first amplifier 11M. The T-type network achieves the effect of an equivalent λ / 4 transmission line, replacing the λ / 4 transmission line, thereby reducing cost and area.

[0058] FIG3 is a schematic diagram of the structure of a T-type network provided in an embodiment of the present application. Referring to FIG3 , the T-type network includes: a parasitic inductance LrM of the secondary winding of a first transformer 12M, a parasitic inductance LrA of the secondary winding of a second transformer 12A, and a first capacitor CZ coupled to a node M0. LrM is the parasitic inductance of the secondary winding of the first transformer 12M and is not an additional impedance matching element in the T-type network. LrA is the parasitic inductance of the secondary winding of the second transformer 12A and is not an additional impedance matching element in the T-type network. This eliminates the area required for additional inductors in chip integration design and, if integrated as discrete devices, eliminates the BOM cost of additional inductors. The only additional impedance matching element in the T-type network is the first capacitor CZ. Therefore, the T-type network does not require numerous impedance matching elements and can achieve the equivalent effect of a λ / 4 transmission line, replacing the λ / 4 transmission line, thereby reducing cost and area.

[0059] 2 , the power amplifier 10 in the embodiment of the present application can be used as a Doherty power amplifier, which not only reduces cost and area, but also improves efficiency during power backoff. Of course, the power amplifier in the embodiment of the present application can also be used as other power amplifiers, which is not limited here.

[0060] In the embodiment of the present application, the type of the first capacitor CZ is not limited. For example, the first capacitor CZ may be a switched capacitor array, a variable capacitor, or a fixed capacitor. The present application takes the first capacitor CZ as a variable capacitor as an example.

[0061] 2 , the first amplifier 11M and the second amplifier 11A can be designed to be completely symmetrical, and the first transformer 12M and the second transformer 12A can also be designed to be completely symmetrical, so that the matching network can be designed compactly and the components can be designed to be completely symmetrical for the main and auxiliary power amplifiers.

[0062] In the embodiment of the present application, the circuit structure of the first amplifier 11M and the circuit structure of the second amplifier 11A can be set to a Cascode+Stack structure. Exemplarily, the Cascode+Stack structure, for example, refers to Figure 4, which is a structural diagram of the Cascode+Stack structure, wherein the bottom-layer transistor is an amplifier tube, and the input voltage signal is converted into voltage and current through the transconductance of the amplifier tube, and finally converted into power through the load network to achieve output. In addition, the circuit structure of the first amplifier 11M and the circuit structure of the second amplifier 11A can be universal, and the turn-on time of the first amplifier 11M and the second amplifier 11A can be distinguished by adjusting the gate voltage of the amplifier tube. It is understandable that in actual applications, the number of stacked transistors can be flexibly adjusted according to the power supply voltage. Therefore, the change in the number of stacked transistors due to the withstand voltage is also included in the protection scope of the present application.

[0063] Continuing with Figure 2 , the first amplifier 11M can be a differential input / output amplifier. Specifically, the input of the first amplifier 11M is a differential input, and the differential inputs of the first amplifier 11M are coupled to the first power input INM1 and the first power input INM2, respectively. Furthermore, the output of the first amplifier 11M is a differential output, and the differential outputs O1 and O2 of the first amplifier 11M are coupled to the first and second ends of the primary coil of the first transformer 12M, respectively. A center tap of the primary coil of the first transformer 12M is coupled to the first power supply VDDM, thereby powering the first amplifier 11M via the first power supply VDDM. This configuration enables the first amplifier 11M to achieve differential input and output. Furthermore, the specific voltage value of the first power supply VDDM is not limited in this application; it can be determined based on design requirements such as the structural withstand voltage and target power of the first amplifier 11M. Furthermore, the first end of the primary coil of the first transformer 12M can be the positive pole, and the second end of the primary coil of the first transformer 12M can be the negative pole. Alternatively, the first end of the primary coil of the first transformer 12M may be a negative electrode, and the second end of the primary coil of the first transformer 12M may be a positive electrode. Furthermore, a first phase difference exists between the RF signal input to the first power input terminal INM1 and the RF signal input to the first power input terminal INM2, and the first phase difference is 180°.

[0064] Continuing with Figure 2, the second amplifier 11A can also be a differential input / output amplifier. That is, the input of the second amplifier 11A is a differential input, and the differential inputs of the second amplifier 11A are coupled to the second power input INA1 and the second power input INA2, respectively. Furthermore, the output of the second amplifier 11A is a differential output, and the differential outputs O3 and O4 of the second amplifier 11A are coupled to the first and second ends of the primary coil of the second transformer 12A, respectively. The center tap of the primary coil of the second transformer 12A is used to couple to the second power supply VDDA, thereby powering the second amplifier 11A via the second power supply VDDA. This configuration enables the second amplifier 11A to achieve differential input and output. Furthermore, the specific voltage value of the second power supply VDDA is not limited in this application; it can be determined based on design requirements such as the structural withstand voltage and target power of the second amplifier 11A. Furthermore, the first end of the primary coil of the second transformer 12A can be the positive pole, and the second end of the primary coil of the second transformer 12A can be the negative pole. Alternatively, the first end of the primary coil of the second transformer 12A may be a negative electrode, and the second end of the primary coil of the second transformer 12A may be a positive electrode. Furthermore, a second phase difference exists between the RF signal input to the second power input terminal INA1 and the RF signal input to the second power input terminal INA2, and the second phase difference is 180°. Furthermore, the first phase difference and the second phase difference differ by 90°.

[0065] In the embodiment of the present application, the first transformer 12M can be configured as a balun coil, so as to use the balun coil as an output matching transformer for the first amplifier 11M. Of course, the first transformer 12M can also be configured as other structural forms, which are not limited here.

[0066] The second transformer 12A in the embodiment of the present application can also be configured as a balun coil, so as to use the balun coil as the output matching transformer of the second amplifier 11 A. Of course, the second transformer 12A can also be configured as other structural forms, which are not limited here.

[0067] It is understandable that the winding method and implementation form of the balun coil are not limited, and the coupling coefficient and turns ratio are related to the design power, which are all within the scope of protection of this application.

[0068] To avoid problems with the synthesized signal, the positive pole of the secondary winding of the first transformer 12M is coupled to the negative pole of the secondary winding of the second transformer 12A, as shown in FIG2 . Of course, the negative pole of the secondary winding of the first transformer 12M can also be coupled to the positive pole of the secondary winding of the second transformer 12A.

[0069] In the embodiment of the present application, the first amplifier 11M, the second amplifier 11A, the first transformer 12M, the second transformer 12A and the first capacitor CZ can be packaged together and integrated into a chip, so that the first power input terminal (for example, INM1, INM2), the second power input terminal (for example, INA1, INA2) and the first output terminal RFO1 can be the pin pins of the chip respectively. Moreover, taking the first amplifier 11M, the second amplifier 11A, the first transformer 12M, the second transformer 12A and the first capacitor CZ as an amplification unit as an example, the power amplifier 10 can have one or more amplification units, wherein, when there is one amplification unit, the power amplifier has one output to achieve single-channel output. When there are multiple amplification units, the power amplifier can have multiple different output terminals to achieve multi-channel output. For example, when there are two amplification units, the power amplifier can have two different output terminals to achieve dual-channel output. It is understandable that the power of a high-power single-channel Doherty power amplifier is generally 3dB higher than the power of a dual-channel low-power Doherty power amplifier.

[0070] FIG5 is another schematic diagram of the structure of a power amplifier provided in an embodiment of the present application. Referring to FIG5 , the power amplifier 10 in this embodiment is modified from the power amplifier 10 in the embodiment shown in FIG2 . The similarities are not described here. The difference lies in the addition of a second capacitor CM and a third capacitor CA to the amplifier unit PZ. The first end of the second capacitor CM is coupled to the first end of the primary coil of the first transformer 12M, and the second end of the second capacitor CM is coupled to the second end of the primary coil of the first transformer 12M. Furthermore, the first end of the third capacitor CA is coupled to the first end of the primary coil of the second transformer 12A, and the second end of the third capacitor CA is coupled to the second end of the primary coil of the second transformer 12A. With this arrangement, the parasitic inductance of the secondary coil of the first transformer 12M is adjusted by the second capacitor CM, and the parasitic inductance of the secondary coil of the second transformer 12A is adjusted by the third capacitor CA.

[0071] In a specific implementation, the capacitance values ​​of the first capacitor CZ, the second capacitor CM, and the third capacitor CA are adjustable, respectively. Thus, by adjusting the capacitance value of the second capacitor CM, the parasitic inductance of the secondary coil of the first transformer 12M is tuned. Furthermore, by adjusting the capacitance value of the third capacitor CA, the parasitic inductance of the secondary coil of the second transformer 12A is tuned. Combined with the tuning of the first capacitor CZ, the frequency selection characteristics of the T-type network are adjusted, that is, a multi-band adjustable T-type network is realized, so that the power amplifier 10 of the embodiment of the present application achieves the effect of a broadband power amplifier (e.g., a Doherty power amplifier).

[0072] Moreover, in the embodiment of the present application, the output impedance Ropt (i.e., the optimal load impedance of the transistor) of the power amplifier can be adjusted by adjusting the capacitance value of the first capacitor CZ, the capacitance value of the second capacitor CM, and the capacitance value of the third capacitor CA.

[0073] For example, the first capacitor CZ, the second capacitor CM, and the third capacitor CA can be configured as a switched capacitor array, so that the switched capacitor array can be switched according to the operating frequency of the power amplifier. Of course, the first capacitor CZ, the second capacitor CM, and the third capacitor CA can also be configured as variable capacitors, which can also be switched according to the operating frequency of the power amplifier. This application is not limited to this.

[0074] It is understandable that the first capacitor CZ, the second capacitor CM, and the third capacitor CA can also be set as fixed capacitors. In other words, capacitors with corresponding fixed capacitance values ​​can be directly used as the first capacitor CZ, the second capacitor CM, and the third capacitor CA according to the operating frequency of the power amplifier.

[0075] In a specific implementation, the first end of the second capacitor CM may not be coupled to the first end of the primary coil of the first transformer 12M, but the first end of the second capacitor CM may be directly grounded. Alternatively, the first end of the third capacitor CA may not be coupled to the first end of the primary coil of the second transformer 12A, but the first end of the third capacitor CA may be directly grounded.

[0076] For example, the first amplifier 11M, the second amplifier 11A, the first transformer 12M, the second transformer 12A, the first capacitor CZ, the second capacitor CM, and the third capacitor CA in the embodiment of the present application may be packaged together and integrated into a chip.

[0077] FIG6 is another schematic diagram of the structure of a power amplifier provided in an embodiment of the present application. Referring to FIG6 , the power amplifier 10 in this embodiment is a modification of the power amplifier 10 in the embodiment shown in FIG5 . The similarities are not described here. The differences are as follows: the first amplifier 11M and the second amplifier 11A have single-ended input and single-ended output, respectively. Specifically, the input of the first amplifier 11M is coupled to the first power input INM, and the output of the first amplifier 11M is coupled to the second end of the primary winding of the first transformer 12M. The first end of the primary winding of the first transformer 12M is coupled to the first power supply VDDM. Furthermore, the input of the second amplifier 11A is coupled to the second power input INA, and the output of the second amplifier 11A is coupled to the second end of the primary winding of the second transformer 12A. The first end of the primary winding of the second transformer 12A is coupled to the second power supply VDDA. Furthermore, the first end of the second capacitor CM is coupled to the first end of the primary winding of the first transformer 12M, and the second end of the second capacitor CM is coupled to the second end of the primary winding of the first transformer 12M. A first end of the third capacitor CA is coupled to a first end of the primary coil of the second transformer 12A, and a second end of the third capacitor CA is coupled to a second end of the primary coil of the second transformer 12A.

[0078] Furthermore, the implementation of the first capacitor CZ, the second capacitor CM, and the third capacitor CA may refer to the above embodiments, and will not be described in detail herein.

[0079] In the embodiment of the present application, the circuit structure of the first amplifier 11M and the circuit structure of the second amplifier 11A can also be set as a Cascode+Stack structure. For example, the Cascode+Stack structure, for example, refers to Figure 7, which is another structural schematic diagram of the Cascode+Stack structure, wherein the bottommost transistor is an amplifier tube, and the input voltage signal is converted into voltage and current through the amplifier tube transconductance, and finally converted into power through the load network to achieve output. In addition, the circuit structure of the first amplifier 11M and the circuit structure of the second amplifier 11A can be universal, and the turn-on time of the first amplifier 11M and the second amplifier 11A can be adjusted by adjusting the gate voltage of the amplifier tube. It is understandable that in actual applications, the number of stacked transistors can be flexibly adjusted according to the power supply voltage. Therefore, the change in the number of stacked transistors due to the withstand voltage is also included in the protection scope of this application. In addition, there is also a phase difference between the RF signal input to the first power input terminal INM and the RF signal input to the second power input terminal INA, and the phase difference is 90°.

[0080] FIG8 is a schematic diagram of another structure of a power amplifier provided in an embodiment of the present application. Referring to FIG8 , the power amplifier 10 in this embodiment is modified from the power amplifier 10 in the embodiment shown in FIG5 . The similarities therebetween are not repeated here. The difference lies in that the power amplifier 10 includes not only a first amplifier 11M, a second amplifier 11A, a first transformer 12M, a second transformer 12A, and a first capacitor CZ, but also a first switch K1 and a second switch K2. The first end of the secondary winding of the first transformer 12M serves as a first output terminal RFO1, a node M0 is coupled to the first end of the first capacitor CZ and the first end of the first switch K1, respectively, and the second end of the first switch K1 is grounded. The second end of the secondary winding of the second transformer 12A serves as a second output terminal RFO2, and the second end of the secondary winding of the second transformer 12A is coupled to the first end of the second switch K2. The second end of the second switch K2 is grounded, i.e., the second end of the secondary winding of the second transformer 12A is grounded via the second switch K2. With this configuration, the power amplifier 10 in the embodiment of the present application can be switched from a Doherty power amplifier to a multi-channel multiple-input multiple-output (MIMO) power amplifier 10 by turning on and off the first switch K1 and the second switch K2, so that the same power amplifier 10 in the embodiment of the present application can be applied to different application scenarios.

[0081] In some embodiments, in order to configure the power amplifier in the embodiment of the present application as a Doherty power amplifier, referring to FIG. 9 a , FIG. 9 a is a schematic diagram of the structure of the power amplifier shown in FIG. 8 when configured as a Doherty power amplifier, the first switch K1 is controlled to be disconnected, so that the node M0 is coupled to the first capacitor CZ, and the second switch K2 is controlled to be conductive, so that the second end of the secondary coil of the second transformer 12A is grounded, thereby causing the first capacitor CZ, the parasitic inductance of the secondary coil of the first transformer 12M, and the parasitic inductance of the secondary coil of the second transformer 12A to form a T-type network. The T-type network is used to transform the load impedance into the load impedance required by the first amplifier 11M, so that the first output terminal RFO1 is used to output the power-amplified signal. With this configuration, the power amplifier 10 in the embodiment of the present application can be configured as a Doherty power amplifier to meet the requirements of the application scenario. In addition, a second capacitor CM and a third capacitor CA are also provided in the amplification unit PZ. By adjusting the capacitance value of the second capacitor CM, the parasitic inductance of the secondary coil of the first transformer 12M is tuned. Moreover, by adjusting the capacitance value of the third capacitor CA, the parasitic inductance of the secondary coil of the second transformer 12A is tuned. Combined with the tuning of the first capacitor CZ, a multi-band adjustable T-type network is realized, thereby enabling the power amplifier 10 of the embodiment of the present application to achieve a broadband Doherty power amplifier effect.

[0082] In some other embodiments, in order to configure the power amplifier in the embodiments of the present application as a MIMO power amplifier, referring to FIG. 9 b , which is a schematic diagram of the structure of the power amplifier shown in FIG. 8 when configured as a MIMO power amplifier, the first switch K1 is controlled to be conductive, node M0 is grounded, and the second switch K2 is controlled to be disconnected, so that the second end of the secondary coil of the second transformer 12A is coupled to the second output terminal RFO2, so that the first output terminal RFO1 and the second output terminal RFO2 are respectively used to output the power-amplified signal. Based on this, the RF signal is input to the first amplifier 11M through the first power input terminal (e.g., INM1, INM2). The first amplifier 11M amplifies the RF signal and couples it to the secondary coil of the first transformer 12M through the primary coil of the first transformer 12M. The power-amplified RF signal is then output to the first output terminal RFO1 through the first end of the secondary coil of the transformer 12M. In addition, the RF signal is input into the second amplifier 11A through the second power input terminal (e.g., INA1, INA2). The second amplifier 11A amplifies the RF signal and couples it to the secondary coil of the second transformer 12A through the primary coil of the second transformer 12A. The RF signal is then output to the second output terminal RFO2 through the second end of the secondary coil of the second transformer 12A. With this configuration, the power amplifier 10 in the embodiment of the present application can be configured as a dual-output power amplifier 10 to meet the needs of the application scenario. In addition, a second capacitor CM and a third capacitor CA are also provided in the amplification unit PZ. By adjusting the capacitance value of the second capacitor CM, the parasitic inductance of the secondary coil of the first transformer 12M is tuned. In addition, by adjusting the capacitance value of the third capacitor CA, the parasitic inductance of the secondary coil of the second transformer 12A is tuned. In combination with the tuning of the first capacitor CZ, a broadband MIMO power amplifier effect is achieved. It is understandable that when the power amplifier in the embodiment of the present application is set as a MIMO power amplifier, the phase of the RF signal input to the first power input terminal (for example, INM1, INM2) and the phase of the RF signal input to the second power input terminal (for example, INA1, INA2) can be the same.

[0083] The power amplifier 10 in the embodiment of the present application can be integrated into a packaged device 20. That is, the packaged device 20 includes an amplifying unit PZ, a first power input terminal (e.g., INM1, INM2), a second power input terminal (e.g., INA1, INA2), a first output terminal RFO1, and a second output terminal RFO2. For example, the packaged device 20 is a chip, and the first power input terminal (e.g., INM1, INM2), the second power input terminal (e.g., INA1, INA2), the first output terminal RFO1, and the second output terminal RFO2 can be pins of the chip.

[0084] It is understandable that the coupling relationship between the first amplifier 11M and the first transformer 12M and the coupling relationship between the second amplifier 11A and the second transformer 12A may also be the coupling relationship shown in FIG. 6 , which is not limited here.

[0085] In addition, referring to Figure 8, the power amplifier in the embodiment of the present application further includes a second capacitor CM and a third capacitor CA, and the implementation of the first capacitor CZ, the second capacitor CM and the third capacitor CA can refer to the above embodiment, and the details are not repeated here.

[0086] For example, the first amplifier 11M, the second amplifier 11A, the first transformer 12M, the second transformer 12A, the first capacitor CZ, the second capacitor CM, the third capacitor CA, and the first switch K1 and the second switch K2 in the embodiment of the present application can be packaged together and integrated into a chip.

[0087] It is worth mentioning that the switch in the embodiment of the present application can be one or more of various types of switching devices such as a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT), a silicon carbide (SiC) MOSFET, etc., which are not listed one by one in the embodiment of the present application. In addition, each switch can include a first electrode, a second electrode and a control electrode, wherein the control electrode is used to control the closing or opening of the switch. When the switch is closed, current can be transmitted between the first electrode and the second electrode of the switch. When the switch is open, current cannot be transmitted between the first electrode and the second electrode of the switch. Taking MOSFET as an example, the control electrode of the switch is the gate, the first electrode of the switch can be the source, the second electrode can be the drain, or the first electrode can be the drain and the second electrode can be the source.

[0088] FIG10 is another schematic diagram of the structure of a power amplifier provided in an embodiment of the present application. Referring to FIG10 , the power amplifier 10 in this embodiment is a modification of the power amplifier 10 in the embodiment shown in FIG5 . The similarities are not repeated here. The difference is that the power amplifier 10 further includes a circuit board 30. The first amplifier 11M, the second amplifier 11A, the first transformer 12M, the second transformer 12A, the first capacitor CZ, the second capacitor CM, the third capacitor CA, and the first switch K1 and the second switch K2 can be packaged together to form a chip 20, which is disposed on the circuit board 30. The circuit board 30 includes a first power output terminal RFZ1 and a second power output terminal RFZ2. The first output terminal RFO1 is coupled to the first power transfer terminal RFZ1 to enable signal transmission between the first output terminal RFO1 and the first power transfer terminal RFZ1. Furthermore, the second output terminal RFO2 is coupled to the second power transfer terminal RFZ2 to enable signal transmission between the second output terminal RFO2 and the second power transfer terminal RFZ2. With this configuration, the amplified RF signal can be output via the circuit board. In addition, the chip 20 and the circuit board are electrically coupled using bonding methods such as wire bonding or vertical interconnect structure bonding. It is understood that the coupling relationship between the first amplifier 11M and the first transformer 12M, and the coupling relationship between the second amplifier 11A and the second transformer 12A, can also be the coupling relationship shown in FIG6 , and are not limited here.

[0089] FIG11 is another structural diagram of a power amplifier provided in an embodiment of the present application. Referring to FIG11 , the power amplifier 10 in this embodiment is modified from the power amplifier 10 in the embodiment shown in FIG10 above. The similarities are not repeated here. The difference is that the power amplifier 10 further includes a circuit board 30, and the first amplifier 11M, the second amplifier 11A, the first transformer 12M, the second transformer 12A, the second capacitor CM, and the third capacitor CA are packaged together to form a chip 20, which is disposed on the circuit board 30. Furthermore, the first output terminal RFO1, the first capacitor CZ, and the ground terminal are disposed on the circuit board 30. Furthermore, the first amplifier 11M, the second amplifier 11A, the first transformer 12M, and the second transformer 12A are packaged together and coupled to the first capacitor CZ. The first end of the secondary coil of the first transformer 12M is coupled to the first output terminal RFO1 on the circuit board 30, and the second end of the secondary coil of the second transformer 12A is coupled to the ground terminal on the circuit board 30. Thus, by disposing the first capacitor CZ on the circuit board 30, the volume of the chip 20 can be reduced. Furthermore, the first capacitor CZ, the parasitic inductance of the secondary coil of the first transformer 12M, and the parasitic inductance of the secondary coil of the second transformer 12A can also form a T-type network, and the load impedance can be transformed into the load impedance required by the first amplifier 11M through the T-type network, so that the power amplifier 10 of the embodiment of the present application can achieve a Doherty power amplifier effect.

[0090] For example, a second output terminal RFO2 may be further provided on the circuit board 30 , but the second output terminal RFO2 is not coupled to the chip 20 .

[0091] Furthermore, by adjusting the capacitance value of the second capacitor CM, the parasitic inductance of the secondary coil of the first transformer 12M is tuned. By adjusting the capacitance value of the third capacitor CA, the parasitic inductance of the secondary coil of the second transformer 12A is tuned. Combined with the tuning of the first capacitor CZ, a multi-band adjustable T-type network is implemented, thereby enabling the power amplifier 10 of the embodiment of the present application to achieve a wide Doherty power amplifier effect. Furthermore, the second capacitor CM and the third capacitor CA may not be provided in the power amplifier.

[0092] In addition, the packaged device 20 and the circuit board are electrically coupled by using bonding methods such as wire bonding and vertical interconnect structure bonding.

[0093] It is understandable that the coupling relationship between the first amplifier 11M and the first transformer 12M and the coupling relationship between the second amplifier 11A and the second transformer 12A may also be the coupling relationship shown in FIG. 6 , which is not limited here.

[0094] FIG12 is another structural schematic diagram of a power amplifier provided in an embodiment of the present application. Referring to FIG12 , the power amplifier 10 in this embodiment is modified from the power amplifier 10 in the embodiment shown in FIG11 . The similarities are not described here. The differences are as follows: a first output terminal RFO1, a second output terminal RFO2, and a ground terminal are provided on a circuit board 30. Furthermore, a first amplifier 11M, a second amplifier 11A, a first transformer A2M, and a second transformer 12A are packaged together. The second end of the secondary coil of the first transformer 12M and the first end of the secondary coil of the second transformer 12A are coupled to the ground terminal on the circuit board 30. The first end of the secondary coil of the first transformer 12M is coupled to the first output terminal RFO1, and the second end of the secondary coil of the second transformer 12A is coupled to the second output terminal RFO2. This configuration enables the power amplifier 10 in the embodiment of the present application to be configured as a MIMO power amplifier. It is understood that the coupling relationship between the first amplifier 11M and the first transformer 12M, and the coupling relationship between the second amplifier 11A and the second transformer 12A, can also be the same as that shown in FIG6 , and is not limited here. In addition, the second capacitor CM and the third capacitor CA may not be provided in the power amplifier.

[0095] It is worth mentioning that the implementation methods in the above embodiments may not be dependent on each other, and may also be other achievable methods, which are not specifically limited here.

[0096] The above content is only a specific implementation method of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in this application, and they should all be covered by the protection scope of the present application.

Claims

1. A power amplifier, characterized in that: a first amplifier, a second amplifier, a first transformer, a second transformer, and a first capacitor; The output end of the first amplifier is coupled to at least one end of the primary coil of the first transformer, the output end of the second amplifier is coupled to at least one end of the primary coil of the second transformer, the first end of the secondary coil of the first transformer is a first output end, the second end of the secondary coil of the first transformer is coupled to a point with the first end of the secondary coil of the second transformer and the first end of the first capacitor, the second end of the secondary coil of the second transformer is grounded, and the second end of the first capacitor is grounded.

2. The power amplifier according to claim 1, wherein Also includes: a first switch and a second switch; A first end of the first switch is coupled to a first end of the first capacitor, and a second end of the first switch is grounded; The second end of the secondary coil of the second transformer is grounded through the second switch, and the second end of the secondary coil of the second transformer is a second output end.

3. The power amplifier according to claim 2, wherein: The first amplifier, the second amplifier, the first transformer, the second transformer, the first capacitor, the first switch, and the second switch are packaged together.

4. The power amplifier according to claim 1, wherein The first amplifier, the second amplifier, the first transformer, the second transformer, and the first capacitor are packaged together; or, It also includes a circuit board, the first capacitor, the ground terminal and the first output terminal are arranged on the circuit board, the first amplifier, the second amplifier, the first transformer and the second transformer are packaged together and coupled to the first capacitor, and the first end of the secondary coil of the first transformer is coupled to the first output terminal on the circuit board, and the second end of the secondary coil of the second transformer is coupled to the ground terminal on the circuit board.

5. A power amplifier, characterized in that: include: a first amplifier, a second amplifier, a first transformer, a second transformer, and a circuit board; The output terminal of the first amplifier is coupled to at least one end of the primary coil of the first transformer, the output terminal of the second amplifier is coupled to at least one end of the primary coil of the second transformer, the first end of the secondary coil of the first transformer is a first output terminal, and the second end of the secondary coil of the first transformer and the first end of the secondary coil of the second transformer are coupled to a point; A first output terminal, a second output terminal, and a ground terminal are provided on the circuit board, and the first amplifier, the second amplifier, the first transformer, and the second transformer are packaged together, and the second end of the secondary coil of the first transformer and the first end of the secondary coil of the second transformer are coupled to the ground terminal on the circuit board, the first end of the secondary coil of the first transformer is coupled to the first output terminal, and the second end of the secondary coil of the second transformer is coupled to the second output terminal.

6. The power amplifier according to any one of claims 1 to 5, wherein: Also includes: a second capacitor and a third capacitor; A first end of the second capacitor is coupled to a first end of the primary coil of the first transformer or is grounded, and a second end of the second capacitor is coupled to a second end of the primary coil of the first transformer; A first end of the third capacitor is coupled to a first end of the primary coil of the second transformer or is grounded, and a second end of the third capacitor is coupled to a second end of the primary coil of the second transformer.

7. The power amplifier according to claim 6, wherein: The capacitance value of the first capacitor, the capacitance value of the second capacitor, and the capacitance value of the third capacitor are adjustable.

8. The power amplifier according to claim 7, wherein: One or more capacitors among the first capacitor, the second capacitor and the third capacitor are switched capacitor arrays.

9. The power amplifier according to any one of claims 1 to 8, wherein: At least one of the first transformer and the second transformer is a balun coil.

10. The power amplifier according to any one of claims 1 to 9, wherein: The input end of the first amplifier is a differential input end, the output end of the first amplifier is a differential output end, and the differential output end of the first amplifier is coupled to the first end and the second end of the primary coil of the first transformer respectively, and the center tap of the primary coil of the first transformer is used to couple to the first power supply; Alternatively, the input end of the second amplifier is a differential input end, the output end of the second amplifier is a differential output end, and the differential output end of the second amplifier is coupled to the first end and the second end of the primary coil of the second transformer, and the middle tap of the primary coil of the second transformer is used to couple to the second power supply.

11. The power amplifier according to any one of claims 1 to 9, wherein: The output end of the first amplifier is coupled to the second end of the primary coil of the first transformer, and the first end of the primary coil of the first transformer is used to couple to a first power supply; Alternatively, the output end of the second amplifier is coupled to the second end of the primary coil of the second transformer, and the first end of the primary coil of the second transformer is used to couple to a second power supply.

12. A radio frequency front-end module, characterized in that: Comprising a power amplifier as described in any one of claims 1-11.

13. An electronic device, characterized in that: Comprising the RF front-end module as claimed in claim 12.

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