Electric-power conversion device and method of controlling electric-power conversion device

Abstract

According to the present invention, when secondary-side DC voltages are at or above a threshold value, primary-side maximum pulse widths, secondary-side maximum pulse widths, and phase differences therebetween for realizing, on the basis of primary-side DC voltages, a secondary-side DC current command value going to isolated bidirectional DC / DC converters 3 are output, and when the secondary-side DC voltages are below the threshold value, primary-side pulse widths, secondary-side pulse widths, and phase differences therebetween for realizing, on the basis of the primary-side DC voltages and the secondary-side DC voltages, the secondary-side DC current command value are output. Further, when the secondary-side DC voltages are at or above the threshold value, a primary-side DC voltage command reference value calibrated on the basis of the threshold value and the secondary-side DC voltages is set as a primary-side DC voltage average command value going to AC / DC converters 2, and when the secondary-side DC voltages are below the threshold value, a primary-side DC voltage command lower-limit value is set as the primary-side DC voltage average command value.

Description

Power conversion device and control method for power conversion device

[0001] The present invention relates to a control technology for an SST (Solid-State Transformer) type power conversion system, and in particular to a technology for maintaining high efficiency even when a load over a wide voltage range is connected.

[0002] Non-Patent Document 1 proposes a power conversion system that assumes an EV charger or a battery of a power storage device as a load in an SST power conversion circuit. In this system, a DC bus is formed from the high-voltage system in the circuit, and power is supplied bidirectionally by an isolated DC / DC converter connected to each load.

[0003] Non-Patent Document 2 proposes a power conversion system that assumes an EV charger battery as a load in an SST power conversion circuit. Since the battery voltage range of EV chargers is wide, this system enables highly efficient operation over a wide voltage range by providing a non-isolated DC / DC converter on the secondary side of the AC / DC converter in the circuit.

[0004] Michael Starke, Radha Sree Krishna Moorthy, Aswad Adib, Benjamin Dean, Madhu Chinthavali, Bailu Xiao, Steven Campbell, “A MW scale charging architecture for supporting extreme fast charging of heavy-duty electric vehicles,” in Proc. IEEE Conference on Transport Electrification (ITEC), 2022, Anaheim, CA, USA “High-Efficiency, Medium-Voltage Input, Solid-State, Transformer-Based 400-kW / 1000-V / 400-A Extreme Fast Charger for Electric Vehicles” Department of Energy (DOE) at the 2021 DOE Vehicle Technologies Office Annual Merit Review J. Shi, W. Gou, H. Yuan, T. Zhao, A. Q. Huang: "Research on voltage and power balance control for cascaded modular solid-state transformers", IEEE Trans. on Power Electronics Shun Higa and Junichi Ito, "Development of a T-type Dual Active Bridge DC-DC Converter Applying an Operation Mode Switching Method for a Wide Voltage Drive Range", IEEJ Transactions on Power Electronics, Vol. 139, No. 4, pp. 111-115, 2014. 388-400 (2019)

[0005] JP 2022-165495 A JP 2022-43627 A Japanese Patent No. 7384136 A

[0006] The systems described in Non-Patent Documents 1 and 2 are intended to supply power to a battery using an SST-type power conversion circuit. Since batteries and capacitors with various voltage ranges are connected to the load of the circuit, an isolated or non-isolated DC / DC converter is required in the circuit to drive the circuit efficiently over a wide voltage range, which increases the cost and size of the device. Furthermore, a circuit with low loss and requiring a small cooler is desirable in terms of reducing the cost, size, and energy consumption of the device.

[0007] When the load in an SST system is a storage device such as a battery or capacitor, DC voltage fluctuations occur in the load due to charging and discharging. In an isolated DC / DC converter, loss increases when the input and output DC voltages deviate from the nominal value, which leads to increased costs and size, such as increased capacity of semiconductor elements, larger coolers, and larger passive components.

[0008] In view of the above circumstances, an object of the present invention is to suppress an increase in loss without adding any additional circuitry even over a wide voltage range in an SST type power conversion system designed for a load with a large fluctuation in DC voltage.

[0009] Therefore, one aspect of the present invention is a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, the power conversion device comprising: a current control unit that outputs a primary-side maximum pulse width and a secondary-side maximum pulse width, and a phase difference thereof, for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter, based on a primary-side DC voltage from the AC / DC converter, when a secondary-side DC voltage is equal to or higher than a threshold; and outputs a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving the secondary-side DC current command value, based on the primary-side DC voltage and the secondary-side DC voltage, when the secondary-side DC voltage is less than the threshold; and this current control unit sets a primary-side DC voltage command reference value corrected based on the threshold and the secondary-side DC voltage as a primary-side DC voltage average command value of the AC / DC converter when the secondary-side DC voltage is equal to or higher than the threshold; and sets a primary-side DC voltage command lower-limit value as the primary-side DC voltage average command value when the secondary-side DC voltage is less than the threshold.

[0010] In one aspect of the present invention, a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter outputs a primary-side maximum pulse width and a secondary-side maximum pulse width and their phase difference for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on a primary-side DC voltage from the AC / DC converter when a secondary-side DC voltage is equal to or greater than a lower-limit threshold and less than an upper-limit threshold, and outputs a primary-side pulse width and a secondary-side maximum pulse width and their phase difference for achieving the secondary-side DC current command value to the bidirectional isolated DC / DC converter based on the primary-side DC voltage when the secondary-side DC voltage is less than a lower-limit threshold or equal to or greater than an upper-limit threshold. and a secondary-side pulse width and a phase difference therebetween, and this current control unit sets a primary-side DC voltage command upper limit value as a primary-side DC voltage average command value to the AC / DC converter when the secondary-side DC voltage is equal to or greater than an upper-limit threshold, sets a primary-side DC voltage command reference value corrected on the basis of a secondary-side DC voltage reference value and the secondary-side DC voltage as the primary-side DC voltage average command value when the secondary-side DC voltage is equal to or greater than a lower-limit threshold and less than an upper-limit threshold, and sets a primary-side DC voltage command lower limit value as the primary-side DC voltage average command value when the secondary-side DC voltage is less than a lower-limit threshold.

[0011] One aspect of the present invention is a control method for a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, the control method comprising the steps of: outputting a primary-side maximum pulse width and a secondary-side maximum pulse width, and a phase difference thereof, for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter, based on a primary-side DC voltage from the AC / DC converter, when a secondary-side DC voltage is equal to or higher than a threshold; and outputting a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving the secondary-side DC current command value, based on the primary-side DC voltage and the secondary-side DC voltage, when the secondary-side DC voltage is less than the threshold; and setting a primary-side DC voltage command reference value corrected based on the threshold and the secondary-side DC voltage, as a primary-side DC voltage average command value to the AC / DC converter, when the secondary-side DC voltage is less than the threshold;

[0012] One aspect of the present invention is a control method for a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, the method comprising the steps of: outputting a primary-side maximum pulse width and a secondary-side maximum pulse width, and their phase difference, that achieve a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on a primary-side DC voltage from the AC / DC converter when a secondary-side DC voltage is equal to or greater than a lower-limit threshold and less than an upper-limit threshold; and outputting a primary-side pulse width and a secondary-side pulse width, and their phase difference, that achieve the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is less than a lower-limit threshold or equal to or greater than an upper-limit threshold; and a step of setting a primary-side DC voltage command upper limit value as a primary-side DC voltage average command value to the AC / DC converter when the secondary-side DC voltage is equal to or greater than an upper-limit threshold, setting a primary-side DC voltage command reference value corrected based on a secondary-side DC voltage reference value and the secondary-side DC voltage as the primary-side DC voltage average command value when the secondary-side DC voltage is equal to or greater than a lower-limit threshold and less than an upper-limit threshold, and setting a primary-side DC voltage command lower limit value as the primary-side DC voltage average command value when the secondary-side DC voltage is less than a lower-limit threshold.

[0013] According to the present invention, in an SST type power conversion system designed for a load with a large DC voltage fluctuation, an increase in loss can be suppressed without adding any additional circuit even over a wide voltage range.

[0014] (a) Circuit configuration diagram of a 2-series, 4-parallel SST-type power conversion system to which the present invention is applied, (b) Circuit configuration diagram of a 1-series, 8-parallel power conversion system. Circuit configuration diagram of a DAB (Dual Active Bridge) type bidirectional isolated DC / DC converter. Example of DAB operating waveforms. (a) Block configuration diagram of ACDC control, (b) Block configuration diagram of DAB control. Block configuration diagram of DAB current control. (a) Control decision block diagram of embodiment 1 of the present invention, (b) Relationship between DAB control and secondary-side DC voltage and current in embodiment 1. (a) DAB switching frequency calculation block diagram of embodiment 2 of the present invention, (b) Relationship between DAB control and secondary-side DC voltage and current in embodiment 2. (a) Control decision block diagram of embodiment 3 of the present invention, (b) Relationship between DAB control and secondary-side DC voltage and current in embodiment 3.

[0015] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0016] [Embodiment 1] An SST type circuit 1 (hereinafter referred to as SST circuit 1) to which the present invention is applied, shown in FIG. 1, is a circuit that inputs high voltage AC and outputs direct current voltage (hereinafter referred to as DC voltage), and is designed to suppress an increase in loss over a wide voltage range without requiring an additional circuit, assuming a load where the DC voltage fluctuates greatly.

[0017] The SST circuit 1 includes n units 1u each including three phases (m cells per phase) of cells 1c each consisting of a power conversion device having an AC / DC converter 2 and a DAB converter 3. For example, the xth secondary side DC voltage V ｄｃ２ The primary DC voltage of the kth unit connected to ｄｃ１ａｘｋ In this embodiment, the DC bus may be configured by connecting the output DC terminals of the cells 1c in series and parallel.

[0018] The SST circuit 1 enables voltage output while improving efficiency by switching the control modes of the AC / DC converter 2 and the DAB (Dual Active Bridge) bidirectional isolated DC / DC converter 3 (hereinafter referred to as the DAB converter 3) according to the load voltage.

[0019] The number m of cells 1c per phase of the SST circuit 1 is set based on the number of series connections on the output side of the cells 1c, the withstand voltage and capacity of the selected semiconductor device. If the number of series connections is 2, the closest even value to the number of cells selected from the selected device is used, and if the number of series connections is 1, the value is determined from the selected device. The number n of units is defined as n = 3m / number of series connections of the secondary side DC terminals using the number m of cells per phase.

[0020] 2, the cell 1c has an H-bridge AC / DC converter 2 and a DAB converter 3 connected to the secondary side of the AC / DC converter 2. The DAB converter 3 has a transformer turns ratio N ｔｒ = N １ / N ２ It is equipped with a high frequency transformer Tr.

[0021] The DAB converter 3 includes a primary inverter 301 connected to the AC / DC converter 2 on the primary side of a high-frequency transformer Tr, and a secondary inverter 302 connected to the secondary side of the high-frequency transformer Tr. As a driving method for the DAB system in the DAB converter 3, for example, the phase and pulse width control method disclosed in Patent Document 1 is applied. In this control method, as shown in FIG. 3, the primary DC voltage (V ｄｃ１ａｘｋ ) primary pulse width W １ｘｋ and secondary pulse width W ２ｘｋ and its phase difference θ ｘｋ By adjusting the above, power is controlled with high efficiency against DC voltage fluctuations on the primary and secondary sides.

[0022] (AC / DC Converter 2) FIG. 4A shows a block diagram of the ACDC control unit 20 of the AC / DC converter 2 (Non-Patent Document 3, Patent Document 2).

[0023] The ACDC control unit 20 is implemented in the control device 10 of the SST circuit 1 and includes an average voltage control unit 21 , a system current control unit 22 , a dq inverter 23 and an intra-phase balance control unit 24 .

[0024] The average voltage control unit 21 controls the primary side DC voltage V ｄｃ１ａｘｋ That is, the average voltage control unit 21 controls the primary side DC voltage V of each cell to a desired value. ｄｃ１ａｘｋ and the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ is used as the input, and the active component i of the grid current command value (d-axis component) ｄ＿ｒｅｆ Output the active ingredient i ｄ＿ｒｅｆ is output to the grid current control unit 22 together with the grid current command value (q-axis component) (however, the grid current command value (q-axis component) is 0 (reactive component i ｑ＿ｒｅｆ ) In the control of this embodiment, the secondary side DC voltage V ｄｃ２ｘ Based on this, the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ will be changed.

[0025] The system current control unit 22 calculates the effective component i ｄ＿ｒｅｆ and inactive ingredient i ｑ＿ｒｅｆ Control the current of the active ingredient i ｄ＿ｒｅｆ , inactive component i ｑ＿ｒｅｆP control or PI control is performed on the active ingredient V ｄ＿ｒｅｆ , inactive component V ｑ＿ｒｅｆ Output.

[0026] The dq inverse transformer 23 calculates the effective component V ｄ＿ｒｅｆ , inactive component V ｑ＿ｒｅｆ and phase ωt, the value on the rotating coordinate system synchronized with the system voltage is converted to the value on the fixed coordinate system (V ｕ＿ｒｅｆ , V ｖ＿ｒｅｆ , V ｗ＿ｒｅｆ ) to

[0027] The phase balance control unit 24 controls the primary side DC voltage V ｄｃ１ａｘｋ In particular, the phase balance control unit 24 controls the balance of the primary side DC voltage V ｄｃ１ａｘｋ Based on the output signal of the phase balance control, a gate signal for the semiconductor element of the primary inverter 301 in each cell is generated by a method such as triangular wave comparison. As a result, the primary DC voltage V ｄｃ１ Control the average value of

[0028] (DAB Converter 3) FIG. 2B shows a block diagram of the DAB control section 30 of the DAB converter 3. As shown in FIG.

[0029] The DAB control unit 30 is implemented in the control device 10 of the SST circuit 1 and includes a current command generation unit 31, a balance control unit 32, a subtraction unit 33, and a current control unit .

[0030] The current command generating unit 31 outputs a secondary DC current command value by controlling the entire secondary DC voltage value or by controlling the secondary DC current (Non-Patent Document 3, Patent Document 2).

[0031] The balance control unit 32 performs balance control of the secondary DC voltage (see Non-Patent Document 3). Specifically, when the number of series-connected secondary DC terminals is two, the secondary DC voltage V ｄｃ２１ , V ｄｃ２２ This is not necessary if all are connected in parallel. The balance control section 32 balances the secondary DC voltage V ｄｃ２１ , V ｄｃ２２ and a secondary DC voltage V adjusted by P control or PI control based on the difference. ｄｃ２and a voltage regulator 322 that outputs:

[0032] The subtractor 33 calculates the secondary DC current command value i based on the secondary DC current command value from the current command generator 41 and the output value of the balance controller 42. ｄｃ２ｘｋ＿ｒｅｆ Output.

[0033] The current control unit 34 calculates the secondary current command value i ｄｃ２ｘｋ＿ｒｅｆ and the primary side DC voltage V ｄｃ1ａｘｋ and secondary DC voltage V ｄｃ２ｘ is used as input, and the primary pulse width W １ｘｋ and primary pulse width W ２ｘｋ and its phase difference command value θ ｘｋ , switching frequency f ｓｗ＿ＤＡＢ , primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ and generates a DAB gate signal (on / off signal for a semiconductor element) based on Patent Document 3. The drive start signal for generating the gate signal is input from the outside, similar to the gate signal generating unit of Patent Document 3, and can be set at any timing after the power conversion device of this embodiment is able to start operating.

[0034] FIG. 5 is a block diagram of the current control unit 34.

[0035] The current control unit 34 calculates the secondary DC current command value i ｄｃ２ｘｋ＿ｒｅｆ , primary side DC voltage V ｄｃ1ａｘｋ , secondary DC voltage V ｄｃ２ , and the secondary DC voltage V for each series-connected cell 1c when the number of series-connected secondary DC terminals of the cell 1c is two or more ｄｃ２ｘ (When the number of series connections of the secondary DC terminal of cell 1c is 1, V ｄｃ２ ) is used as input.

[0036] Below, we will explain each functional unit of the current control unit 34 (PI control unit 51, phase control unit 52, pulse width and phase control unit 53, control decision unit 54, multiplexer 55, high-pass filter 56, adder 57, and subtractor 58).

[0037] The PI control unit 51 calculates the secondary DC current command value i ｄｃ２ｘｋ＿ｒｅｆ and the secondary side DC current detection value i ｄｃ２ｘｋ The phase difference θ is calculated by P control or PI control based on the differenceｘｋ＿ＰＩ Output.

[0038] The phase control unit 52 calculates the secondary DC current command value i ｄｃ２ｘｋ＿ｒｅｆ In response to this, the primary side DC voltage V ｄｃ１ａｘｋ , secondary DC voltage V ｄｃ２ is a square wave, and the output voltage (primary side DC voltage V ｄｃ１ａｘｋ ) phase difference θ ｘｋ＿ｐｓ Calculate.

[0039] The pulse width and phase control unit 53 calculates the secondary DC current command value i ｄｃ２ｘｋ＿ｒｅｆ In response to this, one or both of the output voltages of each H-bridge is a three-level voltage waveform including a zero voltage period, and the primary side pulse width W of the output voltage １ｘｋ＿ｐｗ and secondary pulse width W ２ｘｋ＿ｐｗ and its phase difference θ ｘｋ＿ｐｓ Calculate.

[0040] The control decision unit 54 determines the secondary DC current command value i ｄｃ２ｘｋ＿ｒｅｆ and the secondary DC voltage V ｄｃ２ Based on this, the control flag PS ｆｌｇ , the DAB switching frequency f ｓｗ＿ＤＡＢ , primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ Output.

[0041] The multiplexer 55 determines the DAB control flag PS ｆｌｇ The primary pulse width W corresponding to the value (1 or 0) １ｘｋ and secondary pulse width W ２ｘｋ and its phase difference θ ｘｋ＿ＦＦ The DAB control flag PS is output. ｆｌｇ The correspondence table is shown in Table 1.

[0042]

[0043] The high-pass filter 56 (hereinafter referred to as HPF 56) is a filter that filters the secondary side DC voltage V ｄｃ２ is used as input, and the vibration component θ of the load side voltage ｘｋ＿ｄｍｐ Only the above is output.

[0044] The adder 57 receives the output of the PI control unit 51 (phase difference θ ｘｋ＿ＰＩ) and the output of the multiplexer 55 (phase difference θ ｘｋ＿ＦＦ ) and take the sum.

[0045] The subtractor 58 takes the difference between the output of the adder 57 and the output of the HPF 56 to suppress the oscillation component of the secondary DC current and to obtain the phase difference command value θ ｘｋ Output.

[0046] 6A shows a block diagram of the control decision unit 54. The control decision unit 54 determines the secondary side DC voltage V ｄｃ２ and threshold V ＰＷＭ＿Ｈ Based on the magnitude relationship between these, the primary side DC voltage command value of the ACDC control unit 20 and the DAB current control mode of the DAB control unit 30 are determined.

[0047] The control decision unit 54 determines the lower limit V of the primary side DC voltage average command value. ｄｃ１＿ａｖｅ＿Ｌ , the reference value V of the primary side DC voltage average command value ｄｃ１＿ａｖｅ＿ｂａｓｅ , secondary side DC voltage reference value V ｄｃ２＿ｂａｓｅ , secondary DC voltage V ｄｃ２ and threshold V ＰＷＭ＿Ｈ is taken as input.

[0048] Below, each functional unit of the control decision unit 54 (multiplication unit 61, divider 62, multiplier 63, limiter 64, hysteresis comparator 65, and switch 66) will be described.

[0049] The multiplication unit 61 calculates the threshold V ＰＷＭ＿Ｈ (Number of series connections of secondary DC terminal of cell 1c N ｓｉ ) / (transformer turns ratio N ｔｒ ) is multiplied.

[0050] The divider 62 calculates the primary side DC voltage average command reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ The output value of the multiplication unit 61 is divided by the

[0051] The multiplier 63 multiplies the output value of the divider 62 by the secondary side DC voltage V ｄｃ２ Multiply by .

[0052] The limiter 64 limits the upper limit of the output value of the multiplier 63 to a voltage or element withstand voltage at which no ripple in the grid current occurs, and limits the lower limit of the output value to a voltage at which overmodulation due to the grid current does not occur.

[0053] The hysteresis comparator 65 has a threshold value V ＰＷＭ＿Ｈ and the secondary DC voltage V ｄｃ２ Depending on the magnitude relationship, the DAB control flag PS ｆｌｇ Determine.

[0054] The switch 66 switches the DAB control flag PS ｆｌｇ Based on the primary side DC voltage command value V ｄｃ１＿ａｖｅ＿ｒｅｆ Switch between.

[0055] (Example of Operation of First Embodiment) A specific example of operation of the first embodiment will be described with reference to FIGS.

[0056] The control device 10 of the SST circuit 1 controls the secondary side DC voltage V ｄｃ２ Based on this, the DAB converter 3 is controlled (hereinafter referred to as DAB control) and the AC / DC converter 2 is controlled (hereinafter referred to as ACDC control). ｄｃ２ Based on the magnitude relationship between the threshold voltage and the voltage range in which the grid current can be used, the DAB control mode and the ACDC control mode are switched as follows:

[0057] DAB control is the secondary side DC voltage V ｄｃ２ Based on this, the following switching is performed between [1] phase control + maximum pulse width control mode and [2] phase + pulse width control mode.

[0058] [1] Phase control + maximum pulse width control mode is the secondary DC voltage V ｄｃ２ is the threshold V ＰＷＭ＿Ｈ When the primary side DC voltage V ｄｃ１ａｘｋ The primary-side maximum pulse width W is set to achieve the desired secondary-side DC current (secondary-side DC current command value) to the DAB converter 3 based on the １ｘｋ＿ｐｗ , Secondary side maximum pulse width W ２ｘｋ＿ｐｗ and its phase difference θ ｘｋ＿ｐｗ Output.

[0059] [2] Phase + pulse width control mode is the secondary DC voltage V ｄｃ２ is the threshold V ＰＷＭ＿Ｈ If the primary DC voltage V ｄｃ１ａｘｋ and secondary DC voltage V ｄｃ２ The primary pulse width W １ｘｋ＿ｐｗ, secondary pulse width W ２ｘｋ＿ｐｗ and its phase difference θ ｘｋ＿ｐｗ Output.

[0060] ACDC control is performed by controlling the secondary side DC voltage V ｄｃ２ Based on the above, the following switching is performed between [3] primary side DC voltage average command value setting mode and [4] primary side DC voltage average command value lower limit value setting mode.

[0061] [3] The primary side DC voltage average command value setting mode is ｄｃ２ is the threshold V ＰＷＭ＿Ｈ If the threshold V ＰＷＭ＿Ｈ and the secondary DC voltage V ｄｃ２ The primary side DC voltage command reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ is the primary side DC voltage average command value V to the AC / DC converter 2. ｄｃ１＿ａｖｅ＿ｒｅｆ Set as.

[0062] [4] The primary side DC voltage average command value lower limit setting mode is ｄｃ２ is the threshold V ＰＷＭ＿Ｈ If the voltage is less than the primary DC voltage command lower limit V ｄｃ１＿ａｖｅ＿Ｌ is the primary side DC voltage average command value V to the AC / DC converter 2. ｄｃ１＿ａｖｅ＿ｒｅｆ Set as.

[0063] A specific example of the operation of the control device 10 (ACDC control unit 20, DAB control unit 30) will be described below.

[0064] First, in the current control section 34 of the DAB control section 30, the PI control section 51 calculates the secondary DC voltage values ​​(secondary DC current command values ​​i ｄｃ２ｘｋ＿ｒｅｆ , secondary side current detection value i ｄｃ２ｘｋ ) is used to calculate the current command value required to balance the two series-connected secondary DC voltages. ｘｋ＿ＰＩ Output.

[0065] The phase control section 52 controls the primary side DC voltage V ｄｃ１ａｘｋ and the secondary side DC current command value i ｄｃ２ｘｋ＿ｒｅｆ is input, the phase difference θ that achieves a predetermined secondary side DC current based on Non-Patent Document 4 ｘｋ＿ｐｓ The pulse width W１ｘｋ＿ｐｓ , W ２ｘｋ＿ｐｓ outputs a value that forms a square wave.

[0066] The pulse width and phase control section 53 controls each primary side DC voltage V ｄｃ１ａｘｋ , secondary DC voltage V ｄｃ２ｘ and the secondary side DC current command value i ｄｃ２ｘｋ＿ｒｅｆ is input, a pulse width W that achieves a desired secondary side DC current based on Patent Document 2 is obtained. １ｘｋ＿ｐｗ , W ２ｘｋ＿ｐｗ and its phase difference θ ｘｋ＿ｐｗ Output.

[0067] The control decision unit 54 determines the secondary DC current command value i ｄｃ２ｘｋ＿ｒｅｆ and the secondary DC voltage value V ｄｃ２ Based on this, the DAB control flag PS ｆｌｇ (Phase control, pulse width and phase control), DAB switching frequency f ｓｗ＿ＤＡＢ , primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ (FIGS. 6(a) and 6(b)).

[0068] The multiplexer 55 receives the phase difference θ ｘｋ＿ｐｓ and pulse width W １ｘｋ＿ｐｓ , W ２ｘｋ＿ｐｓ , the phase difference θ from the pulse width and phase control section 53 ｘｋ＿ｐｗ and pulse width W １ｘｋ＿ｐｗ , W ２ｘｋ＿ｐｗ , the DAB control flag PS from the control decision unit 54 ｆｌｇ Based on this, the primary side pulse width command value W １ｘｋ and the secondary pulse width command value W ２ｘｋ and its phase difference θ ｘｋ＿ＦＦ Determine.

[0069] The adder 57 receives the output of the multiplexer 55 (phase difference θ ｘｋ＿ＦＦ ) and the output of the PI control unit 51 (phase difference θ ｘｋ＿ＰＩ ) to calculate the phase difference that follows the current command value.

[0070] The subtractor 58 subtracts the output of the HPF 56 (the vibration component θ ｘｋ＿ｄｍｐ ) and the output of the adder 57 (phase difference that follows the current command value), a phase difference command value θ that achieves both vibration suppression of the secondary side DC current and command value tracking is obtained. ｘｋOutput.

[0071] The current control unit 34 controls the secondary DC current i ｄｃ２ Since the configuration uses both feedforward control and feedback control, the PI control unit 51 that controls the current does not need to be designed with an excessively large gain.

[0072] In particular, the control decision unit 54 determines the secondary DC voltage V ｄｃ２ｘ and threshold V ＰＷＭ＿Ｈ The ACDC control mode and the DAB control mode are switched depending on the magnitude relationship between the two.

[0073] Threshold V ＰＷＭ＿Ｈ is the primary side DC voltage command lower limit V ｄｃ１＿ａｖｅ＿Ｌ , transformer turns ratio N ｔｒ and the number of series connections of the secondary DC terminals of cell 1c, N ｓｉ Based on this, it is calculated using the following formula (1).

[0074]

[0075] V ＰＷＭ＿Ｈ : Threshold V ｄｃ１＿ａｖｅ＿Ｌ : Primary side DC voltage command lower limit N ｔｒ : Transformer turns ratio N ｓｉ : Number of series connections of secondary side DC terminals of cell 1c (power conversion device)

[0076] The lower limit of the primary DC voltage V ｄｃ１＿ａｖｅ＿Ｌ is set to a voltage value that does not cause overmodulation due to grid current control.

[0077] As shown in FIG. 1B, the control decision unit 54 determines the secondary side DC voltage V ｄｃ２ and threshold V ＰＷＭ＿Ｈ Based on the magnitude relationship between the DAB control flag PS ｆｌｇ and the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ Determine.

[0078] That is, the hysteresis comparator 65 detects the secondary DC voltage V ｄｃ２ ≧ threshold V ＰＷＭ＿Ｈ If it is determined that the DAB current control is [1] phase control + maximum pulse width control mode (PS ｆｌｇ= 1). Then, the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ is set to [3] primary side DC voltage average command value setting mode by the switch 66, and the primary side DC voltage average command reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ Based on this, the following equation (2) is set.

[0079]

[0080] V ｄｃ１＿ａｖｅ＿ｒｅｆ : Primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｂａｓｅ : Primary side DC voltage average command reference value V ＰＷＭ＿Ｈ : Threshold N ｓｉ : Number of series connections of the secondary side DC terminals of cell 1c (power conversion device) N ｔｒ : Transformer turns ratio V ｄｃ２ : Secondary DC voltage

[0081] However, when the load suddenly changes, the secondary DC voltage V ｄｃ２ is the primary side DC voltage average command value V when overshoot or undershoot occurs. ｄｃ１＿ａｖｅ＿ｒｅｆ is the lower limit V ｄｃ１＿ａｖｅ＿Ｌ The limiter 64 limits the voltage so that it does not become lower than the voltage limit of the semiconductor element, and also takes surges into consideration so that it does not become higher than the voltage limit of the semiconductor element.

[0082] On the other hand, the secondary DC voltage V ｄｃ２ <threshold V ＰＷＭ＿Ｈ If it is determined that the DAB control is [2] phase control + pulse width control mode (PS ｆｌｇ = 0). Then, the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ is set to the [4] primary side DC voltage average command value lower limit value setting mode by the switch 66, and the lower limit value V ｄｃ１＿ａｖｅ＿Ｌ The secondary DC voltage V ｄｃ２ is the threshold V ＰＷＭ＿Ｈ Hysteresis is provided to prevent control chatter when nearing the limit.

[0083] According to the first embodiment described above, the highest efficiency is achieved under the conditions of maximum voltage and maximum current, and therefore the rated power is advantageous in specifications with maximum voltage and maximum current. In particular, since high efficiency is achieved over a wide voltage range, an additional step-up or step-down circuit is not required, which prevents the device from becoming larger and increasing its size and cost. Furthermore, since the efficiency can be increased in the high voltage and high current range, the cooler can be made smaller in a device with a specification where the rated power is the maximum voltage and maximum current.

[0084] Second Embodiment The control decision unit 54 of the second embodiment is the same as the control decision unit 54 of the first embodiment, but further includes a switching frequency calculation unit 70 shown in FIG.

[0085] The switching frequency calculation unit 70 calculates the secondary side DC voltage V ｄｃ２ is the threshold V ＰＷＭ＿Ｈ If the switching frequency f ｓｗ＿ＤＡＢ The command value of the secondary DC voltage V is set to the reference value. ｄｃ２ is the threshold V ＰＷＭ＿Ｈ If the secondary DC voltage V ｄｃ２ Switching frequency f based on ｓｗ＿ＤＡＢ Set the command value.

[0086] FIG. 7A shows the block configuration of the switching frequency calculation unit 70, and FIG. 7B shows the relationship between DAB control and the secondary side DC voltage and current in the second embodiment.

[0087] The switching frequency calculation unit 70 calculates the reference switching frequency f ｓｗ＿ｂａｓｅ In response to this, the secondary DC voltage V ｄｃ２ and threshold V ＰＷＭ＿Ｈ Based on the magnitude relationship between the primary side DC voltage command value V ｄｃ１＿ａｖｅ＿ｒｅｆ and the switching frequency f of the DAB current control ｓｗ＿ＤＡＢ Determine.

[0088] Hereinafter, each functional unit (divider 71, multiplier 72, limiter 73, and switch 74) of the switching frequency calculation unit 70 will be described.

[0089] The divider 71 calculates the secondary DC voltage V ｄｃ２ The secondary DC voltage reference value Vｄｃ２＿ｂａｓｅ Divide by .

[0090] The multiplier 72 multiplies the reference switching frequency f ｓｗ＿ｂａｓｅ is multiplied by the output value of the divider 71.

[0091] The limiter 73 sets upper and lower limits for the switching frequency output from the multiplier 72. The upper limit is determined based on the maximum drive frequency of the gate driver of the semiconductor element and the allowable loss value, and the lower limit is determined based on the stable region of DCDC control.

[0092] The switch 74 is connected to the secondary side DC voltage V ｄｃ２ and threshold V ＰＷＭ＿Ｈ DAB control flag PS according to the magnitude relationship with ｆｌｇ Based on this, the switching frequency f of the DAB circuit ｓｗ＿ＤＡＢ Determine the command value.

[0093] A specific example of the operation of the second embodiment will be described with reference to the same figure.

[0094] In this embodiment, as shown in FIG. 1(b), the secondary DC voltage V ｄｃ２ <threshold V ＰＷＭ＿Ｈ In the region (a), phase control, pulse width control and switching frequency control are added to the DAB current control of the first embodiment.

[0095] DAB current control is the primary and secondary DC voltage and high frequency inductance L １ The maximum current is determined by the impedance of the high frequency inductance L １ If the impedance is large, it may not be possible to drive the inverter at the rated current when the voltage drops.

[0096] Therefore, in the second embodiment, when the voltage drops, the switching frequency calculation unit 70 calculates the switching frequency f ｓｗ＿ＤＡＢ By controlling the value to be low, the loss of the DAB current control is reduced, and the lower limit of the voltage at which the rated current operation is possible is expanded.

[0097] The control block of the switching frequency calculation unit 70 in FIG. 1(a) is a DAB control flag PS ｆｌｇ The switching frequency f of the DAB converter 3 is ｓｗ＿ＤＡＢThe command value is controlled.

[0098] That is, the hysteresis comparator 65 detects the secondary DC voltage V ｄｃ２ ≧ threshold V ＰＷＭ＿Ｈ If it is determined that the DAB control flag PS ｆｌｇ = 1 (phase control + maximum pulse width control). At this time, the DAB control is set to [1] phase control + maximum pulse width control mode, and the ACDC control is set to [3] primary side DC voltage average command value setting mode of the first embodiment. Then, the switching frequency f ｓｗ＿ＤＡＢ The command value is the reference value f ｓｗ＿ｂａｓｅ is set to

[0099] On the other hand, the secondary DC voltage V ｄｃ２ <threshold V ＰＷＭ＿Ｈ If it is determined that the DAB control flag PS ｆｌｇ = 0 (phase control + pulse width control). At this time, the DAB control switches to the [2] phase + pulse width control mode, and the ACDC control switches to the [4] primary side DC voltage average command value lower limit value setting mode of the first embodiment. Then, the switching frequency f ｓｗ＿ＤＡＢ The command value is the secondary DC voltage V ｄｃ２ is controlled by the following equation (3) based on the above.

[0100]

[0101] f ｓｗ＿ＤＡＢ : Switching frequency V ｄｃ２ : Secondary DC voltage V ｄｃ２＿ｂａｓｅ : Secondary DC voltage reference value f ｓｗ＿ｂａｓｅ : Switching frequency reference value

[0102] According to the second embodiment described above, by adding control of the switching frequency of the DAB converter 3 to the first embodiment, the parameter tolerance range of the high-frequency transformer Tr of the DAB converter 3 is widened, and the design of the winding structure of the high-frequency transformer Tr is made easier.

[0103] Third Embodiment A current control unit 34 of a third embodiment includes a control decision unit 80 shown in FIG. 8 instead of the control decision unit 54 of FIG. 6 (first embodiment).

[0104] FIG. 8A shows a block diagram of the control decision unit 80 of the third embodiment, and FIG. 8B shows the relationship between the DAB control of this embodiment and the secondary side DC voltage and current.

[0105] The control decision unit 80 determines the primary side DC voltage command upper limit value V ｄｃ１＿ａｖｅ＿Ｈ , primary side DC voltage command lower limit value V ｄｃ１＿ａｖｅ＿Ｌ , primary side DC voltage command value reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ , secondary side DC voltage reference value V ｄｃ２＿ｂａｓｅ , secondary DC voltage V ｄｃ２ and the upper threshold V for DAB control switching ＰＷＭ＿Ｈ , lower threshold V ＰＷＭ＿Ｌ Based on this, the primary side DC voltage command value V ｄｃ１＿ａｖｅ＿ｒｅｆ and outputs the secondary DC voltage V ｄｃ２ and its upper threshold V ＰＷＭ＿Ｈ , lower threshold V ＰＷＭ＿Ｌ Based on the magnitude relationship between the DAB control mode and the ACDC control mode, the DAB control mode and the ACDC control mode are switched as follows:

[0106] DAB control is the secondary side DC voltage V ｄｃ２ Based on this, the following switching is performed between [1] phase control + maximum pulse width control mode and [2] phase and pulse width control mode.

[0107] [1] Phase control and maximum pulse width control modes are performed using the secondary DC voltage V ｄｃ２ is the lower threshold V ＰＷＭ＿Ｌ and the upper threshold V ＰＷＭ＿Ｈ When the primary DC voltage V from the AC / DC converter 2 is less than ｄｃ１ａｘｋ The maximum primary pulse width W that achieves the desired secondary DC current (secondary DC current command value) to the DAB converter 3 based on １ｘｋ＿ｐｗ , Secondary side maximum pulse width W ２ｘｋ＿ｐｗ and its phase difference θ ｘｋ＿ｐｗ Output.

[0108] [2] Phase and pulse width control mode is the secondary DC voltage V ｄｃ２ is the lower threshold V ＰＷＭ＿Ｌ Less than or upper threshold V ＰＷＭ＿Ｈ If the primary DC voltage V ｄｃ１ａｘｋ and secondary DC voltage V ｄｃ２The primary pulse width W １ｘｋ＿ｐｗ , secondary pulse width W ２ｘｋ＿ｐｗ and its phase difference θ ｘｋ＿ｐｗ Output.

[0109] ACDC control is performed by controlling the secondary side DC voltage V ｄｃ２ Based on the above, the following (3) primary side DC voltage average command upper limit value setting mode, (4) primary side DC voltage average reference value setting mode, and (5) primary side DC voltage average command lower limit value setting mode are switched.

[0110] [3] The primary side DC voltage average command upper limit setting mode is ｄｃ２ is the upper threshold V ＰＷＭ＿Ｈ If the value is equal to or greater than the primary side DC voltage command upper limit value V ｄｃ１＿ａｖｅ＿Ｈ is the primary side DC voltage average command value V to the AC / DC converter 2. ｄｃ１＿ａｖｅ＿ｒｅｆ Set as.

[0111] [4] The primary side DC voltage average reference value setting mode is ｄｃ２ is the lower threshold V ＰＷＭ＿Ｌ and the upper threshold V ＰＷＭ＿Ｈ If the secondary DC voltage reference value V ｄｃ２＿ｂａｓｅ and the secondary DC voltage V ｄｃ２ The primary side DC voltage command reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ is the primary side DC voltage average command value V to the AC / DC converter 2. ｄｃ１＿ａｖｅ＿ｒｅｆ Set as.

[0112] [5] The primary side DC voltage average command lower limit value setting mode is ｄｃ２ is the lower threshold V ＰＷＭ＿Ｌ If the voltage is less than the primary DC voltage command lower limit V ｄｃ１＿ａｖｅ＿Ｌ is the primary side DC voltage average command value V to the AC / DC converter 2. ｄｃ１＿ａｖｅ＿ｒｅｆ Set as.

[0113] Below, we will explain each functional unit of the control decision unit 80 (multiplication unit 81, division unit 82, multiplication unit 83, limiter 84, upper limit hysteresis comparator 85, lower limit hysteresis comparator 86, first switch 87, second switch 88 and NOR unit 89).

[0114] The multiplication unit 81 calculates the secondary side DC voltage reference value V ｄｃ２＿ｂａｓｅ (transformer turns ratio N ｔｒ ) / (Number of series connections of secondary side DC terminals of cell 1c (power conversion device) N ｓｉ ) is multiplied.

[0115] The division unit 82 calculates the primary side DC voltage command reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ The output value of the multiplication unit 81 is divided by the

[0116] The multiplication unit 83 multiplies the output value of the division unit 82 by the secondary side DC voltage V ｄｃ２ Multiply by.

[0117] The limiter 84 limits the upper and lower limits of the output value of the multiplication unit 83, as in the first embodiment.

[0118] The upper limit hysteresis comparator 85 detects the secondary DC voltage V ｄｃ２ and the upper threshold V ＰＷＭ＿Ｈ The DAB control upper limit flag PS ｆｌｇ＿Ｈ Determine.

[0119] The lower limit hysteresis comparator 86 detects the secondary DC voltage V ｄｃ２ and the lower threshold V ＰＷＭ＿Ｌ The DAB control lower limit flag PS ｆｌｇ＿Ｌ Determine.

[0120] The first switch 87 switches the determined DAB control upper limit flag PS ｆｌｇ＿Ｈ Based on the primary side DC voltage command upper limit value V ｄｃ１＿ａｖｅ＿Ｈ , primary side DC voltage command value reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ , primary side DC voltage command lower limit value V ｄｃ１＿ａｖｅ＿Ｌ Switch to one of the following.

[0121] The second switch 88 switches the determined DAB control flag PS ｆｌｇ＿Ｌ Based on the primary side DC voltage command lower limit value V ｄｃ１＿ａｖｅ＿Ｌ or the primary side DC voltage command upper limit value V ｄｃ１＿ａｖｅ＿Ｈ or the primary side DC voltage command reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ Switch to.

[0122] The NOR unit 89 calculates the DAB control upper limit flag PSｆｌｇ＿Ｈ and DAB control lower limit flag PS ｆｌｇ＿Ｌ If there is no determination, the DAB control flag PS ｆｌｇ Output.

[0123] A specific example of the operation of the third embodiment will be described with reference to the same figure.

[0124] The upper limit hysteresis comparator 85 and the lower limit hysteresis comparator 86 are connected to the secondary side DC voltage V ｄｃ２ and two upper thresholds V ＰＷＭ＿Ｈ , lower threshold V ＰＷＭ＿Ｌ ACDC control and DAB control are switched depending on the magnitude relationship between them.

[0125] Upper threshold V ＰＷＭ＿Ｈ , lower threshold V ＰＷＭ＿Ｌ is the primary side DC voltage V ｄｃ１ The upper limit value V ｄｃ１＿ａｖｅ＿Ｈ and the lower limit V ｄｃ１＿ａｖｅ＿Ｌ , transformer turns ratio N ｔｒ and the number N of series connections of the secondary side DC terminals of the cell 1c (power conversion device) ｓｉ Based on this, it is calculated using the following equations (4) and (5).

[0126]

[0127] V ＰＷＭ＿Ｈ : Upper threshold V ｄｃ１＿ａｖｅ＿Ｈ : Primary side DC voltage V ｄｃ１ Upper limit of N ｓｉ : Number of series connections of the secondary side DC terminals of cell 1c (power conversion device) N ｔｒ : Transformer turns ratio

[0128]

[0129] V ＰＷＭ＿Ｌ : Lower threshold V ｄｃ１＿ａｖｅ＿Ｌ : Primary side DC voltage V ｄｃ１ Lower limit of N ｓｉ : Number of series connections of the secondary side DC terminals of cell 1c (power conversion device) N ｔｒ : Transformer turns ratio

[0130] Primary side DC voltage V ｄｃ１ The lower limit V ｄｃ１＿ａｖｅ＿Ｌis set to a voltage value at which overmodulation does not occur due to system current control, and the primary side DC voltage V ｄｃ１ The upper limit value V ｄｃ１＿ａｖｅ＿Ｈ is set to a voltage value that is below the breakdown voltage of the semiconductor element, taking surges into consideration.

[0131] As shown in (a) and (b) of the figure, the secondary DC voltage V ｄｃ２ and two thresholds V ＰＷＭ＿Ｈ , V ＰＷＭ＿Ｌ By comparing the DAB control flag PS ｆｌｇ and the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ is determined.

[0132] That is, the upper limit hysteresis comparator 85 detects the secondary DC voltage V ｄｃ２ ≧Upper threshold V ＰＷＭ＿Ｈ If it is determined that the DAB signal is ｆｌｇ＿Ｈ = 1, PS ｆｌｇ＿Ｌ = 0). Then, the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ The first switch 87 switches to [3] primary side DC voltage average command upper limit value setting mode, and the primary side DC voltage command upper limit value V ｄｃ１＿ａｖｅ＿Ｈ is set to

[0133] On the other hand, the upper limit hysteresis comparator 85 and the lower limit hysteresis comparator 86 determine the lower limit threshold V ＰＷＭ＿Ｌ ≦Secondary DC voltage V ｄｃ２ <Upper threshold V ＰＷＭ＿Ｈ If it is determined that the DAB signal is ｆｌｇ＿Ｈ = 0, PS ｆｌｇ＿Ｌ = 0). Then, the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ is switched to (4) primary side DC voltage average reference value setting mode by the first switch 87, and the primary side DC voltage average command reference value V ｄｃ１＿ａｖｅ＿ｂａｓｅ Based on this, the following equation (6) is set.

[0134]

[0135] V ｄｃ１＿ａｖｅ＿ｒｅｆ : Primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｂａｓｅ: Primary side DC voltage average command reference value V ｄｃ２＿ｂａｓｅ : Reference value of secondary DC voltage N ｔｒ : Transformer turns ratio N ｓｉ : Number of series connections of the secondary side DC terminal of cell 1c (power conversion device) V ｄｃ２ : Secondary DC voltage

[0136] Secondary side DC voltage reference value V ｄｃ２＿ｂａｓｅ is the secondary DC voltage V ｄｃ２ is the reference value of the secondary DC voltage V that is the desired maximum efficiency condition. ｄｃ２ Set to.

[0137] In addition, the lower limit hysteresis comparator 86 detects the secondary DC voltage V ｄｃ２ <threshold V ＰＷＭ＿Ｌ If it is determined that the DAB control is (1) phase control + pulse width control mode (PS ｆｌｇ＿Ｈ = 0, PS ｆｌｇ＿Ｌ = 1). Then, the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ is switched to (5) primary side DC voltage average command lower limit value setting mode by the second switch 88, and the primary side DC voltage average command value V ｄｃ１＿ａｖｅ＿ｒｅｆ is the primary side DC voltage command lower limit V ｄｃ１＿ａｖｅ＿Ｌ is set to

[0138] The DAB system uses a secondary DC voltage reference value V ｄｃ２＿ｂａｓｅ to the secondary DC voltage V ｄｃ２ As the temperature changes, the efficiency decreases. Therefore, in this embodiment, when driven at maximum current under high voltage conditions, the loss increases compared to low voltage conditions, and the cooling equipment becomes larger. This embodiment is advantageous for devices that operate at constant power (CP) in the high voltage range.

[0139] According to the third embodiment, the secondary DC voltage reference value V ｄｃ２＿ｂａｓｅSince the range of change is the smallest with respect to the maximum and minimum voltages, the efficiency drop at maximum and minimum voltages is small. However, since losses are large in the high voltage and large current range, a high efficiency improvement effect can be expected in specifications that operate at constant power, limiting the current in the high voltage range. Furthermore, compared to other embodiments, the minimum value of the pulse width in this embodiment is larger because it is proportional to the difference between the reference value and the maximum and minimum voltages. Therefore, this embodiment can be implemented using an inexpensive controller with a low clock frequency (poor resolution).

[0140] 1...SST circuit, 1c...cell (power conversion device), 1u...unit 2...AC / DC converter 3...bidirectional isolated DC / DC converter, 301...primary side inverter, 302...primary side inverter Tr...transformer 10...control device 20...AC / DC control unit, 21...average voltage control unit, 22...system current control unit, 23...dq inverter, 24...intra-phase balance control unit 30...DAB control unit, 31...current command generation unit, 32...balance control unit, 33...adder unit, 34...current control unit, 51...PI control unit, 52...phase control unit, 53...pulse width and phase control unit, 54...control decision unit, 55...multiplexer, 56...high-pass filter, 57...adder, 58...subtractor 61...multiplier unit, 62...divider, 63...multiplier, 64...limiter, 65...hysteresis comparator, 66...switching unit 70...Switching frequency calculation unit, 71...Divider, 72...Multiplier, 73...Limiter, 74...Switcher 80...Control determination unit, 81...Multiplication unit, 82...Divider unit, 83...Multiplication unit, 84...Limiter, 85...Upper limit hysteresis comparator, 86...Lower limit hysteresis comparator, 87...First switch, 88...Second switch, 89...NOR unit

Claims

1. A power conversion device equipped with a bidirectional isolated DC / DC converter connected to an AC / DC converter, comprising a current control unit that outputs a primary-side maximum pulse width and a secondary-side maximum pulse width, and their phase difference, that achieve a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on the primary-side DC voltage from the AC / DC converter when the secondary-side DC voltage is equal to or higher than a threshold, and outputs a primary-side pulse width and a secondary-side pulse width, and their phase difference, that achieve the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is lower than the threshold; the current control unit sets a primary side DC voltage command reference value corrected based on the threshold value and the secondary side DC voltage as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or higher than the threshold value, and sets a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than the threshold value.

2. The power conversion device according to claim 1, further comprising a switching frequency calculation unit, wherein the control determination unit sets a command value for the switching frequency of the bidirectional isolated DC / DC converter to a reference value when the secondary side DC voltage is equal to or greater than the threshold value, and sets the command value based on the secondary side DC voltage when the secondary side DC voltage is less than the threshold value.

3. A power conversion device equipped with a bidirectional isolated DC / DC converter connected to an AC / DC converter, comprising a current control unit that outputs a primary-side maximum pulse width and a secondary-side maximum pulse width, and their phase difference, for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on the primary-side DC voltage from the AC / DC converter when the secondary-side DC voltage is equal to or greater than a lower threshold and less than an upper threshold, and outputs a primary-side pulse width and a secondary-side pulse width, and their phase difference, for achieving the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is less than a lower threshold or equal to or greater than an upper threshold; the current control unit sets a primary side DC voltage command upper limit value as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or greater than an upper limit threshold, sets a primary side DC voltage command reference value corrected on the basis of a secondary side DC voltage reference value and the secondary side DC voltage as the primary side DC voltage average command value when the secondary side DC voltage is equal to or greater than a lower limit threshold and less than an upper limit threshold, and sets a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than a lower limit threshold.

4. The power conversion device according to claim 1, wherein the threshold value is expressed by the following formula (1): V ＰＷＭ＿Ｈ : Threshold V ｄｃ１＿ａｖｅ＿Ｌ : Lower limit of primary DC voltage N ｓｉ : Number of series connections of the DC terminals on the secondary side of the power converter N ｔｒ : Transformer turns ratio of bidirectional isolated DC / DC converter 5. The power conversion device according to claim 2, wherein the switching frequency set based on the secondary side DC voltage is expressed by the following equation (3): f ｓｗ＿ＤＡＢ : Switching frequency V ｄｃ２ : Secondary DC voltage V ｄｃ２＿ｂａｓｅ : Secondary DC voltage reference value f ｓｗ＿ｂａｓｅ : Switching frequency reference value 6. The power conversion device according to claim 3, wherein the upper limit threshold is expressed by the following formula (4), and the lower limit threshold is expressed by the following formula (5). V ＰＷＭ＿Ｈ : Upper threshold V ｄｃ１＿ａｖｅ＿Ｈ : Upper limit of primary DC voltage N ｓｉ : Number of series connections of the DC terminals on the secondary side of the power converter N ｔｒ : Transformer turns ratio of bidirectional isolated DC / DC converter V ＰＷＭ＿Ｌ : Lower threshold V ｄｃ１＿ａｖｅ＿Ｌ : Lower limit of primary DC voltage N ｔｒ : Transformer turns ratio of bidirectional isolated DC / DC converter N ｓｉ : Number of series connections of the DC terminals on the secondary side of the power converter 7. A control method for a power conversion device having a bidirectional isolated DC / DC converter connected to an AC / DC converter, comprising a current control process for outputting a primary-side maximum pulse width and a secondary-side maximum pulse width, and their phase difference, that achieve a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on the primary-side DC voltage from the AC / DC converter when the secondary-side DC voltage is equal to or higher than a threshold, and for outputting a primary-side pulse width and a secondary-side pulse width, and their phase difference, that achieve the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is lower than the threshold, the current control step further comprises a control decision step of setting a primary side DC voltage command reference value corrected based on the threshold value and the secondary side DC voltage as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or greater than the threshold value, and setting a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than the threshold value.

8. A control method for a power conversion device having a bidirectional isolated DC / DC converter connected to an AC / DC converter, comprising a current control process for outputting a primary-side maximum pulse width and a secondary-side maximum pulse width, and their phase difference, that achieve a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on the primary-side DC voltage from the AC / DC converter when the secondary-side DC voltage is equal to or greater than a lower threshold and less than an upper threshold, and for outputting a primary-side pulse width and a secondary-side pulse width, and their phase difference, that achieve the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is less than a lower threshold or equal to or greater than an upper threshold, the current control step further comprises a control decision step of setting a primary side DC voltage command upper limit value as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or greater than an upper limit threshold, setting a primary side DC voltage command reference value corrected based on a secondary side DC voltage reference value and the secondary side DC voltage as the primary side DC voltage average command value when the secondary side DC voltage is equal to or greater than a lower limit threshold and less than an upper limit value, and setting a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than a lower limit threshold.

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