Radio frequency bias tee and design method therefor

Abstract

The present invention relates to a radio frequency (RF) bias tee for superimposing a direct current signal on a RF signal, comprising: a dielectric layer; a first transmission line disposed on one surface of the dielectric layer so as to receive the RF signal; a second transmission line disposed on the other surface of the dielectric layer so as to receive the direct current signal; and a third transmission line which is vertically connected to the second transmission line so as to receive the direct current signal, and which is coupled to the first transmission line so as to receive the RF signal, thereby superimposing the RF signal and the direct current signal. Therefore, capacitance and inductance can be implemented without using an inductor and a capacitor, which are separate passive elements, thereby enabling the RF bias tee to be compact.

Description

High-frequency bias-tee and its design method

[0001] The present invention relates to a high-frequency bias-tee capable of miniaturization and a design method thereof.

[0002] While radio frequency (RF) circuits primarily use alternating current (AC) signals, devices with active components, such as amplifiers, sometimes require a direct current (DC) power source for bias. To address this, a bias-tee structure emerged, exploiting the impedance difference between RF and DC signals to superimpose a DC signal onto the RF signal.

[0003] These bias-tee's require sufficient capacitance and inductance to improve isolation between high-frequency and DC lines and minimize insertion loss between high-frequency lines and overlapping lines in a limited space.

[0004] Through this, the bias tee places high capacitance on the high-frequency transmission line and high inductance on the DC transmission line, so that the impedance characteristics of the high-frequency transmission line do not change due to the DC line, and direct current is applied.

[0005] However, there are difficulties in implementing high capacitance and inductance in a limited space, and to solve this, commercially commonly used bias-0-T multilayer ceramic chip elements, multilayer ceramic capacitors and inductors, are implemented using surface mount technology to implement high capacitance and inductance.

[0006] However, multilayer ceramic chip elements may have disadvantages such as temperature-dependent property changes, additional manufacturing processes, and cross-talk due to mutual coupling, which may adversely affect temperature- and cross-talk-sensitive quantum computing technologies and aerospace fields.

[0007] Of course, there is also a method to compensate for the shortcomings of the device by utilizing a bias tee that utilizes coupling between coupler lines based on a single-layer PCB (Printed Circuit Board) in order to avoid using a multilayer ceramic device.

[0008] However, due to the limitations of the structure that implements capacitance through coupling between coupler lines on the same plane, it has a great impact on the performance of the process equipment, and there are many limitations in various structures because all transmission lines of the bias-tee must be placed on a single plane.

[0009] Therefore, a bias-T is needed that can implement capacitance and inductance without using laminated ceramic elements, based on a double-sided PCB.

[0010] The present invention has been devised to solve the above problems, and the purpose of the present invention is to provide a high-frequency bias-T and a design method thereof that implement capacitance and inductance without using separate passive components such as inductors and capacitors.

[0011] According to one embodiment of the present invention for achieving the above object, a high frequency bias-T is provided, which relates to a high frequency bias-T for superimposing a direct current signal on a high frequency (RF) signal, comprising: a dielectric layer; a first transmission line disposed on one surface of the dielectric layer to receive the high frequency signal; a second transmission line disposed on the other surface of the dielectric layer to receive the direct current signal; and a third transmission line vertically connected to the second transmission line to receive the direct current signal, coupled with the first transmission line to receive the high frequency signal, and superimposing the high frequency signal and the direct current signal.

[0012] And the first transmission line and the third transmission line can be arranged so that the areas in contact with the dielectric layer overlap each other in the length direction.

[0013] Additionally, the first transmission line and the third transmission line can be arranged so that the overlapping area is adjusted according to the coupling strength of the high-frequency signal.

[0014] And the high-frequency bias-T may further include a meta-structure that blocks the high-frequency signal flowing in the third transmission line from flowing into the second transmission line.

[0015] Additionally, the metastructure may be an inductor disposed adjacent to the second transmission line on the same plane as the second transmission line or disposed on the second transmission line.

[0016] And the metastructure may be arranged to be spaced apart from the third transmission line in the direction of the second transmission line by a distance corresponding to a certain ratio of the frequency of the high-frequency signal flowing in the third transmission line.

[0017] Additionally, the metastructure may be provided with at least one of a slot, a Split Ring Resonator (SRR), a Complementary Split Ring Resonator (CSRR), and a Defected Ground Structure (DGS).

[0018] Meanwhile, a design method according to an embodiment of the present invention for achieving the above object includes a step of providing a dielectric layer in a design method of the high-frequency bias-tee; a step of arranging a first transmission line for receiving a high-frequency signal on one surface of the dielectric layer; a step of arranging a second transmission line for receiving a direct current signal on the other surface of the dielectric layer; and a step of arranging a third transmission line for receiving the second direct current signal, coupling with the first transmission line to receive the high-frequency signal, and superimposing the high-frequency signal and the direct current signal, and connecting the third transmission line vertically to the second transmission line.

[0019] And in the step of arranging the first transmission line and the third transmission line, the first transmission line and the third transmission line can be arranged so that the areas in contact with the dielectric layer overlap each other in the length direction.

[0020] In addition, in the step of arranging the first transmission line and the third transmission line, the first transmission line and the third transmission line can be arranged so that the overlapping area is controlled according to the coupling strength of the high-frequency signal.

[0021]

[0022] *And the above design method may further include a step of arranging a metastructure that blocks the high-frequency signal flowing in the third transmission line from flowing into the second transmission line.

[0023] Additionally, the metastructure may be an inductor disposed adjacent to the second transmission line on the same plane as the second transmission line or disposed on the second transmission line.

[0024] And the metastructure may be arranged to be spaced apart from the third transmission line in the direction of the second transmission line by a distance corresponding to a certain ratio of the frequency of the high-frequency signal flowing in the third transmission line.

[0025] Additionally, the metastructure may be provided with at least one of a slot, a Split Ring Resonator (SRR), a Complementary Split Ring Resonator (CSRR), and a Defected Ground Structure (DGS).

[0026] According to one aspect of the present invention described above, by providing a high-frequency bias-T and a design method thereof, capacitance and inductance can be implemented without using separate passive components such as inductors and capacitors, thereby miniaturizing the device.

[0027] Figure 1 is a schematic diagram for explaining the structure of the high-frequency bias-T of the present invention.

[0028] Figure 2 is a cross-sectional view illustrating the high-frequency bias-T of the present invention.

[0029] Figure 3 is a plan view for explaining the high-frequency bias-T of the present invention.

[0030] FIG. 4 is a drawing for explaining the arrangement relationship between the first transmission line and the third transmission line of the high-frequency bias-T of the present invention.

[0031] Figure 5 is a bottom view for explaining the high frequency bias-T of the present invention.

[0032] FIG. 6 is a drawing for explaining the arrangement relationship between the second transmission line and the third transmission line of the high-frequency bias-T of the present invention.

[0033] FIG. 7 is a cross-sectional side view illustrating a high-frequency bias-T according to one embodiment of the present invention;

[0034] FIG. 8 is a plan view illustrating a high-frequency bias-T according to one embodiment of the present invention;

[0035] FIG. 9 is a bottom view illustrating a high-frequency bias-T according to one embodiment of the present invention;

[0036] Fig. 10 is a graph showing the results of an experiment on the transmission of a high-frequency signal and the blocking effect of a direct current signal in the high-frequency bias-T shown in Figs. 7 to 9.

[0037] Fig. 11 is a graph showing the results of an experiment on the transmission and blocking effect of a DC signal in the high-frequency bias-T shown in Figs. 7 to 9.

[0038] Figures 12 to 17 are drawings for explaining a case where a ground plane is selectively provided according to the structure of a transmission line arranged in a high-frequency bias-T of the present invention.

[0039] FIGS. 18 to 21 are drawings for explaining various embodiments of metastructures arranged in a high-frequency bias-T of the present invention, and

[0040] FIG. 22 is a flowchart illustrating a design method of a high-frequency bias-T according to one embodiment of the present invention.

[0041] The following detailed description of the present invention refers to the accompanying drawings, which illustrate specific embodiments in which the present invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present invention. It should be understood that the various embodiments of the present invention, while different from each other, are not necessarily mutually exclusive. For example, specific shapes, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the present invention. Furthermore, it should be understood that the positions or arrangements of individual components within each disclosed embodiment may be modified without departing from the spirit and scope of the present invention. Accordingly, the following detailed description is not intended to be limiting, and the scope of the present invention is defined only by the appended claims, along with the full scope of equivalents to which such claims are entitled, if properly described. Like reference numerals in the drawings designate the same or similar functionality throughout the several aspects.

[0042] The components according to the present invention are defined by functional distinctions rather than physical distinctions, and can be defined by the functions each component performs. Each component may be implemented as hardware or program code and processing units that perform each function, and the functions of two or more components may be implemented by including them in a single component. Therefore, the names given to the components in the following embodiments are not intended to physically distinguish each component, but rather to suggest the representative functions performed by each component. It should be noted that the technical spirit of the present invention is not limited by the names of the components.

[0043] Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the drawings.

[0044] Figure 1 is a schematic diagram for explaining the structure of a high-frequency bias-T (100) of the present invention.

[0045] A high-frequency bias-T (100, hereinafter referred to as bias-T) according to this embodiment is provided to superimpose a DC signal onto a high-frequency (RF) signal.

[0046] In particular, the bias-T (100) according to the present embodiment can be provided to secure direct current blocking and capacitance in a dual plane using a strip line transition method and to secure sufficient inductance using a metastructure.

[0047] To this end, the bias-T (100) according to the present embodiment includes a dielectric layer (110), a first transmission line (120), a second transmission line (130), a third transmission line (140), and a metastructure (150) as illustrated in FIG. 1.

[0048] Below, each component constituting the bias-T (100) is briefly described, and will be described in more detail in FIGS. 2 to 22.

[0049] The dielectric layer (110) according to the present embodiment is a layer including a dielectric and can be provided as a double-sided PCB.

[0050] The first transmission line (120) is arranged on one surface of the dielectric layer (110) and can receive a high-frequency signal. To this end, the first transmission line (120) can be connected to the first port (P1) that applies the RF signal as illustrated in FIG. 8.

[0051] The second transmission line (130) according to the present embodiment is arranged on the other side of the dielectric layer (110) to receive a direct current signal. To this end, the second transmission line (130) can be connected to the second port (P2) receiving the direct current signal as illustrated in FIG. 9.

[0052] Additionally, the second transmission line (130) can be vertically branched from a part of the third transmission line (140) and connected to the third transmission line (140).

[0053] Meanwhile, the third transmission line (140) according to the present embodiment may be provided to superimpose a high-frequency signal and a direct current signal.

[0054] For this purpose, the third transmission line (140) is vertically connected to the second transmission line (130) and can receive a direct current signal from the second transmission line (130).

[0055] And the third transmission line (140) is coupled with the first transmission line (120) and can receive a high-frequency signal from the first transmission line (120).

[0056] Additionally, the third transmission line (140) can be connected to the third port (P3) illustrated in FIG. 9, which outputs a signal that superimposes a high-frequency signal and a DC signal.

[0057] Therefore, the third transmission line (140) can transmit an RF+DC signal, which is a signal that superimposes a high-frequency signal and a DC signal, to the third port (P3).

[0058] Meanwhile, the metastructure (150) according to the present embodiment can be provided to block a high-frequency signal flowing in the third transmission line (140) from flowing into the second transmission line (130).

[0059] This metastructure (150) may be an inductor placed on the second transmission line (130) as shown in FIG. 2, or placed adjacent to the second transmission line (130) on the same plane.

[0060] FIG. 2 is a side cross-sectional view for explaining the bias-T (100) of the present invention, FIG. 3 is a plan view for explaining the bias-T (100) of the present invention, FIG. 4 is a drawing for explaining the arrangement relationship between the first transmission line (120) and the third transmission line (140) of the present invention, FIG. 5 is a bottom view for explaining the bias-T (100) of the present invention, and FIG. 6 is a drawing for explaining the arrangement relationship between the second transmission line (130) and the third transmission line (140) of the present invention.

[0061] As illustrated in FIG. 2, the first transmission line (120) according to the present embodiment may be located on one surface of the dielectric layer (110), and the third transmission line (140) may be located on the other surface of the dielectric layer (110).

[0062] At this time, the first transmission line (120) and the third transmission line (140) according to the present embodiment can be arranged so that the areas in contact with the dielectric layer (110) overlap each other in the length direction, as shown in FIG. 4.

[0063] And the first transmission line (120) and the third transmission line (140) can be arranged so that the overlapping area is adjusted according to the coupling strength of the high-frequency signal.

[0064] Specifically, in order to have only minimal loss when a high-frequency signal is transmitted to a third transmission line (140) through a first transmission line (120), strong coupling must be induced between the first transmission line (120) and the third transmission line (140).

[0065] Therefore, in the bias-T (100) according to the present embodiment, the parameter that determines the strength of the coupling based on the strip line transition structure may be the area where the first transmission line (120) and the third transmission line (140) overlap each other.

[0066] That is, as shown in Fig. 4, as the length (d) of the overlapping of the first transmission line (120) and the third transmission line (140) increases and the overlapping area increases, the coupling strength between the first transmission line (120) and the third transmission line (140) increases.

[0067] On the other hand, as the length (d) of the overlapping of the first transmission line (120) and the third transmission line (140) becomes shorter and the overlapping area becomes narrower, and as the overlapping area in this direction (d) becomes wider, the coupling strength between the first transmission line (120) and the third transmission line (140) decreases.

[0068] Accordingly, the area in which the first transmission line (120) and the third transmission line (140) according to the present embodiment overlap can be changed as much as desired depending on the strength of coupling required by the user.

[0069] Therefore, not only can capacitance be implemented without including a separate passive element, a capacitor, through the transition structure of the first transmission line (120) and the third transmission line (140) according to the present embodiment, but also the capacitance can be controlled by controlling the overlapping area of ​​the first transmission line (120) and the third transmission line (140).

[0070] Meanwhile, for convenience of explanation, FIGS. 5 and 6 illustrate an example in which a metastructure (150) is provided on a second transmission line (130).

[0071] The metastructure (150) according to the present embodiment is provided to block a high-frequency signal flowing in the third transmission line (140) from flowing into the second transmission line (130).

[0072] The inductance in the second transmission line (130), which is a DC line, is provided to implement high isolation from the first transmission line (120) and the third transmission line (140) through which high-frequency signals flow. In this embodiment, a meta-structure is placed as an inductor on the second transmission line (130) to induce strong inductance.

[0073] To this end, the metastructure (150) according to the present embodiment may be placed in the direction of the second transmission line (130) from the third transmission line (140) by a distance (L) corresponding to a certain ratio of the frequency of the high-frequency signal flowing in the third transmission line (140), as illustrated in FIG. 6.

[0074] Specifically, the distance (L) at which the metastructure (150) is spaced from the third transmission line (140) may be a distance at which the second transmission line (130) appears open from the perspective of the first transmission line (120) and the third transmission line (140), which are high-frequency lines.

[0075] Accordingly, the distance (L) at which the center of the metastructure (150) according to this embodiment is spaced from the third transmission line (140) is the frequency of the high-frequency signal. It can be set to a position corresponding to 1 / 4 of the .

[0076] And the shape of the metastructure (150) according to the present embodiment may be provided as at least one of a slot, SRR (Split Ring Resonators), CSRR (Complementary Split Ring Resonators), and DGS (Defected Ground Structure), but is not necessarily limited thereto.

[0077] In addition, the metastructure (150) according to the present embodiment illustrated in FIGS. 1, 5, and 6 is illustrated as having grid-shaped, rectangular CSRRs arranged for convenience of explanation, but the pattern of the metastructure (150) may also be changed in any way.

[0078] Therefore, the bias-T (100) including the metastructure (150) according to the present embodiment can implement inductance even without using an inductor, which is a multilayer ceramic element, and can also control the inductance by controlling the arrangement, size, shape, and distance of the third transmission line (140) of the metastructure (150).

[0079] Accordingly, the bias-T (100) according to the present embodiment uses a strip line transition method so that the first transmission line (120) for transmitting a high-frequency signal in a dual plane of a dielectric layer (110) and the third transmission line (140) for transmitting an overlapping signal exist in different planes, thereby blocking direct current while allowing high-frequency signals to pass through coupling, and the high-frequency signals flow along the metastructure (150) in the second transmission line (130), which is a direct current line, thereby interfering with each other and preventing the high-frequency signals from flowing into the second transmission line (130).

[0080] This enables implementation of inductance and capacitance without including separate passive components such as inductors and capacitors, thereby enabling miniaturization of the bias-T (100).

[0081] In particular, when designing the bias-T (100) of the present invention, only a PCB substrate made of a conductor having the same thermal expansion coefficient as the substrate and copper foil can be used to stably maintain impedance matching in an ultra-low temperature environment, and the surface mounting process can be omitted to reduce the manufacturing period and unit cost, which has an economic advantage.

[0082] In addition, it can overcome the process limitations of the same surface gap coupling method, and has the advantage of being able to configure a bias-T by selecting a surface as needed rather than a single surface by using a strip transfer structure.

[0083]

[0084] In the above drawings 1 to 6, the design structure of the bias-T (100) of the present invention using a strip line transition structure and a meta structure to implement capacitance and inductance without passive components has been described.

[0085] At this time, the strip line transition structure in the present invention can mean any strip line structure that can be implemented, and for this purpose, the bias-T (100) can selectively arrange the ground plane.

[0086] FIGS. 7 to 9 are drawings specifically explaining a bias-T (100) according to one embodiment in which a first transmission line (120) among various strip line structures is provided as a microstrip line and a third transmission line (140) is provided as a CPW (Co-Planar Waveguide).

[0087] Specifically, FIG. 7 is a cross-sectional view illustrating a bias-T (100) according to one embodiment, FIG. 8 is a plan view, and FIG. 9 is a bottom view.

[0088] As illustrated in FIGS. 7 to 9, a bias-T (100) according to one embodiment may include a first transmission line (120), a second transmission line (130), a third transmission line (140), a metastructure (150), and a ground plane (160) as described above.

[0089] At this time, the first transmission line (120), the second transmission line (130), the third transmission line (140) and the metastructure (150) are the same as or can be sufficiently inferred from the above-described FIGS. 1 to 6, so any redundant description will be omitted.

[0090] In a bias-T (100) according to one embodiment, the first transmission line (120) is formed as a microstrip line and can receive a high-frequency signal from the first port (P1).

[0091] And the first transmission line (120) can couple a high-frequency signal to the third transmission line (140) arranged on the other surface of the dielectric layer (110) through the transition structure in the center of the dielectric layer (110).

[0092] The third transmission line (140) is made of CPW and is coupled with the first transmission line (120) to transmit a high-frequency signal.

[0093] And, due to the inductance characteristics of the metastructure (150) placed on the second transmission line (130) that is vertically branched and connected to the third transmission line (140), the second transmission line (130) appears as a terminal from the perspective of the high-frequency signal transmitted to the third transmission line (140).

[0094] Through this, the high-frequency signal is connected to the second transmission line (130) and is not transmitted to the second port (P2) that applies the DC signal, but is transmitted to the third port (P3) that is connected to the third transmission line (140).

[0095] On the other hand, from the perspective of a DC signal, since the strip transition structure is viewed as a terminal, the DC signal does not flow to the first port (P1) side connected to the first transmission line (120), but flows to the third port (P3) side through the third transmission line (140), so that a high-frequency signal and a DC signal can overlap in the third transmission line (140).

[0096] At this time, the first to third ports (P1, P2, P3) illustrated in FIGS. 8 and 9 may be bidirectional ports capable of both input and output.

[0097] Meanwhile, the ground plane (160) is placed on the dielectric layer (110), and may be provided adjacent to at least one of the first transmission line (120) and the third transmission line (140).

[0098] More specifically, as illustrated in FIGS. 8 and 9, when the first transmission line (120) is provided as a microstrip line and the third transmission line (140) is provided as a CPW, the ground plane (160) according to one embodiment of the present invention can be formed only on the other surface of the dielectric layer (110) on which the second and third transmission lines (130, 140) are arranged.

[0099] And, according to one embodiment, the ground plane (160) can be arranged in a form that surrounds the perimeter of the third transmission line (140) equipped with CPW and the second transmission line (130) vertically branched from the third transmission line (140), as shown in FIG. 9.

[0100]

[0101] FIG. 10 is a graph showing the results of an experiment on the transmission of a high-frequency signal and the blocking effect of a direct current signal in a bias-T (100) according to one embodiment shown in FIGS. 7 to 9.

[0102] Specifically, FIG. 10 is a diagram showing the EM simulation S parameter results of a bias-T (100) according to one embodiment, in which S11 and S22 in FIG. 10 represent reflection coefficients as viewed from the first port (P1) and the third port (P3), and the frequency band where S11 and S22 exist below -10 dB represents the operating band of the bias-T (100) according to one embodiment of the present invention.

[0103] Through Fig. 10, it can be seen that the transmission coefficient S211, which transmits a high-frequency signal from the first port (P1) to the third port (P3) in the operating band of 4.61 to 4.766 GHz, has a maximum loss of 2.3 dB, and the isolation coefficient S31, which does not transmit a high-frequency signal from the first port (P1) and the third port (P3) to the second port (P2), is -38 dB or less.

[0104] Meanwhile, FIG. 11 is a graph showing the results of an experiment on the transmission and blocking effect of a DC signal in a bias-T (100) according to one embodiment shown in FIGS. 7 to 9.

[0105] Specifically, Fig. 11 is a diagram illustrating the DC response for each port (P1, P2, P3). As illustrated in Fig. 11, when a 1V DC signal was applied to the second port (Input DC), a 1V DC signal was transmitted to the third port (P3) after a sufficient period of time, and the first port (P1) to which the DC blocking technique was applied converged to 0V after a sufficient period of time, confirming that the DC blocking was effective.

[0106] Through the results of FIGS. 10 and 11, it was numerically confirmed that the bias-T (100) of the present invention based on the strip line transition structure and metastructure is capable of blocking direct current signals and transmitting high-frequency signals without using laminated ceramic chip elements.

[0107]

[0108] Meanwhile, FIGS. 12 to 17 are drawings for explaining various cases in which a ground plane is selectively provided according to the structure of a transmission line arranged in a high-frequency bias-T (100) of the present invention.

[0109] Fig. 12 is a drawing illustrating a case where the first transmission line (120) and the third transmission line (140) are provided with CPW and microstrip or with microstrip and CPW. In the CPW transmission line, a ground plane (160) is provided in a form that surrounds the perimeter of the CPW transmission line, whereas in the case of the microstrip transmission line, a ground plane may not exist. In this case, there may also be a section where each transmission line overlaps, so that transmission of a high-frequency signal may be possible.

[0110]

[0111] Meanwhile, FIG. 13 is a drawing illustrating a case where the first transmission line (120) and the third transmission line (140) are provided with CPWG and microstrip or with microstrip and CPWG.

[0112] In the CPWG transmission line, the ground plane (160) is arranged in a form that surrounds the perimeter of the CPWG transmission line, whereas in the microstrip transmission line, the ground plane (160) can be arranged adjacent to the microstrip transmission line.

[0113]

[0114] Figure 14 is a drawing illustrating a case where the first transmission line (120) and the third transmission line (140) are equipped with CPW and CPWG or CPWG and CPW.

[0115] In the CPW transmission line, a ground plane (160) may be arranged in a form that surrounds the circumference of the CPW transmission line, but the port side where the signal is applied or output may be provided in an open state. In addition, in the CPWG transmission line, a ground plane (160) may be arranged longitudinally on both sides of the CPWG transmission line. In addition, the ground plane (160) arranged in the CPW transmission line

[0116]

[0117] Figure 15 is a drawing illustrating a case where both the first transmission line (120) and the third transmission line (140) are equipped with CPW.

[0118] In this case, the ground plane (160) can be arranged longitudinally on both sides of each CPW transmission line.

[0119]

[0120] Fig. 16 is a diagram illustrating a case where both the first transmission line (120) and the third transmission line (140) are equipped with CPWG. In this case, the ground plane (160) may be arranged in a form that surrounds the perimeter of the CPWG transmission line, and the port side where signals are input and output may be provided in an open state.

[0121]

[0122] Fig. 17 is a drawing illustrating a case where both the first transmission line (120) and the third transmission line (140) are provided with microstrips. In this case, the ground plane (160) is arranged adjacent to the microstrip transmission line, but may be provided in a location where no port is provided.

[0123]

[0124]

[0125] Meanwhile, FIGS. 18 to 21 are drawings for explaining various embodiments of the metastructure (150) arranged in the bias-T of the present invention.

[0126] Figures 18 and 19 are drawings illustrating a case where the second transmission line (130) is provided as a microstrip transmission line and the third transmission line (140) is also provided as a microstrip transmission line. In this case, the metastructure (150) may be arranged adjacent to the second transmission line (130) outside the second transmission line (130) or may be arranged on the second transmission line (130).

[0127] When the metastructure (150) is placed on the second transmission line (130) as in Fig. 18, the metastructure (150) can be provided in a CSRR (Complementary Split Ring Resonators) structure.

[0128] And the ground plane (160) can be provided on one of the two sides of the dielectric layer (110) on which the first transmission line (120) is arranged.

[0129] On the other hand, when the metastructure (150) is placed adjacent to the second transmission line (130) outside the second transmission line (130) as in FIG. 19, the metastructure (150) can be provided in the form of an SRR (Split Ring Resonators) structure.

[0130] And the ground plane (160) can be provided on one of the two sides of the dielectric layer (110) on which the first transmission line (120) is arranged.

[0131]

[0132] Meanwhile, FIGS. 20 and 21 are drawings illustrating a case where the third transmission line (140) is provided as a CPW or CPWG transmission line and the second transmission line (130) is also provided as a CPW or CPWG transmission line. In this case, the metastructure (150) may be arranged adjacent to the second transmission line (130) outside the second transmission line (130), or may be arranged on the second transmission line (130).

[0133] When the metastructure (150) is placed on the second transmission line (130) as in Fig. 20, the metastructure (150) can be provided as a CSRR structure.

[0134] And the ground plane (160) can be placed on both sides of the dielectric layer (110).

[0135] On the other hand, when the metastructure (150) is placed adjacent to the second transmission line (130) outside the second transmission line (130) as in Fig. 21, the metastructure (150) can be provided as a CSRR structure on the ground planes (160) placed on both sides of the dielectric layer (110) in the longitudinal direction of the second transmission line (130).

[0136]

[0137] FIG. 22 is a flowchart illustrating a design method of a high-frequency bias-T according to one embodiment of the present invention.

[0138] The design method according to the present embodiment includes a step of preparing a dielectric layer (S110), a step of arranging a first transmission line (120) (S120), a step of arranging a second transmission line (130) (S130), and a step of arranging a third transmission line (140) (S140).

[0139] In the step of preparing a dielectric layer (S110), a double-sided PCB substrate can be prepared.

[0140] In the step (S120) of arranging the first transmission line (120), the first transmission line (120) that receives a high-frequency signal can be arranged on one surface of the dielectric layer (110).

[0141] In the step (S130) of placing the second transmission line (130), the second transmission line (130) that receives a direct current signal can be placed on the other surface of the dielectric layer (110).

[0142] In the step (S140) of arranging the third transmission line (140), the third transmission line (140) can be arranged vertically connected to the second transmission line (130).

[0143] This third transmission line (140) may be a transmission line that receives a direct current signal from the second transmission line (130), is coupled with the first transmission line (120), receives a high-frequency signal, and superimposes the high-frequency signal and the direct current signal.

[0144] In the step (S120, S130) of arranging the first transmission line (120) and the third transmission line (140), the first transmission line (120) and the third transmission line (140) can be arranged so that the areas in contact with the dielectric layer (110) overlap each other in the length direction.

[0145] And in the step (S120, S130) of arranging the first transmission line (120) and the third transmission line (140), the area where the first transmission line (120) and the third transmission line (140) overlap can be adjusted according to the coupling strength of the high-frequency signal.

[0146] And the design method of the present invention may further include a step of arranging a metastructure (150) after the step (S140) of arranging a third transmission line (140).

[0147] This metastructure (150) can be provided to block a high-frequency signal flowing in the third transmission line (140) from flowing into the second transmission line (130).

[0148] And the metastructure may be an inductor placed adjacent to the second transmission line (130) on the same plane or placed on the second transmission line (130).

[0149] Additionally, the metastructure may be arranged to be spaced apart from the third transmission line (140) in the direction of the second transmission line (130) by a distance corresponding to a certain ratio of the frequency of the high-frequency signal flowing in the third transmission line (140).

[0150] This metastructure (150) can be provided with at least one of a slot, a Split Ring Resonator (SRR), a Complementary Split Ring Resonator (CSRR), and a Defected Ground Structure (DGS).

[0151] Although various embodiments of the present invention have been illustrated and described above, the present invention is not limited to the specific embodiments described above, and various modifications can be made by those skilled in the art without departing from the gist of the present invention as claimed in the claims. Furthermore, such modifications should not be understood individually from the technical idea or prospect of the present invention.

[0152] (Explanation of symbols)

[0153] 100: Bias-T 110: Dielectric layer

[0154] 120: 1st transmission line 130: 2nd transmission line

[0155] 140: Third transmission line 150: Metastructure

[0156] 160: Ground plane P: Port

Claims

1. Regarding a high frequency bias tee for superimposing a DC signal on a high frequency (RF) signal, genetic layer; A first transmission line disposed on one side of the dielectric layer and receiving the high-frequency signal; A second transmission line disposed on the other surface of the dielectric layer and receiving the DC signal; and A high-frequency bias-T, comprising a third transmission line that is vertically connected to the second transmission line to receive the DC signal, and is coupled to the first transmission line to receive the high-frequency signal and superimpose the high-frequency signal and the DC signal.

2. In paragraph 1, The first transmission line and the third transmission line are, A high-frequency bias-T, arranged so that the areas in contact with the above dielectric layers overlap each other in the length direction.

3. In paragraph 2, The first transmission line and the third transmission line are, A high frequency bias-T arranged so that the overlapping area is adjusted according to the coupling strength of the high frequency signal.

4. In paragraph 2, The above high frequency bias-T is, A high-frequency bias-T further comprising a meta-structure that blocks the high-frequency signal flowing in the third transmission line from flowing into the second transmission line.

5. In paragraph 4, The above metastructure is, A high-frequency bias-T, which is an inductor disposed adjacent to the second transmission line on the same plane as the second transmission line or disposed on the second transmission line.

6. In paragraph 5, The above metastructure is, A high-frequency bias tee, which is arranged in the direction of the second transmission line from the third transmission line at a distance corresponding to a certain ratio of the frequency of the high-frequency signal flowing in the third transmission line.

7. In paragraph 5, The above metastructure is, A high-frequency bias-T comprising at least one of a slot, Split Ring Resonators (SRR), Complementary Split Ring Resonators (CSRR), and Defected Ground Structure (DGS).

8. In the design method of the high-frequency bias-T according to Article 1, Step of preparing a genetic layer; A step of arranging a first transmission line for receiving a high-frequency signal on one surface of the above dielectric layer; A step of arranging a second transmission line for receiving a direct current signal on the other surface of the dielectric layer; and A design method comprising a step of arranging the third transmission line to be vertically connected to the second transmission line, as a third transmission line that receives the second DC signal, is coupled to the first transmission line, receives the high-frequency signal, and superimposes the high-frequency signal and the DC signal.

9. In paragraph 8, In the step of arranging the first transmission line and the third transmission line, A design method in which the first transmission line and the third transmission line are arranged so that the areas in contact with the dielectric layer overlap each other in the length direction.

10. In paragraph 9, In the step of arranging the first transmission line and the third transmission line, A design method for arranging the first transmission line and the third transmission line so that the overlapping area is controlled according to the coupling strength of the high-frequency signal.

11. In paragraph 9, The above design method is, A design method further comprising the step of arranging a metastructure that blocks the high-frequency signal flowing in the third transmission line from flowing into the second transmission line.

12. In paragraph 11, The above metastructure is, A design method, wherein the inductor is placed adjacent to the second transmission line on the same plane as the second transmission line or is placed on the second transmission line.

13. In paragraph 12, The above metastructure is, A design method in which the third transmission line is spaced apart from the second transmission line in the direction of the third transmission line by a distance corresponding to a certain ratio of the frequency of the high-frequency signal flowing in the third transmission line.

14. In paragraph 12, The above metastructure is, A design method comprising at least one of slots, Split Ring Resonators (SRRs), Complementary Split Ring Resonators (CSRRs), and Defected Ground Structures (DGSs).

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