Tracker circuit

Abstract

A tracker circuit (1) comprises: a control terminal (T14) that receives a DCL signal (DCL1) from an RFIC (2A) configured so as to process a high-frequency signal (RF11); a control terminal (T15) that receives a DCL signal (DCL2) from an RFIC (2B) configured so as to process a high-frequency signal (RF21); a voltage generation circuit (25) that is configured so as to generate a plurality of discrete voltages (V1-V6); a power supply modulation circuit (31) that is configured so as to selectively output at least one of the plurality of discrete voltages to a power amplifier (3A) configured so as to amplify the high-frequency signal (RF11) and a power amplifier (4A) configured so as to amplify the high-frequency signal (RF21); and a digital control circuit (52) that is configured so as to selectively use the DCL signals (DCL1 and DCL2) to control the power supply modulation circuit (31).

Description

Tracker Circuit

[0001] The present invention relates to a tracker circuit.

[0002] In recent years, efforts have been made to improve power efficiency by applying envelope tracking (ET) to power amplifier circuits. Patent Document 1 discloses digital envelope tracking (D-ET) that selectively supplies at least one of a plurality of discrete voltages to a power amplifier based on an envelope signal.

[0003] U.S. Patent No. 9,755,672

[0004] When such a D-ET mode is applied to a communication device that supports multiple frequency ranges or multiple communication systems, the number of power supply modulation circuits may increase, resulting in an increase in size.

[0005] Therefore, the present invention provides a tracker circuit that can contribute to miniaturization.

[0006] A tracker circuit according to one aspect of the present invention includes a first digital control level (DCL) terminal that receives a first DCL signal generated based on an envelope of a first high-frequency signal from a first signal processing circuit configured to process the first high-frequency signal, the DCL terminal receiving a second DCL signal generated based on the envelope of the second high-frequency signal from a second signal processing circuit configured to process the second high-frequency signal, a voltage generation circuit configured to generate a plurality of discrete voltages, a first power supply modulation circuit configured to selectively output at least one of the plurality of discrete voltages to a first power amplifier configured to amplify the first high-frequency signal and a second power amplifier configured to amplify the second high-frequency signal, and a digital control circuit configured to selectively use the first DCL signal and the second DCL signal to control the first power supply modulation circuit.

[0007] The present invention can contribute to miniaturization of tracker circuits.

[0008] FIG. 1A is a graph showing an example of a change in power supply voltage in APT (Average Power Tracking) mode. FIG. 1B is a graph showing an example of a change in power supply voltage in A-ET (Analog Envelope Tracking) mode. FIG. 1C is a graph showing an example of a change in power supply voltage in D-ET mode. FIG. 2 is a circuit configuration diagram of a communication device according to a first embodiment. FIG. 3 is a circuit configuration diagram of a tracker circuit according to the first embodiment. FIG. 4 is a circuit configuration diagram of a digital control circuit according to the first embodiment. FIG. 5 is a plan view of a tracker module according to the first embodiment. FIG. 6 is a plan view of a tracker module according to the first embodiment. FIG. 7 is a cross-sectional view of the tracker module according to the first embodiment. FIG. 8 is a circuit configuration diagram of a communication device according to a second embodiment. FIG. 9 is a circuit configuration diagram of a digital control circuit according to the second embodiment. FIG. 10 is a circuit configuration diagram of a communication device according to a third embodiment. FIG. 11 is a circuit configuration diagram of a digital control circuit according to the third embodiment.

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that the embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, arrangements and connection forms of the components shown in the following embodiments are merely examples and are not intended to limit the present invention.

[0010] It should be noted that the drawings are schematic diagrams in which emphasis, omission, or adjustment of proportions has been appropriately made to illustrate the present invention, and are not necessarily strictly illustrated, and may differ from the actual shapes, positional relationships, and proportions. In the drawings, the same reference numerals are used to denote substantially the same components, and redundant explanations may be omitted or simplified.

[0011] In the following description, "connected" includes not only direct connection by connection terminals and / or wiring conductors, but also electrical connection via other circuit elements. "A is switchably connected to B" means that the connection and disconnection between A and B can be switched, and A is connected to B via a switch. "A is connected to B" includes "A is switchably connected to B." "C is connected between A and B" means that one end of C is connected to A and the other end of C is connected to B, and C is arranged in series in the path connecting A and B. "Path connecting A and B" means a path made up of a conductor electrically connecting A to B.

[0012] In the following description, "terminal" means a point where a conductor within an element terminates, although it is understood that terminal can refer to any point on the conductor between elements or the entire conductor, not just a single point, provided that the impedance of the conductor between elements is sufficiently low.

[0013] Furthermore, terms indicating the relationship between elements, such as "parallel" and "perpendicular," terms indicating the shape of elements, such as "rectangle," and numerical ranges do not only represent the strict meaning, but also include a substantially equivalent range, for example, an error of a few percent.

[0014] First, as a technology for highly efficient amplification of high-frequency signals, a tracking mode will be described, in which a power amplifier is supplied with a power supply voltage that is dynamically adjusted over time based on the high-frequency signal. Tracking mode is a mode in which the power supply voltage applied to the power amplifier is dynamically adjusted. There are several types of tracking modes, but here, the APT mode, A-ET mode, and D-ET mode will be described with reference to FIGS. 1A, 1B, and 1C. In FIGS. 1A, 1B, and 1C, the horizontal axis represents time, and the vertical axis represents voltage. Furthermore, the thick solid line represents the power supply voltage, and the thin solid line (waveform) represents the modulation signal.

[0015] 1A is a graph showing an example of the transition of the power supply voltage in the APT mode, which is a mode in which the power supply voltage is varied to a plurality of discrete voltage levels in units of one frame based on the average power.

[0016] A frame is a unit that constitutes a high-frequency signal (modulated signal). For example, in 5GNR (5th Generation New Radio) and LTE (Long Term Evolution), a frame includes 10 subframes, each subframe includes multiple slots, and each slot includes multiple symbols. The subframe length is 1 ms, and the frame length is 10 ms.

[0017] A mode in which the voltage level is varied in units of one frame or larger based on the average power is called an APT mode, and is distinguished from a mode in which the voltage level is varied in units smaller than one frame (e.g., subframe, slot, or symbol). For example, a mode in which the voltage level is varied in symbol units is called a symbol power tracking (SPT) mode, and is distinguished from the APT mode.

[0018] 1B is a graph showing an example of the transition of the power supply voltage in the A-ET mode. The A-ET mode is a mode in which the power supply voltage is continuously varied based on the envelope signal. In the A-ET mode, the power supply voltage can track the envelope of the modulating signal.

[0019] The envelope signal is a signal that indicates the envelope of the modulated signal. The envelope value is, for example, (I ２ +Q ２ ) where (I, Q) represents a constellation point. A constellation point is a point that represents a digitally modulated signal on a constellation diagram. (I, Q) is determined, for example, by a Baseband Integrated Circuit (BBIC) based on the transmitted information.

[0020] 1C is a graph showing an example of the transition of the power supply voltage in D-ET mode. D-ET mode is a mode in which the power supply voltage is varied to multiple discrete voltage levels within one frame based on an envelope signal. In D-ET mode, the level of the power supply voltage can track the envelope of the modulating signal. In other words, in D-ET, the power supply voltage varies at shorter time intervals than in APT.

[0021] (First Embodiment) A first embodiment will be described below.

[0022] [1.1 Circuit Configuration of Communication Device 6] First, an exemplary circuit configuration of the communication device 6 according to this embodiment will be described with reference to Fig. 2. Fig. 2 is a circuit configuration diagram of the communication device 6 according to this embodiment.

[0023] 2 is an exemplary circuit configuration, and communication device 6 may be implemented using any of a wide variety of circuit implementations and circuit technologies, and therefore the description of communication device 6 provided below should not be construed as limiting.

[0024] The communication device 6 can be used to provide wireless connectivity. For example, the communication device 6 can be implemented in user equipment (UE) in a cellular network, such as a mobile phone, a smartphone, a tablet computer, or a wearable device. In another example, the communication device 6 can be implemented to provide wireless connectivity to Internet of Things (IoT) sensor devices, medical / healthcare devices, cars, unmanned aerial vehicles (UAVs) (also known as drones), and automated guided vehicles (AGVs). In yet another example, the communication device 6 can be implemented to provide wireless connectivity in a wireless access point or wireless hotspot.

[0025] The communication device 6 includes a tracker circuit 1, RFICs (Radio Frequency Integrated Circuits) 2A and 2B, and power amplifiers 3A and 4A.

[0026] The tracker circuit 1 can selectively supply the power supply voltage to the power amplifiers 3A and 4A in the D-ET mode. Note that the tracker circuit 1 may also supply the power supply voltage to the power amplifiers 3A and 4A in the APT mode. The detailed circuit configuration of the tracker circuit 1 will be described later.

[0027] The RFIC 2A is an example of a first signal processing circuit and can process a high-frequency signal (RF11), which is an example of a first high-frequency signal. Specifically, the RFIC 2A can perform signal processing on the transmission signal input from the BBIC by up-conversion or the like, and output the high-frequency signal (RF11) generated by this signal processing to the power amplifier 3A. Furthermore, the RFIC 2A can supply a digital control signal for controlling the tracker circuit 1 to the tracker circuit 1.

[0028] In this embodiment, the high-frequency signal (RF11) is a cellular network signal (e.g., a 5th Generation New Radio (5GNR) signal) and is a signal in a frequency band included in FR1 (Frequency Range 1). FR1 is an example of a first frequency range, which ranges from 410 MHz to 7125 MHz.

[0029] The RFIC 2B is an example of a second signal processing circuit and can process a high-frequency signal (RF21), which is an example of a second high-frequency signal. Specifically, the RFIC 2B can perform signal processing on the transmission signal input from the BBIC by up-conversion or the like, and output the high-frequency signal (RF21) generated by this signal processing to the power amplifier 4A. Furthermore, the RFIC 2B can supply a digital control signal for controlling the tracker circuit 1 to the tracker circuit 1.

[0030] In this embodiment, the high frequency signal (RF21) is a cellular network signal, for example, a signal in a frequency band included in FR2 (Frequency Range 2). FR2 is an example of a second frequency range, for example, a range from 24.25 GHz to 71 GHz.

[0031] The high-frequency signal (RF11 or RF21) may include a signal in a frequency band included in FR3 (Frequency Range 3). RF3 is an example of a third frequency range, which ranges from 7125 MHz to 24.25 GHz. FR3 may also be defined as a range from 7125 MHz to 13 GHz.

[0032] Furthermore, the high frequency signals (RF11 and RF21) are not limited to cellular network signals, and may be, for example, wireless local area network (WLAN) signals.

[0033] The power amplifier 3A is an example of a first power amplifier, and can amplify a high frequency signal (RF11) using the power supply voltage Vcc11 supplied from the tracker circuit 1.

[0034] The power amplifier 4A is an example of a second power amplifier, and can amplify a high frequency signal (RF21) using the power supply voltage Vcc21 supplied from the tracker circuit 1.

[0035] [1.2 Circuit Configuration of Tracker Circuit 1] Next, the circuit configuration of the tracker circuit 1 will be described with reference to Fig. 2 and Fig. 3. Fig. 3 is a circuit configuration diagram of the tracker circuit 1 according to this embodiment.

[0036] 2 and 3 are exemplary circuit configurations, and tracker circuit 1 may be implemented using any of a wide variety of circuit implementations and circuit techniques, and therefore the circuit descriptions provided below should not be construed as limiting.

[0037] The tracker circuit 1 comprises a voltage generation circuit 25 including a pre-regulator circuit 10 and a switched capacitor circuit 20, a power supply modulation circuit 31, a band switch circuit 40, digital control circuits 51 and 52, an input terminal T11, control terminals T12, T13, T14 and T15, and output terminals T16 and T17.

[0038] The input terminal T11 is an external connection terminal of the tracker circuit 1 and is a terminal that receives a DC voltage Vbat from a DC power supply (not shown). The input terminal T11 is connected to the DC power supply outside the tracker circuit 1 and is connected to the pre-regulator circuit 10 inside the tracker circuit 1.

[0039] A plurality of control terminals T12, T13, T14 and T15 are external connection terminals of the tracker circuit 1, and are terminals that receive digital control signals from the RFICs 2A and 2B.

[0040] The two control terminals T12 are connected to the RFIC 2A outside the tracker circuit 1, and are connected to the digital control circuit 51 inside the tracker circuit 1. The two control terminals T12 can receive serial data signals (clock (CLK) signal / data (DATA) signal) from the RFIC 2A and supply the serial data signals (CLK / DATA) to the digital control circuit 51.

[0041] The two control terminals T13 are connected to the RFIC 2B outside the tracker circuit 1, and are connected to the digital control circuit 51 inside the tracker circuit 1. The two control terminals T13 can receive a serial data signal (CLK / DATA) from the RFIC 2B and supply the serial data signal (CLK / DATA) to the digital control circuit 51.

[0042] The two control terminals T14 are examples of first DCL terminals, and are connected to the RFIC 2A outside the tracker circuit 1 and are connected to the digital control circuit 52 inside the tracker circuit 1. The two control terminals T14 can receive digital control level (DCL) signals (DCL1 (DCL11, DCL12)) from the RFIC 2A and supply the DCL signal (DCL1) to the digital control circuit 52.

[0043] The two control terminals T15 are examples of second DCL terminals, and are connected to RFIC 2B outside the tracker circuit 1 and are connected to the digital control circuit 52 inside the tracker circuit 1. The two control terminals T15 can receive a DCL signal (DCL2 (DCL21, DCL22)) from RFIC 2B and supply the DCL signal (DCL2) to the digital control circuit 52.

[0044] The number of each of the control terminals T12 to T15 is not limited to 2. For example, if the number of each of the control terminals T12 to T15 is three or more, voltages can be expressed by three or more 1-bit signals, and the number of voltages that can be selected by the power supply modulation circuit 31 can be increased.

[0045] The output terminal T16 is an external connection terminal of the tracker circuit 1 and is a terminal that supplies the power supply voltage Vcc11 to the power amplifier 3A. The output terminal T16 is connected to the power amplifier 3A outside the tracker circuit 1 and is connected to the band switch circuit 40 inside the tracker circuit 1.

[0046] The output terminal T17 is an external connection terminal of the tracker circuit 1 and is a terminal that supplies the power supply voltage Vcc21 to the power amplifier 4A. The output terminal T17 is connected to the power amplifier 4A outside the tracker circuit 1 and is connected to the band switch circuit 40 inside the tracker circuit 1.

[0047] The pre-regulator circuit 10 may also be called a magnetic regulator or a DC (Direct Current) / DC converter. In this embodiment, the pre-regulator circuit 10 is a one-input, one-output buck-boost converter that can convert a DC voltage into a regulated voltage. The pre-regulator circuit 10 may be a buck converter or a boost converter. The pre-regulator circuit 10 can change the regulated voltage based on a digital control signal received at the control terminal T12 or T13. A detailed circuit configuration of the pre-regulator circuit 10 will be described later. Note that part or all of the pre-regulator circuit 10 may not be included in the tracker circuit 1.

[0048] The switched capacitor circuit 20 can generate a plurality of discrete voltages V1, V2, V3, V4, V5, and V6 based on the regulated voltage supplied by the pre-regulator circuit 10. A detailed circuit configuration of the switched capacitor circuit 20 will be described later. Note that part or all of the switched capacitor circuit 20 may not be included in the tracker circuit 1.

[0049] In the present embodiment, the voltage generation circuit 25 is configured with the pre-regulator circuit 10 and the switched capacitor circuit 20, but the circuit configuration of the voltage generation circuit 25 is not limited to this. For example, the voltage generation circuit 25 may include a plurality of pre-regulator circuits without including a switched capacitor circuit. Furthermore, for example, the voltage generation circuit 25 may include a plurality of switched capacitor circuits.

[0050] The power supply modulation circuit 31 is an example of a first power supply modulation circuit, and can selectively output at least one of a plurality of discrete voltages V1 to V6 to the power amplifiers 3A and 4A. In other words, the power supply modulation circuit 31 can select at least one voltage from the plurality of discrete voltages V1 to V6 and selectively supply the selected at least one voltage to the power amplifiers 3A and 4A. A detailed circuit configuration of the power supply modulation circuit 31 will be described later.

[0051] The band switch circuit 40 can switch the output of the power supply modulation circuit 31 between the power amplifiers 3 A and 4 A. The detailed circuit configuration of the band switch circuit 40 will be described later.

[0052] The band switch circuit 40 does not have to be included in the tracker circuit 1. In this case, the power supply modulation circuit 31 may be connected to the power amplifiers 3A and 4A without going through the band switch circuit 40.

[0053] The digital control circuit 51 processes the serial data signal (CLK / DATA) received at the control terminals T12 and T13 to generate control signals CS10, CS20, and CS40 that control the pre-regulator circuit 10, the switched capacitor circuit 20, and the band switch circuit 40. The control signal CS10 is a signal that controls the opening and closing of switches S101 to S104 included in the pre-regulator circuit 10. The control signal CS20 is a signal that controls the opening and closing of switches S200 to S223 included in the switched capacitor circuit 20. The control signal CS40 is a signal that controls the opening and closing of switches S401 and S402 included in the band switch circuit 40. Note that part or all of the digital control circuit 51 may not be included in the tracker circuit 1. Furthermore, a feedback signal for controlling the pre-regulator circuit 10 may be input to the digital control circuit 51.

[0054] The serial data signal may be, for example, a source-synchronous digital control signal. Alternatively, a clock-embedded digital control signal may be used as the serial data signal. In this case, the CLK signal and the DATA signal may be combined into a single signal. The digital control circuit 51 may also generate a control signal for controlling the power supply modulation circuit 31.

[0055] The digital control circuit 52 can generate a control signal (CS31) by selectively using the DCL signals (DCL1 and DCL2) received at the control terminals T14 and T15. The DCL signal (DCL1) is an example of a first DCL signal and is generated based on the envelope of the high-frequency signal (RF11). The DCL signal (DCL2) is an example of a second DCL signal and is generated based on the envelope of the high-frequency signal (RF21). The control signal (CS31) is an example of a first control signal and is a signal that controls multiple switches S311 to S316 included in the power supply modulation circuit 31. A detailed circuit configuration of the digital control circuit 52 will be described later.

[0056] Each of the DCL signals (DCL1 and DCL2) is a parallel data signal and includes a plurality of 1-bit signals. Some or all of the plurality of discrete voltages V1 to V6 are represented by a combination of the plurality of 1-bit signals. For example, if each of the DCL signals (DCL1 and DCL2) includes two 1-bit signals, the plurality of discrete voltages V3, V4, V5, and V6 can be represented by "00," "01," "10," and "11," respectively. Gray code may be used to represent the voltage levels.

[0057] [1.3 Circuit Configuration of Pre-regulator Circuit 10] Here, we will explain an exemplary circuit configuration of the pre-regulator circuit 10. The pre-regulator circuit 10 includes an input terminal T101, an output terminal T102, switches S101 to S104, a power inductor L101, and capacitors C101 and C102.

[0058] The input terminal T101 is a terminal that receives the DC voltage Vbat. The input terminal T101 is connected to the input terminal T11 of the tracker circuit 1 outside the pre-regulator circuit 10, and is connected to the switch S101 inside the pre-regulator circuit 10.

[0059] The output terminal T102 is a terminal that supplies a regulated voltage to the switched capacitor circuit 20. The output terminal T102 is connected to an input terminal T200 of the switched capacitor circuit 20 outside the pre-regulator circuit 10, and is connected to a switch S103 inside the pre-regulator circuit 10.

[0060] The power inductor L101 is an inductor used to step up and step down the DC voltage Vbat. One end of the power inductor L101 is connected to the switches S101 and S102, and the other end of the power inductor L101 is connected to the switches S103 and S104.

[0061] The switch S101 is connected between the input terminal T101 and one end of the power inductor L101. The switch S102 is connected between one end of the power inductor L101 and ground. In this connection configuration, the DC voltage Vbat received at the input terminal T101 can be stepped down by exclusively switching the switches S101 and S102 between open and closed.

[0062] The switch S103 is connected between the other end of the power inductor L101 and the output terminal T102. The switch S104 is connected between the other end of the power inductor L101 and the ground. In this connection configuration, the DC voltage Vbat received at the input terminal T101 can be boosted by exclusively switching the open and closed states of the switches S103 and S104.

[0063] The capacitor C101 is connected between the path between the input terminal T101 and the switch S101 and ground. Specifically, one of the two electrodes of the capacitor C101 is connected to the input terminal T101 and the switch S101, and the other of the two electrodes of the capacitor C101 is connected to ground.

[0064] The capacitor C102 is connected between the path between the switch S103 and the output terminal T102 and ground. Specifically, one of the two electrodes of the capacitor C102 is connected to the switch S103 and the output terminal T102, and the other of the two electrodes of the capacitor C102 is connected to ground.

[0065] 3 is an example and is not limiting. For example, some of the switches S101 to S104 may be replaced with diodes. Also, some or all of the pre-regulator circuit 10 may not be included in the tracker circuit 1.

[0066] [1.4 Circuit Configuration of Switched-Capacitor Circuit 20] Next, an exemplary circuit configuration of the switched-capacitor circuit 20 will be described. The switched-capacitor circuit 20 has a ladder-type circuit configuration and is capable of generating a plurality of discrete voltages V1 to V6. Specifically, the switched-capacitor circuit 20 includes flying capacitors C200 to C209, smoothing capacitors C210 to C215, switches S200 to S223, an input terminal T200, and output terminals T201 to T206. Energy and charge are input from the pre-regulator circuit 10 to node N5 via the input terminal T200 and are extracted from nodes N1 to N6 to the power supply modulation circuit 31 via the output terminals T201 to T206.

[0067] The input terminal T200 is a terminal that receives a regulated voltage from the pre-regulator circuit 10. The input terminal T200 is connected to the pre-regulator circuit 10 outside the switched capacitor circuit 20, and is connected to a node N2 inside the switched capacitor circuit 20. Note that the node to which the input terminal T200 is connected is not limited to the node N2. The input terminal T200 may be connected to any of the nodes N1 to N6.

[0068] Output terminals T201, T202, T203, T204, T205, and T206 are terminals that supply a plurality of discrete voltages V1 to V6 to the power supply modulation circuit 31. The output terminals T201 to T206 are connected to the power supply modulation circuit 31 outside the switched capacitor circuit 20, and are connected to nodes N1 to N6 inside the switched capacitor circuit 20, respectively.

[0069] The flying capacitors C200-C209 are sometimes called transfer capacitors and are used to boost and / or lower the regulated voltage supplied from the pre-regulator circuit 10. More specifically, the flying capacitors C200-C209 transfer charge between the flying capacitors C200-C209 and the nodes N1-N6 and ground so that the voltages V1, V2, V3, V4, V5, and V6 at the six nodes N1-N6 are maintained such that (V6-V5):(V5-V4):(V4-V3):(V3-V2):(V2-V1):(V1-VG)=1:1:1:1:1:1 and V6>V5>V4>V3>V2>V1>VG are satisfied at the six nodes N1-N6. Here, VG represents ground potential. It should be noted that (V6-V5):(V5-V4):(V4-V3):(V3-V2):(V2-V1):(V1-VG) is not limited to 1:1:1:1:1:1:1, and can be designed to have any ratio (for example, 1:2:3:4:5:6, etc.).

[0070] One of the two electrodes of the flying capacitor C200 is connected to one end of the switch S200 and one end of the switch S201, and the other of the two electrodes of the flying capacitor C200 is connected to one end of the switch S204 and one end of the switch S205.

[0071] One of the two electrodes of the flying capacitor C201 is connected to one end of the switch S202 and one end of the switch S203. The other of the two electrodes of the flying capacitor C201 is connected to one end of the switch S206 and one end of the switch S207.

[0072] One of the two electrodes of the flying capacitor C202 is connected to one end of the switch S204 and one end of the switch S205. The other of the two electrodes of the flying capacitor C202 is connected to one end of the switch S208 and one end of the switch S209.

[0073] One of the two electrodes of the flying capacitor C203 is connected to one end of the switch S206 and one end of the switch S207. The other of the two electrodes of the flying capacitor C203 is connected to one end of the switch S210 and one end of the switch S211.

[0074] One of the two electrodes of the flying capacitor C204 is connected to one end of a switch S208 and one end of a switch S209. The other of the two electrodes of the flying capacitor C204 is connected to one end of a switch S212 and one end of a switch S213.

[0075] One of the two electrodes of the flying capacitor C205 is connected to one end of the switch S210 and one end of the switch S211. The other of the two electrodes of the flying capacitor C205 is connected to one end of the switch S214 and one end of the switch S215.

[0076] One of the two electrodes of the flying capacitor C206 is connected to one end of the switch S212 and one end of the switch S213. The other of the two electrodes of the flying capacitor C206 is connected to one end of the switch S216 and one end of the switch S217.

[0077] One of the two electrodes of the flying capacitor C207 is connected to one end of the switch S214 and one end of the switch S215. The other of the two electrodes of the flying capacitor C207 is connected to one end of the switch S218 and one end of the switch S219.

[0078] One of the two electrodes of the flying capacitor C208 is connected to one end of the switch S216 and one end of the switch S217. The other of the two electrodes of the flying capacitor C208 is connected to one end of the switch S220 and one end of the switch S221.

[0079] One of the two electrodes of the flying capacitor C209 is connected to one end of the switch S218 and one end of the switch S219. The other of the two electrodes of the flying capacitor C209 is connected to one end of the switch S222 and one end of the switch S223.

[0080] Smoothing capacitors C210-C215 are used to hold and smooth the discrete voltages V1-V6 at nodes N1-N6.

[0081] The smoothing capacitor C210 is connected between the node N1 and the ground. Specifically, one of the two electrodes of the smoothing capacitor C210 is connected to the node N1. Meanwhile, the other of the two electrodes of the smoothing capacitor C210 is connected to the ground.

[0082] The smoothing capacitor C211 is connected between the nodes N1 and N2. Specifically, one of the two electrodes of the smoothing capacitor C211 is connected to the node N2. Meanwhile, the other of the two electrodes of the smoothing capacitor C211 is connected to the node N1.

[0083] The smoothing capacitor C212 is connected between the nodes N2 and N3. Specifically, one of the two electrodes of the smoothing capacitor C212 is connected to the node N3. Meanwhile, the other of the two electrodes of the smoothing capacitor C212 is connected to the node N2.

[0084] The smoothing capacitor C213 is connected between the nodes N3 and N4. Specifically, one of the two electrodes of the smoothing capacitor C213 is connected to the node N4. Meanwhile, the other of the two electrodes of the smoothing capacitor C213 is connected to the node N3.

[0085] The smoothing capacitor C214 is connected between the nodes N4 and N5. Specifically, one of the two electrodes of the smoothing capacitor C214 is connected to the node N5. Meanwhile, the other of the two electrodes of the smoothing capacitor C214 is connected to the node N4.

[0086] The smoothing capacitor C215 is connected between the nodes N5 and N6. Specifically, one of the two electrodes of the smoothing capacitor C215 is connected to the node N6. Meanwhile, the other of the two electrodes of the smoothing capacitor C215 is connected to the node N5.

[0087] The switch S200 is connected between the flying capacitor C200 and ground. Specifically, one end of the switch S200 is connected to one of the two electrodes of the flying capacitor C200. Meanwhile, the other end of the switch S200 is connected to ground.

[0088] The switch S201 is connected between the flying capacitor C200 and a node N1. Specifically, one end of the switch S201 is connected to one of the two electrodes of the flying capacitor C200. Meanwhile, the other end of the switch S201 is connected to the node N1.

[0089] The switch S202 is connected between the flying capacitor C201 and ground. Specifically, one end of the switch S202 is connected to one of the two electrodes of the flying capacitor C201. Meanwhile, the other end of the switch S202 is connected to ground.

[0090] The switch S203 is connected between the flying capacitor C201 and the node N1. Specifically, one end of the switch S203 is connected to one of the two electrodes of the flying capacitor C201. Meanwhile, the other end of the switch S203 is connected to the node N1.

[0091] The switch S204 is connected between the flying capacitors C200 and C202 and the node N1. Specifically, one end of the switch S204 is connected to the other of the two electrodes of the flying capacitor C200 and one of the two electrodes of the flying capacitor C202. Meanwhile, the other end of the switch S204 is connected to the node N1.

[0092] The switch S205 is connected between the flying capacitors C200 and C202 and the node N2. Specifically, one end of the switch S205 is connected to the other of the two electrodes of the flying capacitor C200 and one of the two electrodes of the flying capacitor C202. Meanwhile, the other end of the switch S205 is connected to the node N2.

[0093] The switch S206 is connected between the flying capacitors C201 and C203 and the node N1. Specifically, one end of the switch S206 is connected to the other of the two electrodes of the flying capacitor C201 and one of the two electrodes of the flying capacitor C203. Meanwhile, the other end of the switch S206 is connected to the node N1.

[0094] The switch S207 is connected between the flying capacitors C201 and C203 and the node N2. Specifically, one end of the switch S207 is connected to the other of the two electrodes of the flying capacitor C201 and one of the two electrodes of the flying capacitor C203. Meanwhile, the other end of the switch S207 is connected to the node N2.

[0095] The switch S208 is connected between the flying capacitors C202 and C204 and the node N2. Specifically, one end of the switch S208 is connected to the other of the two electrodes of the flying capacitor C202 and one of the two electrodes of the flying capacitor C204. Meanwhile, the other end of the switch S208 is connected to the node N2.

[0096] The switch S209 is connected between the flying capacitors C202 and C204 and the node N3. Specifically, one end of the switch S209 is connected to the other of the two electrodes of the flying capacitor C202 and one of the two electrodes of the flying capacitor C204. Meanwhile, the other end of the switch S209 is connected to the node N3.

[0097] The switch S210 is connected between the flying capacitors C203 and C205 and the node N2. Specifically, one end of the switch S210 is connected to the other of the two electrodes of the flying capacitor C203 and one of the two electrodes of the flying capacitor C205. Meanwhile, the other end of the switch S210 is connected to the node N2.

[0098] The switch S211 is connected between the flying capacitors C203 and C205 and the node N3. Specifically, one end of the switch S211 is connected to the other of the two electrodes of the flying capacitor C203 and one of the two electrodes of the flying capacitor C205. Meanwhile, the other end of the switch S211 is connected to the node N3.

[0099] The switch S212 is connected between the flying capacitors C204 and C206 and the node N3. Specifically, one end of the switch S212 is connected to the other of the two electrodes of the flying capacitor C204 and one of the two electrodes of the flying capacitor C206. Meanwhile, the other end of the switch S212 is connected to the node N3.

[0100] The switch S213 is connected between the flying capacitors C204 and C206 and the node N4. Specifically, one end of the switch S213 is connected to the other of the two electrodes of the flying capacitor C204 and one of the two electrodes of the flying capacitor C206. Meanwhile, the other end of the switch S213 is connected to the node N4.

[0101] The switch S214 is connected between the flying capacitors C205 and C207 and the node N3. Specifically, one end of the switch S214 is connected to the other of the two electrodes of the flying capacitor C205 and one of the two electrodes of the flying capacitor C207. Meanwhile, the other end of the switch S214 is connected to the node N3.

[0102] The switch S215 is connected between the flying capacitors C205 and C207 and the node N4. Specifically, one end of the switch S215 is connected to the other of the two electrodes of the flying capacitor C205 and one of the two electrodes of the flying capacitor C207. Meanwhile, the other end of the switch S215 is connected to the node N4.

[0103] The switch S216 is connected between the flying capacitors C206 and C208 and the node N4. Specifically, one end of the switch S216 is connected to the other of the two electrodes of the flying capacitor C206 and one of the two electrodes of the flying capacitor C208. Meanwhile, the other end of the switch S216 is connected to the node N4.

[0104] The switch S217 is connected between the flying capacitors C206 and C208 and the node N5. Specifically, one end of the switch S217 is connected to the other of the two electrodes of the flying capacitor C206 and one of the two electrodes of the flying capacitor C208. Meanwhile, the other end of the switch S217 is connected to the node N5.

[0105] The switch S218 is connected between the flying capacitors C207 and C209 and the node N4. Specifically, one end of the switch S218 is connected to the other of the two electrodes of the flying capacitor C207 and one of the two electrodes of the flying capacitor C209. Meanwhile, the other end of the switch S218 is connected to the node N4.

[0106] The switch S219 is connected between the flying capacitors C207 and C209 and the node N5. Specifically, one end of the switch S219 is connected to the other of the two electrodes of the flying capacitor C207 and one of the two electrodes of the flying capacitor C209. Meanwhile, the other end of the switch S219 is connected to the node N5.

[0107] The switch S220 is connected between the flying capacitor C208 and a node N5. Specifically, one end of the switch S220 is connected to the other of the two electrodes of the flying capacitor C208. Meanwhile, the other end of the switch S220 is connected to the node N5.

[0108] The switch S221 is connected between the flying capacitor C208 and a node N6. Specifically, one end of the switch S221 is connected to the other of the two electrodes of the flying capacitor C208. Meanwhile, the other end of the switch S221 is connected to the node N6.

[0109] The switch S222 is connected between the flying capacitor C209 and a node N5. Specifically, one end of the switch S222 is connected to the other of the two electrodes of the flying capacitor C209. Meanwhile, the other end of the switch S222 is connected to the node N5.

[0110] The switch S223 is connected between the flying capacitor C209 and a node N6. Specifically, one end of the switch S223 is connected to the other of the two electrodes of the flying capacitor C209. Meanwhile, the other end of the switch S223 is connected to the node N6.

[0111] A first set of switches including switches S200, S203, S204, S207, S208, S211, S212, S215, S216, S219, S220 and S223 and a second set of switches including switches S201, S202, S205, S206, S209, S210, S213, S214, S217, S218, S221 and S222 are switched between open and closed states inversely to each other based on a control signal CS20 from the digital control circuit 51.

[0112] Specifically, in the first phase, the first set of switches are closed and the second set of switches are opened. As a result, one of the two electrodes of the flying capacitor C200 is connected to ground. The other of the two electrodes of the flying capacitor C200, one of the two electrodes of the flying capacitor C201, and one of the two electrodes of the flying capacitor C202 are connected to node N1. The other of the two electrodes of the flying capacitor C201, the other of the two electrodes of the flying capacitor C202, one of the two electrodes of the flying capacitor C203, and one of the two electrodes of the flying capacitor C204 are connected to node N2. The other of the two electrodes of the flying capacitor C203, the other of the two electrodes of the flying capacitor C204, one of the two electrodes of the flying capacitor C205, and one of the two electrodes of the flying capacitor C206 are connected to node N3. The other of the two electrodes of flying capacitor C205, the other of the two electrodes of flying capacitor C206, one of the two electrodes of flying capacitor C207, and one of the two electrodes of flying capacitor C208 are connected to node N4. The other of the two electrodes of flying capacitor C207, the other of the two electrodes of flying capacitor C208, and one of the two electrodes of flying capacitor C209 are connected to node N5. The other of the two electrodes of flying capacitor C209 is connected to node N6.

[0113] Conversely, in the second phase, the first set of switches are opened and the second set of switches are closed. As a result, one of the two electrodes of the flying capacitor C201 is connected to ground. One of the two electrodes of the flying capacitor C200, the other of the two electrodes of the flying capacitor C201, and one of the two electrodes of the flying capacitor C203 are connected to node N1. The other of the two electrodes of the flying capacitor C200, one of the two electrodes of the flying capacitor C202, the other of the two electrodes of the flying capacitor C203, and one of the two electrodes of the flying capacitor C205 are connected to node N2. The other of the two electrodes of the flying capacitor C202, one of the two electrodes of the flying capacitor C204, the other of the two electrodes of the flying capacitor C205, and one of the two electrodes of the flying capacitor C207 are connected to node N3. The other of the two electrodes of flying capacitor C204, one of the two electrodes of flying capacitor C206, the other of the two electrodes of flying capacitor C207, and one of the two electrodes of flying capacitor C209 are connected to node N4. The other of the two electrodes of flying capacitor C206, one of the two electrodes of flying capacitor C208, and the other of the two electrodes of flying capacitor C209 are connected to node N5. The other of the two electrodes of flying capacitor C208 is connected to node N6.

[0114] By repeating these first and second phases, flying capacitors C200-C209 can be charged and discharged in a complementary manner. For example, during one of the first and second phases, flying capacitors C200, C202, C204, C206, and C208 charge smoothing capacitors C210-C215, and during the other of the first and second phases, flying capacitors C201, C203, C205, C207, and C209 charge smoothing capacitors C210-C215. In other words, smoothing capacitors C210-C215 are always charged by one of flying capacitors C200-C209. Therefore, even if a current flows from one of nodes N1-N6 to power supply modulation circuit 31 at high speed, charge is quickly replenished to one of nodes N1-N6, thereby suppressing fluctuations in the potential of nodes N1-N6.

[0115] By operating in this manner, the switched-capacitor circuit 20 can maintain approximately equal voltages across each of the smoothing capacitors C210 to C215. Specifically, at six nodes N1 to N6 labeled V1 to V6, voltages V1 to V6 are maintained such that (V6-V5): (V5-V4): (V4-V3): (V3-V2): (V2-V1): (V1-VG) = 1:1:1:1:1:1 and V6 > V5 > V4 > V3 > V2 > V1 > VG are satisfied. For example, if the regulated voltage supplied from the pre-regulator circuit 10 is 5V, the switched-capacitor circuit 20 can generate a plurality of discrete voltages (V1, V2, V3, V4, V5, V6) (1V, 2V, 3V, 4V, 5V, 6V).

[0116] 3 is an example and is not limiting. Part of the switched capacitor circuit 20 may not be included in the tracker circuit 1. For example, the flying capacitors C200 to C203 and the smoothing capacitors C210 to C212 may not be included in the tracker circuit 1.

[0117] 3, an exemplary circuit configuration of the power supply modulation circuit 31 will be described. The power supply modulation circuit 31 includes input terminals T311 to T316, an output terminal T310, and switches S311 to S316.

[0118] The input terminals T311 to T316 are terminals that respectively receive a plurality of discrete voltages V1 to V6 generated by the switched capacitor circuit 20. The input terminals T311 to T316 are connected to the output terminals T201 to T206 of the switched capacitor circuit 20 outside the power supply modulation circuit 31, and are connected to the switches S311 to S316 inside the power supply modulation circuit 31, respectively.

[0119] The output terminal T310 is a terminal that selectively outputs at least one of a plurality of discrete voltages V1 to V6. The output terminal T310 is connected to the common terminal T400 of the band switch circuit 40 outside the power supply modulation circuit 31, and is connected to the switches S311 to S316 inside the power supply modulation circuit 31.

[0120] The switch S311 is connected between the input terminal T311 and the output terminal T310. The switch S312 is connected between the input terminal T312 and the output terminal T310. The switch S313 is connected between the input terminal T313 and the output terminal T310. The switch S314 is connected between the input terminal T314 and the output terminal T310. The switch S315 is connected between the input terminal T315 and the output terminal T310. The switch S316 is connected between the input terminal T316 and the output terminal T310.

[0121] These switches S311 to S316 are switched open and closed (on and off) by a control signal (CS31) from the digital control circuit 52. In this embodiment, the switches S311 to S316 are controlled to be exclusively on. That is, only one of the switches S311 to S316 is closed, and all the remaining switches S311 to S316 are controlled to be open. This allows the power supply modulation circuit 31 to supply one voltage selected from a plurality of discrete voltages V1 to V6 to the power amplifier 3A or 4A.

[0122] 3 is an example and is not limiting. In particular, the switches S311 to S316 may have any configuration and may be controlled in any manner as long as they can selectively connect at least one of the six input terminals T311 to T316 to the output terminal T310.

[0123] 3, an exemplary circuit configuration of the band switch circuit 40 will be described. The band switch circuit 40 includes a common terminal T400, selection terminals T401 and T402, and switches S401 and S402.

[0124] The common terminal T400 is a terminal that receives a voltage selected by the power supply modulation circuit 31. The common terminal T400 is connected to the output terminal T310 of the power supply modulation circuit 31 outside the band switch circuit 40, and is connected to switches S401 and S402 inside the band switch circuit 40.

[0125] The selection terminal T401 is a terminal that supplies the power supply voltage Vcc11 to the power amplifier 3 A. The selection terminal T401 is connected to the output terminal T16 of the tracker circuit 1 outside the band switch circuit 40, and is connected to the switch S401 inside the band switch circuit 40.

[0126] The selection terminal T402 is a terminal that supplies the power supply voltage Vcc21 to the power amplifier 4 A. The selection terminal T402 is connected to the output terminal T17 of the tracker circuit 1 outside the band switch circuit 40, and is connected to the switch S402 inside the band switch circuit 40.

[0127] The switch S401 is connected between the common terminal T400 and the selection terminal T401. The switch S402 is connected between the common terminal T400 and the selection terminal T402. These switches S401 and S402 are switched open and closed (on and off) by a control signal CS40 from the digital control circuit 51. In this embodiment, the switches S401 and S402 are controlled to be exclusively on. That is, only one of the switches S401 and S402 is closed, and the other of the switches S401 and S402 is opened. This allows the band switch circuit 40 to supply the power supply voltage to one selected from the power amplifiers 3A and 4A.

[0128] [1.7 Circuit Configuration of Digital Control Circuit 52] Next, an exemplary circuit configuration of the digital control circuit 52 will be described with reference to Fig. 4. Fig. 4 is a circuit configuration diagram of the digital control circuit 52 according to this embodiment.

[0129] 4 is an exemplary circuit configuration, and digital control circuit 52 may be implemented using any of a wide variety of circuit implementations and circuit technologies, and therefore the description of digital control circuit 52 provided below should not be construed as limiting.

[0130] The digital control circuit 52 includes a DCL switch circuit 521, a DCL decoder circuit 522, input terminals T141, T142, T151 and T152, and a plurality of output terminals T521.

[0131] The input terminals T141 and T142 are external connection terminals of the digital control circuit 52, and are terminals that receive DCL signals (DCL1 (DCL11 and DCL12)) from the RFIC 2A. The input terminals T141 and T142 are connected to two control terminals T14 outside the digital control circuit 52, respectively, and are connected to a DCL switch circuit 521 inside the digital control circuit 52.

[0132] The input terminals T151 and T152 are external connection terminals of the digital control circuit 52, and are terminals that receive DCL signals (DCL2 (DCL21 and DCL22)) from the RFIC 2B. The input terminals T151 and T152 are connected to two control terminals T15 outside the digital control circuit 52, respectively, and are connected to a DCL switch circuit 521 inside the digital control circuit 52.

[0133] The plurality of output terminals T521 are external connection terminals of the digital control circuit 52, and are terminals for supplying a control signal (CS31) to the power supply modulation circuit 31. The control signal (CS31) includes control signals (CS311 to CS316) that respectively control the opening and closing of switches S311 to S316 of the power supply modulation circuit 31. The plurality of output terminals T521 are connected to the power supply modulation circuit 31 outside the digital control circuit 52, and are connected to a DCL decoder circuit 522 inside the digital control circuit 52.

[0134] The DCL switch circuit 521 includes common terminals 5211 and 5212 and selection terminals 5213 to 5216. The common terminals 5211 and 5212 are an example of a first common terminal and are connected to the DCL decoder circuit 522. The selection terminals 5213 and 5214 are an example of a first selection terminal and are connected to input terminals T141 and T142, respectively. The selection terminals 5215 and 5216 are an example of a second selection terminal and are connected to input terminals T151 and T152, respectively.

[0135] In this connection configuration, the DCL switch circuit 521 can exclusively connect the common terminal 5211 to the selection terminals 5213 and 5215, and exclusively connect the common terminal 5212 to the selection terminals 5214 and 5216, based on, for example, a control signal from the digital control circuit 51. For example, when the power amplifier 3A amplifies a high-frequency signal (RF11), the DCL switch circuit 521 connects the common terminal 5211 to the selection terminal 5213 and connects the common terminal 5212 to the selection terminal 5214. As a result, the DCL signal (DCL1 (DCL11 and DCL12)) is input to the DCL decoder circuit 522. Furthermore, for example, when the power amplifier 4A amplifies a high-frequency signal (RF21), the DCL switch circuit 521 connects the common terminal 5211 to the selection terminal 5215 and connects the common terminal 5212 to the selection terminal 5216. As a result, the DCL signal (DCL2 (DCL21 and DCL22)) is input to the DCL decoder circuit 522. The DCL switch circuit 521 is configured by, for example, a DPDT (Double-Pole Double-Throw) type switch circuit.

[0136] The DCL decoder circuit 522 is an example of a first DCL decoder circuit, and can decode the DCL signal (DCL1 (DCL11 and DCL12) or DCL2 (DCL21 and DCL22)) to generate a control signal (CS31 (CS311 to CS316)). For example, when the DCL signal (DCL1 or DCL2) indicates "00," the DCL decoder circuit 522 may generate a control signal (CS31) that closes only switch S313 in the power supply modulation circuit 31. Alternatively, when the DCL signal (DCL1 or DCL2) indicates "11," the DCL decoder circuit 522 may generate a control signal (CS31) that closes only switch S316 in the power supply modulation circuit 31.

[0137] 4 is merely an example, and is not intended to be limiting. For example, a part or all of the DCL switch circuit 521 may be integrated into the DCL decoder circuit 522.

[0138] [1.8 Implementation Examples of Tracker Circuit 1] Next, implementation examples of the tracker circuit 1 having the circuit configuration described above will be described with reference to FIGS. 5 to 7. FIG. 5 is a plan view of the tracker circuit 1 according to this embodiment. FIG. 6 is a plan view of the tracker circuit 1 according to this embodiment, seen through to the main surface 90b of the module substrate 90 from the positive side of the z axis. FIG. 7 is a cross-sectional view of the tracker circuit 1 according to this embodiment. The cross-section of the tracker circuit 1 in FIG. 7 is taken along line vii-vii in FIGS. 5 and 6.

[0139] 5-7 illustrate one example implementation of tracker circuit 1, and tracker circuit 1 may be implemented using any of a wide variety of circuit implementations and circuit techniques, and therefore the description of tracker circuit 1 provided below should not be construed as limiting.

[0140] The tracker circuit 1 includes a module substrate 90, a resin member 91, and a plurality of external connection terminals 92 in addition to the pre-regulator circuit 10, the switched capacitor circuit 20, the power supply modulation circuit 31, the band switch circuit 40, and a plurality of circuit components including active and passive elements included in the digital control circuits 51 and 52 shown in FIG.

[0141] The module substrate 90 has opposing main surfaces 90a and 90b. The main surface 90a may also be referred to as the upper surface or front surface. The main surface 90b may also be referred to as the lower surface or back surface. Although wiring patterns, via conductors, and the like are formed within the module substrate 90 and on the main surfaces 90a and 90b, they are not shown in the drawings.

[0142] The module substrate 90 may be, for example, a low temperature co-fired ceramics (LTCC) substrate or a high temperature co-fired ceramics (HTCC) substrate having a laminated structure of multiple dielectric layers, a component-embedded substrate, a substrate having a redistribution layer (RDL), or a printed circuit board, but is not limited to these.

[0143] The integrated circuit 100, capacitors C101, C102, and C200 to C215, and a resin member 91 are arranged on a main surface 90a of the module substrate 90. On the other hand, a plurality of external connection terminals 92 are arranged on a main surface 90b of the module substrate 90.

[0144] The integrated circuit 100 includes a PR unit 100a, an SC unit 100b, an SM unit 100c, a BSW unit 100d, and a DCTL unit 100e. The PR unit 100a includes switches S101 to S104. The SC unit 100b includes switches S200 to S223. The SM unit 100c includes switches S311 to S316. The BSW unit 100d includes switches S401 and S402. The DCTL unit 100e includes digital control circuits 51 and 52.

[0145] 5, the PR unit 100a, SC unit 100b, SM unit 100c, BSW unit 100d, and DCTL unit 100e are included in a single integrated circuit 100, but this is not limited to this. For example, the PR unit 100a and SC unit 100b may be included in one integrated circuit, and the SM unit 100c, BSW unit 100d, and DCTL unit 100e may be included in another integrated circuit. Furthermore, the PR unit 100a, SC unit 100b, SM unit 100c, BSW unit 100d, and DCTL unit 100e may be included individually in five integrated circuits. Furthermore, the DCTL unit 100e may be divided into two DCTL units each including digital control circuits 51 and 52.

[0146] The integrated circuit 100 is configured using, for example, a complementary metal oxide semiconductor (CMOS), and specifically may be manufactured using a silicon on insulator (SOI) process. However, the integrated circuit 100 is not limited to a CMOS.

[0147] Each of the capacitors C101, C102, and C200 to C215 is implemented as a chip capacitor. A chip capacitor refers to a surface mount device (SMD) that constitutes a capacitor. The implementation of the capacitors C101, C102, and C200 to C215 is not limited to a chip capacitor. For example, some or all of the capacitors C101, C102, and C200 to C215 may be included in an integrated passive device (IPD), or may be included in the integrated circuit 100.

[0148] The plurality of capacitors C101, C102, and C200 to C215 arranged on the main surface 90a are grouped by circuit and arranged around the integrated circuit 100.

[0149] Specifically, the capacitors C101 and C102 included in the pre-regulator circuit 10 are arranged in a region on the main surface 90a between the left edge of the integrated circuit 100 and the left edge of the module substrate 90 when viewed in plan view of the module substrate 90. As a result, the capacitors C101 and C102 included in the pre-regulator circuit 10 are arranged near the PR section 100a in the integrated circuit 100.

[0150] The flying capacitors C200 to C209 and smoothing capacitors C210 to C215 included in the switched capacitor circuit 20 are arranged in a region on the main surface 90a sandwiched between the top edge of the integrated circuit 100 and the top edge of the module substrate 90, and in a region on the main surface 90a sandwiched between the right edge of the integrated circuit 100 and the right edge of the module substrate 90, in a plan view of the module substrate 90. As a result, the flying capacitors C200 to C209 and smoothing capacitors C210 to C215 included in the switched capacitor circuit 20 are arranged near the SC unit 100b in the integrated circuit 100.

[0151] The resin member 91 covers at least a portion of the main surface 90a of the module substrate 90 and the circuit components on the main surface 90a. The resin member 91 may be made of, for example, an epoxy resin, but is not limited to, a material. The resin member 91 is an optional component that has the function of ensuring the reliability of the circuit components on the main surface 90a, such as mechanical strength and moisture resistance. Note that in FIG. 5 , the resin member 91 that covers multiple components is omitted to facilitate understanding of the relative positions of the components.

[0152] A plurality of external connection terminals 92 are arranged on the main surface 90b of the module substrate 90. The plurality of external connection terminals 92 include the input terminal T11, control terminals T12 to T15, and output terminals T16 and T17 shown in FIGS. 2 and 3. Furthermore, the plurality of external connection terminals 92 includes a ground terminal connected to ground. Each of the plurality of external connection terminals 92 is electrically connected to an input / output terminal and / or a ground terminal on a motherboard (not shown) arranged in the negative direction of the z-axis of the tracker circuit 1. The plurality of external connection terminals 92 may be, but are not limited to, copper electrodes or solder electrodes.

[0153] [1.9 Summary] As described above, the tracker circuit 1 according to this embodiment includes: a control terminal T14 that receives a DCL signal (DCL1) generated based on the envelope of a radio frequency signal (RF11) from an RFIC 2A configured to process the radio frequency signal (RF11); a control terminal T15 that receives a DCL signal (DCL2) generated based on the envelope of the radio frequency signal (RF21) from an RFIC 2B configured to process the radio frequency signal (RF21); a voltage generation circuit 25 that is configured to generate a plurality of discrete voltages V1 to V6; a power supply modulation circuit 31 that is configured to selectively output at least one of the plurality of discrete voltages to a power amplifier 3A that is configured to amplify the radio frequency signal (RF11) and a power amplifier 4A that is configured to amplify the radio frequency signal (RF21); and a digital control circuit 52 that is configured to selectively use the DCL signals (DCL1 and DCL2) to control the power supply modulation circuit 31.

[0154] This allows the power supply modulation circuit 31 to be controlled by selectively using two DCL signals (DCL1 and DCL2) supplied from two different RFICs 2A and 2B, eliminating the need to provide two separate power supply modulation circuits for the two RFICs 2A and 2B. This allows the number of power supply modulation circuits to be reduced from two to one, contributing to the miniaturization of the tracker circuit 1. In particular, as shown in FIG. 5 , when the power supply modulation circuit 31 is implemented in an integrated circuit 100, the implementation area of ​​the power supply modulation circuit within the integrated circuit 100 can be reduced.

[0155] Furthermore, for example, in the tracker circuit 1 according to this embodiment, the digital control circuit 52 may include a DCL decoder circuit 522 configured to decode the DCL signals (DCL1 and DCL2) and generate a control signal (CS31) that controls the switches S311 to S316 included in the power supply modulation circuit 31, and a DCL switch circuit 521 that includes common terminals 5211 and 5212 connected to the DCL decoder circuit 522, selection terminals 5213 and 5214 connected to the control terminal T14, and selection terminals 5215 and 5216 connected to the control terminal T15.

[0156] This allows the DCL switch circuit 521 to switch the input of the DCL decoder circuit 522 between the DCL signal (DCL1) and the DCL signal (DCL2), thereby simplifying the implementation of the digital control circuit 52.

[0157] For example, in the tracker circuit 1 according to the present embodiment, the high-frequency signal (RF11) may be a cellular network signal in a frequency band included in a first frequency range, and the high-frequency signal (RF21) may be a cellular network signal in a frequency band included in a second frequency range, where the first frequency range may be from 410 MHz to 7125 MHz, and the second frequency range may be from 24.25 GHz to 71 GHz.

[0158] According to this, when different RFICs 2A and 2B are used depending on the frequency range, the DCL signals (DCL1 and DCL2) supplied from the two RFICs 2A and 2B can be selectively used to control the power supply modulation circuit 31. Therefore, the tracker circuit 1 can be shared between two frequency ranges, which can contribute to the miniaturization of the tracker circuit 1 and the communication device 6.

[0159] (Embodiment 2) Next, embodiment 2 will be described. In this embodiment, the main difference from embodiment 1 above is that the tracker circuit is provided with two power supply modulation units so that different voltages can be supplied to two power amplifiers simultaneously. Below, this embodiment will be described with reference to the drawings, focusing on the differences from embodiment 1 above.

[0160] [2.1 Circuit Configuration of Communication Device 6A] First, an exemplary circuit configuration of the communication device 6A according to this embodiment will be described with reference to Fig. 8. Fig. 8 is a circuit configuration diagram of the communication device 6A according to this embodiment.

[0161] 8 is an exemplary circuit configuration, and the communication device 6A may be implemented using any of a wide variety of circuit implementations and circuit technologies, and therefore the description of the communication device 6A provided below should not be construed as limiting.

[0162] A communication device 6A according to this embodiment includes a tracker circuit 1A, RFICs 2A and 2B, and power amplifiers 3A, 3B, 4A, and 4B.

[0163] The tracker circuit 1A can simultaneously supply power supply voltages Vcc11 and Vcc12 to the power amplifiers 3A and 3B in the D-ET mode, and can simultaneously supply power supply voltages Vcc21 and Vcc22 to the power amplifiers 4A and 4B in the D-ET mode. Note that the tracker circuit 1A may also supply power supply voltages to the power amplifiers 3A, 3B, 4A, and 4B in the APT mode. The detailed circuit configuration of the tracker circuit 1A will be described later.

[0164] The RFIC 2A is an example of a first signal processing circuit, and can process not only the high-frequency signal (RF11) but also a high-frequency signal (RF12), which is an example of a third high-frequency signal, and output the high-frequency signals (RF11 and RF12) to the power amplifiers 3A and 3B, respectively. The high-frequency signal (RF12), like the high-frequency signal (RF11), is a cellular network signal, and is, for example, a signal in a frequency band included in FR1. The high-frequency signal (RF12) may also be, for example, a signal in a frequency band included in FR3.

[0165] The RFIC 2B is an example of a second signal processing circuit, and can process not only the high-frequency signal (RF21) but also a high-frequency signal (RF22), which is an example of a fourth high-frequency signal, and output the high-frequency signals (RF21 and RF22) to the power amplifiers 4A and 4B, respectively. The high-frequency signal (RF22), like the high-frequency signal (RF21), is a cellular network signal, and is, for example, a signal in a frequency band included in FR2. The high-frequency signal (RF22) may also be, for example, a signal in a frequency band included in FR3.

[0166] The power amplifier 3B is an example of a third power amplifier, and can amplify the high frequency signal (RF12) using the power supply voltage Vcc12 supplied from the tracker circuit 1A.

[0167] The power amplifier 4B is an example of a fourth power amplifier, and can amplify the high frequency signal (RF22) using the power supply voltage Vcc22 supplied from the tracker circuit 1A.

[0168] 2.2 Circuit Configuration of Tracker Circuit 1A Next, the circuit configuration of the tracker circuit 1A will be described with reference to Fig. 8. Note that Fig. 8 is an exemplary circuit configuration, and the tracker circuit 1A can be implemented using any of a wide variety of circuit implementations and circuit technologies. Therefore, the description of the tracker circuit 1A provided below should not be construed as limiting.

[0169] The tracker circuit 1A comprises a voltage generation circuit 25 including a pre-regulator circuit 10 and a switched capacitor circuit 20, power supply modulation circuits 31 and 32, a band switch circuit 40A, digital control circuits 51 and 52A, an input terminal T11, control terminals T12, T13, T14, T15, T18 and T19, and output terminals T16, T17, T20 and T21.

[0170] A plurality of control terminals T18 and T19 are external connection terminals of the tracker circuit 1A, and are terminals that receive digital control signals from the RFICs 2A and 2B.

[0171] The two control terminals T18 are examples of third DCL terminals, and are connected to the RFIC 2A outside the tracker circuit 1A and connected to the digital control circuit 52A inside the tracker circuit 1A. The two control terminals T18 can receive a DCL signal (DCL3 (DCL31, DCL32)) from the RFIC 2A and supply the DCL signal (DCL3) to the digital control circuit 52A.

[0172] The two control terminals T19 are examples of fourth DCL terminals, which are connected to RFIC 2B outside the tracker circuit 1A and connected to the digital control circuit 52A inside the tracker circuit 1A. The two control terminals T19 can receive a DCL signal (DCL4 (DCL41, DCL42)) from RFIC 2B and supply the DCL signal (DCL4) to the digital control circuit 52A.

[0173] The number of each of the control terminals T18 and T19 is not limited to 2. For example, if the number of each of the control terminals T18 and T19 is three or more, voltages can be expressed by three or more 1-bit signals, and the number of voltages selectable by the power supply modulation circuits 31 and 32 can be increased.

[0174] The output terminal T20 is an external connection terminal of the tracker circuit 1A and is a terminal that supplies a power supply voltage Vcc12 to the power amplifier 3B. The output terminal T20 is connected to the power amplifier 3B outside the tracker circuit 1A and is connected to the band switch circuit 40A inside the tracker circuit 1A.

[0175] The output terminal T21 is an external connection terminal of the tracker circuit 1A and is a terminal that supplies a power supply voltage Vcc22 to the power amplifier 4B. The output terminal T21 is connected to the power amplifier 4B outside the tracker circuit 1A and is connected to the band switch circuit 40A inside the tracker circuit 1A.

[0176] The power supply modulation circuit 32 is an example of a second power supply modulation circuit, and can selectively output at least one of a plurality of discrete voltages V1 to V6 to the power amplifiers 3B and 4B. In other words, the power supply modulation circuit 32 can select at least one voltage from the plurality of discrete voltages V1 to V6 and selectively supply the selected at least one voltage to the power amplifiers 3B and 4B. The detailed circuit configuration of the power supply modulation circuit 32 is similar to that of the power supply modulation circuit 31, and therefore a description thereof will be omitted.

[0177] The band switch circuit 40A can switch the output of the power supply modulation circuit 31 between the power amplifiers 3A and 4A, and can switch the output of the power supply modulation circuit 32 between the power amplifiers 3B and 4B. Specifically, the band switch circuit 40A includes common terminals T400 and T403, and selection terminals T401, T402, T404, and T405.

[0178] The common terminal T403 is a terminal that receives a voltage selected by the power supply modulation circuit 32. The common terminal T403 is connected to the power supply modulation circuit 32 outside the band switch circuit 40A.

[0179] The selection terminal T404 is a terminal that supplies the power supply voltage Vcc12 to the power amplifier 3 B. The selection terminal T404 is connected to the output terminal T20 of the tracker circuit 1 A outside the band switch circuit 40 A.

[0180] The selection terminal T405 is a terminal that supplies the power supply voltage Vcc22 to the power amplifier 4B. The selection terminal T405 is connected to the output terminal T21 of the tracker circuit 1A outside the band switch circuit 40A.

[0181] It should be noted that the band switch circuit 40A does not have to be included in the tracker circuit 1A. In this case, the power supply modulation circuit 31 may be connected to the power amplifiers 3A and 4A without passing through the band switch circuit 40A, and the power supply modulation circuit 32 may be connected to the power amplifiers 3B and 4B without passing through the band switch circuit 40A.

[0182] The digital control circuit 52A can generate control signals (CS31 and CS32) by selectively using a set of DCL signals (DCL1 and DCL3) and a set of DCL signals (DCL2 and DCL4) received at control terminals T14, T15, T18, and T19. The DCL signal (DCL3) is an example of a third DCL signal and is generated based on the envelope of the high-frequency signal (RF12). The DCL signal (DCL4) is an example of a fourth DCL signal and is generated based on the envelope of the high-frequency signal (RF22). The control signal (CS32) is an example of a second control signal and is a signal that controls each of the multiple switches included in the power supply modulation circuit 32. A detailed circuit configuration of the digital control circuit 52A will be described later.

[0183] [2.3 Circuit Configuration of Digital Control Circuit 52A] Next, an exemplary circuit configuration of the digital control circuit 52A will be described with reference to Fig. 9. Fig. 9 is a circuit configuration diagram of the digital control circuit 52A according to this embodiment.

[0184] 9 is an example circuit configuration, and digital control circuit 52A may be implemented using any of a wide variety of circuit implementations and circuit technologies, and therefore the description of digital control circuit 52A provided below should not be construed as limiting.

[0185] The digital control circuit 52A includes a DCL switch circuit 521A, DCL decoder circuits 522 and 523, input terminals T141, T142, T151, T152, T181, T182, T191 and T192, and a plurality of output terminals T521 and T522.

[0186] The input terminals T181 and T182 are external connection terminals of the digital control circuit 52A and are terminals that receive DCL signals (DCL3 (DCL31 and DCL32)) from the RFIC 2A. The input terminals T181 and T182 are connected to two control terminals T18 outside the digital control circuit 52A, respectively, and are connected to the DCL switch circuit 521A inside the digital control circuit 52A.

[0187] The input terminals T191 and T192 are external connection terminals of the digital control circuit 52A and are terminals that receive DCL signals (DCL4 (DCL41 and DCL42)) from the RFIC 2B. The input terminals T191 and T192 are connected to two control terminals T19 outside the digital control circuit 52A, respectively, and are connected to a DCL switch circuit 521A inside the digital control circuit 52A.

[0188] The plurality of output terminals T522 are external connection terminals of the digital control circuit 52A and are terminals that supply a control signal (CS32) to the power supply modulation circuit 32. The control signal (CS32) includes control signals (CS321 to CS326) that respectively control the opening and closing of the switches of the power supply modulation circuit 32. The plurality of output terminals T522 are connected to the power supply modulation circuit 32 outside the digital control circuit 52A and are connected to the DCL decoder circuit 523 inside the digital control circuit 52A.

[0189] The DCL switch circuit 521A includes common terminals 5211, 5212, 5217, and 5218, and selection terminals 5213 to 5216 and 5219 to 5222. The common terminals 5217 and 5218 are an example of a second common terminal, and are connected to the DCL decoder circuit 523. The selection terminals 5219 and 5220 are an example of a third selection terminal, and are connected to the input terminals T181 and T182, respectively. The selection terminals 5221 and 5222 are an example of a fourth selection terminal, and are connected to the input terminals T191 and T192, respectively.

[0190] In this connection configuration, the DCL switch circuit 521A can exclusively connect the common terminal 5217 to the selection terminals 5219 and 5221, and exclusively connect the common terminal 5218 to the selection terminals 5220 and 5222, based on, for example, a control signal from the digital control circuit 51. For example, when the power amplifier 3B amplifies a high-frequency signal (RF12), the DCL switch circuit 521A connects the common terminal 5217 to the selection terminal 5219 and connects the common terminal 5218 to the selection terminal 5220. This allows the DCL signal (DCL3 (DCL31 and DCL32)) to be input to the DCL decoder circuit 523. Furthermore, for example, when the power amplifier 4B amplifies a high-frequency signal (RF22), the DCL switch circuit 521A connects the common terminal 5217 to the selection terminal 5221 and connects the common terminal 5218 to the selection terminal 5222. As a result, the DCL signal (DCL4 (DCL41 and DCL42)) is input to the DCL decoder circuit 523. The DCL switch circuit 521A is composed of, for example, two DPDT type switch circuits.

[0191] The DCL decoder circuit 523 is an example of a second DCL decoder circuit, and can decode the DCL signal (DCL3 (DCL31 and DCL32)) or the DCL signal (DCL4 (DCL41 and DCL42)) to generate a control signal (CS32 (CS321 to CS326)).

[0192] 9 is merely an example, and is not intended to be limiting. For example, a part or all of the DCL switch circuit 521A may be integrated into the DCL decoder circuits 522 and / or 523.

[0193] [2.4 Summary] As described above, in the tracker circuit 1A according to the present embodiment, the RFIC 2A may be further configured to process the radio frequency signal (RF12), and the RFIC 2B may be further configured to process the radio frequency signal (RF22). The tracker circuit 1A may further include a control terminal T18 that receives, from the RFIC 2A, a DCL signal (DCL3) that is generated based on the envelope of the radio frequency signal (RF12), a control terminal T19 that receives, from the RFIC 2B, a DCL signal (DCL4) that is generated based on the envelope of the radio frequency signal (RF22), and a power supply modulation circuit 32 that is configured to selectively output at least one of a plurality of discrete voltages V1 to V6 to a power amplifier 3B that is configured to amplify the radio frequency signal (RF12) and a power amplifier 4B that is configured to amplify the radio frequency signal (RF22). The digital control circuit 52A may be further configured to control the power supply modulation circuit 32 by selectively using the DCL signals (DCL3 and DCL4).

[0194] This allows the power supply modulation circuit 31 to be controlled by selectively using two DCL signals (DCL1 and DCL2) supplied from two different RFICs 2A and 2B, and the power supply modulation circuit 32 to be controlled by selectively using two DCL signals (DCL3 and DCL4) supplied from two different RFICs 2A and 2B. Therefore, in the tracker circuit 1A that can simultaneously supply different discrete voltages to two power amplifiers, it is not necessary to provide two power supply modulation circuits for each of the two RFICs 2A and 2B (a total of four power supply modulation circuits). Therefore, the number of power supply modulation circuits can be reduced from four to two, which contributes to the miniaturization of the tracker circuit 1A.

[0195] Also, for example, in the tracker circuit 1A according to this embodiment, the digital control circuit 52A may include a DCL decoder circuit 522 configured to decode the DCL signals (DCL1 and DCL2) and generate a control signal (CS31) that controls the switch included in the power supply modulation circuit 31, a DCL decoder circuit 523 configured to decode the DCL signals (DCL3 and DCL4) and generate a control signal (CS32) that controls the switch included in the power supply modulation circuit 32, and a DCL switch circuit 521A that includes common terminals 5211 and 5212 connected to the DCL decoder circuit 522, common terminals 5217 and 5218 connected to the DCL decoder circuit 523, selection terminals 5213 and 5214 connected to the control terminal T14, selection terminals 5215 and 5216 connected to the control terminal T15, selection terminals 5219 and 5220 connected to the control terminal T18, and selection terminals 5221 and 5222 connected to the control terminal T19.

[0196] This allows the DCL switch circuit 521A to switch the input of the DCL decoder circuit 522 between the DCL signal (DCL1) and the DCL signal (DCL2), and the input of the DCL decoder circuit 523 between the DCL signal (DCL3) and the DCL signal (DCL4), thereby simplifying the implementation of the digital control circuit 52A.

[0197] As described above, in the tracker circuit 1A according to this embodiment, the high-frequency signal (RF11) may be a cellular network signal in a frequency band included in a first frequency range, the high-frequency signals (RF21) and (RF22) may be cellular network signals in a frequency band included in a second frequency range, and the high-frequency signal (RF12) may be a cellular network signal in a frequency band included in a third frequency range. In this case, the first frequency range may be from 410 MHz to 7125 MHz, the second frequency range may be from 24.25 GHz to 71 GHz, and the third frequency range may be from 7125 MHz to 24.25 GHz.

[0198] According to this, when RFIC 2A corresponding to FR1 and FR3 and RFIC 2B corresponding to FR2 are used, the DCL signal set (DCL1 and DCL3) supplied from RFIC 2A and the DCL signal set (DCL2 and DCL4) supplied from RFIC 2B can be selectively used to control the power supply modulation circuits 31 and 32. Therefore, the tracker circuit 1A can be shared among the three frequency ranges, which can contribute to the miniaturization of the tracker circuit 1A and the communication device 6A.

[0199] For example, in the tracker circuit 1A according to the present embodiment, the high-frequency signals (RF11 and RF12) may be cellular network signals in a frequency band included in a first frequency range, the high-frequency signal (RF21) may be a cellular network signal in a frequency band included in a second frequency range, and the high-frequency signal (RF22) may be a cellular network signal in a frequency band included in a third frequency range. In this case, the first frequency range may be from 410 MHz to 7125 MHz, the second frequency range may be from 24.25 GHz to 71 GHz, and the third frequency range may be from 7125 MHz to 24.25 GHz.

[0200] According to this, when an RFIC 2A corresponding to FR1 and an RFIC 2B corresponding to FR2 and FR3 are used, the set of DCL signals (DCL1 and DCL3) supplied from RFIC 2A and the set of DCL signals (DCL2 and DCL4) supplied from RFIC 2B can be selectively used to control the power supply modulation circuits 31 and 32. Therefore, the tracker circuit 1A can be shared among the three frequency ranges, which can contribute to the miniaturization of the tracker circuit 1A and the communication device 6A.

[0201] (Embodiment 3) Next, embodiment 3 will be described. This embodiment differs from embodiments 1 and 2 above mainly in that the tracker circuit includes three power supply modulation units so that different voltages can be supplied to three power amplifiers simultaneously, and that the communication device includes three RFICs. Hereinafter, this embodiment will be described with reference to the drawings, focusing on the differences from embodiments 1 and 2 above.

[0202] [3.1 Circuit Configuration of Communication Device 6B] First, an exemplary circuit configuration of the communication device 6B according to this embodiment will be described with reference to Fig. 10. Fig. 10 is a circuit configuration diagram of the communication device 6B according to this embodiment.

[0203] 10 is an exemplary circuit configuration, and communication device 6B may be implemented using any of a wide variety of circuit implementations and circuit technologies, and therefore the description of communication device 6B provided below should not be construed as limiting.

[0204] A communication device 6B according to this embodiment includes a tracker circuit 1B, RFICs 2A, 2B, and 2C, and power amplifiers 3A, 3B, 3C, 4A, 4B, 5A, and 5B.

[0205] In D-ET mode, tracker circuit 1B can simultaneously supply power supply voltages Vcc11, Vcc12, and Vcc13 to power amplifiers 3A, 3B, and 3C, can simultaneously supply power supply voltages Vcc21 and Vcc22 to power amplifiers 4A and 4B, and can simultaneously supply power supply voltages Vcc31 and Vcc32 to power amplifiers 5A and 5B. Note that tracker circuit 1B may also supply power supply voltages to power amplifiers 3A, 3B, 3C, 4A, 4B, 5A, and 5B in APT mode. A detailed circuit configuration of tracker circuit 1B will be described later.

[0206] The RFIC 2A is an example of a first signal processing circuit, and can process not only the high-frequency signals (RF11 and RF12), but also a high-frequency signal (RF13), which is an example of a fifth high-frequency signal, and can output the high-frequency signals (RF11, RF12, and RF13) to the power amplifiers 3A, 3B, and 3C, respectively. The high-frequency signal (RF13), like the high-frequency signals (RF11 and RF12), is a cellular network signal, and is, for example, a signal in a frequency band included in FR1.

[0207] The RFIC 2C is an example of a third signal processing circuit, and can process high-frequency signals (RF31 and RF32) that are examples of the sixth and seventh high-frequency signals, and can output the high-frequency signals (RF31 and RF32) to the power amplifiers 5A and 5B, respectively. The high-frequency signals (RF31 and RF32) are cellular network signals, and are, for example, signals in a frequency band included in FR3. Note that the high-frequency signals (RF31 and RF32) are not limited to cellular network signals.

[0208] The power amplifier 3C is an example of a fifth power amplifier, and can amplify the high frequency signal (RF13) using the power supply voltage Vcc13 supplied from the tracker circuit 1B.

[0209] The power amplifier 5A is an example of a sixth power amplifier, and can amplify the high frequency signal (RF31) using the power supply voltage Vcc31 supplied from the tracker circuit 1B.

[0210] The power amplifier 5B is an example of a seventh power amplifier, and can amplify the radio frequency signal (RF32) using the power supply voltage Vcc32 supplied from the tracker circuit 1B.

[0211] 3.2 Circuit Configuration of Tracker Circuit 1B Next, the circuit configuration of tracker circuit 1B will be described with reference to Fig. 10. Note that Fig. 10 is an exemplary circuit configuration, and tracker circuit 1B can be implemented using any of a wide variety of circuit implementations and circuit technologies. Therefore, the description of tracker circuit 1B provided below should not be construed as limiting.

[0212] The tracker circuit 1B comprises a voltage generation circuit 25 including a pre-regulator circuit 10 and a switched capacitor circuit 20, power supply modulation circuits 31 to 33, a band switch circuit 40B, digital control circuits 51 and 52B, an input terminal T11, control terminals T12, T13, T14, T15, T18, T19, T22, T23, T24 and T25, and output terminals T16, T17, T20, T21, T26, T27 and T28.

[0213] A plurality of control terminals T22, T23, T24 and T25 are external connection terminals of the tracker circuit 1B, and are terminals that receive digital control signals from the RFICs 2A and 2C.

[0214] The two control terminals T22 are connected to the RFIC 2C outside the tracker circuit 1B and are connected to the digital control circuit 51 inside the tracker circuit 1B. The two control terminals T22 can receive a serial data signal (CLK / DATA) from the RFIC 2C and supply the serial data signal (CLK / DATA) to the digital control circuit 51.

[0215] The two control terminals T23 are examples of fifth DCL terminals, and are connected to RFIC 2A outside tracker circuit 1B and connected to digital control circuit 52B inside tracker circuit 1B. The two control terminals T23 can receive a DCL signal (DCL5 (DCL51, DCL52)) from RFIC 2A and supply the DCL signal (DCL5) to digital control circuit 52B.

[0216] The two control terminals T24 are examples of sixth DCL terminals, and are connected to RFIC 2C outside tracker circuit 1B and connected to digital control circuit 52B inside tracker circuit 1B. The two control terminals T24 can receive a DCL signal (DCL6 (DCL61, DCL62)) from RFIC 2C and supply the DCL signal (DCL6) to digital control circuit 52B.

[0217] The two control terminals T25 are examples of seventh DCL terminals, which are connected to RFIC 2C outside tracker circuit 1B and connected to digital control circuit 52B inside tracker circuit 1B. The two control terminals T25 can receive a DCL signal (DCL7 (DCL71, DCL72)) from RFIC 2C and supply the DCL signal (DCL7) to digital control circuit 52B.

[0218] The number of each of the control terminals T23, T24, and T25 is not limited to 2. For example, if the number of each of the control terminals T23, T24, and T25 is three or more, the voltage can be expressed by three or more 1-bit signals, and the number of voltages selectable by the power supply modulation circuits 31 to 33 can be increased.

[0219] The output terminal T26 is an external connection terminal of the tracker circuit 1B, and is a terminal that supplies the power supply voltage Vcc31 to the power amplifier 5A. The output terminal T26 is connected to the power amplifier 5A outside the tracker circuit 1B, and is connected to the band switch circuit 40B inside the tracker circuit 1B.

[0220] The output terminal T27 is an external connection terminal of the tracker circuit 1B, and is a terminal that supplies the power supply voltage Vcc32 to the power amplifier 5B. The output terminal T27 is connected to the power amplifier 5B outside the tracker circuit 1B, and is connected to the band switch circuit 40B inside the tracker circuit 1B.

[0221] The output terminal T28 is an external connection terminal of the tracker circuit 1B, and is a terminal that supplies the power supply voltage Vcc13 to the power amplifier 3C. The output terminal T28 is connected to the power amplifier 3C outside the tracker circuit 1B, and is connected to the band switch circuit 40B inside the tracker circuit 1B.

[0222] The power supply modulation circuit 33 is an example of a third power supply modulation circuit, and can selectively output at least one of a plurality of discrete voltages V1 to V6 to the power amplifier 3 C. In other words, the power supply modulation circuit 33 can select at least one voltage from the plurality of discrete voltages V1 to V6 and selectively supply the selected at least one voltage to the power amplifier 3 C. The detailed circuit configuration of the power supply modulation circuit 33 is similar to that of the power supply modulation circuit 31, and therefore a description thereof will be omitted.

[0223] The band switch circuit 40B can switch the output of the power supply modulation circuit 31 among the power amplifiers 3A, 4A, and 5A, can switch the output of the power supply modulation circuit 32 among the power amplifiers 3B, 4B, and 5B, and can switch the connection and disconnection between the power supply modulation circuit 33 and the power amplifier 3C. Specifically, the band switch circuit 40B includes common terminals T400, T403, and T406, and selection terminals T401, T402, T404, T405, T407, T408, and T409.

[0224] The common terminal T406 is a terminal that receives a voltage selected by the power supply modulation circuit 33. The common terminal T406 is connected to the power supply modulation circuit 33 outside the band switch circuit 40B.

[0225] The selection terminal T407 is a terminal that supplies the power supply voltage Vcc31 to the power amplifier 5 A. The selection terminal T407 is connected to the output terminal T26 of the tracker circuit 1 B outside the band switch circuit 40 B.

[0226] The selection terminal T408 is a terminal that supplies the power supply voltage Vcc32 to the power amplifier 5B. The selection terminal T408 is connected to the output terminal T27 of the tracker circuit 1B outside the band switch circuit 40B.

[0227] The selection terminal T409 is a terminal that supplies the power supply voltage Vcc13 to the power amplifier 3C. The selection terminal T409 is connected to the output terminal T28 of the tracker circuit 1B outside the band switch circuit 40B.

[0228] It should be noted that the band switch circuit 40B does not have to be included in the tracker circuit 1B. In this case, the power supply modulation circuit 31 may be connected to the power amplifiers 3A, 4A, and 5A without passing through the band switch circuit 40B, the power supply modulation circuit 32 may be connected to the power amplifiers 3B, 4B, and 5B without passing through the band switch circuit 40B, and the power supply modulation circuit 33 may be connected to the power amplifier 3C without passing through the band switch circuit 40B.

[0229] The digital control circuit 52B can generate control signals (CS31, CS32, and CS33) by selectively using a set of DCL signals (DCL1, DCL3, and DCL5), a set of DCL signals (DCL2 and DCL4), and a set of DCL signals (DCL6 and DCL7) received at control terminals T14, T15, T18, T19, T23, T24, and T25. The DCL signal (DCL5) is an example of a fifth DCL signal and is generated based on the envelope of the high-frequency signal (RF13). The DCL signal (DCL6) is an example of a sixth DCL signal and is generated based on the envelope of the high-frequency signal (RF31). The DCL signal (DCL7) is an example of a seventh DCL signal and is generated based on the envelope of the high-frequency signal (RF32). The control signal (CS33) is a signal that controls each of the multiple switches included in the power supply modulation circuit 33. The detailed circuit configuration of the digital control circuit 52B will be described later.

[0230] [3.3 Circuit Configuration of Digital Control Circuit 52B] Next, an exemplary circuit configuration of the digital control circuit 52B will be described with reference to Fig. 11. Fig. 11 is a circuit configuration diagram of the digital control circuit 52B according to this embodiment.

[0231] 11 is an example circuit configuration, and digital control circuit 52B may be implemented using any of a wide variety of circuit implementations and circuit technologies, and therefore the description of digital control circuit 52B provided below should not be construed as limiting.

[0232] The digital control circuit 52B includes a DCL switch circuit 521B, DCL decoder circuits 522, 523, and 524, input terminals T141, T142, T151, T152, T181, T182, T191, T192, T231, T232, T241, T242, T251, and T252, and a plurality of output terminals T521, T522, and T523.

[0233] The input terminals T231 and T232 are external connection terminals of the digital control circuit 52B and are terminals that receive a DCL signal (DCL5 (DCL51 and DCL52)) from the RFIC 2A. The input terminals T231 and T232 are connected to two control terminals T23 outside the digital control circuit 52B, respectively, and are connected to a DCL switch circuit 521B inside the digital control circuit 52B.

[0234] The input terminals T241 and T242 are external connection terminals of the digital control circuit 52B and are terminals that receive DCL signals (DCL6 (DCL61 and DCL62)) from the RFIC 2C. The input terminals T241 and T242 are connected to two control terminals T24 outside the digital control circuit 52B, respectively, and are connected to the DCL switch circuit 521B inside the digital control circuit 52B.

[0235] The input terminals T251 and T252 are external connection terminals of the digital control circuit 52B and are terminals that receive DCL signals (DCL7 (DCL71 and DCL72)) from the RFIC 2C. The input terminals T251 and T252 are connected to two control terminals T25 outside the digital control circuit 52B, respectively, and are connected to a DCL switch circuit 521B inside the digital control circuit 52B.

[0236] The plurality of output terminals T523 are external connection terminals of the digital control circuit 52B, and are terminals that supply a control signal (CS33) to the power supply modulation circuit 33. The control signal (CS33) is an example of a third control signal, and includes control signals (CS331 to CS336) that respectively control the opening and closing of the switches of the power supply modulation circuit 33. The plurality of output terminals T523 are connected to the power supply modulation circuit 33 outside the digital control circuit 52B, and are connected to a DCL decoder circuit 524 inside the digital control circuit 52B.

[0237] The DCL switch circuit 521B includes common terminals 5211, 5212, 5217, 5218, 5223, and 5224, and selection terminals 5213 to 5216, 5219 to 5222, and 5225 to 5230. The common terminals 5223 and 5224 are an example of a third common terminal and are connected to the DCL decoder circuit 524. The selection terminals 5225 and 5226 are an example of a sixth selection terminal and are connected to input terminals T241 and T242, respectively. The selection terminals 5227 and 5228 are an example of a seventh selection terminal and are connected to input terminals T251 and T252, respectively. The selection terminals 5229 and 5230 are an example of a fifth selection terminal and are connected to input terminals T231 and T232, respectively.

[0238] In this connection configuration, the DCL switch circuit 521B can exclusively connect the common terminal 5211 to the selection terminals 5213, 5215, and 5225, and can exclusively connect the common terminal 5212 to the selection terminals 5214, 5216, and 5226, based on, for example, a control signal from the digital control circuit 51. The DCL switch circuit 521B can exclusively connect the common terminal 5217 to the selection terminals 5219, 5221, and 5227, and can exclusively connect the common terminal 5218 to the selection terminals 5220, 5222, and 5228. The DCL switch circuit 521B can connect the common terminal 5223 to the selection terminal 5229, and can connect the common terminal 5224 to the selection terminal 5230. The DCL switch circuit 521B is configured, for example, with two DPDT type switch circuits and two SPST type switch circuits.

[0239] The DCL decoder circuit 524 is an example of a third DCL decoder circuit, and can decode the DCL signal (DCL5 (DCL51 and DCL52)) to generate a control signal (CS33 (CS331 to CS336)).

[0240] 11 is merely an example, and the configuration of the digital control circuit 52B is not limited to this. For example, part or all of the DCL switch circuit 521B may be integrated into the DCL decoder circuits 522, 523, and 524.

[0241] [3.4 Summary] As described above, in the tracker circuit 1B according to this embodiment, the RFIC 2A may be further configured to process the high frequency signal (RF13), and the tracker circuit 1B further includes a control terminal T23 that receives a DCL signal (DCL5) generated based on the envelope of the high frequency signal (RF13) from the RFIC 2A, and a control terminal T24 that receives a DCL signal (DCL6) generated based on the envelope of the high frequency signal (RF31) and a DCL signal (DCL7) generated based on the envelope of the high frequency signal (RF32) from the RFIC 2C that is configured to process the high frequency signals (RF31 and RF32). and a power supply modulation circuit 33 configured to selectively output at least one of a plurality of discrete voltages V1 to V6 to a power amplifier 3C configured to amplify a radio frequency signal (RF13), and the digital control circuit 52B may be configured to control the power supply modulation circuit 31 selectively using the DCL signals (DCL1, DCL2, and DCL6), and to control the power supply modulation circuit 32 selectively using the DCL signals (DCL3, DCL4, and DCL7), and to control the power supply modulation circuit 33 using the DCL signal (DCL5).

[0242] According to this, the power supply modulation circuit 31 can be controlled by selectively using three DCL signals (DCL1, DCL2, and DCL6) supplied from three different RFICs 2A, 2B, and 2C, the power supply modulation circuit 32 can be controlled by selectively using three DCL signals (DCL3, DCL4, and DCL7) supplied from RFICs 2A, 2B, and 2C, and the power supply modulation circuit 33 can be controlled by using the DCL signal (DCL5) supplied from RFIC 2A. Therefore, in the tracker circuit 1B capable of simultaneously supplying different discrete voltages to three power amplifiers, it is not necessary to provide three or two power supply modulation circuits for each of the three RFICs 2A, 2B, and 2C (a total of seven power supply modulation circuits). Therefore, the number of power supply modulation circuits can be reduced from seven to three, which contributes to the miniaturization of the tracker circuit 1B.

[0243] Also, for example, in the tracker circuit 1B according to this embodiment, the digital control circuit 52B includes a DCL decoder circuit 522 configured to decode the DCL signals (DCL1, DCL2, and DCL6) and generate a control signal (CS31) that controls a switch included in the power supply modulation circuit 31, a DCL decoder circuit 523 configured to decode the DCL signals (DCL3, DCL4, and DCL7) and generate a second control signal that controls a switch included in the power supply modulation circuit 32, a DCL decoder circuit 524 configured to decode the DCL signal (DCL5) and generate a third control signal that controls a switch included in the power supply modulation circuit 33, and a common input / output circuit connected to the DCL decoder circuit 522. and a DCL switch circuit 521B including communication terminals 5211 and 5212, common terminals 5217 and 5218 connected to a DCL decoder circuit 523, common terminals 5223 and 5224 connected to a DCL decoder circuit 524, selection terminals 5213 and 5214 connected to a control terminal T14, selection terminals 5215 and 5216 connected to a control terminal T15, selection terminals 5219 and 5220 connected to a control terminal T18, selection terminals 5221 and 5222 connected to a control terminal T19, selection terminals 5229 and 5230 connected to a control terminal T23, selection terminals 5225 and 5226 connected to a control terminal T24, and selection terminals 5227 and 5228 connected to a control terminal T25.

[0244] This allows the DCL switch circuit 521B to switch the input of the DCL decoder circuit 522 between the DCL signal (DCL1), the DCL signal (DCL2), and the DCL signal (DCL6), and the input of the DCL decoder circuit 523 between the DCL signal (DCL3), the DCL signal (DCL4), and the DCL signal (DCL7), thereby simplifying the implementation of the digital control circuit 52B.

[0245] For example, in the tracker circuit 1B according to the present embodiment, the high-frequency signals (RF11, RF12, and RF13) may be cellular network signals in a frequency band included in a first frequency range, the high-frequency signals (RF21 and RF22) may be cellular network signals in a frequency band included in a second frequency range, and the high-frequency signals (RF31 and RF32) may be cellular network signals in a frequency band included in a third frequency range. In this case, the first frequency range may be from 410 MHz to 7125 MHz, the second frequency range may be from 24.25 GHz to 71 GHz, and the third frequency range may be from 7125 MHz to 24.25 GHz.

[0246] According to this, when RFIC 2A corresponding to FR1, RFIC 2B corresponding to FR2, and RFIC 2C corresponding to FR3 are used, the DCL signal set (DCL1, DCL3, and DCL5) supplied from RFIC 2A, the DCL signal set (DCL2 and DCL4) supplied from RFIC 2B, and the DCL signal set (DCL6 and DCL7) supplied from RFIC 2C can be selectively used to control the power supply modulation circuits 31, 32, and 33. Therefore, the tracker circuit 1B can be shared among the three frequency ranges, which can contribute to the miniaturization of the tracker circuit 1B and the communication device 6B.

[0247] (Other Embodiments) The tracker circuit according to the present invention has been described above based on the embodiments, but the tracker circuit according to the present invention is not limited to the above embodiments. The present invention also includes other embodiments realized by combining any of the components in the above embodiments, modifications obtained by applying various modifications to the above embodiments that would occur to those skilled in the art without departing from the spirit of the present invention, and various devices incorporating the above tracker circuit.

[0248] For example, in the circuit configurations of the various circuits according to the above embodiments, other circuit elements and wiring may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings. For example, an inductor and / or a capacitor may be inserted between the tracker circuit and the power amplifier.

[0249] Furthermore, for example, the band switch circuit according to each of the above embodiments may include a pulse shaping network.

[0250] In the above embodiments, the number of discrete voltages that the switched capacitor circuit 20 can generate is six, but this is not limiting. For example, the switched capacitor circuit 20 may generate two, three, four, five, or seven or more discrete voltages. In this case, the number of switches included in the power supply modulation circuits 31, 32, and 33 may also be increased or decreased depending on the number of discrete voltages.

[0251] The present invention can be widely used in communication devices such as mobile phones as a tracker circuit that supplies a power supply voltage to a power amplifier.

[0252] 1, 1A, 1B Tracker circuit 2A, 2B, 2C RFIC 3A, 3B, 3C, 4A, 4B, 5A, 5B Power amplifier 6, 6A, 6B Communication device 10 Pre-regulator circuit 20 Switched capacitor circuit 25 Voltage generation circuit 31, 32, 33 Power supply modulation circuit 40, 40A, 40B Band switch circuit 51, 52, 52A, 52B Digital control circuit 90 Module substrate 90a, 90b Main surface 91 Resin member 92 External connection terminal 100 Integrated circuit 100a PR section 100b SC section 100c SM section 100d BSW section 100e DCTL section 521, 521A, 521B DCL switch circuit 522, 523, 524 DCL decoder circuit 5211, 5212, 5217, 5218, 5223, 5224, T400, T403, T406 Common terminals 5213, 5214, 5215, 5216, 5219, 5220, 5221, 5222, 5225, 5226, 5227, 5228, 5229, 5230, T401, T402, T404, T405, T407, T408, T409 Selection terminals C101, C102 Capacitors C200, C201, C202, C203, C204, C205, C206, C207, C208, C209 Flying capacitors C210, C211, C212, C213, C214, C215 Smoothing capacitor L101 Power inductor S101, S102, S103, S104, S200, S201, S202, S203, S204, S205, S206, S207, S208, S209, S210, S211, S212, S213, S214, S215, S216, S217, S218, S219, S220, S221, S222, S223, S311, S312, S313, S314, S315, S316, S401, S402 Switch T11, T101, T141, T142, T151, T152, T181, T182, T191, T192, T200, T231, T232, T241, T242, T251, T252, T311, T312, T313, T314, T315, T316 Input terminals T12, T13, T14, T15, T18, T19, T22, T23, T24, T25 Control terminalsT16, T17, T20, T21, T26, T27, T28, T102, T201, T202, T203, T204, T205, T206, T310, T521, T522, T523 Output terminals

Claims

1. A tracker circuit comprising: a first DCL terminal for receiving a first Digital Control Level (DCL) signal generated based on an envelope of a first high-frequency signal from a first signal processing circuit configured to process the first high-frequency signal; a second DCL terminal for receiving a second DCL signal generated based on an envelope of a second high-frequency signal from a second signal processing circuit configured to process the second high-frequency signal; a voltage generation circuit configured to generate a plurality of discrete voltages; a first power supply modulation circuit configured to selectively output at least one of the plurality of discrete voltages to a first power amplifier configured to amplify the first high-frequency signal and a second power amplifier configured to amplify the second high-frequency signal; and a digital control circuit configured to selectively use the first DCL signal and the second DCL signal to control the first power supply modulation circuit.

2. The tracker circuit of claim 1, wherein the digital control circuit comprises: a first DCL decoder circuit configured to decode the first DCL signal and the second DCL signal to generate a first control signal for controlling a switch included in the first power supply modulation circuit; and a DCL switch circuit including a first common terminal connected to the first DCL decoder circuit, a first selection terminal connected to the first DCL terminal, and a second selection terminal connected to the second DCL terminal.

3. The tracker circuit of claim 1 or 2, wherein the first high-frequency signal is a cellular network signal in a frequency band included in a first frequency range, and the second high-frequency signal is a cellular network signal in a frequency band included in a second frequency range.

4. The tracker circuit of claim 3, wherein the first frequency range is from 410 MHz to 7125 MHz, and the second frequency range is from 24.25 GHz to 71 GHz.

5. The tracker circuit of claim 1, wherein the first signal processing circuit is further configured to process a third high-frequency signal, and the second signal processing circuit is further configured to process a fourth high-frequency signal, and the tracker circuit further comprises: a third DCL terminal that receives a third DCL signal generated based on the envelope of the third high-frequency signal from the first signal processing circuit; a fourth DCL terminal that receives a fourth DCL signal generated based on the envelope of the fourth high-frequency signal from the second signal processing circuit; and a second power supply modulation circuit configured to selectively output at least one of the plurality of discrete voltages to a third power amplifier configured to amplify the third high-frequency signal and a fourth power amplifier configured to amplify the fourth high-frequency signal, and the digital control circuit is further configured to control the second power supply modulation circuit using the third DCL signal and the fourth DCL signal selectively.

6. The tracker circuit of claim 5, wherein the digital control circuit comprises: a first DCL decoder circuit configured to decode the first DCL signal and the second DCL signal to generate a first control signal that controls a switch included in the first power supply modulation circuit; a second DCL decoder circuit configured to decode the third DCL signal and the fourth DCL signal to generate a second control signal that controls a switch included in the second power supply modulation circuit; and a DCL switch circuit including a first common terminal connected to the first DCL decoder circuit, a second common terminal connected to the second DCL decoder circuit, a first selection terminal connected to the first DCL terminal, a second selection terminal connected to the second DCL terminal, a third selection terminal connected to the third DCL terminal, and a fourth selection terminal connected to the fourth DCL terminal.

7. A tracker circuit as described in claim 5 or 6, wherein the first high-frequency signal is a cellular network signal in a frequency band included in a first frequency range, the second high-frequency signal and the fourth high-frequency signal are cellular network signals in a frequency band included in a second frequency range, and the third high-frequency signal is a cellular network signal in a frequency band included in a third frequency range.

8. The tracker circuit of claim 7, wherein the first frequency range is from 410 MHz to 7125 MHz, the second frequency range is from 24.25 GHz to 71 GHz, and the third frequency range is from 7125 MHz to 24.25 GHz.

9. The tracker circuit of claim 5 or 6, wherein the first high-frequency signal and the third high-frequency signal are cellular network signals in a frequency band included in a first frequency range, the second high-frequency signal is a cellular network signal in a frequency band included in a second frequency range, and the fourth high-frequency signal is a cellular network signal in a frequency band included in a third frequency range.

10. The tracker circuit of claim 9, wherein the first frequency range is from 410 MHz to 7125 MHz, the second frequency range is from 24.25 GHz to 71 GHz, and the third frequency range is from 7125 MHz to 24.25 GHz.

11. The first signal processing circuit is further configured to process a fifth high-frequency signal, and the tracker circuit further comprises: a fifth DCL terminal that receives a fifth DCL signal generated based on the envelope of the fifth high-frequency signal from the first signal processing circuit; a sixth DCL terminal and a seventh DCL terminal that receive a sixth DCL signal generated based on the envelope of the sixth high-frequency signal and a seventh DCL signal generated based on the envelope of the seventh high-frequency signal, respectively, from a third signal processing circuit configured to process a sixth high-frequency signal and a seventh high-frequency signal; and a third power supply modulation circuit configured to selectively output at least one of the plurality of discrete voltages to a fifth power amplifier configured to amplify the fifth high-frequency signal, and the digital control circuit is configured to control the first power supply modulation circuit selectively using the first DCL signal, the second DCL signal, and the sixth DCL signal, and is configured to control the second power supply modulation circuit selectively using the third DCL signal, the fourth DCL signal, and the seventh DCL signal, and is configured to control the third power supply modulation circuit using the fifth DCL signal.

6. The tracker circuit of claim 5.

12. The digital control circuit comprises: a first DCL decoder circuit configured to decode the first DCL signal, the second DCL signal, and the sixth DCL signal to generate a first control signal for controlling a switch included in the first power supply modulation circuit; a second DCL decoder circuit configured to decode the third DCL signal, the fourth DCL signal, and the seventh DCL signal to generate a second control signal for controlling a switch included in the second power supply modulation circuit; and a third DCL decoder circuit configured to decode the fifth DCL signal to generate a third control signal for controlling a switch included in the third power supply modulation circuit. and a DCL switch circuit including a first common terminal connected to the first DCL decoder circuit, a second common terminal connected to the second DCL decoder circuit, a third common terminal connected to the third DCL decoder circuit, a first select terminal connected to the first DCL terminal, a second select terminal connected to the second DCL terminal, a third select terminal connected to the third DCL terminal, a fourth select terminal connected to the fourth DCL terminal, a fifth select terminal connected to the fifth DCL terminal, a sixth select terminal connected to the sixth DCL terminal, and a seventh select terminal connected to the seventh DCL terminal.

13. The tracker circuit of claim 11 or 12, wherein the first high frequency signal, the third high frequency signal, and the fifth high frequency signal are cellular network signals in a frequency band included in a first frequency range, the second high frequency signal and the fourth high frequency signal are cellular network signals in a frequency band included in a second frequency range, and the sixth high frequency signal and the seventh high frequency signal are cellular network signals in a frequency band included in a third frequency range.

14. The tracker circuit of claim 13, wherein the first frequency range is from 410 MHz to 7125 MHz, the second frequency range is from 24.25 GHz to 71 GHz, and the third frequency range is from 7125 MHz to 24.25 GHz.

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