Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor that can suppress concentration of stress at a laminate during mounting and suppress the occurrence of cracks in the laminate.　This multilayer ceramic capacitor 10 comprises a laminate 12, a first external electrode 24a, a second external electrode 24b, and a first via conductor 25a and a second via conductor 25b that pass through the laminate 512 in the layering direction of a plurality of dielectric layers. Portions of the first external electrode 24a that cover a first upper protruding end 25a1 and a first lower protruding end 25a2 of the first via conductor 25a form a first upper protruding part 41a and a first lower protruding part 42a that protrude further than the other portions, and portions of the second external electrode 24b that cover a second upper protruding end 25b1 and a second lower protruding end 25b2 of the second via conductor 25b form a second upper protruding part 41b and a second lower protruding part 42b that protrude further than the other portions.

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] In recent years, electronic devices such as mobile phones and portable music players have become smaller and thinner. Accordingly, the multilayer ceramic electronic components mounted in these smaller and thinner electronic devices have also become smaller and thinner.

[0003] Such a multilayer ceramic capacitor, which is a multilayer ceramic electronic component, has a dielectric chip in which dielectric ceramics such as barium titanate and internal electrodes are alternately stacked, and external electrodes formed to cover each longitudinal end of the dielectric chip, as disclosed in Patent Document 1 (see Patent Document 1). The multilayer ceramic capacitor disclosed in Patent Document 1 is a low-profile multilayer ceramic capacitor with a height of, for example, 150 μm or less. When mounting such a multilayer ceramic capacitor on a substrate, a mounter is used to mount it on the substrate.

[0004] JP 2014-183186 A

[0005] However, when a low-profile multilayer ceramic capacitor is mounted on a mounting board using a mounter nozzle, the impact during mounting can cause cracks in the laminate of the multilayer ceramic capacitor, potentially resulting in poor insulation or the like.

[0006] SUMMARY OF THE INVENTION Therefore, a primary object of the present invention is to provide a multilayer ceramic capacitor that can suppress stress concentration on the laminate during mounting and can suppress the occurrence of cracks in the laminate.

[0007] a first external electrode covering at least a portion of each of the first and second main surfaces of the laminate; a second external electrode covering at least a portion of each of the first and second main surfaces of the laminate; a first via conductor penetrating the laminate along the stacking direction of the dielectric layers and connected to the first internal electrode layer; and a second via conductor penetrating the laminate along the stacking direction of the dielectric layers and connected to the second internal electrode layer. The first via conductor has a first upper protruding end protruding from the first main surface and a second upper protruding end protruding from the second main surface. and a lower protruding end of the first via conductor, the second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface, the first external electrode covers the first upper protruding end and the first lower protruding end of the first via conductor, the second external electrode covers the second upper protruding end and the second lower protruding end of the second via conductor, and the first external electrode has a first upper protruding end that protrudes further than the other portion covering the first main surface. The second external electrode has a protruding portion, and the portion covering the first lower protruding end of the first via conductor has a first lower protruding portion that protrudes more than the other portion covering the second main surface, and the portion covering the second upper protruding end of the second via conductor has a second upper protruding portion that protrudes more than the other portion covering the first main surface, and the portion covering the second lower protruding end of the second via conductor has a second lower protruding portion that protrudes more than the other portion covering the second main surface.

[0008] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can suppress stress concentration on the laminate during mounting and prevent cracks from occurring in the laminate.

[0009] The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

[0010] 1 is an external perspective view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention; FIG. 2 is a front view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention; FIG. 3 is a plan view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention; FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 1; FIG. 5 is a schematic cross-sectional view taken along line V-V in FIG. 4; FIG. 6 is a schematic cross-sectional view taken along line VI-VI in FIG. 1; FIG. 7 is a diagram showing a state in which a multilayer ceramic capacitor according to an embodiment of the present invention is mounted on a mounting substrate; FIG. 8 is a schematic cross-sectional view showing a first modified example of a multilayer ceramic capacitor according to an embodiment of the present invention; FIG. 9 is a diagram showing a state in which the first modified example of a multilayer ceramic capacitor according to an embodiment of the present invention is mounted on a mounting substrate; FIG. 10 is a schematic cross-sectional view showing a second modified example of a multilayer ceramic capacitor according to an embodiment of the present invention; FIG. 11 is a schematic cross-sectional view showing a third modified example of a multilayer ceramic capacitor according to an embodiment of the present invention; FIGS. 12A to 12E are views for explaining a process for manufacturing a laminated chip of an example of a multilayer ceramic capacitor according to an embodiment of the present invention; and FIG. 13 is an external perspective view showing an example of a multilayer ceramic capacitor according to another embodiment of the present invention.

[0011] An example of the multilayer ceramic capacitor according to this embodiment will now be described.

[0012] 1. Multilayer Ceramic Capacitor A multilayer ceramic capacitor 10 according to an embodiment of the present invention will be described. FIG. 1 is an external perspective view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention. FIG. 2 is a front view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention. FIG. 3 is a plan view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 1. FIG. 5 is a cross-sectional view taken along line V-V in FIG. 1. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 1.

[0013] The multilayer ceramic capacitor 10 has a laminate 12 and external electrodes 24. The configuration of each will be described below in the order of the laminate 12 and the external electrodes 24.

[0014] (Laminate) The laminate 12 has a plurality of stacked dielectric layers 14 and a plurality of internal electrode layers 16. Furthermore, the laminate 12 includes a first main surface 12a and a second main surface 12b facing in a height direction x, which is the stacking direction of the plurality of dielectric layers 14, a first side surface 12c and a second side surface 12d facing in a width direction y perpendicular to the height direction x, and a first end face 12e and a second end face 12f facing in a length direction z perpendicular to the height direction x and the width direction y. The corners and ridges of this laminate 12 are rounded.

[0015] The corners refer to the portions where three adjacent surfaces of the laminate 12 intersect, and the ridges refer to the portions where two adjacent surfaces of the laminate 12 intersect. Furthermore, irregularities may be formed on part or all of the first main surface 12a and the second main surface 12b, the first side surface 12c and the second side surface 12d, and the first end surface 12e and the second end surface 12f.

[0016] As shown in Figures 4 and 5, the laminate 12 has, in the height direction x connecting the first main surface 12a and the second main surface 12b, an effective layer portion 15a in which a plurality of internal electrode layers 16 face each other, a first outer layer portion 15b1 formed from a plurality of dielectric layers 14 located between the first main surface 12a and the internal electrode layer 16 located closest to the first main surface 12a, and a second outer layer portion 15b2 formed from a plurality of dielectric layers 14 located between the second main surface 12b and the internal electrode layer 16 located closest to the second main surface 12b.

[0017] The first outer layer portion 15b1 is located on the first main surface 12a side of the laminate 12 and is an aggregate of multiple dielectric layers 14 located between the first main surface 12a and the internal electrode layer 16 closest to the first main surface 12a.

[0018] The second outer layer portion 15b2 is located on the second main surface 12b side of the laminate 12 and is an assembly of multiple dielectric layers 14 located between the second main surface 12b and the internal electrode layer 16 closest to the second main surface 12b.

[0019] The area sandwiched between the first outer layer portion 15b1 and the second outer layer portion 15b2 is the effective layer portion 15a.

[0020] The number of dielectric layers 14 to be laminated is not particularly limited, but preferably includes the first outer layer portion 15b1 and the second outer layer portion 15b2 and is between 3 and 700. The thickness of the dielectric layers 14 is preferably between 0.4 μm and 2.0 μm.

[0021] The dielectric layer 14 may be formed from, for example, a dielectric material. Examples of the dielectric material that can be used include dielectric ceramics whose main components are BaTiO3, CaTiO3, SrTiO3, or CaZrO3. Depending on the desired properties of the laminate, a material containing a minor component such as a manganese compound, an iron compound, a chromium compound, a cobalt compound, or a nickel compound in a smaller amount than the main component may also be used.

[0022] (Internal Electrode Layers) As shown in Figures 4 and 5, the internal electrode layers 16 include first internal electrode layers 16a and second internal electrode layers 16b. The first internal electrode layers 16a and the second internal electrode layers 16b are alternately stacked with the dielectric layers 14 interposed therebetween.

[0023] The first internal electrode layer 16a is disposed on the surface of the dielectric layer 14. The first internal electrode layer 16a has a first opposing electrode portion 18a that faces the second internal electrode layer 16b, and a first lead electrode portion 20a that is located on one end side of the first internal electrode layer 16a and extends from the first opposing electrode portion 18a to the first end face 12e of the laminate 12. An end of the first lead electrode portion 20a is led out to and exposed at the first end face 12e.

[0024] The shape of the first opposing electrode portion 18a of the first internal electrode layer 16a is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the first opposing electrode portion 18a may be tapered in plan view, with a slope increasing in either direction.

[0025] The shape of the first lead electrode portion 20a of the first internal electrode layer 16a is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the first lead electrode portion 20a may be tapered in plan view, with a slope increasing in either direction.

[0026] The width of the first opposing electrode portion 18a of the first internal electrode layer 16a and the width of the first extraction electrode portion 20a of the first internal electrode layer 16a may be formed to be the same width, or one of them may be formed to be narrower in width.

[0027] The second internal electrode layer 16b is arranged on a surface of a dielectric layer 14 different from the dielectric layer 14 on which the first internal electrode layer 16a is arranged. The second internal electrode layer 16b has a second opposing electrode portion 18b facing the first internal electrode layer 16a, and a second extraction electrode portion 20b located on one end side of the second internal electrode layer 16b and extending from the second opposing electrode portion 18b to a second end face 12f of the laminate 12. The second extraction electrode portion 20b has an end portion extended to and exposed at the second end face 12f.

[0028] The shape of the second opposing electrode portion 18b of the second internal electrode layer 16b is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the second opposing electrode portion 18b may be tapered in plan view, with a slope increasing in either direction.

[0029] The shape of the second extraction electrode portion 20b of the second internal electrode layer 16b is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the second extraction electrode portion 20b may be tapered in plan view, with a slope increasing in either direction.

[0030] The width of the second opposing electrode portion 18b of the second internal electrode layer 16b and the width of the second extraction electrode portion 20b of the second internal electrode layer 16b may be formed to be the same width, or one of them may be formed to be narrower in width.

[0031] As shown in Fig. 4, the laminate 12 includes ends (hereinafter referred to as "L gaps") 22b of the laminate 12 formed between the end of the first internal electrode layer 16a opposite the first lead electrode portion 20a and the second end face 12f, and between the end of the second internal electrode layer 16b opposite the second lead electrode portion 20b and the first end face 12e. As shown in Fig. 5, the laminate 12 includes side portions (hereinafter referred to as "W gaps") 22a of the laminate 12 formed between one end of the first opposing electrode portion 18a and the second opposing electrode portion 18b in the width direction y and the first side face 12c, and between the other end of the first opposing electrode portion 18a and the second opposing electrode portion 18b in the width direction y and the second side face 12d.

[0032] The first internal electrode layer 16a and the second internal electrode layer 16b can be made of an appropriate conductive material containing, for example, Ni as a main component and at least one selected from metals such as Cu, Ag, Pd, and Au, and alloys such as Ag-Pd alloys. The internal electrode layer 16 may further contain dielectric particles of the same composition as the ceramic contained in the dielectric layer 14.

[0033] Furthermore, the first internal electrode layer 16 a and the second internal electrode layer 16 b may contain Sn. By containing Sn in the first internal electrode layer 16 a and the second internal electrode layer 16 b, it is possible to alleviate electric field concentration at the interface between the first internal electrode layer 16 a and the second internal electrode layer 16 b and the dielectric layer 14, leading to improvement in high-temperature load reliability. In this case, even if Sn is contained in only one of the internal electrode layers 16, either the first internal electrode layer 16 a or the second internal electrode layer 16 b, it is possible to sufficiently exert the effect.

[0034] In this embodiment, the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b face each other via the dielectric layer 14, thereby forming capacitance and exhibiting the characteristics of a capacitor.

[0035] The number of stacked internal electrode layers 16 is not particularly limited, but is preferably 2 to 700. The thickness of the internal electrode layers 16 is preferably 0.2 μm to 2.0 μm.

[0036] (Via Conductors) As shown in FIGS. 4 to 6, via conductors 25 are arranged on the side of the laminate 12 closer to the first end face 12e and the side closer to the second end face 12f.

[0037] The via conductor 25 includes a first via conductor 25a and a second via conductor 25b.

[0038] The first via conductor 25a penetrates the portion of the laminate 12 closer to the first end face 12e along the height direction x, with one end protruding from the first main surface 12a as a first upper protruding end 25a1 and the other end protruding from the second main surface 12b as a first lower protruding end 25a2.

[0039] The first via conductor 25a penetrates an end 22b including only the first lead electrode portion 20a of the first internal electrode layer 16a when viewed in the height direction x within the laminate 12. In this case, the first via conductor 25a is electrically connected to the first lead electrode portion 20a of the first internal electrode layer 16a.

[0040] The first via conductor 25a preferably has a circular end face shape when viewed in the height direction x. However, the end face shape may be elliptical, oval, or any other shape. When the end face shape is circular, the diameter preferably ranges from 6 μm to 100 μm. When the end face shape is elliptical, the minor axis preferably ranges from 6 μm to 100 μm.

[0041] The protrusion amount of the first upper protruding end 25a1 of the first via conductor 25a from the first main surface 12a is preferably 5 μm to 20 μm, and the protrusion amount of the first lower protruding end 25a2 of the first via conductor 25a from the second main surface 12b is preferably 5 μm to 20 μm.

[0042] The second via conductor 25b penetrates the portion of the laminate 12 closer to the second end face 12f along the height direction x, with one end protruding from the first main surface 12a as a second upper protruding end 25b1 and the other end protruding from the second main surface 12b as a second lower protruding end 25b2.

[0043] The second via conductor 25b penetrates an end 22b including only the second extraction electrode portion 20b of the second internal electrode layer 16b when viewed in the height direction x within the laminate 12. In this case, the second via conductor 25b is electrically connected to the second extraction electrode portion 20b of the second internal electrode layer 16b.

[0044] The second via conductor 25b preferably has a circular end face shape when viewed in the height direction x. However, the end face shape may be elliptical, oval, or any other shape. When the end face shape is circular, the diameter is preferably at least in the range of 6 μm to 100 μm. When the end face shape is elliptical, the minor axis is preferably in the range of 6 μm to 100 μm.

[0045] The amount of protrusion of the second upper protruding end 25b1 of the second via conductor 25b from the first main surface 12a is preferably 5 μm to 20 μm, and the amount of protrusion of the second lower protruding end 25b2 of the second via conductor 25b from the second main surface 12b is preferably 5 μm to 20 μm.

[0046] The via conductors 25 can be made of a conductive paste containing conductive metal powder whose main components are, for example, Ag, Cu, and Ni.

[0047] (External Electrodes) As shown in FIGS. 1 to 6, external electrodes 24 are disposed on the first end face 12e side and the second end face 12f side of the laminate 12.

[0048] The external electrode 24 includes a base electrode layer having an upper base electrode layer 26 formed to cover the first main surface 12a side of the laminate 12 and a lower base electrode layer 27 formed to cover the second main surface 12b side of the laminate 12, and a plating layer 28 formed to cover the upper base electrode layer 26 and the lower base electrode layer 27.

[0049] The external electrode 24 includes a first external electrode 24a and a second external electrode 24b.

[0050] The first external electrode 24a is disposed on the first end face 12e of the laminate 12, as well as on part of the first main surface 12a and part of the second main surface 12b. In this case, the first external electrode 24a is electrically connected to the first extraction electrode portion 20a of the first internal electrode layer 16a. The first external electrode 24a may extend slightly around part of the first side surface 12c and part of the second side surface 12d.

[0051] The first external electrode 24a is disposed so as to cover the first upper protruding end 25a1 of the first via conductor 25a, which protrudes from the first main surface 12a of the laminate 12. The portion of the first external electrode 24a that covers the first upper protruding end 25a1 has a first upper protruding portion 41a that protrudes more than the other portion that covers the first main surface 12a. This causes the first external electrode 24a to protrude from the surface 24x in accordance with the shape of the first upper protruding end 25a1.

[0052] The first external electrode 24a is disposed so as to cover the first lower protruding end 25a2 of the first via conductor 25a, which protrudes from the second main surface 12b of the laminate 12. The portion of the first external electrode 24a that covers the first lower protruding end 25a2 has a first lower protruding portion 42a that protrudes further than the other portion that covers the second main surface 12b. This causes the first external electrode 24a to protrude from the surface 24x in accordance with the shape of the first lower protruding end 25a2.

[0053] The second external electrode 24b is disposed on the second end face 12f of the laminate 12, as well as on part of the first main surface 12a and part of the second main surface 12b. In this case, the second external electrode 24b is electrically connected to the second extraction electrode portion 20b of the second internal electrode layer 16b. The second external electrode 24b may extend slightly around part of the first side surface 12c and part of the second side surface 12d.

[0054] The second external electrode 24b is disposed so as to cover the second upper protruding end 25b1 of the second via conductor 25b protruding from the first main surface 12a of the laminate 12. The portion of the second external electrode 24b that covers the second upper protruding end 25b1 has a second upper protruding portion 41b that protrudes more than the other portion that covers the first main surface 12a. This causes the second external electrode 24b to protrude from the surface 24y in accordance with the shape of the second upper protruding end 25b1.

[0055] The second external electrode 24b is disposed so as to cover the second lower protruding end 25b2 of the second via conductor 25b protruding from the second main surface 12b of the laminate 12. The portion of the second external electrode 24b that covers the second lower protruding end 25b2 has a second lower protruding portion 42b that protrudes further than the other portion that covers the second main surface 12b. This causes the second external electrode 24b to protrude from the surface 24y in accordance with the shape of the second lower protruding end 25b2.

[0056] Preferably, each of the first upper protrusion 41 a, the first lower protrusion 42 a, the second upper protrusion 41 b, and the second lower protrusion 42 b has a dimension of 5 μm or more from the surface 24 x and the surface 24 y along the height direction x. Furthermore, in this case, it is preferable that the height of the first upper protrusion 41 a, which is determined by the protrusion amount of the first upper protrusion end 25 a 1 of the first via conductor 25 a and the thickness of the first external electrode 24 a, is the same as the height of the second upper protrusion 41 b, which is determined by the protrusion amount of the second upper protrusion end 25 b 1 of the second via conductor 25 b and the thickness of the second external electrode 24 b. Similarly, it is preferable that the height of the first lower protrusion 42a, which is determined by the protrusion amount of the first lower protrusion end 25a2 of the first via conductor 25a and the thickness of the first external electrode 24a, and the height of the second lower protrusion 42b, which is determined by the protrusion amount of the second lower protrusion end 25b2 of the second via conductor 25b and the thickness of the second external electrode 24b, are the same.

[0057] (Base Electrode Layer) The upper base electrode layer 26 of the base electrode layer has a first upper base electrode layer 26a and a second upper base electrode layer 26b.

[0058] The lower base electrode layer 27 of the base electrode layer has a first lower base electrode layer 27a and a second lower base electrode layer 27b.

[0059] The first upper base electrode layer 26a is formed so as to cover a portion of the first main surface 12a on the first end face 12e side of the laminate 12 and the first upper protruding end 25a1 of the first via conductor 25a, but not to cover the first end face 12e of the laminate 12. Note that the first upper base electrode layer 26a may be arranged so as not to cover a portion of the first via conductor 25a.

[0060] The first lower base electrode layer 27a is formed so as to cover a portion of the second main surface 12b on the first end face 12e side of the laminate 12 and the first lower protruding end 25a2 of the first via conductor 25a, but not to cover the first end face 12e of the laminate 12. Note that the first lower base electrode layer 27a may be arranged so as not to cover a portion of the first via conductor 25a.

[0061] The second upper base electrode layer 26b is formed so as to cover a portion of the first main surface 12a on the second end face 12f side of the laminate 12 and the second upper protruding ends 25b1 of the second via conductors 25b, but not to cover the second end face 12f of the laminate 12. Note that the second upper base electrode layer 26b may be arranged so as not to cover a portion of the second via conductors 25b.

[0062] The second lower base electrode layer 27b is formed so as to cover a portion of the second main surface 12b on the second end face 12f side of the laminate 12 and the second lower protruding ends 25b2 of the second via conductors 25b, but not to cover the second end face 12f of the laminate 12. Note that the second lower base electrode layer 27b may be arranged so as not to cover a portion of the second via conductors 25b.

[0063] The upper base electrode layer 26 and the lower base electrode layer 27 formed as thin film layers are preferably formed by a thin film formation method such as sputtering or vapor deposition. In particular, the upper base electrode layer 26 and the lower base electrode layer 27 formed as thin film layers are preferably sputtered electrodes formed by sputtering. Electrodes formed by sputtering will be described below.

[0064] When the upper and lower base electrode layers 26 and 27 are formed using sputtered electrodes, it is preferable to form the sputtered electrodes directly on a portion of the second main surface 12 b of the laminate 12 .

[0065] The upper base electrode layer 26 and the lower base electrode layer 27 may also contain a metal such as Ni, Cu, Ag, Pd, an Ag—Pd alloy, or Au. In this case, the upper base electrode layer 26 and the lower base electrode layer 27 preferably contain, as a common material, the same dielectric material as the dielectric ceramic contained in the dielectric layer 14. By including the common material, the shrinkage behavior of the upper base electrode layer 26 and the lower base electrode layer 27 during firing can be made closer to the shrinkage behavior of the laminate 12, and peeling of the upper base electrode layer 26 and the lower base electrode layer 27 from the laminate 12 can be prevented.

[0066] (Plating Layer) The plating layer 28 includes a first plating layer 28a and a second plating layer 28b.

[0067] The first plating layer 28 a is disposed so as to integrally cover the first upper base electrode layer 26 a, the first lower base electrode layer 27 a, and the first end face 12 e of the laminate 12 .

[0068] The second plating layer 28 b is disposed so as to integrally cover the second upper base electrode layer 26 b, the second lower base electrode layer 27 b, and the second end face 12 f of the laminate 12 .

[0069] The plating layer 28 may be formed as a single layer or as a plurality of layers.

[0070] The plating layer 28 is not particularly limited as long as it contains at least one metal selected from the group consisting of Cu, Ni, Ag, Pd, an Ag—Pd alloy, and Au as the main metal component.

[0071] When the plating layer 28 is a single layer, for example, when the first internal electrode layer 16a and the second internal electrode layer 16b are formed using Ni, it is preferable to use Cu plating, which has good bonding properties with Ni.

[0072] When the plating layer 28 is made of a plurality of layers, it is preferable that the lower layer directly joined to the first internal electrode layer 16 a and the second internal electrode layer 16 b is Cu plated as described above, and the upper layer placed on the lower layer is Ni plated to prevent erosion by solder. When the plating layer 28 has a three-layer structure, it is preferable that the layers are Cu plated, Ni plated, Sn plated, or Cu plated, Ni plated, Cu plated, etc., in that order from the laminate 12 side, but is not limited to this.

[0073] The thickness of each of the plating layers 28 is preferably 0.5 μm or more and 10.0 μm or less.

[0074] The dimension in the length direction z of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 24a, and the second external electrode 24b is defined as dimension L, the dimension in the height direction x of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 24a, and the second external electrode 24b is defined as dimension T, and the dimension in the width direction y of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 24a, and the second external electrode 24b is defined as dimension W. The dimensions of the multilayer ceramic capacitor 10 are preferably such that the dimension L in the length direction z is 0.2 mm to 3.2 mm, the dimension W in the width direction y is 0.1 mm to 2.5 mm, and the dimension T in the height direction x is 0.04 mm to 0.30 mm.

[0075] Here, a description will be given of a state in which the multilayer ceramic capacitor 10 is mounted on a mounting substrate 50 using a mounter nozzle 60. Fig. 7 is a diagram showing a state in which the multilayer ceramic capacitor according to the embodiment of the present invention is mounted on a mounting substrate.

[0076] As shown in FIG. 7 , the multilayer ceramic capacitor 10 according to the embodiment of the present invention is sucked using a mounter nozzle 60 and mounted on a mounting substrate 50. The mounting substrate 50 includes a substrate core material 52 and conductive lands 54. The substrate core material 52 is, for example, a substrate made of a material in which a base material made of a mixture of glass fabric (cloth) and glass nonwoven fabric is impregnated with epoxy resin or polyimide resin, or a ceramic substrate manufactured by baking a sheet made of a mixture of ceramic and glass. The substrate core material 52 may be a substrate made of a single layer, or may be configured as a substrate made of a laminate of multiple layers.

[0077] One main surface of the core material 52 of the substrate is provided with conductor lands 54 and constitutes a substrate-side mounting surface 52 a on which the multilayer ceramic capacitor 10 is mounted.

[0078] The conductor land 54 includes a first conductor land 54 a and a second conductor land 54 b. The first conductor land 54 a is electrically connected and mechanically joined to the first external electrode 24 a of the multilayer ceramic capacitor 10 by the bonding material 56. The second conductor land 54 b is electrically connected and mechanically joined to the second external electrode 24 b of the multilayer ceramic capacitor 10 by the bonding material 56.

[0079] The material of the conductor land 54 is not particularly limited, but metals such as copper, gold, palladium, and platinum can be used. The thickness of the conductor land 54, i.e., the dimension in the height direction x, is not particularly limited, but is preferably 20 μm or more and 200 μm or less, for example. The bonding material 56 can be, for example, solder.

[0080] The multilayer ceramic capacitor 10 is mounted on the mounting substrate 50 so that the second main surface 12b faces the substrate-side mounting surface 52a. At this time, the multilayer ceramic capacitor 10 is joined to the mounting substrate 50 at the first lower protrusion 42a and the second lower protrusion 42b.

[0081] On the other hand, when the multilayer ceramic capacitor 10 is sucked by the mounter nozzle 60 during mounting, the first upper protrusion 41 a and the second upper protrusion 41 b of the multilayer ceramic capacitor 10 come into contact with the mounter nozzle 60 .

[0082] When the first lower protrusion 42 a and the second lower protrusion 42 b of the multilayer ceramic capacitor 10 come into contact with the mounting substrate 50 (conductor lands 54), the multilayer ceramic capacitor 10 comes into contact with the mounter nozzle 60. This reduces the concentration of stress on the ends of the external electrodes 24 that are arranged on the second main surface 12 b side of the multilayer ceramic capacitor 10 during mounting.

[0083] Therefore, even when the multilayer ceramic capacitor is made thinner, particularly when the laminate 12 is made thinner, it is possible to suppress the occurrence of cracks during mounting.

[0084] The multilayer ceramic capacitor 10 may be configured so that the first lead electrode portion 20a of the first internal electrode layer 16a and the second lead electrode portion 20b of the second internal electrode layer 16b are not exposed on the first end face 12e and the second end face 12f of the laminate 12. Even in this case, the electrical connection between the first external electrode 24a and the second external electrode 24b and the first internal electrode layer 16a and the second internal electrode layer 16b is maintained via the first via conductor 25a and the second via conductor 25b.

[0085] This improves the adhesive strength to the substrate when mounting the multilayer ceramic capacitor 10. Also, the mounting state of the multilayer ceramic capacitor 10 can be easily determined visually. Furthermore, the first plating layer 28a and the second plating layer 28a located on the first end face 12e and the second end face 12f, respectively, can be omitted or made thinner, thereby reducing the thickness of the plating layer 28.

[0086] Next, various modifications of the multilayer ceramic capacitor according to the present embodiment will be described. In these modifications, components corresponding to those in the above embodiment will be denoted by the same reference numerals, and detailed description thereof will be omitted.

[0087] (1) First Modification A multilayer ceramic capacitor according to a first modification of the embodiment of the present invention will be described. Fig. 8 is a schematic cross-sectional view showing a multilayer ceramic capacitor 10A as an example of the multilayer ceramic capacitor according to the first modification of the embodiment of the present invention.

[0088] The multilayer ceramic capacitor 10A according to the first modification has a configuration in which the first external electrode 24a is separated from each other in a portion covering the first end face 12e of the laminate 12, a portion covering a part of the first principal surface 12a, and a portion covering a part of the second principal surface 12b. Similarly, the second external electrode 24b is separated from each other in a portion covering the second end face 12f of the laminate 12, a portion covering a part of the first principal surface 12a, and a portion covering a part of the second principal surface 12b.

[0089] Specific aspects of the first external electrode 24a are as follows. Specifically, the first upper base electrode layer 26a is disposed on the first principal surface 12a so as to selectively cover the first upper protruding end 25a1 of the first via conductor 25a. The first lower base electrode layer 27a is disposed on the second principal surface 12b so as to selectively cover the first lower protruding end 25a2 of the first via conductor 25a and a portion of the first lower protruding end 25a2 toward the center of the laminate 12. The first plating layer 28a is disposed so as to cover the first end face 12e.

[0090] Specific aspects of the second external electrode 24b are as follows. Specifically, the second upper base electrode layer 26b is disposed on the first principal surface 12a so as to selectively cover the second upper protruding end 25b1 of the second via conductor 25b. The second lower base electrode layer 27b is disposed on the second principal surface 12b so as to selectively cover the second lower protruding end 25b2 of the second via conductor 25b and a portion of the second lower protruding end 25b2 toward the center of the laminate 12. The second plating layer 28b is disposed so as to cover the second end face 12f.

[0091] Hereinafter, with respect to the multilayer ceramic capacitor 10A, the first upper base electrode layer 26a and the second upper base electrode layer 26b will be referred to as first principal surface electrodes, and the first lower base electrode layer 27a and the second lower base electrode layer 27b will be referred to as second principal surface electrodes. Also, the first plating layer 28a disposed on the first end face 12e will be referred to as the first end face electrode, and the second plating layer 28b disposed on the second end face 12f will be referred to as the first end face electrode.

[0092] Furthermore, in the multilayer ceramic capacitor 10A, a first plating layer 28a is disposed so as to cover the first upper base electrode layer 26a and the first lower base electrode layer 27a, and a second plating layer 28b is disposed so as to cover the second upper base electrode layer 26b and the second lower base electrode layer 27b.

[0093] The multilayer ceramic capacitor 10A according to the first modified example has the above-described configuration, which makes it possible to reduce the thickness of the external electrodes 24 in the stacking direction, thereby providing an even thinner multilayer ceramic capacitor while suppressing the occurrence of cracks during mounting.

[0094] Furthermore, the multilayer ceramic capacitor 10A according to the first modification has the following effect due to the second main surface electrode being disposed on the second main surface 12b of the laminate 12 so as to cover a portion of the laminate 12 closer to the center, namely: When mounting the multilayer ceramic capacitor 10 shown in Fig. 7, an impact applied to the multilayer ceramic capacitor 10 from the mounter nozzle 60 is transmitted mainly from each of the first upper protrusion 41a and the second upper protrusion 41b to the first lower protrusion 42a and the second lower protrusion 42b via each of the first via conductors 25a and the second via conductors 25b.

[0095] In this case, in the multilayer ceramic capacitor 10A according to the first modified example, the second main surface electrode absorbs the stress transmitted to the first lower protrusion 42a and the second lower protrusion 42b, thereby further reducing the direct transmission of stress from the mounter nozzle 60 to the laminate 12 and mitigating damage to the laminate 12.

[0096] 9, the multilayer ceramic capacitor 10A according to the first modification is mounted on a mounting substrate 50 by connecting the first end surface electrodes and the second end surface electrodes to first conductor lands 54a and second conductor lands 54b arranged on the mounting substrate 50 via bonding material 56. This eliminates the need to use the first and second main surface electrodes for mounting, allowing the mounting area on the multilayer ceramic capacitor 10A to be reduced.

[0097] Furthermore, by arranging the first plating layer 28a so as to cover the first upper base electrode layer 26a and the first lower base electrode layer 27a, and by arranging the second plating layer 28b so as to cover the second upper base electrode layer 26b and the second lower base electrode layer 27b, it is possible to obtain more mounting locations in the multilayer ceramic capacitor 10A.

[0098] (2) Second Modification Next, a multilayer ceramic capacitor 10B according to a second modification will be described. As shown in FIG. 10 , the multilayer ceramic capacitor 10B according to the second modification may be implemented by combining the configuration of the external electrodes 24 of the multilayer ceramic capacitor 10A according to the first modification with the multilayer ceramic capacitor 10 according to the embodiment of the present invention. That is, the external electrodes 24 may be configured to include base electrode layers 26, 27. This further reduces the direct transmission of stress from the mounter nozzle 60 to the laminate 12, thereby achieving the effect of mitigating damage to the laminate 12, as with the multilayer ceramic capacitor 10A shown in FIG. 8 .

[0099] (3) Third Modification Next, a multilayer ceramic capacitor 10C according to a third modification of the embodiment of the present invention will be described. Fig. 11 is a schematic cross-sectional view showing the multilayer ceramic capacitor according to the third modification of the embodiment of the present invention.

[0100] 11 , the multilayer ceramic capacitor 10C according to the third modification has an arbitrary number of via conductors 25. Specifically, as shown in FIG. 11 , two first via conductors 25a are arranged along the width direction y, each penetrating an end 22b including only the first extraction electrode portion 20a of the first internal electrode layer 16a when viewed in the height direction x. Similarly, two second via conductors 25b are arranged along the width direction y, each penetrating an end 22b including only the second extraction electrode portion 20b of the second internal electrode layer 16b when viewed in the height direction x.

[0101] The number of via conductors 25 is preferably varied depending on the dimensions of the multilayer ceramic capacitor 10C. Specifically, when the chip size of the multilayer ceramic capacitor 10C is such that the L dimension in the length direction z is 0.4 mm or more and the W dimension in the width direction y is 0.2 mm or more, it is preferable that the number of first via conductors 25a and second via conductors 25b is two or more.

[0102] Furthermore, the positions of the via conductors 25 as viewed in the height direction x preferably correspond to the positions of a mounter for mounting the multilayer ceramic capacitor 10C. That is, it is preferable that each of the mounter nozzles 60 shown in FIG. 7 is provided so as to be in uniform contact with each of the first via conductors 25a and the second via conductors 25b of the via conductors 25.

[0103] This makes it possible to stably mount the multilayer ceramic capacitor on a mounting board according to the dimensions of the multilayer ceramic capacitor, even when the multilayer ceramic capacitor is made thinner, and to effectively prevent cracks from occurring during mounting.

[0104] 2. Method for Manufacturing the Multilayer Ceramic Capacitor A method for manufacturing a multilayer ceramic capacitor, which is an example of the multilayer ceramic capacitor according to the above embodiment, will now be described.

[0105] First, a dielectric sheet and a conductive paste for the internal electrodes are prepared. The dielectric sheet and the conductive paste for the internal electrode layers contain a binder (for example, a known organic binder) and an organic solvent (for example, a known organic binder).

[0106] Next, a conductive paste for the internal electrodes is printed in a predetermined pattern on the dielectric sheet by, for example, screen printing or gravure printing to form an internal electrode pattern. Regarding the dielectric sheet, an outer layer dielectric sheet on which no internal electrode pattern is printed is also produced.

[0107] A predetermined number of dielectric sheets for outer layers on which no internal electrode pattern is formed are stacked, and then dielectric sheets on which an internal electrode pattern corresponding to the first internal electrode layer 16a and a dielectric sheet on which an internal electrode pattern corresponding to the second internal electrode layer 16b are formed are alternately stacked on top of these, and then a predetermined number of dielectric sheets for outer layers on which no internal electrode pattern is formed are stacked on top of these to produce a laminated sheet.

[0108] Furthermore, the laminated sheets are pressed in the lamination direction by means of a hydrostatic press or the like to produce a laminated block.

[0109] Next, the laminated block is cut to a predetermined size to cut out laminated chips 70. After this, barreling may be performed to round the corners and ridges of the laminated chips 70. In this way, the laminated chips 70 shown in FIG. 12(A) are obtained.

[0110] 12B, a protective film 74a is provided on the entire first main surface side of the obtained laminated chip 70, and a protective film 74b is provided on the entire second main surface side. The protective films 74a and 74b can be sheets, films, etc. made of polyethylene naphthalate (PEN), polyamide, polyimide, etc.

[0111] 12(C), in the laminated chip provided with the protective films 74a and 74b, via holes 76a, which are through holes, are opened at predetermined positions where only the first internal electrode pattern 72a is laminated, and via holes 76b, which are through holes, are opened at predetermined positions where only the second internal electrode pattern 72b is laminated. A laser such as a CO2 laser can be used to open the via holes 76a and 76b.

[0112] 12(D), in the laminated chip 70 provided with the protective films 74a and 74b, the via holes 76a are filled with via conductor paste 78a, and the via holes 76b are filled with via conductor paste 78b. The via conductor pastes 78a and 78b are preferably made of a conductive metal powder mainly composed of Ag, Cu, and Ni, and are mixed with a predetermined proportion of a co-material in consideration of thermal shrinkage during firing of the laminated chip in a later process and adhesion to the via holes 76a and 76b.

[0113] Furthermore, it is preferable that via conductor pastes 78a and 78b are filled so as to be flush with the surfaces of protective films 74a and 74b.

[0114] 12(E), the protective films 74a and 74b are removed from the laminated chip 70 in which the via holes 76a and 76b are filled with the via conductor paste 78a and the via holes 76b, respectively. As a result, one end of the via conductor paste 78a filled in the via holes 76a is exposed in a protruding state on the first main surface of the laminated chip 70, thereby forming the first upper protruding end 25a1 of the first via conductor 25a after completion. Also, one end of the via conductor paste 78b filled in the via holes 76b is exposed in a protruding state on the first main surface, thereby forming the second upper protruding end 25b1 of the second via conductor 25b after completion.

[0115] Similarly, the other end of the via conductor paste 78a filled in the via hole 76a is exposed in a protruding state on the second main surface, forming a first lower protruding end 25a2 of the completed first via conductor 25a. Also, the other end of the via conductor paste 78b filled in the via hole 76b is exposed in a protruding state on the second main surface, forming a second lower protruding end 25b2 of the completed second via conductor 25b.

[0116] Next, the laminated chip 70 is fired to produce the laminate 12. The firing temperature depends on the ceramic and the materials of the internal electrode layers 16, but is preferably 900°C or higher and 1400°C or lower.

[0117] Next, the first upper base electrode layer 26a and the second upper base electrode layer 26b of the upper base electrode layer 26 are formed by sputtering on a part of the first main surface 12a of the laminate 12, including an end of the conductive paste corresponding to the first upper protruding end 25a1, and on a part of the first main surface 12a of the laminate 12, including an end of the conductive paste corresponding to the second upper protruding end 25b1. When the first upper base electrode layer 26a is formed by sputtering, it may be formed so as not to cover a part of the first upper protruding end 25a1, and when the second upper base electrode layer 26b is formed by sputtering, it may be formed so as not to cover a part of the second upper protruding end 25b1.

[0118] Similarly, the first lower base electrode layer 27a and the second lower base electrode layer 27b of the lower base electrode layer 27 are formed by sputtering on a part of the second main surface 12b of the laminate 12, including an end of the conductive paste corresponding to the first lower protruding end 25a2, and on a part of the second main surface 12b of the laminate 12, including an end of the conductive paste corresponding to the second lower protruding end 25b2. When the first lower base electrode layer 27a is formed by sputtering, it may be formed so as not to cover a part of the first lower protruding end 25a2, and when the second lower base electrode layer 27b is formed by sputtering, it may be formed so as not to cover a part of the second lower protruding end 25b2.

[0119] Next, a first plating layer 28a and a second plating layer 28b of the plating layer 28 are formed on the upper base electrode layer 26, the lower base electrode layer 27, and the first end face 12e and the second end face 12f of the laminate 12. The first plating layer 28a is formed so as to continuously cover the first upper base electrode layer 26a, the first end face 12e, and the first lower base electrode layer 27a, and the second plating layer 28b is formed so as to continuously cover the second upper base electrode layer 26b, the second end face 12f, and the second lower base electrode layer 27b. Specifically, the plating layer 28 is assumed to be Cu plating and is formed by electrolytic plating or electroless plating.

[0120] At this time, the plated laminate 12 is subjected to a heat treatment to remove residual moisture remaining in the plating film and at the interface between the ceramic and the plating.

[0121] 8, the process after obtaining the laminate 12 is as follows: A first upper base electrode layer 26a of the upper base electrode layer 26 and a first lower base electrode layer 27a of the lower base electrode layer 27 are selectively formed on portions of the laminate 12 from one end of the conductive paste corresponding to the first upper protruding end 25a1, one end of the conductive paste corresponding to the first lower protruding end 25a2, and one end of the conductive paste corresponding to the first lower protruding end 25a2 toward the center of the laminate 12. Similarly, a second upper base electrode layer 26b of the upper base electrode layer 26 and a second lower base electrode layer 27b of the lower base electrode layer 27 are selectively formed on each of the portions of the laminate 12 from one end of the conductive paste corresponding to the second upper protruding end 25b1, and one end of the conductive paste corresponding to the second lower protruding end 25b2 and one end of the conductive paste corresponding to the second lower protruding end 25b2 toward the center of the laminate 12.

[0122] Next, a first plating layer 28a is formed so as to cover the first upper base electrode layer 26a, the first lower base electrode layer 27a, and the first end face 12e of the laminate 12. Similarly, a second plating layer 28b is formed so as to cover the second upper base electrode layer 26b, the second lower base electrode layer 27b, and the second end face 12f of the laminate 12. In this way, the first external electrode 24a and the second external electrode 24b are obtained.

[0123] In this manner, the multilayer ceramic capacitor 10 shown in FIG. 1 is manufactured.

[0124] According to the manufacturing method of the multilayer ceramic capacitor of this embodiment, it is possible to obtain a multilayer ceramic capacitor that can suppress the occurrence of cracks during mounting, even when the multilayer ceramic capacitor is made thin, particularly when the laminate 12 is made thin.

[0125] 3. Multilayer Ceramic Capacitor According to Another Embodiment An example of a multilayer ceramic capacitor 510 according to another embodiment of the present invention will be described.

[0126] Fig. 13 is a perspective view showing an example of a multilayer ceramic capacitor according to another embodiment of the present invention, and Fig. 14 is a schematic cross-sectional view taken along line XIV-XIV in Fig. 13.

[0127] The multilayer ceramic capacitor 510 shown in FIG. 13 includes a laminate 512 and external electrodes 524 and 525 .

[0128] The laminate 512 includes a plurality of dielectric layers 514 and a plurality of internal electrode layers 516. The laminate 512 has a first main surface 512a and a second main surface 512b that face each other in a height direction x, a first side surface 512c and a second side surface 512d that face each other in a width direction y that is perpendicular to the height direction x, and a third side surface 512e and a fourth side surface 512f that face each other in a length direction z that is perpendicular to the height direction x and the width direction y. The first main surface 512a and the second main surface 512b extend along the width direction y and the length direction z, respectively. The first side surface 512c and the second side surface 512d extend along the height direction x and the width direction y, respectively. The third side surface 512e and the fourth side surface 512f extend along the height direction x and the length direction z, respectively. Therefore, the height direction x is the direction connecting the first main surface 512a and the second main surface 512b, the width direction y is the direction connecting the first side surface 512c and the second side surface 512d, and the length direction z is the direction connecting the third side surface 512e and the fourth side surface 512f.

[0129] Furthermore, it is preferable that the corners and ridges of the laminate 512 are rounded. Here, a corner is a portion where three surfaces of the laminate 512 intersect, and a ridge is a portion where two surfaces of the laminate 512 intersect.

[0130] The laminate 512 has, in the height direction x connecting the first main surface 512a and the second main surface 512b, an effective layer portion in which a plurality of internal electrode layers 516 face each other, a first outer layer portion formed from a plurality of dielectric layers 514 located between the first main surface 512a and the internal electrode layer 516 located closest to the first main surface 512a, and a second outer layer portion formed from a plurality of dielectric layers 514 located between the second main surface 512b and the internal electrode layer 516 located closest to the second main surface 512b.

[0131] The first outer layer portion is located on the first main surface 512a side of the laminate 512, and is an assembly of multiple dielectric layers 514 located between the first main surface 512a and the internal electrode layer 516 closest to the first main surface 512a.

[0132] The second outer layer portion is located on the second main surface 512b side of the laminate 512, and is an assembly of multiple dielectric layers 514 located between the second main surface 512b and the internal electrode layer 516 closest to the second main surface 512b.

[0133] The region sandwiched between the first outer layer portion and the second outer layer portion is the effective layer portion 515a. The thickness of the first outer layer portion 515b1 and the second outer layer portion is preferably 3 μm or more and 15 μm or less. The region sandwiched between the two outer layer portions is the effective layer portion. In other words, the effective layer portion is the region where the internal electrode layers 516 are stacked.

[0134] The dielectric layer 514 can be formed of, for example, a dielectric material. Examples of the dielectric material include dielectric ceramics whose main components are BaTiO3, CaTiO3, SrTiO3, and CaZrO3. Subcomponents such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds may also be added to these main components.

[0135] 14, the internal electrode layer 516 includes a plurality of first internal electrode layers 516a and a plurality of second internal electrode layers 516b. The first internal electrode layers 516a and the second internal electrode layers 516b are alternately stacked with the dielectric layer 514 interposed therebetween.

[0136] The first internal electrode layer 516a is disposed on the surface of the dielectric layer 514. The first internal electrode layer 516a faces the first main surface 512a and the second main surface 512b, has a first opposing electrode portion 518a facing the second internal electrode layer 516b, and is laminated in the direction connecting the first main surface 512a and the second main surface 512b.

[0137] The second internal electrode layer 516b is disposed on a surface of a dielectric layer 514 different from the surface of the dielectric layer 514 on which the first internal electrode layer 516a is disposed. The second internal electrode layer 516b has a second opposing electrode portion 518b opposing the first main surface 512a and the second main surface 512b, and is laminated in the direction connecting the first main surface 512a and the second main surface 512b.

[0138] 14 , the first internal electrode layer 516a is extended to the first side surface 512c and the third side surface 512e of the laminate 512 by the first extension electrode portion 520a, and extended to the second side surface 512d and the fourth side surface 512f of the laminate 512 by the second extension electrode portion 520b. Note that the width of the first extension electrode portion 520a extended to the first side surface 512c may be approximately equal to the width of the first extension electrode portion 520a extended to the third side surface 512e, and the width of the second extension electrode portion 520b extended to the second side surface 512d may be approximately equal to the width of the second extension electrode portion 520b extended to the fourth side surface 512f. In other words, the first extension electrode portion 520a is extended to the third side surface 512e of the laminate 512, and the second extension electrode portion 520b is extended to the fourth side surface 512f of the laminate 512.

[0139] The second internal electrode layer 516b is extended to the first side surface 512c and the fourth side surface 512f of the laminate 512 by the third extension electrode portion 521a, and is extended to the second side surface 512d and the third side surface 512e of the laminate 512 by the fourth extension electrode portion 521b. The width of the third extension electrode portion 521a extended to the first side surface 512c may be approximately equal to the width of the third extension electrode portion 521a extended to the fourth side surface 512f, and the width of the fourth extension electrode portion 521b extended to the second side surface 512d may be approximately equal to the width of the fourth extension electrode portion 521b extended to the third side surface 512e. In other words, the third extension electrode portion 521a is extended to the fourth side surface 512f side of the laminate 512, and the fourth extension electrode portion 521b is extended to the second side surface 512d side of the laminate 512.

[0140] Furthermore, when the multilayer ceramic capacitor 510 is viewed from the stacking direction, it is preferable that a straight line connecting the first extraction electrode portion 520a and the second extraction electrode portion 520b of the first internal electrode layer 516a intersects with a straight line connecting the third extraction electrode portion 521a and the fourth extraction electrode portion 521b of the second internal electrode layer 516b.

[0141] Furthermore, on the side surfaces 512c, 512d, 512e, and 512f of the laminate 512, it is preferable that the first extraction electrode portion 520a of the first internal electrode layer 516a and the fourth extraction electrode portion 521b of the second internal electrode layer 516b are extracted to opposing positions, and that the second extraction electrode portion 520b of the first internal electrode layer 516a and the third extraction electrode portion 521a of the second internal electrode layer 516b are extracted to opposing positions.

[0142] As shown in FIG. 14, the laminate 512 also includes side portions (L gaps) 522b of the laminate 512 formed between one end of the first opposing electrode portion 518a in the longitudinal direction z and the third side surface 512e, and between the other end of the second opposing electrode portion 518b in the longitudinal direction z and the fourth side surface 512f.

[0143] Furthermore, as shown in FIG. 14, the laminate 512 includes a side portion (W gap) 522a of the laminate 512 formed between one end in the width direction y of the first opposing electrode portion 518a and the first side surface 512c, and between the other end in the width direction y of the second opposing electrode portion 518b and the second side surface 512d.

[0144] The internal electrode layers 516 may be made of a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy containing one of these metals, such as an Ag-Pd alloy. The internal electrode layers 516 may further contain dielectric particles having the same composition as the ceramics contained in the dielectric layers 514.

[0145] Furthermore, the first internal electrode layer 516a and the second internal electrode layer 516b may contain Sn. By including Sn in the first internal electrode layer 516a and the second internal electrode layer 516b, the potential barrier height at the interface between the first internal electrode layer 516a and the second internal electrode layer 516b and the dielectric layer 514 can be increased, and the thickness of the depletion layer can be increased. This can alleviate electric field concentration at the interface, leading to improved high-temperature load reliability. In this case, Sn can be sufficiently effective even if it is included in only one of the internal electrode layers 516, the first internal electrode layer 516a and the second internal electrode layer 516b.

[0146] (Via Conductors) Via conductors 252 are arranged on the corner side formed by the first side surface 512c and the third side surface 512e of the laminate 512 and the corner side formed by the second side surface 512d and the fourth side surface 512f of the laminate 512. Via conductors 253 are arranged on the corner side formed by the first side surface 512c and the fourth side surface 512f of the laminate 512 and the corner side formed by the second side surface 512d and the third side surface 512e.

[0147] The via conductor 252 includes a first via conductor 252a and a second via conductor 252b.

[0148] The first via conductor 252a penetrates the corner portion formed by the first side surface 512c and the third side surface 512e of the laminate 512 along the height direction x, with one end protruding from the first main surface 512a as a first upper protruding end 252a1 and the other end protruding from the second main surface 512b as a first lower protruding end 252a2.

[0149] The first via conductor 252a penetrates an end 522b including only the first extraction electrode portion 520a of the first internal electrode layer 516a when viewed in the height direction x within the laminate 512. In this case, the first via conductor 252a is electrically connected to the first extraction electrode portion 520a of the first internal electrode layer 516a.

[0150] The first via conductor 252a preferably has a circular end face shape when viewed in the height direction x. However, the end face shape may be elliptical, oval, or any other shape. When the end face shape is circular, the diameter preferably ranges from 6 μm to 100 μm. When the end face shape is elliptical, the minor axis preferably ranges from 6 μm to 100 μm.

[0151] The amount of protrusion of the first upper protruding end 252a1 of the first via conductor 252a from the first main surface 512a is preferably 5 μm to 20 μm, and the amount of protrusion of the first lower protruding end 252a2 of the first via conductor 252a from the second main surface 512b is preferably 5 μm to 20 μm.

[0152] The second via conductor 252b penetrates the corner portion formed by the second side surface 512d and the fourth side surface 512f of the laminate 512 along the height direction x, with one end protruding from the first main surface 512a as a second upper protruding end 252b1 and the other end protruding from the second main surface 512b as a second lower protruding end 252b2.

[0153] The second via conductor 252b penetrates an end 522b that includes only the second extraction electrode portion 520b of the first internal electrode layer 516a when viewed in the height direction x within the laminate 512. In this case, the second via conductor 252b is electrically connected to the second extraction electrode portion 520b of the second internal electrode layer 516b.

[0154] The second via conductor 252b preferably has a circular end face shape when viewed in the height direction x. However, the end face shape may be elliptical, oval, or any other shape. When the end face shape is circular, the diameter is preferably at least in the range of 6 μm to 100 μm. When the end face shape is elliptical, the minor axis is preferably in the range of 6 μm to 100 μm.

[0155] The amount of protrusion of the second upper protruding end 252b1 of the second via conductor 252b from the first main surface 512a is preferably 5 μm to 20 μm, and the amount of protrusion of the second lower protruding end 252b2 of the second via conductor 252b from the second main surface 512b is preferably 5 μm to 20 μm.

[0156] The via conductors 253 include a third via conductor 253a and a fourth via conductor 253b.

[0157] The third via conductor 253a penetrates the corner portion formed by the first side surface 512c and the fourth side surface 512f of the laminate 512 along the height direction x, with one end protruding from the first main surface 512a as a third upper protruding end 253a1 and the other end protruding from the second main surface 512b as a third lower protruding end 253a2.

[0158] The third via conductor 253a penetrates an end portion 522b including only the third extraction electrode portion 521a of the second internal electrode layer 516b when viewed in the height direction x within the laminate 512. In this case, the third via conductor 253a is electrically connected to the third extraction electrode portion 521a of the second internal electrode layer 516b.

[0159] The third via conductor 253a preferably has a circular end face shape when viewed in the height direction x. However, the end face shape may be elliptical, oval, or any other shape. When the end face shape is circular, the diameter preferably ranges from 6 μm to 100 μm. When the end face shape is elliptical, the minor axis preferably ranges from 6 μm to 100 μm.

[0160] The protrusion amount of the third upper protruding end 253a1 of the third via conductor 253a from the first main surface 512a is preferably 5 μm to 20 μm, and the protrusion amount of the third lower protruding end 253a2 of the third via conductor 253a from the second main surface 512b is preferably 5 μm to 20 μm.

[0161] The fourth via conductor 253b penetrates the corner portion formed by the second side surface 512d and the third side surface 512e of the laminate 512 along the height direction x, with one end protruding from the first main surface 512a as a second upper protruding end 252b1 and the other end protruding from the second main surface 512b as a fourth lower protruding end 253b2.

[0162] The fourth via conductor 253b penetrates an end portion 522b including only the fourth extraction electrode portion 521b of the second internal electrode layer 516b when viewed in the height direction x within the laminate 512. In this case, the fourth via conductor 253b is electrically connected to the fourth extraction electrode portion 521b of the second internal electrode layer 516b.

[0163] The fourth via conductor 253b preferably has a circular end face shape when viewed in the height direction x. However, the end face shape may be elliptical, oval, or any other shape. When the end face shape is circular, the diameter preferably ranges from 6 μm to 100 μm. When the end face shape is elliptical, the minor axis preferably ranges from 6 μm to 100 μm.

[0164] The amount of protrusion of the fourth upper protruding end 253b1 of the fourth via conductor 253b from the first main surface 512a is preferably 5 μm to 20 μm, and the amount of protrusion of the fourth lower protruding end 253b2 of the fourth via conductor 253b from the second main surface 512b is preferably 5 μm to 20 μm.

[0165] The via conductors 252 and 253 can be made of, for example, a conductive paste containing conductive metal powder whose main components are Ag, Cu, and Ni.

[0166] As shown in FIG. 13, external electrodes 524 and 525 are disposed on the laminate 512 .

[0167] The external electrode 524 includes a first external electrode 524a and a second external electrode 524b.

[0168] The first external electrode 524a is disposed so as to cover the first lead electrode portion 520a on the first side surface 512c and the third side surface 512e, and so as to cover parts of the first main surface 512a and the second main surface 512b. The first external electrode 524a is electrically connected to the first lead electrode portion 520a of the first internal electrode layer 516a.

[0169] The second external electrode 524b is disposed so as to cover the second lead electrode portion 520b on the second side surface 512d and the fourth side surface 512f, and to cover parts of the first main surface 512a and the second main surface 512b. The second external electrode 524b is electrically connected to the second lead electrode portion 520b of the first internal electrode layer 516a.

[0170] The external electrode 525 includes a third external electrode 525a and a fourth external electrode 525b.

[0171] The third external electrode 525a is disposed so as to cover the third lead electrode portion 521a on the first side surface 512c and the fourth side surface 512f, and so as to cover parts of the first main surface 512a and the second main surface 512b. The third external electrode 525a is electrically connected to the third lead electrode portion 521a of the second internal electrode layer 516b.

[0172] The fourth external electrode 525b is disposed so as to cover the fourth lead electrode portion 521b on the second side surface 512d and the third side surface 512e, and to cover parts of the first main surface 512a and the second main surface 512b. The fourth external electrode 525b is electrically connected to the fourth lead electrode portion 521b of the second internal electrode layer 516b.

[0173] In the laminate 512, a capacitance is formed by the first opposing electrode portion 518a of the first internal electrode layer 516a and the second opposing electrode portion 518b of the second internal electrode layer 516b opposing each other via the dielectric layer 514. Therefore, a capacitance can be obtained between the first external electrode 524a and the second external electrode 524b to which the first internal electrode layer 516a is connected and the third external electrode 525a and the fourth external electrode 525b to which the second internal electrode layer 516b is connected, thereby exhibiting the characteristics of a capacitor.

[0174] The first external electrode 524a is disposed so as to cover the first upper protruding end 252a1 of the first via conductor 252a, which protrudes from the first main surface 12a of the laminate 512. The portion of the first external electrode 524a that covers the first upper protruding end 252a1 has a first upper protruding portion 412a that protrudes more than the other portion that covers the first main surface 512a. This causes the first external electrode 524a to protrude from the surface in accordance with the shape of the first upper protruding end 252a1.

[0175] The first external electrode 524a is disposed so as to cover the first lower protruding end 252a2 of the first via conductor 252a, which protrudes from the second main surface 512b of the laminate 512. The portion of the first external electrode 524a that covers the first lower protruding end 252a2 has a first lower protruding portion 414a that protrudes more than the other portion that covers the second main surface 512b. This causes the first external electrode 524a to protrude from the surface in accordance with the shape of the first lower protruding end 252a2.

[0176] The second external electrode 524b is disposed so as to cover the second upper protruding end 252b1 of the second via conductor 252b protruding from the first main surface 512a of the laminate 512. The portion of the second external electrode 524b covering the second upper protruding end 252b1 has a second upper protruding portion 412b that protrudes more than the other portion covering the first main surface 512a. This causes the second external electrode 524b to protrude from the surface in accordance with the shape of the second upper protruding end 252b1.

[0177] The second external electrode 524b is disposed so as to cover the second lower protruding end 252b2 of the second via conductor 252b protruding from the second main surface 512b of the laminate 512. The portion of the second external electrode 524b covering the second lower protruding end 252b2 has a second lower protruding portion 414b that protrudes more than the other portion covering the second main surface 512b. This causes the second external electrode 524b to protrude from the surface in accordance with the shape of the second lower protruding end 252b2.

[0178] The third external electrode 525a is arranged to cover the third upper protruding end 253a1 of the third via conductor 253a protruding from the first main surface 12a of the laminate 512. The portion of the third external electrode 525a covering the third upper protruding end 253a1 has a third upper protruding portion 413a that protrudes more than the other portion covering the first main surface 512a. This causes the third external electrode 525a to protrude from the surface in accordance with the shape of the third upper protruding end 253a1.

[0179] The third external electrode 525a is arranged to cover the third lower protruding end 253a2 of the third via conductor 253a, which protrudes from the second main surface 512b of the laminate 512. The portion of the third external electrode 525a that covers the third lower protruding end 253a2 has a third lower protruding portion 415a that protrudes more than the other portion that covers the second main surface 512b. This causes the third external electrode 525a to protrude from the surface in accordance with the shape of the third lower protruding end 253a2.

[0180] The fourth external electrode 525b is arranged to cover the fourth upper protruding end 253b1 of the fourth via conductor 253b protruding from the first main surface 512a of the laminate 512. The portion of the fourth external electrode 525b covering the fourth upper protruding end 253b1 has a fourth upper protruding portion 413b that protrudes more than the other portion covering the first main surface 512a. This causes the second external electrode 524b to protrude from the surface in accordance with the shape of the fourth upper protruding end 253b1.

[0181] The fourth external electrode 525b is arranged to cover the fourth lower protruding end 253b2 of the fourth via conductor 253b protruding from the second main surface 512b of the laminate 512. The portion of the fourth external electrode 525b covering the fourth lower protruding end 253b2 has a fourth lower protruding portion 415b that protrudes more than the other portion covering the second main surface 512b. This causes the fourth external electrode 525b to protrude from the surface in accordance with the shape of the fourth lower protruding end 253b2.

[0182] It is preferable that each of the first upper protrusion 412a, the first lower protrusion 414a, the second upper protrusion 412b and the second lower protrusion 414b has a dimension of 5 μm or more from the surface along the height direction x. Furthermore, in this case, it is preferable that the height of the first upper protrusion 412a determined by the protrusion amount of the first upper protrusion end 252a1 of the first via conductor 252a and the thickness of the first external electrode 524a and the height of the second upper protrusion 412b determined by the protrusion amount of the second upper protrusion end 252b1 of the second via conductor 252b and the thickness of the second external electrode 524b are the same, and it is preferable that the height of the first lower protrusion 414a determined by the protrusion amount of the second lower protrusion end 252b2 of the first via conductor 252a and the thickness of the first external electrode 524a and the height of the second lower protrusion 414b determined by the protrusion amount of the second lower protrusion end 252b2 of the second via conductor 252b and the thickness of the second external electrode 524b are the same.

[0183] Furthermore, it is preferable that each of the third upper protrusion 413a, the third lower protrusion 415a, the fourth upper protrusion 413b and the fourth lower protrusion 415b has a dimension of 5 μm or more from the surface along the height direction x. Furthermore, in this case, it is preferable that the height of the third upper protrusion 413a determined by the protrusion amount of the third upper protrusion end 253a1 of the third via conductor 253a and the thickness of the third external electrode 525a, and the height of the fourth upper protrusion 413b determined by the protrusion amount of the fourth upper protrusion end 253b1 of the fourth via conductor 253b and the thickness of the fourth external electrode 525b are the same, and it is preferable that the height of the third lower protrusion 415a determined by the protrusion amount of the third lower protrusion end 253a2 of the third via conductor 253a and the thickness of the third external electrode 525a, and the height of the fourth lower protrusion 415b determined by the protrusion amount of the fourth lower protrusion end 253b2 of the fourth via conductor 253b and the thickness of the fourth external electrode 525b are the same.

[0184] The structure of the external electrodes of the multilayer ceramic capacitor 510 according to this other embodiment may be combined with all or part of the multilayer ceramic capacitor 10 according to the present embodiment described above or its modifications, namely, the first modification to the fourth modification.

[0185] The dimension in the length direction z of the multilayer ceramic capacitor 510 including the laminate 12 and the external electrodes 524, 525 is defined as dimension L, the dimension in the height direction x of the multilayer ceramic capacitor 510 including the laminate 12 and the external electrodes 524, 525 is defined as dimension T, and the dimension in the width direction y of the multilayer ceramic capacitor 510 including the laminate 12 and the external electrodes 524, 525 is defined as dimension W. The dimensions of the multilayer ceramic capacitor 510 are preferably such that the dimension L in the length direction z is 0.1 mm or more and 6.0 mm or less, and the dimension W in the width direction y is 0.1 mm or more and 6.0 mm or less. Here, it is preferable that 7 / 10≦L / W≦10 / 7. This gives the multilayer ceramic capacitor a substantially tetragonal shape, thereby increasing the degree of freedom in mounting.

[0186] As a result, the multilayer ceramic capacitor 510 exhibits the same effects as the multilayer ceramic capacitor 10 shown in FIG.

[0187] As described above, the embodiment of the present invention has been disclosed in the above description, but the present invention is not limited to this.

[0188] In other words, various modifications can be made to the above-described embodiments and variants in terms of mechanism, shape, material, quantity, position, arrangement, etc., without departing from the scope of the technical idea and purpose of the present invention, and these modifications are included in the present invention.

[0189] <1> A laminate including a plurality of dielectric layers stacked together, the laminate including first and second main surfaces opposing each other in a stacking direction of the plurality of dielectric layers, first and second side surfaces opposing each other in a width direction perpendicular to the stacking direction, first end faces and second end faces opposing each other in a length direction perpendicular to the stacking direction and the width direction, first internal electrode layers stacked alternately with the plurality of dielectric layers, and second internal electrode layers stacked alternately with the plurality of dielectric layers; a first external electrode covering at least a portion of each of the first and second main surfaces of the laminate; a second external electrode covering at least a portion of each of the first and second main surfaces of the laminate; first via conductors penetrating the laminate along the stacking direction of the plurality of dielectric layers and connected to the first internal electrode layers; and second via conductors penetrating the laminate along the stacking direction of the plurality of dielectric layers and connected to the second internal electrode layers, the first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface; the second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface; the first external electrode covers the first upper protruding end and the first lower protruding end of the first via conductor; the second external electrode covers the second upper protruding end and the second lower protruding end of the second via conductor; the first external electrode has a portion covering the first upper protruding end of the first via conductor that has a first upper protruding part that protrudes more than the other portion covering the first main surface, and a portion covering the first lower protruding end of the first via conductor that has a first lower protruding part that protrudes more than the other portion covering the second main surface; a portion of the second external electrode covering the second upper protruding end of the second via conductor having a second upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion of the second external electrode covering the second lower protruding end of the second via conductor having a second lower protruding portion that protrudes more than the other portion covering the second main surface.

[0190] <2> The multilayer ceramic capacitor according to <1>, wherein the first external electrode is arranged to cover the first end face as well, the second external electrode is arranged to cover the second end face as well, the first external electrode has a portion covering a part of the first main face, a portion covering a part of the second main face, and a portion covering the first end face that are each separated from each other, and the second external electrode has a portion covering a part of the first main face, a portion covering a part of the second main face, and a portion covering the second end face that are each separated from each other.

[0191] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the dimension of the first upper protruding end of the first via conductor protruding from the first main surface is 5 μm or more and 20 μm or less, the dimension of the first lower protruding end of the first via conductor protruding from the second main surface is 5 μm or more and 20 μm or less, the dimension of the second upper protruding end of the second via conductor protruding from the first main surface is 5 μm or more and 20 μm or less, and the dimension of the second lower protruding end of the second via conductor protruding from the second main surface is 5 μm or more and 20 μm or less.

[0192] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the dimension by which the first upper protrusion of the first external electrode protrudes from the other portion covering the first main surface is 5 μm or more, the dimension by which the first lower protrusion of the first external electrode protrudes from the other portion covering the second main surface is 5 μm or more, the dimension by which the second upper protrusion of the second external electrode protrudes from the other portion covering the first main surface is 5 μm or more, and the dimension by which the second lower protrusion of the second external electrode protrudes from the other portion covering the second main surface is 5 μm or more.

[0193] <5> A laminate including a plurality of dielectric layers stacked together, the laminate having first and second main surfaces opposing each other in a stacking direction of the plurality of dielectric layers, first and second side surfaces opposing each other in a width direction perpendicular to the stacking direction, and third and fourth side surfaces opposing each other in a length direction perpendicular to the stacking direction and the width direction, the laminate including first internal electrode layers alternately stacked with the plurality of dielectric layers and second internal electrode layers alternately stacked with the plurality of dielectric layers; a first external electrode covering at least the first and second main surfaces of the laminate; a second external electrode covering at least the first and second main surfaces of the laminate; a third external electrode covering at least the first and second main surfaces of the laminate; a fourth external electrode covering at least the first and second main surfaces of the laminate; first via conductors and second via conductors passing through the laminate along the stacking direction of the plurality of dielectric layers and connected to the first internal electrode layers; the laminate includes a third via conductor and a fourth via conductor which penetrate the laminate along the stacking direction of the plurality of dielectric layers and are connected to the second internal electrode layer, the first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface, the second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface, the third via conductor has a third upper protruding end protruding from the first main surface and a third lower protruding end protruding from the second main surface, the fourth via conductor has a second upper protruding end protruding from the first main surface and a fourth lower protruding end protruding from the second main surface, and the first external electrode covers the first upper protruding end and the first lower protruding end of the first via conductor, the second external electrode covers the second upper protruding end and the second lower protruding end of the second via conductor; the third external electrode covers the third upper protruding end and the third lower protruding end of the third via conductor; and the fourth external electrode covers the fourth upper protruding end and the fourth lower protruding end of the fourth via conductor.the first external electrode has a portion covering the first upper protruding end of the first via conductor that has a first upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the first lower protruding end of the first via conductor that has a first lower protruding portion that protrudes more than the other portion covering the second main surface; the second external electrode has a portion covering the second upper protruding end of the second via conductor that has a second upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the second lower protruding end of the second via conductor that has a second lower protruding portion that protrudes more than the other portion covering the second main surface; the third external electrode has a portion covering the third upper protruding end of the third via conductor that has a third upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the third lower protruding end of the third via conductor that has a third lower protruding portion that protrudes more than the other portion covering the second main surface; a fourth external electrode, the portion covering the fourth upper protruding end of the fourth via conductor having a fourth upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the fourth lower protruding end of the fourth via conductor having a fourth lower protruding portion that protrudes more than the other portion covering the second main surface;

[0194] 10, 10A, 10B, 10C, 510 Multilayer ceramic capacitor 12, 512 Laminate 12a, 512a First main surface 12b, 512b Second main surface 12c, 512c First side surface 12d, 512d Second side surface 12e First end surface 12f Second end surface 14 Dielectric layer 15a Effective layer portion 15b1 First outer layer portion 15b2 Second outer layer portion 16, 516 Internal electrode layer 16a, 516a First internal electrode layer 16b, 516b Second internal electrode layer 18a, 518a First opposing electrode portion 18b, 518b Second opposing electrode portion 20a, 520a First lead electrode portion 20b, 520b Second lead electrode portion 22a, 522a Side portion 22b, 522b End portion 24, 524, 525 External electrode 24a, 524a First external electrode 24b, 524b Second external electrode 24x, 24y Surface 25, 252, 253 Via conductor 25a, 252a First via conductor 25b, 252b Second via conductor 25a1, 252a1 First upper protruding end 25a2, 252a2 First lower protruding end 25b1, 252b1 Second upper protruding end 25b2, 252b2 Second lower protruding end 26 Upper base electrode layer 26a First upper base electrode layer 26b Second upper base electrode layer 27 Lower base electrode layer 27a First lower base electrode layer 27b Second lower base electrode layer 28 Plating layer 28a First plating layer 28b Second plating layer 41a, 412a First upper protrusion 41b, 412b Second upper protrusion 42a, 414a First lower protrusion 42b, 414b Second lower protrusion 253a Third via conductor 253a1 Third upper protrusion end 253a2 Third lower protrusion end 253b Fourth via conductor 253b1 Fourth upper protrusion end 253b2 Fourth lower protrusion end 413a Third upper protrusion 413b Fourth upper protrusion 415a Third lower protrusion 415b Fourth lower protrusion 512e Third side surface 512f Fourth side surface 525a Third external electrode 525b Fourth external electrode 50 Mounting substrate 52 Core material 54 Conductive land 54a First conductive land 54b Second conductive land 56 Bonding material60 Mounter nozzle 70 Laminated chip 72a First internal electrode pattern 72b Second internal electrode pattern 74a, 74b Protective film 76a, 76b Via hole 78a, 78b Via conductor paste

Claims

1. A laminate including a plurality of dielectric layers stacked together, the laminate including first and second main surfaces facing each other in a stacking direction of the plurality of dielectric layers, first and second side surfaces facing each other in a width direction perpendicular to the stacking direction, first and second end surfaces facing each other in a length direction perpendicular to the stacking direction and the width direction, first internal electrode layers stacked alternately with the plurality of dielectric layers, and second internal electrode layers stacked alternately with the plurality of dielectric layers; a first external electrode covering at least a portion of each of the first and second main surfaces of the laminate; a second external electrode covering at least a portion of each of the first and second main surfaces of the laminate; a first via conductor penetrating the laminate along the stacking direction of the plurality of dielectric layers and connected to the first internal electrode layer; and a second via conductor penetrating the laminate along the stacking direction of the plurality of dielectric layers and connected to the second internal electrode layer, the first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface; the second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface; the first external electrode covers the first upper protruding end and the first lower protruding end of the first via conductor; the second external electrode covers the second upper protruding end and the second lower protruding end of the second via conductor; the first external electrode has a portion covering the first upper protruding end of the first via conductor that has a first upper protruding part that protrudes more than the other portion covering the first main surface, and a portion covering the first lower protruding end of the first via conductor that has a first lower protruding part that protrudes more than the other portion covering the second main surface; a portion of the second external electrode covering the second upper protruding end of the second via conductor having a second upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion of the second external electrode covering the second lower protruding end of the second via conductor having a second lower protruding portion that protrudes more than the other portion covering the second main surface.

2. The multilayer ceramic capacitor according to claim 1, wherein the first external electrode is arranged so as to cover the first end face as well, the second external electrode is arranged so as to cover the second end face as well, the first external electrode has a portion covering a part of the first main face, a portion covering a part of the second main face, and a portion covering the first end face, which are each separated from each other, and the second external electrode has a portion covering a part of the first main face, a portion covering a part of the second main face, and a portion covering the second end face, which are each separated from each other.

3. A multilayer ceramic capacitor according to claim 1 or 2, wherein the dimension by which the first upper protruding end of the first via conductor protrudes from the first main surface is 5 μm or more and 20 μm or less, the dimension by which the first lower protruding end of the first via conductor protrudes from the second main surface is 5 μm or more and 20 μm or less, the dimension by which the second upper protruding end of the second via conductor protrudes from the first main surface is 5 μm or more and 20 μm or less, and the dimension by which the second lower protruding end of the second via conductor protrudes from the second main surface is 5 μm or more and 20 μm or less.

4. A multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the dimension by which the first upper protrusion of the first external electrode protrudes from the other portion covering the first main surface is 5 μm or more, the dimension by which the first lower protrusion of the first external electrode protrudes from the other portion covering the second main surface is 5 μm or more, the dimension by which the second upper protrusion of the second external electrode protrudes from the other portion covering the first main surface is 5 μm or more, and the dimension by which the second lower protrusion of the second external electrode protrudes from the other portion covering the second main surface is 5 μm or more.

5. A laminate including a plurality of dielectric layers stacked together, the laminate having first and second main surfaces facing each other in a stacking direction of the plurality of dielectric layers, first and second side surfaces facing each other in a width direction perpendicular to the stacking direction, and third and fourth side surfaces facing each other in a length direction perpendicular to the stacking direction and the width direction, the laminate including first internal electrode layers stacked alternately with the plurality of dielectric layers and second internal electrode layers stacked alternately with the plurality of dielectric layers; a first external electrode covering at least the first and second main surfaces of the laminate; a second external electrode covering at least the first and second main surfaces of the laminate; a third external electrode covering at least the first and second main surfaces of the laminate; a fourth external electrode covering at least the first and second main surfaces of the laminate; first and second via conductors passing through the laminate along the stacking direction of the plurality of dielectric layers and connected to the first internal electrode layers; the laminate includes a third via conductor and a fourth via conductor which penetrate the laminate along the stacking direction of the plurality of dielectric layers and are connected to the second internal electrode layer, the first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface, the second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface, the third via conductor has a third upper protruding end protruding from the first main surface and a third lower protruding end protruding from the second main surface, the fourth via conductor has a second upper protruding end protruding from the first main surface and a fourth lower protruding end protruding from the second main surface, and the first external electrode covers the first upper protruding end and the first lower protruding end of the first via conductor, the second external electrode covers the second upper protruding end and the second lower protruding end of the second via conductor; the third external electrode covers the third upper protruding end and the third lower protruding end of the third via conductor; and the fourth external electrode covers the fourth upper protruding end and the fourth lower protruding end of the fourth via conductor.the first external electrode has a portion covering the first upper protruding end of the first via conductor that has a first upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the first lower protruding end of the first via conductor that has a first lower protruding portion that protrudes more than the other portion covering the second main surface; the second external electrode has a portion covering the second upper protruding end of the second via conductor that has a second upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the second lower protruding end of the second via conductor that has a second lower protruding portion that protrudes more than the other portion covering the second main surface; the third external electrode has a portion covering the third upper protruding end of the third via conductor that has a third upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the third lower protruding end of the third via conductor that has a third lower protruding portion that protrudes more than the other portion covering the second main surface; a fourth external electrode, the portion covering the fourth upper protruding end of the fourth via conductor having a fourth upper protruding portion that protrudes more than the other portion covering the first main surface, and a portion covering the fourth lower protruding end of the fourth via conductor having a fourth lower protruding portion that protrudes more than the other portion covering the second main surface;

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