Multilayer ceramic capacitor

Abstract

The present invention provides a multilayer ceramic capacitor in which stress concentration on a laminate can be suppressed during mounting implementation to suppress occurrence of a crack in the laminate.　This multilayer ceramic capacitor comprises: a laminate including a plurality of internal electrode layers and a plurality of dielectric layers that are laminated and having a first main surface and a second main surface that face each other in a lamination direction, a first side surface and a second side surface that face each other in a width direction orthogonal to the lamination direction, and a first end surface and a second end surface that face each other in a length direction orthogonal to the lamination direction and the width direction; a first external electrode connected to the internal electrode layer and disposed on the first end surface and the second main surface; and a second external electrode connected to the internal electrode layer and disposed on the second end surface and the second main surface. The second main surface of the laminate serves as a mounting surface. The first external electrode has a first main surface electrode disposed on the first end surface and the second main surface, and a first plating layer that covers the first main surface electrode and is disposed on the first end surface and the second main surface. The second external electrode has a second main surface electrode disposed on the second end surface and the second main surface, and a second plating layer that covers the second main surface electrode and is disposed on the second end surface and the second main surface. The first plating layer and the second plating layer each have a cushion part that protrudes from the first main surface of the laminate and a joint part that protrudes from the second main surface of the laminate. The maximum distance in the lamination direction by which the cushion part protrudes from the first main surface of the laminate is longer than the maximum distance in the lamination direction by which the joint part protrudes from the second main surface of the laminate.

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] In recent years, electronic devices such as mobile phones and portable music players have become smaller and thinner. Accordingly, the multilayer ceramic electronic components mounted in these smaller and thinner electronic devices have also become smaller and thinner.

[0003] A multilayer ceramic capacitor, which is such a multilayer ceramic electronic component, has a dielectric chip in which dielectric ceramics such as barium titanate and internal electrodes are alternately stacked, and external electrodes formed to cover each longitudinal end of the dielectric chip, as disclosed in Patent Document 1 (see Patent Document 1). The multilayer ceramic capacitor disclosed in Patent Document 1 is a low-profile multilayer ceramic capacitor with a height of, for example, 150 μm or less. When mounting such a multilayer ceramic capacitor on a substrate, a mounter is used to mount it on the substrate.

[0004] JP 2014-183186 A

[0005] However, in the case of low-profile multilayer ceramic capacitors, there is a possibility that cracks may occur in the laminate of the multilayer ceramic capacitor due to impact from the nozzle of the mounter during mounting, resulting in poor insulation.

[0006] Therefore, a primary object of the present invention is to provide a multilayer ceramic capacitor that can suppress stress concentration on the laminate during mounting and can suppress the occurrence of cracks in the laminate.

[0007] A multilayer ceramic capacitor according to the present invention includes a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers, the laminate having a first main surface and a second main surface opposing each other in the lamination direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the lamination direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the lamination direction and the width direction; first external electrodes connected to the internal electrode layers and disposed on the first end surface and the second main surface; and second external electrodes connected to the internal electrode layers and disposed on the second end surface and the second main surface, the second main surface of the laminate being a mounting surface, and the first external electrodes are connected to the first end surface and the second main surface. The laminate has a main surface electrode and a first plating layer covering the first main surface electrode and arranged on the first end face and the second main surface, the second external electrode has a second main surface electrode arranged on the second end face and the second main surface, and a second plating layer covering the second main surface electrode and arranged on the second end face and the second main surface, the first plating layer and the second plating layer each having a cushion portion protruding from the first main surface of the laminate and a joint portion protruding from the second main surface of the laminate, and the maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than the maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate.

[0008] In the multilayer ceramic capacitor according to the present invention, the first plating layer and the second plating layer each have a cushion portion protruding from the first main surface of the laminate and a joint portion protruding from the second main surface of the laminate, and the maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than the maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate, so that when the nozzle of the mounter hits the cushion portion, the cushion portion can absorb the stress on the laminate like a cushion, thereby further alleviating the stress on the laminate.

[0009] The multilayer ceramic capacitor according to the present invention also includes a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers, the laminate having a first main surface and a second main surface opposing each other in the lamination direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the lamination direction, and a third side surface and a fourth side surface opposing each other in a length direction perpendicular to the lamination direction and the width direction; first external electrodes connected to the internal electrode layers and disposed on the first side surface, the third side surface, and the second main surface; a second external electrode connected to the internal electrode layer and disposed on the first side face, the fourth side face, and the second main face; a third external electrode connected to the internal electrode layer and disposed on the second side face, the third side face, and the second main face; a fourth external electrode connected to the internal electrode layer and disposed on the second side face, the third side face, and the second main face, the second main face of the laminate being a mounting surface; and the first external electrode having a first main face electrode disposed on the first side face, the third side face, and the second main face; and a first plating layer covering the first main face electrode and disposed on the first side face, the third side face, and the second main face. The second external electrode has a second main surface electrode arranged on the second side surface, the fourth side surface, and the second main surface, and a second plating layer covering the second main surface electrode and arranged on the second side surface, the fourth side surface, and the second main surface; the third external electrode has a third main surface electrode arranged on the first side surface, the fourth side surface, and the second main surface, and a third plating layer covering the third main surface electrode and arranged on the first side surface, the fourth side surface, and the second main surface; and the fourth external electrode has a third main surface electrode arranged on the second side surface, the third side surface, and the second main surface. The laminate has a fourth main surface electrode and a fourth plating layer covering the fourth main surface electrode and arranged on the second side surface, the third side surface, and the second main surface, wherein the first plating layer, the second plating layer, the third plating layer, and the fourth plating layer each have a cushion portion protruding from the first main surface of the laminate and a joint portion protruding from the second main surface of the laminate, and the maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than the maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate.

[0010] In the multilayer ceramic capacitor according to the present invention, the first plating layer, the second plating layer, the third plating layer, and the fourth plating layer each have a cushion portion protruding from the first main surface of the laminate and a joint portion protruding from the second main surface of the laminate, and the maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than the maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate, so that when the nozzle of the mounter hits the cushion portion, the cushion portion can absorb the stress on the multilayer ceramic capacitor like a cushion, thereby further alleviating the stress on the multilayer ceramic capacitor.

[0011] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can suppress stress concentration on the laminate during mounting and prevent cracks from occurring in the laminate.

[0012] The above and other objects, features, and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

[0013] 1 is an external perspective view showing a multilayer ceramic capacitor according to a first embodiment of the present invention. FIG. 2 is a front view showing a multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 1. FIG. 5 is a diagram showing a state where the multilayer ceramic capacitor according to the first embodiment of the present invention is mounted on a mounting substrate. FIG. 6 is an external perspective view showing a multilayer ceramic capacitor according to a second embodiment of the present invention. FIG. 7 is a front view showing a multilayer ceramic capacitor according to a second embodiment of the present invention. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 6. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 6. FIG. 10 is an external perspective view showing a multilayer ceramic capacitor according to a third embodiment of the present invention. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 10. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 10. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 10. FIG. 14 is an exploded perspective view of the laminate shown in FIG. 10.

[0014] A. First Embodiment 1. Multilayer Ceramic Capacitor A multilayer ceramic capacitor 10 according to a first embodiment of the present invention will be described. FIG. 1 is an external perspective view showing the multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 2 is a front view showing the multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 1. FIG. 5 is a view showing the multilayer ceramic capacitor according to the first embodiment of the present invention when mounted on a mounting substrate.

[0015] The multilayer ceramic capacitor 10 has a laminate 12 and external electrodes 24. The configuration of each will be described below in the order of the laminate 12 and the external electrodes 24.

[0016] The laminate 12 has a plurality of stacked dielectric layers 14 and a plurality of internal electrode layers 16. Furthermore, the laminate 12 includes a first main surface 12a and a second main surface 12b facing in a stacking direction x, a first side surface 12c and a second side surface 12d facing in a width direction y perpendicular to the stacking direction x, and a first end face 12e and a second end face 12f facing in a length direction z perpendicular to the stacking direction x and the width direction y.

[0017] The corners and ridges of this laminate 12 are rounded. Note that a corner refers to a portion where three adjacent surfaces of the laminate 12 intersect, and a ridge refers to a portion where two adjacent surfaces of the laminate 12 intersect. In addition, unevenness may be formed on part or all of the first main surface 12a and the second main surface 12b, the first side surface 12c and the second side surface 12d, and the first end surface 12e and the second end surface 12f. The second main surface 12b of the laminate 12 is used as a mounting surface.

[0018] As shown in Figures 3 and 4, the laminate 12 has, in the stacking direction x connecting the first main surface 12a and the second main surface 12b, an inner layer portion 15a in which a plurality of internal electrode layers 16 face each other, a first outer layer portion 15b1 formed from a plurality of dielectric layers 14 located between the first main surface 12a and the internal electrode layer 16 located closest to the first main surface 12a, and a second outer layer portion 15b2 formed from a plurality of dielectric layers 14 located between the second main surface 12b and the internal electrode layer 16 located closest to the second main surface 12b.

[0019] The first outer layer portion 15b1 is located on the first main surface 12a side of the laminate 12 and is an aggregate of multiple dielectric layers 14 located between the first main surface 12a and the internal electrode layer 16 located closest to the first main surface 12a.

[0020] The second outer layer portion 15b2 is located on the second main surface 12b side of the laminate 12 and is an aggregate of multiple dielectric layers 14 located between the second main surface 12b and the internal electrode layer 16 located closest to the second main surface 12b.

[0021] The region sandwiched between the first outer layer portion 15b1 and the second outer layer portion 15b2 is the inner layer portion 15a.

[0022] The dielectric layer 14 may be formed from, for example, a dielectric material. Examples of the dielectric material include dielectric ceramics composed mainly of BaTiO3, CaTiO3, SrTiO3, CaZrO3, etc. Sub-components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds may also be added to these main components.

[0023] 3 and 4, the internal electrode layers 16 include first internal electrode layers 16a and second internal electrode layers 16b. The first internal electrode layers 16a and the second internal electrode layers 16b are alternately stacked with the dielectric layers 14 interposed therebetween.

[0024] The first internal electrode layer 16a is disposed on the surface of the dielectric layer 14. The first internal electrode layer 16a has a first opposing electrode portion 18a that faces the second internal electrode layer 16b, and a first lead electrode portion 20a that is located on one end side of the first internal electrode layer 16a and extends from the first opposing electrode portion 18a to the first end face 12e of the laminate 12. An end of the first lead electrode portion 20a is led out to and exposed at the first end face 12e.

[0025] The shape of the first opposing electrode portion 18a of the first internal electrode layer 16a is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the first opposing electrode portion 18a may be tapered in plan view, with a slope increasing in either direction.

[0026] The shape of the first lead electrode portion 20a of the first internal electrode layer 16a is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the first lead electrode portion 20a may be tapered in plan view, with a slope increasing in either direction.

[0027] The length in the width direction y of the first opposing electrode portion 18a of the first internal electrode layer 16a and the length in the width direction y of the first extraction electrode portion 20a of the first internal electrode layer 16a may be formed to be the same length, or either one may be formed to have a narrower length in the width direction y.

[0028] The second internal electrode layer 16b is arranged on a surface of a dielectric layer 14 different from the dielectric layer 14 on which the first internal electrode layer 16a is arranged. The second internal electrode layer 16b has a second opposing electrode portion 18b facing the first internal electrode layer 16a, and a second extraction electrode portion 20b located on one end side of the second internal electrode layer 16b and extending from the second opposing electrode portion 18b to a second end face 12f of the laminate 12. The second extraction electrode portion 20b has an end portion extended to and exposed at the second end face 12f.

[0029] The shape of the second opposing electrode portion 18b of the second internal electrode layer 16b is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the second opposing electrode portion 18b may be tapered in plan view, with a slope increasing in either direction.

[0030] The shape of the second extraction electrode portion 20b of the second internal electrode layer 16b is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the second extraction electrode portion 20b may be tapered in plan view, with a slope increasing in either direction.

[0031] The length in the width direction y of the second opposing electrode portion 18b of the second internal electrode layer 16b and the length in the width direction y of the second extraction electrode portion 20b of the second internal electrode layer 16b may be formed to be the same length, or either one may be formed to have a narrower length in the width direction y.

[0032] The first internal electrode layer 16a and the second internal electrode layer 16b each contain, for example, Ni as a main component and at least one selected from metals such as Cu, Ag, Pd, and Au, and alloys such as Ag-Pd alloys. The internal electrode layer 16 may further contain dielectric particles having the same composition as the dielectric material contained in the dielectric layer 14.

[0033] Furthermore, the first internal electrode layer 16 a and the second internal electrode layer 16 b may contain Sn. By containing Sn in the first internal electrode layer 16 a and the second internal electrode layer 16 b, electric field concentration at the interface between the first internal electrode layer 16 a and the second internal electrode layer 16 b and the dielectric layer 14 can be alleviated, leading to improvement in high-temperature load reliability. In this case, Sn can be sufficiently effective even if it is contained in only one of the first internal electrode layer 16 a and the second internal electrode layer 16 b.

[0034] The thickness of the internal electrode layers 16, i.e., the first internal electrode layers 16a and the second internal electrode layers 16b, is preferably 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layers 16a and the second internal electrode layers 16b is preferably 5 or more and 2000 or less.

[0035] Furthermore, as shown in FIG. 3, the laminate 12 includes ends (hereinafter referred to as "L gaps") 22b of the laminate 12 formed between the end of the first internal electrode layer 16a opposite the first extraction electrode portion 20a and the second end face 12f, and between the end of the second internal electrode layer 16b opposite the second extraction electrode portion 20b and the first end face 12e.

[0036] As shown in FIG. 4 , the laminate 12 also includes side portions (hereinafter referred to as “W gaps”) 22 a of the laminate 12 formed between one end of the first opposing electrode portion 18 a and the second opposing electrode portion 18 b in the width direction y and the first side surface 12 c, and between the other end of the first opposing electrode portion 18 a and the second opposing electrode portion 18 b in the width direction y and the second side surface 12 d.

[0037] In this embodiment, the first end face 12e of the laminate 12 is preferably curved from the first main surface 12a to the second main surface 12b. Also, the second end face 12f of the laminate 12 is preferably curved from the first main surface 12a to the second main surface 12b. By configuring in this manner, at the end faces 12e, 12f of the laminate, the internal electrode layers 16 are not exposed at the center side of the laminate 12 in the stacking direction x, and the internal electrode layers 16 can be exposed from the center side of the laminate 12 in the stacking direction x to the first main surface 12a or the second main surface 12b.

[0038] As shown in FIGS. 1 to 3, external electrodes 24 are disposed on the first end face 12e side and the second end face 12f side of the laminate 12.

[0039] The external electrode 24 includes a first external electrode 24a and a second external electrode 24b.

[0040] The first external electrode 24a is disposed on the first end face 12e and the second main face 12b of the laminate 12. In this case, the first external electrode 24a is electrically connected to the first extraction electrode portion 20a of the first internal electrode layer 16a.

[0041] The second external electrode 24b is disposed on the second end face 12f and the second main surface 12b of the laminate 12. In this case, the second external electrode 24b is electrically connected to the second extraction electrode portion 20b of the second internal electrode layer 16b.

[0042] Within the laminate 12, capacitance is formed by the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b opposing each other via the dielectric layer 14. Therefore, capacitance can be obtained between the first external electrode 24a connected to the first internal electrode layer 16a and the second external electrode 24b connected to the second internal electrode layer 16b, and the characteristics of a capacitor are exhibited.

[0043] The external electrode 24 includes a principal surface electrode 26 and a plating layer 28 formed to cover the principal surface electrode 26. More specifically, the first external electrode 24a includes a first principal surface electrode 26a disposed on the first end face 12e and the second principal surface 12b, and a first plating layer 28a covering the first principal surface electrode 26a and disposed on the first end face 12e and the second principal surface 12b. The second external electrode 24b includes a second principal surface electrode 26b disposed on the second end face 12f and the second principal surface 12b, and a second plating layer 28b covering the second principal surface electrode 26b and disposed on the second end face 12f and the second principal surface 12b.

[0044] The principal surface electrode 26 includes a first principal surface electrode 26a and a second principal surface electrode 26b.

[0045] The first principal surface electrode 26a is disposed from the ridge portion where the first end surface 12e and the second principal surface 12b of the laminate 12 are connected to the first end surface 12e and the second principal surface 12b of the laminate 12, and is formed so as to cover a portion of the first end surface 12e and the second principal surface 12b of the laminate 12. The second principal surface electrode 26b is disposed from the ridge portion where the second end surface 12f and the second principal surface 12b of the laminate 12 are connected to the second end surface 12f and the second principal surface 12b of the laminate 12, and is formed so as to cover a portion of the second end surface 12f and the second principal surface 12b of the laminate 12.

[0046] The principal surface electrodes 26 are preferably formed by a thin film forming method such as sputtering or vapor deposition, etc. In particular, the principal surface electrodes 26 are preferably sputter electrodes formed by sputtering.

[0047] The principal surface electrode 26 is preferably formed by sputtering directly on a portion of the second principal surface 12b and a portion of the first end face 12e or the second end face 12f of the laminate 12. The principal surface electrode 26 includes at least one selected from the group consisting of Ni, Cr, Cu, Ti, and the like.

[0048] The principal surface electrodes 26 may also contain metals such as Ni, Cu, Ag, Pd, an Ag-Pd alloy, or Au. In this case, the principal surface electrodes 26 preferably contain, as a co-material, the same dielectric material as the dielectric ceramic contained in the dielectric layers 14. By including the co-material, the shrinkage behavior of the principal surface electrodes 26 during firing can be made closer to the shrinkage behavior of the laminate 12, and peeling of the principal surface electrodes 26 from the laminate 12 can be prevented.

[0049] The plating layer 28 includes a first plating layer 28a and a second plating layer 28b.

[0050] The first plating layer 28a is disposed so as to cover the first principal surface electrode 26a, and the second plating layer 28b is disposed so as to cover the second principal surface electrode 26b.

[0051] The plating layer 28 includes, for example, at least one selected from Ni, Sn, Cu, Ag, Pd, an Ag—Pd alloy, Au, etc. The plating layer 28 preferably includes, for example, at least one of a Cu plating layer, a Ni plating layer, and a Sn plating layer.

[0052] The plating layer 28 may be formed of multiple layers. For example, when the plating layer 28 has a two-layer structure, it includes a Ni plating layer covering the principal-surface electrode 26 and a Sn plating layer arranged to cover the Ni plating layer. Also, when the plating layer 28 has a three-layer structure, it includes a Cu plating layer covering the principal-surface electrode 26, a Ni plating layer arranged to cover the Cu plating layer, and a Sn plating layer arranged to cover the Ni plating layer.

[0053] The Cu plating layer is provided to cover the surfaces of the principal surface electrodes 26, thereby suppressing the penetration of plating solution. The Ni plating layer can prevent the principal surface electrodes 26 from being eroded by solder when mounting the multilayer ceramic capacitor 10. Furthermore, the Sn plating layer improves the wettability of the solder when mounting the multilayer ceramic capacitor 10, facilitating mounting.

[0054] 3 and 5, the plating layer 28 has a cushion portion 40 protruding from the first main surface 12a of the laminate 12 and a bonding portion 42 protruding from the second main surface 12b of the laminate 12. The cushion portion 40 is a portion that comes into contact with a nozzle of a mounter during mounting. The bonding portion 42 is a portion that bonds the multilayer ceramic capacitor 10 to the mounting substrate 50 via a bonding material 54 when the multilayer ceramic capacitor 10 is mounted on the mounting substrate 50.

[0055] The cushion portion 40 is disposed on the first main surface 12a side and protrudes from the first main surface 12a. The cushion portion 40 has a first cushion portion 40a provided on the first plating layer 28a and a second cushion portion 40b provided on the second plating layer 28b. It is preferable that the maximum distance in the stacking direction x that the first cushion portion 40a protrudes from the first main surface 12a of the laminate 12 is substantially the same as the maximum distance in the stacking direction x that the second cushion portion 40b protrudes from the first main surface 12a of the laminate 12.

[0056] The cushion portion 40 can be formed by plating growth from metal particles contained in the internal electrode layers 16. More specifically, the cushion portion 40 is formed by depositing metal on the same portions of the metal particles contained in the internal electrode layers 16 exposed from the laminate 12 at each end face 12 e, 12 f.

[0057] The bonding portion 42 is disposed on the second principal surface 12b side and protrudes from the second principal surface 12b. The bonding portion 42 includes a first bonding portion 42a provided on the first plating layer 28a and a second bonding portion 42b provided on the second plating layer 28b. The first bonding portion 42a is disposed so as to cover the first principal surface electrode 26a. The second bonding portion 42b is disposed so as to cover the second principal surface electrode 26b. It is preferable that the maximum distance in the stacking direction x that the first bonding portion 42a protrudes from the second principal surface 12b of the laminate 12 is substantially the same as the maximum distance in the stacking direction x that the second bonding portion 42b protrudes from the second principal surface 12b of the laminate 12.

[0058] The joint 42 can be formed by plating growth from metal particles contained in the internal electrode layers 16 and the principal surface electrodes 26. More specifically, the joint 42 is formed by metal being deposited in the same portions of the metal particles contained in the internal electrode layers 16 and the metal particles contained in the principal surface electrodes 26 that are exposed at the end faces 12 e, 12 f of the laminate 12.

[0059] It is preferable that the cushion portion 40 and the joint portion 42 are provided continuously. That is, it is preferable that the first cushion portion 40a and the first joint portion 42a are provided continuously on the first end face 12e. It is also preferable that the second cushion portion 40b and the second joint portion 42b are provided continuously on the second end face 12f. By configuring in this manner, electrical connectivity can be ensured.

[0060] The maximum distance in the stacking direction x that the cushion portion 40 protrudes from the first main surface 12a of the laminate 12 is defined as t1. The maximum distance in the stacking direction x that the joint portion 42 protrudes from the second main surface 12b of the laminate 12 is defined as t2. The maximum distance in the stacking direction x that the cushion portion 40 protrudes from the first main surface 12a of the laminate 12 (t1) is longer than the maximum distance in the stacking direction x that the joint portion 42 protrudes from the second main surface 12b of the laminate 12 (t2). This configuration allows the nozzle of the mounter to hit the cushion portion 40, allowing the cushion portion 40 to absorb stress on the laminate 12 like a cushion. This allows for better stress relief on the laminate 12.

[0061] The maximum distance (t1) in the stacking direction x that the cushion portion 40 protrudes from the first main surface 12a of the laminate 12 is preferably 5 μm or more and 10 μm or less. By configuring in this manner, it is possible to further reduce the stress caused by the mounter nozzle during mounting.

[0062] Here, the maximum distance (t1) in the stacking direction x that the cushion portion 40 protrudes from the first main surface 12 a of the laminate 12 can be calculated by polishing the cross section to ½ of the dimension W in the width direction y of the multilayer ceramic capacitor 10 (½ LT cross section), observing it using a scanning electron microscope (SEM) at 1000x or more and 3000x or less, and measuring the distance between the first main surface 12 a and the apex of the cushion portion 40.

[0063] Furthermore, the maximum distance (t2) in the stacking direction x that the joint 42 protrudes from the second main surface 12 b of the laminate 12 can be calculated by polishing the cross section to ½ of the dimension W in the width direction y of the multilayer ceramic capacitor 10 (½ LT cross section), observing it using a scanning electron microscope (SEM) at 1000x or more and 3000x or less, and measuring the distance between the second main surface 12 b and the apex of the joint 42.

[0064] The dimension in the length direction z of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 24a, and the second external electrode 24b is defined as dimension L, the dimension in the stacking direction x of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 24a, and the second external electrode 24b is defined as dimension T, and the dimension in the width direction y of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 24a, and the second external electrode 24b is defined as dimension W. The dimensions of the multilayer ceramic capacitor 10 are preferably such that the dimension L in the length direction z is 0.2 mm to 3.2 mm, the dimension W in the width direction y is 0.1 mm to 2.5 mm, and the dimension T in the stacking direction x is 0.04 mm to 0.30 mm.

[0065] As shown in FIG. 5 , the multilayer ceramic capacitor according to the first embodiment is sucked using a mounter nozzle 60 and mounted on a mounting substrate 50. The mounting substrate 50 includes a substrate core material 51 and conductive lands 52. The substrate core material 51 is configured, for example, as a substrate made of a material in which a base material made of a mixture of glass fabric (cloth) and glass nonwoven fabric is impregnated with epoxy resin or polyimide resin, or as a ceramic substrate manufactured by baking a sheet in which ceramic and glass are mixed. The substrate core material 51 may be configured as a substrate made of a single layer, or as a substrate made of a laminate of multiple layers.

[0066] One main surface of the core material 51 of the substrate is provided with conductor lands 52 and constitutes a substrate-side mounting surface 51 a on which the multilayer ceramic capacitor 10 is mounted.

[0067] The conductor land 52 includes a first conductor land 52 a and a second conductor land 52 b. The first conductor land 52 a is electrically connected and mechanically joined to the first external electrode 24 a of the multilayer ceramic capacitor 10 by the bonding material 54. The second conductor land 52 b is electrically connected and mechanically joined to the second external electrode 24 b of the multilayer ceramic capacitor 10 by the bonding material 54.

[0068] The material of the conductor lands 52 is not particularly limited, but metals such as copper, gold, palladium, and platinum can be used. The thickness of the conductor lands 52, i.e., the dimension in the stacking direction x, is not particularly limited, but is preferably 20 μm or more and 200 μm or less, for example. The bonding material 54 can be, for example, solder.

[0069] The multilayer ceramic capacitor 10 is mounted on the mounting substrate 50 so that the second main surface 12b faces the substrate-side mounting surface 51a. That is, the multilayer ceramic capacitor 10 is joined to the mounting substrate 50 via the joining material 54 at the joining portions 42 provided on the plating layers 28.

[0070] In this way, when the multilayer ceramic capacitor 10 is sucked by the mounter nozzle 60 during mounting, the cushion portions 40 provided on the plating layers 28 of the multilayer ceramic capacitor 10 come into contact with the mounter nozzle 60. Because the cushion portions 40 are made of metal, which is a material softer than the laminate 12, the cushion portions 40 act as a buffer material and can reduce the impact of the mounter nozzle 60. Furthermore, when the multilayer ceramic capacitor 10 is mounted on the mounting substrate 50, the joint portions 42 of the multilayer ceramic capacitor 10 come into contact with the mounting substrate 50 first, thereby reducing the stress applied to the central ends of the external electrodes 24 of the multilayer ceramic capacitor 10.

[0071] 2. Method for Manufacturing the Multilayer Ceramic Capacitor A method for manufacturing the multilayer ceramic capacitor 10 according to the first embodiment will now be described.

[0072] First, ceramic green sheets and a conductive paste for the internal electrode layers are prepared. The ceramic green sheets and the conductive paste for the internal electrode layers contain a binder (for example, a known organic binder) and a solvent (for example, a known organic binder).

[0073] Next, a conductive paste for the internal electrode layers is printed in a predetermined pattern on the ceramic green sheets by, for example, screen printing or gravure printing, to form the pattern of the internal electrode layers. Specifically, a conductive paste layer is formed by applying a paste made of a conductive material to the ceramic green sheets by a method such as the printing method described above. The conductive paste is, for example, a paste made of a metal powder to which an organic binder and an organic solvent have been added. Regarding the ceramic green sheets, ceramic green sheets for outer layers, on which the pattern of the internal electrode layers is not printed, are also prepared.

[0074] A laminated sheet is produced using the ceramic green sheets on which these internal electrode layer patterns are formed. That is, a predetermined number of ceramic green sheets for outer layers on which no internal electrode layer pattern is formed are stacked, and ceramic green sheets on which internal electrode layer patterns corresponding to the first internal electrode layer 16 a and ceramic green sheets on which internal electrode layer patterns corresponding to the second internal electrode layer 16 b are formed are alternately stacked thereon, and a predetermined number of ceramic green sheets for outer layers on which no internal electrode layer pattern is formed are further stacked thereon, to produce a laminated sheet.

[0075] Furthermore, the laminated sheet is pressed in the lamination direction by means of a hydrostatic press or the like to prepare a laminated block.

[0076] The laminated block is then cut to a predetermined size to produce a laminated chip, which may have its corners and ridges rounded by barrel polishing or the like.

[0077] Next, the laminated chip is fired to produce the laminate 12. The firing temperature depends on the dielectric material and the material of the internal electrode layers, but is preferably 900° C. or higher and 1400° C. or lower.

[0078] Next, a principal surface electrode 26 made of a thin film layer is formed on a portion of the second principal surface 12b of the laminate 12 and on a portion of the first end face 12e or the second end face 12f. The principal surface electrode 26 can be formed by, for example, a sputtering method. In other words, the principal surface electrode 26 is a sputtered electrode. The sputtered electrode can be formed of a metal containing at least one selected from the group consisting of Ni, Cr, Cu, Ti, etc.

[0079] Thereafter, a plating layer 28 is formed to directly cover the principal surface electrodes 26 and the first end surface 12e and second end surface 12f of the laminate 12 where the principal surface electrodes 26 are not disposed. The plating layer 28 includes at least one selected from Cu, Ni, Sn, Ag, Pd, an Ag-Pd alloy, Au, etc., and is formed as a single layer or multiple layers. The plating layer 28 preferably includes, for example, at least one of a Cu plating layer, a Ni plating layer, and a Sn plating layer. The plating layer 28 is formed by electroplating using an electroplating bath containing an additive, or by electroless plating using a displacement reaction. Here, the distance in the stacking direction x between the cushion portion 40 and the joint portion 42 can be adjusted by changing the plating conditions (e.g., the temperature and time of the plating bath).

[0080] In this manner, the multilayer ceramic capacitor 10 according to the present embodiment can be manufactured.

[0081] B. Second Embodiment A multilayer ceramic capacitor 110 according to a second embodiment of the present invention will be described. FIG. 6 is an external perspective view showing the multilayer ceramic capacitor according to the second embodiment of the present invention. FIG. 7 is a front view showing the multilayer ceramic capacitor according to the second embodiment of the present invention. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 6. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 6.

[0082] The multilayer ceramic capacitor 110 according to the second embodiment includes the laminate 12 of the multilayer ceramic capacitor according to the first embodiment and an external electrode 124. As shown in Fig. 8, the main surface electrodes 126 of the external electrode 124 are arranged not only on the ridges connecting the second main surface 12b to the first end face 12e and the second end face 12f, but also on the ridges connecting the first main surface 12a to the first end face 12e and the second end face 12f. Therefore, components corresponding to those in the above-described embodiments are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0083] The laminate 12 of the multilayer ceramic capacitor 110 according to the second embodiment has the same configuration as the laminate 12 of the multilayer ceramic capacitor according to the first embodiment. However, in the laminate 12 of the multilayer ceramic capacitor 110 according to the second embodiment, the first end face 12 e and the second end face 12 f are not curved from the first main surface 12 a to the second main surface 12 b.

[0084] As shown in FIGS. 6 to 8, external electrodes 124 are disposed on the first end face 12e side and the second end face 12f side of the laminate 12.

[0085] The external electrode 124 includes a first external electrode 124a and a second external electrode 124b.

[0086] The first external electrode 124a is disposed on the first end face 12e and the second main face 12b of the laminate 12. In this case, the first external electrode 124a is electrically connected to the first extraction electrode portion 20a of the first internal electrode layer 16a.

[0087] The second external electrode 124b is disposed on the second end face 12f and the second main surface 12b of the laminate 12. In this case, the second external electrode 124b is electrically connected to the second extraction electrode portion 20b of the second internal electrode layer 16b.

[0088] Within the laminate 12, capacitance is formed by the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b opposing each other via the dielectric layer 14. Therefore, capacitance can be obtained between the first external electrode 124a to which the first internal electrode layer 16a is connected and the second external electrode 124b to which the second internal electrode layer 16b is connected, and the characteristics of a capacitor are exhibited.

[0089] The external electrode 124 includes a principal surface electrode 126 and a plating layer 128 formed to cover the principal surface electrode 126. More specifically, the first external electrode 124a includes a first principal surface electrode 126a disposed on the first end face 12e and the second principal surface 12b, a third principal surface electrode 126c disposed on the first end face 12e and the first principal surface 12a, and a first plating layer 128a covering the first principal surface electrode 126a and the third principal surface electrode 126c and disposed on the first end face 12e and the second principal surface 12b. The second external electrode 124b also has a second main surface electrode 126b arranged on the second end face 12f and the second main surface 12b, a fourth main surface electrode 126d arranged on the second end face 12f and the first main surface 12a, and a second plating layer 128b covering the second main surface electrode 126b and the fourth main surface electrode 126d and arranged on the second end face 12f and the second main surface 12b.

[0090] The principal surface electrodes 126 include a first principal surface electrode 126a, a second principal surface electrode 126b, a third principal surface electrode 126c, and a fourth principal surface electrode 126d.

[0091] The first principal surface electrode 126a is disposed from the ridge portion where the first end surface 12e and the second principal surface 12b of the laminate 12 are connected to the first end surface 12e and the second principal surface 12b of the laminate 12, and is formed so as to cover a portion of the first end surface 12e and the second principal surface 12b of the laminate 12. The second principal surface electrode 126b is disposed from the ridge portion where the second end surface 12f and the second principal surface 12b of the laminate 12 are connected to the second end surface 12f and the second principal surface 12b of the laminate 12, and is formed so as to cover a portion of the second end surface 12f and the second principal surface 12b of the laminate 12.

[0092] The third principal surface electrode 126c is disposed from the ridge portion where the first end surface 12e and the first principal surface 12a of the laminate 12 are connected to the first end surface 12e and the first principal surface 12a, and is formed to cover a portion of the first end surface 12e and the first principal surface 12a. The fourth principal surface electrode 126d is disposed from the ridge portion where the second end surface 12f and the first principal surface 12a of the laminate 12 are connected to the second end surface 12f and the first principal surface 12a, and is formed to cover a portion of the second end surface 12f and the first principal surface 12a of the laminate 12.

[0093] The area over which the third principal surface electrode 126c covers the first end face 12e is smaller than the area over which the first principal surface electrode 126a covers the first end face 12e. Also, the area over which the fourth principal surface electrode 126d covers the second end face 12f is smaller than the area over which the second principal surface electrode 126b covers the second end face 12f. This configuration makes it possible to easily form the plating layer 128 on the ridge lines of the laminate 12, which are portions where the internal electrode layers 16 are not exposed. Furthermore, since the plating layer 128 tends to be uniformly formed in the portions where the principal surface electrodes 126 are formed, by making the area over which the third principal surface electrode 126c and the fourth principal surface electrode 126d arranged on the first principal surface 12a cover the first end face 12e or the second end face 12f smaller than the area over which the first principal surface electrode 126a and the second principal surface electrode 126b arranged on the second principal surface 12b cover the first end face 12e or the second end face 12f, the plating layer 128 on the second principal surface 12b side, which is the mounting surface, can be made flatter than the plating layer 128 on the first principal surface 12a side, which makes it easier to mount the multilayer ceramic capacitor 110.

[0094] The principal surface electrode 126 is preferably formed by a thin film forming method such as sputtering or vapor deposition, etc. In particular, the principal surface electrode 126 is preferably a sputtered electrode formed by sputtering.

[0095] The principal surface electrode 126 is preferably formed by sputtering directly on a portion of the second principal surface 12b of the laminate 12 and a portion of the first end face 12e or a portion of the second end face 12f. The principal surface electrode 126 includes at least one selected from the group consisting of Ni, Cr, Cu, Ti, and the like.

[0096] The principal surface electrodes 126 may also contain metals such as Ni, Cu, Ag, Pd, an Ag-Pd alloy, or Au. In this case, the principal surface electrodes 126 preferably contain, as a co-material, the same dielectric material as the dielectric ceramic contained in the dielectric layers 14. By including the co-material, the shrinkage behavior of the principal surface electrodes 126 during firing can be made closer to the shrinkage behavior of the laminate 12, and peeling of the principal surface electrodes 126 from the laminate 12 can be prevented.

[0097] The plating layer 128 includes a first plating layer 128a and a second plating layer 128b.

[0098] The first plating layer 128a is disposed so as to cover the first principal surface electrode 126a and the third principal surface electrode 126c, and the second plating layer 128b is disposed so as to cover the second principal surface electrode 126b and the fourth principal surface electrode 126d.

[0099] The plating layer 128 includes, for example, at least one selected from Ni, Sn, Cu, Ag, Pd, an Ag—Pd alloy, Au, etc. The plating layer 128 preferably includes, for example, at least one of a Cu plating layer, a Ni plating layer, and a Sn plating layer.

[0100] The plating layer 128 may be formed of multiple layers. For example, if the plating layer 128 has a two-layer structure, it includes a Ni plating layer covering the principal surface electrode 126 and a Sn plating layer arranged to cover the Ni plating layer. Alternatively, if the plating layer 128 has a three-layer structure, it includes a Cu plating layer covering the principal surface electrode 126, a Ni plating layer arranged to cover the Cu plating layer, and a Sn plating layer arranged to cover the Ni plating layer.

[0101] The Cu plating layer is provided to cover the surface of the principal surface electrode 126, thereby suppressing the penetration of a plating solution. The Ni plating layer can prevent the principal surface electrode 126 from being eroded by solder when mounting the multilayer ceramic capacitor 110. Furthermore, the Sn plating layer improves the wettability of the solder when mounting the multilayer ceramic capacitor 110, facilitating mounting.

[0102] 8, the plating layer 128 has a cushion portion 140 and a bonding portion 142. The cushion portion 140 is a portion that comes into contact with a nozzle of a mounter during mounting. The bonding portion 142 is a portion that bonds the multilayer ceramic capacitor 110 to a substrate (not shown) via a bonding material when the multilayer ceramic capacitor 110 is mounted on the substrate.

[0103] The cushion portion 140 is disposed on the first principal surface 12a side and protrudes from the first principal surface 12a. The cushion portion 140 has a first cushion portion 140a provided on the first plating layer 128a and a second cushion portion 140b provided on the second plating layer 128b. The first cushion portion 140a is disposed so as to cover the third principal surface electrode 126c. The second cushion portion 140b is disposed so as to cover the fourth principal surface electrode 126d.

[0104] The cushion portion 140 can be formed by plating growth from metal particles contained in the internal electrode layer 16 and the third and fourth principal surface electrodes 126c and 126d. More specifically, the metal contained in the plating layer 128 easily adheres to the metal particles contained in the first internal electrode layer 16a exposed at the first end face 12e of the laminate 12 and to the third principal surface electrode 126c, and the metal precipitates in the same areas, forming the first cushion portion 140a. Furthermore, the metal contained in the plating layer 128 easily adheres to the metal particles contained in the second internal electrode layer 16b exposed at the second end face 12f of the laminate 12 and to the fourth principal surface electrode 126d, and the plating precipitates in the same areas, forming the second cushion portion 140b.

[0105] The bonding portion 142 is disposed on the second principal surface 12b side and protrudes from the second principal surface 12b. The bonding portion 142 has a first bonding portion 142a provided on the first plating layer 128a and a second bonding portion 142b provided on the second plating layer 128b. The first bonding portion 142a is disposed so as to cover the first principal surface electrode 126a. The second bonding portion 142b is disposed so as to cover the second principal surface electrode 126b.

[0106] The joint 142 can be formed by plating growth of metal particles contained in the internal electrode layer 16, the first principal surface electrode 126a, and the second principal surface electrode 126b. More specifically, the metal contained in the plating layer 128 easily adheres to the metal particles contained in the first internal electrode layer 16a exposed at the first end face 12e of the laminate 12 and to the first principal surface electrode 126a, and the metal precipitates in the same areas, forming the first joint 142a. Furthermore, the metal contained in the plating layer 128 easily adheres to the metal particles contained in the second internal electrode layer 16b exposed at the second end face 12f of the laminate 12 and to the second principal surface electrode 126b, and the metal precipitates in the same areas, forming the second joint 142b.

[0107] It is preferable that the cushion portion 140 and the joint portion 142 are provided continuously. That is, it is preferable that the first cushion portion 140a and the first joint portion 142a are provided continuously on the first end face 12e. It is also preferable that the second cushion portion 140b and the second joint portion 142b are provided continuously on the second end face 12f. With this configuration, electrical connectivity can be ensured.

[0108] The maximum distance in the stacking direction x that the cushion portion 140 protrudes from the first main surface 12a of the laminate 12 is defined as t1'. The maximum distance in the stacking direction x that the joint portion 142 protrudes from the second main surface 12b of the laminate 12 is defined as t2'. The maximum distance in the stacking direction x that the cushion portion 140 protrudes from the first main surface 12a of the laminate 12 (t1') is longer than the maximum distance in the stacking direction x that the joint portion 142 protrudes from the second main surface 12b of the laminate 12 (t2'). This configuration allows the nozzle of the mounter to contact the cushion portion 140, allowing the cushion portion 140 to absorb stress on the laminate 12 like a cushion. This allows for better stress relief on the laminate 12.

[0109] The maximum distance (t1′) in the stacking direction x that the cushion portion 140 protrudes from the first main surface 12 a of the laminate 12 is preferably 5 μm or more and 10 μm or less. By configuring in this manner, it is possible to further reduce the stress caused by the mounter nozzle during mounting.

[0110] Here, the maximum distance (t1') in the stacking direction x that the cushion portion 140 protrudes from the first main surface 12a of the laminate 12 can be calculated by polishing the cross section to 1 / 2 of the dimension W in the width direction y of the multilayer ceramic capacitor 110 (1 / 2LT cross section), observing it at 2000x magnification using a scanning electron microscope (SEM), and measuring the distance between the first main surface 12a and the apex of the cushion portion 140.

[0111] Furthermore, the maximum distance (t2') in the stacking direction x that the joint 142 protrudes from the second main surface 12b of the laminate 12 can be calculated by polishing the cross section to 1 / 2 of the dimension W in the width direction y of the multilayer ceramic capacitor 110 (1 / 2LT cross section), observing it at 2000x magnification using a scanning electron microscope (SEM), and measuring the distance between the second main surface 12b and the apex of the joint 142.

[0112] The dimension in the length direction z of the multilayer ceramic capacitor 110 including the laminate 12, the first external electrode 124a, and the second external electrode 124b is defined as dimension L, the dimension in the stacking direction x of the multilayer ceramic capacitor 110 including the laminate 12, the first external electrode 124a, and the second external electrode 124b is defined as dimension T, and the dimension in the width direction y of the multilayer ceramic capacitor 110 including the laminate 12, the first external electrode 124a, and the second external electrode 124b is defined as dimension W. It is preferable that the dimensions of the multilayer ceramic capacitor 110 are such that the dimension L in the length direction z is 0.2 mm to 3.2 mm, the dimension W in the width direction y is 0.1 mm to 2.5 mm, and the dimension T in the stacking direction x is 0.04 mm to 0.30 mm.

[0113] C. Third Embodiment A multilayer ceramic capacitor 510 according to a third embodiment of the present invention will be described. Fig. 10 is an external perspective view showing the multilayer ceramic capacitor according to the third embodiment of the present invention. Fig. 11 is a cross-sectional view taken along line XI-XI in Fig. 10. Fig. 12 is a cross-sectional view taken along line XII-XII in Fig. 10. Fig. 13 is a cross-sectional view taken along line XIII-XIII in Fig. 10. Fig. 14 is an exploded perspective view of the laminate shown in Fig. 10.

[0114] The multilayer ceramic capacitor 510 includes a laminate 512 and external electrodes 524 and 525 .

[0115] The laminate 512 includes a plurality of dielectric layers 514 and a plurality of internal electrode layers 516. The laminate 512 has a first main surface 512a and a second main surface 512b that face each other in a stacking direction x, a first side surface 512c and a second side surface 512d that face each other in a width direction y that is perpendicular to the stacking direction x, and a third side surface 512e and a fourth side surface 512f that face each other in a length direction z that is perpendicular to the stacking direction x and the width direction y.

[0116] It is also preferable that the corners and ridges of the laminate 512 are rounded. Here, the corners are portions where three surfaces of the laminate 512 intersect, and the ridges are portions where two surfaces of the laminate 512 intersect. The second main surface 512b of the laminate 512 serves as a mounting surface.

[0117] As shown in Figures 11 and 12, the laminate 512 has, in the stacking direction x connecting the first main surface 512a and the second main surface 512b, an inner layer portion 515a in which multiple internal electrode layers 516 face each other, a first outer layer portion 515b1 formed from multiple dielectric layers 514 located between the first main surface 512a and the internal electrode layer 516 located closest to the first main surface 512a, and a second outer layer portion 515b2 formed from multiple dielectric layers 514 located between the second main surface 512b and the internal electrode layer 516 located closest to the second main surface 512b.

[0118] The first outer layer portion 515b1 is located on the first main surface 512a side of the laminate 512, and is a collection of multiple dielectric layers 514 located between the first main surface 512a and the internal electrode layer 516 closest to the first main surface 512a.

[0119] The second outer layer portion 515b2 is located on the second main surface 512b side of the laminate 512 and is a collection of multiple dielectric layers 514 located between the second main surface 512b and the internal electrode layer 516 closest to the second main surface 512b.

[0120] The region sandwiched between the first outer layer portion 515b1 and the second outer layer portion 515b2 is the inner layer portion 515a.

[0121] The dielectric layer 514 may be formed from, for example, a dielectric material. Examples of the dielectric material include dielectric ceramics whose main components are BaTiO3, CaTiO3, SrTiO3, and CaZrO3. Sub-components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds may also be added to these main components.

[0122] The thickness of the dielectric layers 514 is preferably 0.3 μm or more and 5.0 μm or less, and the number of the dielectric layers 514 is preferably 5 or more and 2000 or less.

[0123] 11 and 12, the internal electrode layer 516 includes a plurality of first internal electrode layers 516a and a plurality of second internal electrode layers 516b. The first internal electrode layers 516a and the second internal electrode layers 516b are alternately stacked with the dielectric layer 514 interposed therebetween.

[0124] The first internal electrode layer 516a is disposed on the surface of the dielectric layer 514. The first internal electrode layer 516a faces the first main surface 512a and the second main surface 512b, has a first opposing electrode portion 518a facing the second internal electrode layer 516b, and is laminated in the direction connecting the first main surface 512a and the second main surface 512b.

[0125] The second internal electrode layer 516b is disposed on a surface of a dielectric layer 514 different from the dielectric layer 514 on which the first internal electrode layer 516a is disposed. The second internal electrode layer 516b has a second opposing electrode portion 518b opposing the first main surface 512a and the second main surface 512b, and is laminated in a direction connecting the first main surface 512a and the second main surface 512b.

[0126] 13 , the first internal electrode layer 516a is extended by a first extension electrode portion 520a to a first side surface 512c and a third side surface 512e of the laminate 512, and is extended by a second extension electrode portion 520b to a second side surface 512d and a fourth side surface 512f of the laminate 512. Note that the length in the longitudinal direction z of the first extension electrode portion 520a extended to the first side surface 512c may be approximately equal to the length in the width direction y of the first extension electrode portion 520a extended to the third side surface 512e, and the length in the longitudinal direction z of the second extension electrode portion 520b extended to the second side surface 512d may be approximately equal to the length in the width direction y of the second extension electrode portion 520b extended to the fourth side surface 512f.

[0127] The second internal electrode layer 516b is led out to the first side surface 512c and the fourth side surface 512f of the laminate 512 by the third lead electrode portion 521a, and is led out to the second side surface 512d and the third side surface 512e of the laminate 512 by the fourth lead electrode portion 521b. The length in the longitudinal direction z of the third lead electrode portion 521a led out to the first side surface 512c may be approximately equal to the length in the width direction y of the third lead electrode portion 521a led out to the fourth side surface 512f, and the length in the longitudinal direction z of the fourth lead electrode portion 521b led out to the second side surface 512d may be approximately equal to the length in the width direction y of the fourth lead electrode portion 521b led out to the third side surface 512e.

[0128] Furthermore, on the side surfaces 512c, 512d, 512e, and 512f of the laminate 512, it is preferable that the first extraction electrode portion 520a of the first internal electrode layer 516a and the fourth extraction electrode portion 521b of the second internal electrode layer 516b are extracted to opposing positions, and that the second extraction electrode portion 520b of the first internal electrode layer 516a and the third extraction electrode portion 521a of the second internal electrode layer 516b are extracted to opposing positions.

[0129] In this embodiment, the first internal electrode layer 516a is led out to the first side surface 512c and the third side surface 512e of the laminate 512 by the first lead electrode portion 520a, and is led out to the second side surface 512d and the fourth side surface 512f of the laminate 512 by the second lead electrode portion 520b. The second internal electrode layer 516b is led out to the first side surface 512c and the fourth side surface 512f of the laminate 512 by the third lead electrode portion 521a, and is led out to the second side surface 512d and the third side surface 512e of the laminate 512 by the fourth lead electrode portion 521b. However, this is not limited to this, and for example, the first internal electrode layer 516a may be extended to the first side surface 512c of the laminate 512 by the first extension electrode portion 520a and extended to the second side surface 512d of the laminate 512 by the second extension electrode portion 520b, and the second internal electrode layer 516b may be extended to the first side surface 512c of the laminate 512 by the third extension electrode portion 521a and extended to the second side surface 512d of the laminate 512 by the fourth extension electrode portion 521b.

[0130] The material of the internal electrode layer 516 is, for example, mainly composed of Ni and contains at least one selected from metals such as Cu, Ag, Pd, and Au, and alloys such as Ag-Pd alloys. The internal electrode layer 516 may further contain dielectric particles having the same composition as the dielectric material contained in the dielectric layer 514.

[0131] Furthermore, the first internal electrode layer 516 a and the second internal electrode layer 516 b may contain Sn. By containing Sn in the first internal electrode layer 516 a and the second internal electrode layer 516 b, it is possible to alleviate electric field concentration at the interface between the first internal electrode layer 516 a and the second internal electrode layer 516 b and the dielectric layer 514, leading to improvement in high-temperature load reliability. In this case, even if Sn is contained in only one of the internal electrode layers 516, either the first internal electrode layer 516 a or the second internal electrode layer 516 b, it is possible to sufficiently exhibit the effect.

[0132] The number of laminated internal electrode layers 516 is preferably 5 to 2000. The average thickness of the internal electrode layers 516 is preferably 0.3 μm to 1.0 μm.

[0133] 13, the laminate 512 includes side portions (L gaps) 522b of the laminate 512 formed between one end of the first opposing electrode portion 518a in the longitudinal direction z and the third side surface 512e, and between the other end of the second opposing electrode portion 518b in the longitudinal direction z and the fourth side surface 512f. Furthermore, the laminate 512 includes side portions (W gaps) 522a of the laminate 512 formed between one end of the first opposing electrode portion 518a in the width direction y and the first side surface 512c, and between the other end of the second opposing electrode portion 518b in the width direction y and the second side surface 512d.

[0134] In the present embodiment, the side surfaces 512c, 512d, 512e, and 512f of the laminate 512 are preferably curved from the first main surface 512a to the second main surface 512b. With this configuration, on the side surfaces 512c, 512d, 512e, and 512f of the laminate 512, the internal electrode layers 516 are not exposed at the center of the laminate 512 in the stacking direction x, but the internal electrode layers 516 can be exposed from the center of the laminate 512 in the stacking direction x to the first main surface 512a or the second main surface 512b.

[0135] As shown in FIGS. 10 to 13, external electrodes 524 and 525 are disposed on the laminate 512 .

[0136] The external electrode 524 includes a first external electrode 524a and a second external electrode 524b.

[0137] The first external electrode 524a is disposed so as to cover the first lead electrode portion 520a on the first side surface 512c and the third side surface 512e, and is disposed so as to cover a part of the second main surface 512b. The first external electrode 524a is electrically connected to the first lead electrode portion 520a of the first internal electrode layer 516a.

[0138] The second external electrode 524b is disposed so as to cover the second lead electrode portion 520b on the second side surface 512d and the fourth side surface 512f, and so as to cover a part of the second main surface 512b. The second external electrode 524b is electrically connected to the second lead electrode portion 520b of the first internal electrode layer 516a.

[0139] The external electrode 525 includes a third external electrode 525a and a fourth external electrode 525b.

[0140] The third external electrode 525a is disposed so as to cover the third lead electrode portion 521a on the first side surface 512c and the fourth side surface 512f, and is disposed so as to cover a part of the second main surface 512b. The third external electrode 525a is electrically connected to the third lead electrode portion 521a of the second internal electrode layer 516b.

[0141] The fourth external electrode 525b is disposed so as to cover the fourth extraction electrode portion 521b on the second side surface 512d and the third side surface 512e, and is disposed so as to cover a part of the second main surface 512b. The fourth external electrode 525b is electrically connected to the fourth extraction electrode portion 521b of the second internal electrode layer 516b.

[0142] In the laminate 512, a capacitance is formed by the first opposing electrode portion 518a of the first internal electrode layer 516a and the second opposing electrode portion 518b of the second internal electrode layer 516b opposing each other via the dielectric layer 514. Therefore, a capacitance can be obtained between the first external electrode 524a and the second external electrode 524b to which the first internal electrode layer 516a is connected and the third external electrode 525a and the fourth external electrode 525b to which the second internal electrode layer 516b is connected, thereby exhibiting the characteristics of a capacitor.

[0143] The external electrode 524 includes a principal surface electrode 526 and a plating layer 528 formed so as to cover the principal surface electrode 526. The external electrode 525 includes a principal surface electrode 527 and a plating layer 529 formed so as to cover the principal surface electrode 527.

[0144] More specifically, the first external electrode 524a has a first principal surface electrode 526a arranged on the first side surface 512c, the third side surface 512e, and the second principal surface 512b, a first plating layer 528a covering the first principal surface electrode 526a and arranged on the first side surface 512c, the third side surface 512e, and the second principal surface 512b, and the second external electrode 524b has a second principal surface electrode 526b arranged on the second side surface 512d, the fourth side surface 512f, and the second principal surface 512b, and a second plating layer 528b covering the second principal surface electrode 526b and arranged on the second side surface 512d, the fourth side surface 512f, and the second principal surface 512b. The third external electrode 525a has a third principal surface electrode 527a arranged on the first side surface 512c, the fourth side surface 512f, and the second principal surface 512b, and a third plating layer 529a covering the third principal surface electrode 527a and arranged on the first side surface 512c, the fourth side surface 512f, and the second principal surface 512b. The fourth external electrode 525b has a fourth principal surface electrode 527b arranged on the second side surface 512d, the third side surface 512e, and the second principal surface 512b, and a fourth plating layer 529b covering the fourth principal surface electrode 527b and arranged on the second side surface 512d, the third side surface 512e, and the second principal surface 512b.

[0145] The principal surface electrode 526 includes a first principal surface electrode 526a and a second principal surface electrode 526b.

[0146] The first principal surface electrode 526a is formed to cover a portion of the second principal surface 512b at a corner where the second principal surface 512b, the first side surface 512c, and the third side surface 512e intersect, and the second principal surface electrode 526b is formed to cover a portion of the second principal surface 512b at a corner where the second principal surface 512b, the second side surface 512d, and the fourth side surface 512f intersect.

[0147] The principal surface electrode 527 includes a third principal surface electrode 527a and a fourth principal surface electrode 527b.

[0148] The third principal surface electrode 527a is formed to cover a part of the second principal surface 512b at a corner where the second principal surface 512b, the first side surface 512c, and the fourth side surface 512f intersect. The fourth principal surface electrode 527b is formed to cover a part of the second principal surface 512b at a corner where the second principal surface 512b, the second side surface 512d, and the third side surface 512e intersect.

[0149] The principal surface electrodes 526 and 527 are preferably formed by a thin film formation method such as sputtering or vapor deposition, and are particularly preferably sputter electrodes formed by sputtering.

[0150] The principal surface electrodes 526 and 527 are preferably formed by sputtering directly on a portion of the second principal surface 512b of the laminate 512. The principal surface electrodes 526 and 527 include at least one selected from Ni, Cr, Cu, Ti, and the like.

[0151] The principal surface electrodes 526, 527 may also contain a metal such as Ni, Cu, Ag, Pd, an Ag—Pd alloy, or Au. In this case, the principal surface electrodes 526, 527 preferably contain, as a common material, the same dielectric material as the dielectric ceramic contained in the dielectric layer 514. By including the common material, the shrinkage behavior of the principal surface electrodes 526, 527 during firing can be made closer to the shrinkage behavior of the laminate 512, and peeling of the principal surface electrodes 526, 527 from the laminate 512 can be prevented.

[0152] The plating layer 528 includes a first plating layer 528 a and a second plating layer 528 b. The first plating layer 528 a is disposed so as to cover the first principal surface electrode 526 a. The second plating layer 528 b is disposed so as to cover the second principal surface electrode 526 b.

[0153] The plating layer 529 includes a third plating layer 529 a and a fourth plating layer 529 b. The third plating layer 529 a is disposed so as to cover the third principal surface electrode 527 a. The fourth plating layer 529 b is disposed so as to cover the fourth principal surface electrode 527 b.

[0154] The plating layers 528, 529 include at least one selected from, for example, Ni, Sn, Cu, Ag, Pd, an Ag-Pd alloy, Au, etc. It is preferable that the plating layers 528, 529 include, for example, at least one of a Cu plating layer, a Ni plating layer, and a Sn plating layer.

[0155] The plating layers 528, 529 may be formed of multiple layers. For example, if the plating layers 528, 529 have a two-layer structure, they include a Ni plating layer covering the principal surface electrodes 526, 527 and a Sn plating layer arranged to cover the Ni plating layer. Alternatively, if the plating layers 528, 529 have a three-layer structure, they include a Cu plating layer covering the principal surface electrodes 526, 527, a Ni plating layer arranged to cover the Cu plating layer, and a Sn plating layer arranged to cover the Ni plating layer.

[0156] The Cu plating layer is provided to cover the surfaces of the principal surface electrodes 526, 527, thereby suppressing the penetration of plating solution. The Ni plating layer prevents the principal surface electrodes 526, 527 from being eroded by solder when mounting the multilayer ceramic capacitor 510. The Sn plating layer improves the wettability of the solder when mounting the multilayer ceramic capacitor 510, facilitating mounting.

[0157] 11 and 12 , the plating layers 528 and 529 have cushion portions 540 and 541 and bonding portions 542 and 543. The cushion portions 540 and 541 are portions that come into contact with a nozzle of a mounter during mounting. The bonding portions 542 and 543 are portions that bond the multilayer ceramic capacitor 510 to a substrate (not shown) via a bonding material when the multilayer ceramic capacitor 510 is mounted on the substrate.

[0158] Cushion portion 540 is disposed on the first main surface 512a side and protrudes from first main surface 512a. Cushion portion 540 has a first cushion portion 540a provided on first plating layer 528a and a second cushion portion 540b provided on second plating layer 528b. Cushion portion 541 is disposed on the first main surface 512a side and protrudes from first main surface 512a. Cushion portion 541 has a third cushion portion 541a provided on third plating layer 529a and a fourth cushion portion 541b provided on fourth plating layer 529b.

[0159] It is preferable that the maximum distance in the stacking direction x that the first cushion portion 540a protrudes from the first main surface 512a of the laminate 512, the maximum distance in the stacking direction x that the second cushion portion 540b protrudes from the first main surface 512a of the laminate 512, the maximum distance in the stacking direction x that the third cushion portion 541a protrudes from the first main surface 512a of the laminate 512, and the maximum distance in the stacking direction x that the fourth cushion portion 541b protrudes from the first main surface 512a of the laminate 512 are approximately the same.

[0160] The cushion portions 540 and 541 can be formed by plating growth from metal particles contained in the internal electrode layer 516. More specifically, the metal contained in the plating layers 528 and 529 easily adheres to the metal particles contained in the internal electrode layer 516 exposed on each of the side surfaces 512c, 512d, 512e, and 512f of the laminate 512, and the metal precipitates in the same areas, forming the cushion portions 540 and 541.

[0161] The bonding portion 542 is disposed on the second principal surface 512b side and protrudes from the second principal surface 512b. The bonding portion 542 has a first bonding portion 542a provided on the first plating layer 528a and a second bonding portion 542b provided on the second plating layer 528b. The first bonding portion 542a is disposed so as to cover the first principal surface electrode 526a. The second bonding portion 542b is disposed so as to cover the second principal surface electrode 526b.

[0162] The bonding portion 543 is disposed on the second principal surface 512b side and protrudes from the second principal surface 512b. The bonding portion 543 includes a third bonding portion 543a provided on the third plating layer 529a and a fourth bonding portion 543b provided on the fourth plating layer 529b. The third bonding portion 543a is disposed so as to cover the third principal surface electrode 527a. The fourth bonding portion 543b is disposed so as to cover the fourth principal surface electrode 527b.

[0163] It is preferable that the maximum distance in the stacking direction x that the first joint 542a protrudes from the second main surface 512b of the laminate 512, the maximum distance in the stacking direction x that the second joint 542b protrudes from the second main surface 512b of the laminate 512, the maximum distance in the stacking direction x that the third joint 543a protrudes from the second main surface 512b of the laminate 512, and the maximum distance in the stacking direction x that the fourth joint 543b protrudes from the second main surface 512b of the laminate 512 are approximately the same.

[0164] The joints 542 and 543 can be formed by plating growth from metal particles contained in the internal electrode layer 516. More specifically, the metal contained in the plating layers 528 and 529 easily adheres to the metal particles contained in the internal electrode layer 516 exposed at the side surfaces 512c, 512d, 512e, and 512f of the laminate 512 and the metal particles contained in the main surface electrodes 526 and 527, and the metal precipitates in the same areas, thereby forming the joints 542 and 543.

[0165] The cushion portions 540, 541 and the bonding portions 542, 543 are preferably provided continuously. That is, the first cushion portion 540a and the first bonding portion 542a are preferably provided continuously on the first side surface 512c and the third side surface 512e. The second cushion portion 540b and the second bonding portion 542b are preferably provided continuously on the second side surface 512d and the fourth side surface 512f. The third cushion portion 541a and the third bonding portion 543a are preferably provided continuously on the first side surface 512c and the fourth side surface 512f. The fourth cushion portion 541b and the fourth bonding portion 543b are preferably provided continuously on the second side surface 512d and the third side surface 512e. This configuration ensures electrical connectivity.

[0166] The maximum distance in the stacking direction x that the cushion portions 540 and 541 protrude from the first main surface 512 a of the laminate 512 is defined as t1 ″. The maximum distance in the stacking direction x that the joint portions 542 and 543 protrude from the second main surface 512 b of the laminate 512 is defined as t2 ″. The maximum distance in the stacking direction x that the cushion portions 540 and 541 protrude from the first main surface 512 a of the laminate 512 (t1 ″) is longer than the maximum distance in the stacking direction x that the joint portions 542 and 543 protrude from the second main surface 512 b of the laminate 512 (t2 ″). With this configuration, the nozzle of the mounter hits the cushion portions 540 and 541, and the cushion portions 540 and 541 can absorb the stress on the laminate 512 like a cushion, thereby further alleviating the stress on the laminate 512.

[0167] The maximum distance (t1') in the stacking direction x that the cushion portions 540, 541 protrude from the first main surface 512a of the laminate 512 is preferably 5 μm or more and 10 μm or less. By configuring in this manner, it is possible to further reduce the stress caused by the mounter nozzle during mounting.

[0168] Here, the maximum distance (t1") in the stacking direction x that the cushion portions 540, 541 protrude from the first main surface 512a of the laminate 12 can be calculated by polishing a cross section of the laminated ceramic capacitor 510 to ¼ of the dimension W in the width direction y (¼ LT cross section) or polishing a cross section of the laminated ceramic capacitor 510 to ¼ of the dimension L in the length direction z (¼ WT cross section), observing the cross section at 2000x magnification using a scanning electron microscope (SEM), and measuring the distance between the first main surface 512a and the apex of the cushion portions 540, 541.

[0169] Furthermore, the maximum distance (t2") in the stacking direction x that the joints 542, 543 protrude from the second main surface 512b of the laminate 12 can be calculated by polishing the cross section of the multilayer ceramic capacitor 510 to ¼ of the dimension W in the width direction y (¼ LT cross section) or polishing the cross section of the multilayer ceramic capacitor 510 to ¼ of the dimension L in the length direction z (¼ WT cross section), observing the cross section at 2000x magnification using a scanning electron microscope (SEM), and measuring the distance between the second main surface 512b and the vertices of the joints 542, 543.

[0170] The dimension in the length direction z of the multilayer ceramic capacitor 510 including the laminate 512 and the external electrodes 524, 525 is defined as dimension L, the dimension in the stacking direction x of the multilayer ceramic capacitor 510 including the laminate 512 and the external electrodes 524, 525 is defined as dimension T, and the dimension in the width direction y of the multilayer ceramic capacitor 510 including the laminate 512 and the external electrodes 524, 525 is defined as dimension W. The dimensions of the multilayer ceramic capacitor 510 are preferably such that the dimension L in the length direction z is 0.1 mm or more and 6.0 mm or less, and the dimension W in the width direction y is 0.1 mm or more and 6.0 mm or less. It is also preferable that 7 / 10≦L / W≦10 / 7. This allows the multilayer ceramic capacitor to have a substantially tetragonal shape, thereby increasing the degree of freedom in mounting.

[0171] 2. Method for Manufacturing the Multilayer Ceramic Capacitor Next, a method for manufacturing the multilayer ceramic capacitor 510 according to the third embodiment will be described.

[0172] First, ceramic green sheets and a conductive paste for the internal electrode layers are prepared. The ceramic green sheets and the conductive paste for the internal electrode layers contain a binder (for example, a known organic binder) and a solvent (for example, an organic solvent).

[0173] Next, a conductive paste for the internal electrode layers is printed in a predetermined pattern on the ceramic green sheets by, for example, screen printing or gravure printing, to form the pattern of the internal electrode layers as shown in FIG. 14. Specifically, a conductive paste layer is formed by applying a paste made of a conductive material to the ceramic green sheets by a method such as the printing method described above. The paste made of a conductive material is, for example, a metal powder to which an organic binder and an organic solvent have been added. Regarding the ceramic green sheets, ceramic green sheets for outer layers on which no pattern of the internal electrode layers is printed are also prepared.

[0174] A laminated sheet is produced using the ceramic green sheets on which these internal electrode layer patterns are formed. That is, a predetermined number of ceramic green sheets for outer layers on which no internal electrode layer pattern is formed are stacked, and ceramic green sheets on which internal electrode layer patterns corresponding to the first internal electrode layer 516a and ceramic green sheets on which internal electrode layer patterns corresponding to the second internal electrode layer 516b are formed are alternately stacked thereon, and a predetermined number of ceramic green sheets on which no internal electrode layer pattern is formed are further stacked thereon, thereby producing a laminated sheet.

[0175] Furthermore, the laminated sheet is pressed in the lamination direction by means of a hydrostatic press or the like to prepare a laminated block.

[0176] The laminated block is then cut to a predetermined size to obtain laminated chips, the corners and ridges of which may be rounded by barrel polishing or the like.

[0177] Next, the laminated chip is fired to produce the laminate 512. The firing temperature depends on the dielectric material and the material of the internal electrode layers, but is preferably 900° C. or higher and 1400° C. or lower.

[0178] 13 , the first extraction electrode portion 520a of the first internal electrode layer 516a is exposed from the first side surface 512c and the third side surface 512e of the laminate 512, and the third extraction electrode portion 521a of the second internal electrode layer 516b is exposed from the first side surface 512c and the fourth side surface 512f of the laminate 512. Furthermore, the second extraction electrode portion 520b of the first internal electrode layer 516a is exposed from the second side surface 512d and the fourth side surface 512f of the laminate 512, and the fourth extraction electrode portion 521b of the second internal electrode layer 516b is exposed from the second side surface 512d and the third side surface 512e of the laminate 512.

[0179] 11 and 12, principal surface electrodes 526, 527 made of thin film layers are formed on portions of the second principal surface 512b of the laminate 512. The principal surface electrodes 526, 527 can be formed by, for example, a sputtering method. In other words, the principal surface electrodes are composed of sputtered electrodes. The sputtered electrodes can be formed of a metal containing at least one selected from the group consisting of Ni, Cr, Cu, Ti, and the like.

[0180] Then, a first plating layer 528a is formed so as to cover the first principal surface electrode 526a arranged on the first side 512c and third side 512e of the laminate 512 where no principal surface electrode is arranged, and further arranged on the second principal surface 512b, and a second plating layer 528b is formed so as to cover the second principal surface electrode 526b arranged on the second side 512d and fourth side 512f of the laminate 512 where no principal surface electrode is arranged, and further arranged on the second principal surface 512b. Furthermore, a third plating layer 529a is formed so as to cover the third principal surface electrode 527a arranged on the first side 512c and fourth side 512f of the laminate 512 where no principal surface electrode is arranged, and further arranged on the second principal surface 512b, and a fourth plating layer 529b is formed so as to cover the fourth principal surface electrode 527b arranged on the second side 512d and third side 512e of the laminate 512 where no principal surface electrode is arranged, and further arranged on the second principal surface 512b.

[0181] The plating layers 528, 529 include at least one selected from Cu, Ni, Sn, Ag, Pd, an Ag-Pd alloy, Au, etc., and are formed as a single layer or multiple layers. The plating layers 528, 529 preferably include, for example, at least one of a Cu plating layer, a Ni plating layer, and a Sn plating layer. The plating layers 528, 529 are formed by electroplating using an electroplating bath containing an additive, or by electroless plating using a displacement reaction. Here, the distance in the stacking direction x between the cushion portions 540, 541 and the bonding portions 542, 543 can be adjusted by changing the plating conditions (e.g., the temperature and time of the plating bath).

[0182] In this manner, the multilayer ceramic capacitor 510 according to this embodiment is manufactured.

[0183] Although the embodiments of the present invention have been disclosed above, the present invention is not limited thereto. In other words, various modifications can be made to the above-described embodiments in terms of mechanism, shape, material, quantity, position, arrangement, etc., without departing from the scope of the technical idea and purpose of the present invention, and such modifications are included in the present invention.

[0184] For example, although the above-described embodiments have been illustrated as being symmetrical in front view, the external shape of the multilayer ceramic capacitor according to the present invention can be modified in various ways depending on the object to be mounted and the desired performance. The present invention also includes appropriate combinations of all or part of the configurations of the above-described embodiments.

[0185] <1> A laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers, the laminate having a first main surface and a second main surface opposing each other in a lamination direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the lamination direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the lamination direction and the width direction; first external electrodes connected to the internal electrode layers and disposed on the first end surface and the second main surface; and second external electrodes connected to the internal electrode layers and disposed on the second end surface and the second main surface, the second main surface of the laminate being a mounting surface, the first external electrodes having: a first main surface electrode disposed on the first end surface and the second main surface; and a first plating layer covering the first main surface electrode and disposed on the first end surface and the second main surface, a second plating layer covering the second main surface electrode and disposed on the second end face and the second main surface, wherein the first plating layer and the second plating layer each have a cushion portion protruding from the first main surface of the laminate and a joint portion protruding from the second main surface of the laminate, and a maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than a maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate.

[0186] <2> The multilayer ceramic capacitor according to <1>, wherein the maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is 5 μm or more and 10 μm or less.

[0187] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the first plating layer and the second plating layer include at least one of a Cu plating layer, a Ni plating layer, and a Sn plating layer.

[0188] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the length of the laminate in the lamination direction is 110 μm or less.

[0189] <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein the first external electrode further has a third main surface electrode arranged from an edge portion where the first end surface and the first main surface are connected to the first end surface and a part of the first main surface, the second external electrode further has a fourth main surface electrode arranged from an edge portion where the second end surface and the first main surface are connected to the second end surface and a part of the first main surface, the area where the third main surface electrode covers the first end surface is smaller than the area where the first main surface electrode covers the first end surface, and the area where the fourth main surface electrode covers the first end surface is smaller than the area where the second main surface electrode covers the second end surface.

[0190] <6> A laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers, the laminate having a first main surface and a second main surface opposing each other in a lamination direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the lamination direction, and a third side surface and a fourth side surface opposing each other in a length direction perpendicular to the lamination direction and the width direction; a first external electrode connected to the internal electrode layer and arranged on the first side surface, the third side surface, and the second main surface; a second external electrode connected to the internal electrode layer and arranged on the second side surface, the fourth side surface, and the second main surface; a third external electrode connected to the internal electrode layer and arranged on the first side surface, the fourth side surface, and the second main surface; and a fourth external electrode connected to the internal electrode layer and arranged on the second side surface, the third side surface, and the second main surface, wherein the second main surface of the laminate is a mounting surface, and the first external electrode is the second external electrode comprises: a first main surface electrode disposed on the first side surface, the third side surface, and the second main surface; and a first plating layer covering the first main surface electrode and disposed on the first side surface, the third side surface, and the second main surface; the second external electrode comprises: a second main surface electrode disposed on the second side surface, the fourth side surface, and the second main surface; and a second plating layer covering the second main surface electrode and disposed on the second side surface, the fourth side surface, and the second main surface; the third external electrode comprises: a third main surface electrode disposed on the first side surface, the fourth side surface, and the second main surface; and a third plating layer covering the third main surface electrode and disposed on the first side surface, the fourth side surface, and the second main surface; the fourth external electrode comprises: a fourth main surface electrode disposed on the second side surface, the third side surface, and the second main surface; a fourth plating layer covering the fourth principal surface electrode and disposed on the second side surface, the third side surface, and the second principal surface, wherein the first plating layer, the second plating layer, the third plating layer, and the fourth plating layer each have a cushion portion protruding from the first principal surface of the laminate and a joint portion protruding from the second principal surface of the laminate,a maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than a maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate.

[0191] The present invention relates to a multilayer ceramic capacitor, and in particular can be effectively used when mounting the multilayer ceramic capacitor on a mounting board using a mounter.

[0192] 10, 110, 510 Multilayer ceramic capacitor 12, 512 Laminate 12a, 512a First main surface 12b, 512b Second main surface 12c, 512c First side surface 12d, 512d Second side surface 12e First end surface 12f Second end surface 512e Third side surface 512f Fourth side surface 14, 514 Dielectric layer 15a, 515a Inner layer portion 15b1, 515b1 First outer layer portion 15b2, 515b2 Second outer layer portion 16, 516 Internal electrode layer 16a, 516a First internal electrode layer 16b, 516b Second internal electrode layer 18a, 518a First opposing electrode portion 18b, 518b Second opposing electrode portion 20a, 520a First extracted electrode portion 20b, 520b Second extracted electrode portion 521a Third extracted electrode portion 521b Fourth extracted electrode portion 22a, 522a Side portion (W gap) 22b, 522b End portion (L gap) 24, 124, 524, 525 External electrodes 24a, 124a, 524a First external electrode 24b, 124b, 524b Second external electrode 525a Third external electrode 525b Fourth external electrode 26, 126, 526, 527 Principal surface electrodes 26a, 126a, 526a First principal surface electrode 26b, 126b, 526b Second principal surface electrode 126c, 527a Third principal surface electrode 126d, 527b Fourth principal surface electrode 28, 128, 528, 529 Plating layer 28a, 128a, 528a First plating layer 28b, 128b, 528b Second plating layer 529a Third plating layer 529b Fourth plating layer 40, 140, 540, 541 Cushion portion 40a, 140a, 540a First cushion portion 40b, 140b, 540b Second cushion portion 541a Third cushion portion 541b Fourth cushion portion 42, 142, 542, 543 Joint portion 42a, 142a, 542a First joint portion 42b, 142b, 542b Second joint portion 543a Third joint portion 543b Fourth joint portion 50 Mounting substrate 51 Core material of substrate 51a Board-side mounting surface 52 Conductive land 52a First conductive land 52b Second conductive land 54 Bonding material 60 Mounter nozzle x Stacking directiony Width direction z Length direction

Claims

1. A laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers, the laminate having a first main surface and a second main surface opposing each other in the lamination direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the lamination direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the lamination direction and the width direction; a first external electrode connected to the internal electrode layer and disposed on the first end surface and the second main surface; and a second external electrode connected to the internal electrode layer and disposed on the second end surface and the second main surface, the second main surface of the laminate being a mounting surface, the first external electrode having: a first main surface electrode disposed on the first end surface and the second main surface; and a first plating layer covering the first main surface electrode and disposed on the first end surface and the second main surface; a second plating layer covering the second main surface electrode and disposed on the second end face and the second main surface, wherein the first plating layer and the second plating layer each have a cushion portion protruding from the first main surface of the laminate and a joint portion protruding from the second main surface of the laminate, and a maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than a maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate.

2. The multilayer ceramic capacitor according to claim 1, wherein the maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is 5 μm or more and 10 μm or less.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the first plating layer and the second plating layer include at least one of a Cu plating layer, a Ni plating layer, and a Sn plating layer.

4. The multilayer ceramic capacitor according to claim 1, wherein the length of the laminate in the lamination direction is 110 μm or less.

5. A multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the first external electrode further has a third main surface electrode arranged from a ridge portion where the first end surface and the first main surface are connected to the first end surface and a portion of the first main surface, the second external electrode further has a fourth main surface electrode arranged from a ridge portion where the second end surface and the first main surface are connected to the second end surface and a portion of the first main surface, the area where the third main surface electrode covers the first end surface is smaller than the area where the first main surface electrode covers the first end surface, and the area where the fourth main surface electrode covers the first end surface is smaller than the area where the second main surface electrode covers the second end surface.

6. A laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers, the laminate having a first main surface and a second main surface opposing each other in the lamination direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the lamination direction, and a third side surface and a fourth side surface opposing each other in a length direction perpendicular to the lamination direction and the width direction; a first external electrode connected to the internal electrode layer and disposed on the first side surface, the third side surface, and the second main surface; a second external electrode connected to the internal electrode layer and disposed on the second side surface, the fourth side surface, and the second main surface; a third external electrode connected to the internal electrode layer and disposed on the first side surface, the fourth side surface, and the second main surface; and a fourth external electrode connected to the internal electrode layer and disposed on the second side surface, the third side surface, and the second main surface, wherein the second main surface of the laminate is a mounting surface, and the first external electrode is the second external electrode comprises: a first main surface electrode disposed on the first side surface, the third side surface, and the second main surface; and a first plating layer covering the first main surface electrode and disposed on the first side surface, the third side surface, and the second main surface; the second external electrode comprises: a second main surface electrode disposed on the second side surface, the fourth side surface, and the second main surface; and a second plating layer covering the second main surface electrode and disposed on the second side surface, the fourth side surface, and the second main surface; the third external electrode comprises: a third main surface electrode disposed on the first side surface, the fourth side surface, and the second main surface; and a third plating layer covering the third main surface electrode and disposed on the first side surface, the fourth side surface, and the second main surface; the fourth external electrode comprises: a fourth main surface electrode disposed on the second side surface, the third side surface, and the second main surface; a fourth plating layer covering the fourth principal surface electrode and disposed on the second side surface, the third side surface, and the second principal surface, wherein the first plating layer, the second plating layer, the third plating layer, and the fourth plating layer each have a cushion portion protruding from the first principal surface of the laminate and a joint portion protruding from the second principal surface of the laminate,a maximum distance in the stacking direction that the cushion portion protrudes from the first main surface of the laminate is longer than a maximum distance in the stacking direction that the joint portion protrudes from the second main surface of the laminate.

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