Semiconductor device and semiconductor device assembly

Abstract

This semiconductor device comprises: a support substrate having a support surface facing one side in a thickness direction and a bottom surface facing the other side in the thickness direction; a bonding object bonded to the support surface; and a sealing resin covering the bonding object and at least a part of the support substrate. The support substrate includes an insulating layer, a first metal part located on the one side of the insulating layer in the thickness direction and having the support surface, and a second metal part located on the other side of the insulating layer in the thickness direction and having the bottom surface. A first metal material forming the support surface is different from the second metal material forming the bottom surface.

Description

Semiconductor device and semiconductor device assembly

[0001] The present disclosure relates to semiconductor devices and semiconductor device assemblies.

[0002] Various configurations have been proposed for semiconductor devices including semiconductor elements. Patent Document 1 discloses an example of a conventional semiconductor device. The semiconductor device disclosed in this document includes a semiconductor element, a support substrate, and an encapsulating resin. The semiconductor element is supported by the support substrate. The support substrate includes an insulating substrate and metal layers laminated on both sides of the insulating substrate. Each metal layer is made of, for example, Cu (copper). The semiconductor element is bonded to the metal layer on the front side of the support substrate via, for example, a bonding layer. The bottom surface of the metal layer on the back side of the support substrate is exposed from the encapsulating resin. A heat sink, for example, can be bonded to the bottom surface of the back side metal layer. The heat sink is bonded to the back side metal layer of the support substrate via, for example, a bonding layer. The front side metal layer and the back side metal layer of the support substrate are bonded to different components. On the other hand, if the surfaces of the metal layers on both sides of the same type of support substrate are made of the same material (for example, copper), bonding reliability and heat dissipation are not necessarily sufficient, leaving room for improvement.

[0003] Japanese Patent Application Laid-Open No. 2021-190505

[0004] [Summary] An object of the present disclosure is to provide a semiconductor device that is improved over conventional semiconductor devices. In particular, in consideration of the above-mentioned circumstances, a main object of the present disclosure is to provide a semiconductor device that is suitable for improving performance when different objects are bonded to both sides of a support substrate.

[0005] A semiconductor device provided by a first aspect of the present disclosure comprises a support substrate having a support surface facing one side in a thickness direction and a bottom surface facing the other side in the thickness direction, a joining object joined to the support surface, and a sealing resin covering at least a portion of the support substrate and the joining object, wherein the support substrate includes an insulating layer, a first metal portion located on one side of the insulating layer in the thickness direction and having the support surface, and a second metal portion located on the other side of the insulating layer in the thickness direction and having the bottom surface, and the first metal material constituting the support surface and the second metal material constituting the bottom surface are different.

[0006] A semiconductor device assembly provided by a second aspect of the present disclosure includes the semiconductor device according to the first aspect of the present disclosure and a heat dissipation member bonded to the bottom surface.

[0007] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0008] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 3 is a view showing the sealing resin in the plan view of FIG. 2 with imaginary lines. FIG. 4 is a view showing the sealing resin and the second conductive member in the plan view of FIG. 3 , with the sealing resin and the second conductive member omitted. FIG. 5 is a view showing the plan view of FIG. 4 , with the first conductive member omitted. FIG. 6 is a bottom view showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 3 . FIG. 8 is a partially enlarged cross-sectional view showing a portion of FIG. 7 (near the first semiconductor element). FIG. 9 is a partially enlarged cross-sectional view showing a portion of FIG. 7 (near the second semiconductor element). FIG. 10 is a partially enlarged cross-sectional view showing a portion of FIG. 7 (near the first conductive member). FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 3 . FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3 . FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 3 . FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 3. FIG. 15 is a partially enlarged cross-sectional view of a portion of FIG. 11. FIG. 16 is a partially enlarged cross-sectional view showing a state in which wires are bonded to a support substrate. FIG. 17 is a cross-sectional view similar to FIG. 7, showing a semiconductor device according to a first modified example of the first embodiment. FIG. 18 is a cross-sectional view similar to FIG. 8, showing a semiconductor device according to a first modified example of the first embodiment. FIG. 19 is a cross-sectional view similar to FIG. 9, showing a semiconductor device according to a first modified example of the first embodiment. FIG. 20 is a cross-sectional view similar to FIG. 10, showing a semiconductor device according to a first modified example of the first embodiment. FIG. 21 is a cross-sectional view similar to FIG. 11, showing a semiconductor device according to a first modified example of the first embodiment. FIG. 22 is a cross-sectional view similar to FIG. 15, showing a semiconductor device according to a first modified example of the first embodiment. FIG. 23 is a cross-sectional view similar to FIG. 16, showing a semiconductor device according to a first modified example of the first embodiment. FIG. 24 is a cross-sectional view similar to FIG. 7, showing a semiconductor device according to a second modified example of the first embodiment. FIG. 25 is a cross-sectional view similar to FIG. 8, showing a semiconductor device according to a second modified example of the first embodiment. Fig. 26 is a cross-sectional view similar to Fig. 11, showing a semiconductor device according to a second modification of the first embodiment. Fig. 27 is a cross-sectional view similar to Fig. 15, showing a semiconductor device according to a second modification of the first embodiment.Fig. 28 is a cross-sectional view similar to Fig. 7 , showing a semiconductor device according to a third modified example of the first embodiment. Fig. 29 is a cross-sectional view similar to Fig. 8 , showing a semiconductor device according to a third modified example of the first embodiment. Fig. 30 is a cross-sectional view similar to Fig. 11 , showing a semiconductor device according to a third modified example of the first embodiment. Fig. 31 is a cross-sectional view similar to Fig. 15 , showing a semiconductor device according to a third modified example of the first embodiment. Fig. 32 is a cross-sectional view showing an example of a semiconductor device assembly including the semiconductor device according to the first embodiment of the present disclosure. Fig. 33 is a cross-sectional view showing another example of a semiconductor device assembly including the semiconductor device according to the first embodiment of the present disclosure.

[0009] DETAILED DESCRIPTION Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0010] Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not necessarily intended to dictate any ordering of their objects.

[0011] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed in a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." Furthermore, in the present disclosure, "a surface A faces in (one side or the other side of) direction B" is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.

[0012] 1 to 16 show a semiconductor device according to a first embodiment of the present disclosure. A semiconductor device A1 of this embodiment includes a support substrate 11, a plurality of power terminals 13, a plurality of semiconductor elements 21, a thermistor 22, a first bonding layer 23, a first conductive member 31, a second conductive member 32, a plurality of wires, a plurality of control terminals 45, a control terminal support 48, and a sealing resin 50. The plurality of power terminals 13 include a first power terminal 14, two second power terminals 15, and two third power terminals 16. The plurality of wires include a plurality of first wires 41, a plurality of second wires 42, a plurality of third wires 43, and a fourth wire 44.

[0013] FIG. 1 is a perspective view showing the semiconductor device A1. FIG. 2 is a plan view showing the semiconductor device A1. FIG. 3 is a plan view showing the semiconductor device A1, in which the sealing resin 50 is indicated by an imaginary line (two-dot chain line). FIG. 4 is a plan view showing the semiconductor device A1, in which the sealing resin 50 and the second conductive member 32 are omitted from the plan view of FIG. 3. FIG. 5 is a plan view showing the first conductive member 31 omitted from the plan view of FIG. 4. FIG. 6 is a bottom view showing the semiconductor device A1. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 3. FIGS. 8 to 10 are partially enlarged cross-sectional views of a portion of FIG. 7. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 3. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 3. FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 3. Fig. 15 is a partially enlarged cross-sectional view of a part of Fig. 11. Fig. 16 is a partially enlarged cross-sectional view showing the state of bonding of wires to a support substrate.

[0014] In these figures, the thickness direction of the present disclosure is referred to as the "thickness direction z." "Planar view" refers to the view in the thickness direction z. A direction perpendicular to the thickness direction z is referred to as the "first direction x." A direction perpendicular to both the thickness direction z and the first direction x is referred to as the "second direction y." One side of the thickness direction z corresponds to the "one side of the thickness direction" of the present disclosure and is referred to as the "z1 side of the thickness direction z." The other side of the thickness direction z corresponds to the "other side of the thickness direction" of the present disclosure and is referred to as the "z2 side of the thickness direction z." One side of the first direction x is referred to as the "x1 side of the first direction x," and the other side of the first direction x is referred to as the "x2 side of the first direction x." One side of the second direction y is referred to as the "y1 side of the second direction y," and the other side of the second direction y is referred to as the "y2 side of the second direction y." The z1 side of the thickness direction z is sometimes referred to as the upper side, and the z2 side of the thickness direction z is sometimes referred to as the lower side. Note that terms such as "top," "bottom," "upper," "lower," "top surface," and "bottom surface" indicate the relative positional relationship of each part in the thickness direction z, and are not necessarily terms that define the relationship with the direction of gravity.

[0015] The semiconductor device A1 converts a DC power supply voltage applied to the first power terminal 14 and two second power terminals 15 into AC power using a plurality of semiconductor elements 21. The converted AC power is input from two third power terminals 16 to a power supply target such as a motor.

[0016] As shown in Figures 5, 7 to 9, 11, 13, and 14, the support substrate 11 supports a plurality of semiconductor elements 21 in the thickness direction z. As shown in Figures 4 to 16, the support substrate 11 includes an insulating layer 111, a first metal portion 112, and a second metal portion 113. As shown in Figures 6 to 16, the support substrate 11 is covered with a sealing resin 50 except for a portion of the second metal portion 113.

[0017] 7 to 16, the insulating layer 111 includes a portion interposed between the first metal portion 112 and the second metal portion 113 in the thickness direction z. The insulating layer 111 is made of a material with relatively high thermal conductivity. The insulating layer 111 is made of ceramics including aluminum nitride (AlN) or silicon nitride (SiN4), for example. The insulating layer 111 may be made of an insulating resin sheet instead of ceramics.

[0018] As shown in FIGS. 4, 5, and 7 to 16, the first metal portion 112 is located above (on the z1 side of) the insulating layer 111 in the thickness direction z. As shown in FIGS. 7 and 14, the first metal portion 112 is surrounded by the periphery of the insulating layer 111 in a plan view. The first metal portion 112 has a support surface 1120. The support surface 1120 is a flat surface facing the z1 side in the thickness direction z. As shown in FIGS. 4, 5, and 7 to 16, the first metal portion 112 includes a first conductive portion 1121 and a second conductive portion 1122. The first conductive portion 1121 and the second conductive portion 1122 are each rectangular in a plan view. The first conductive portion 1121 and the second conductive portion 1122 are spaced apart from each other in the first direction x. The first conductive portion 1121 is located on the x1 side in the first direction x with respect to the second conductive portion 1122. Each of the multiple semiconductor elements 21 is bonded to either the first conductive portion 1121 or the second conductive portion 1122 .

[0019] In this embodiment, the first metal portion 112 includes a first metal layer 112A and a third metal layer 112B. The first metal layer 112A is formed on the upper surface (the surface facing the z1 side in the thickness direction z) of the insulating layer 111. The metal material constituting the first metal layer 112A includes, for example, Cu (copper) or a Cu (copper) alloy.

[0020] The third metal layer 112B is located above the first metal layer 112A (on the z1 side in the thickness direction z). In this embodiment, the third metal layer 112B has a support surface 1120. The metal material (first metal material) constituting the third metal layer 112B (support surface 1120) contains Ni (nickel) as a main component. The third metal layer 112B is, for example, a plating layer laminated on the z1 side in the thickness direction z of the first metal layer 112A.

[0021] As shown in Figures 7 to 16, the second metal portion 113 is located below (on the z2 side of) the insulating layer 111 in the thickness direction z. The second metal portion 113 has a bottom surface 1130. The bottom surface 1130 is a flat surface facing the z2 side in the thickness direction z. As shown in Figure 6, the bottom surface 1130 is exposed from the sealing resin 50. A heat dissipation member (for example, a heat sink) (not shown) can be attached to the bottom surface 1130 of the second metal portion 113.

[0022] In this embodiment, the second metal portion 113 includes a second metal layer 113A and a fourth metal layer 113B. The second metal layer 113A is formed on the lower surface of the insulating layer 111 (the surface facing the z2 side in the thickness direction z). The metal material constituting the second metal layer 113A includes, for example, Cu (copper) or a Cu (copper) alloy. The metal material constituting the second metal layer 113A is the same as the metal material constituting the first metal layer 112A. In the support substrate 11, the insulating layer 111, the first metal layer 112A, and the second metal layer 113A are, for example, composed of a DBC (Direct Bonded Copper) substrate.

[0023] The fourth metal layer 113B is located below the second metal layer 113A (on the z2 side in the thickness direction z). In this embodiment, the fourth metal layer 113B has a bottom surface 1130. The metal material (second metal material) constituting the fourth metal layer 113B (bottom surface 1130) contains Ag (silver) as a main component. The second metal material (mainly Ag) constituting the bottom surface 1130 is different from the first metal material (mainly Ni) constituting the support surface 1120 described above. The fourth metal layer 113B is, for example, a plating layer laminated on the z2 side in the thickness direction z of the second metal layer 113A.

[0024] As shown in FIGS. 5 , 7 to 9 , and 11 , each of the multiple semiconductor elements 21 is mounted on either the first conductive portion 1121 or the second conductive portion 1122. Each semiconductor element 21 is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET). Alternatively, each semiconductor element 21 may be a switching element such as an insulated gate bipolar transistor (IGBT) or a diode. In the description of the semiconductor device A1, the semiconductor element 21 is an n-channel MOSFET with a vertical structure. The semiconductor element 21 includes a compound semiconductor substrate. The compound semiconductor substrate contains silicon carbide (SiC) or silicon (Si).

[0025] As shown in Figures 5, 7 to 9, and 11, in the semiconductor device A1, the multiple semiconductor elements 21 include multiple first elements 21A and multiple second elements 21B. The structure of each of the multiple second elements 21B is the same as the structure of each of the multiple first elements 21A. The multiple first elements 21A are mounted on a first conductive portion 1121. The multiple first elements 21A are arranged along the second direction y. The multiple second elements 21B are mounted on a second conductive portion 1122. The multiple second elements 21B are arranged along the second direction y.

[0026] As shown in FIGS. 5, 8 and 9, the plurality of semiconductor elements 21 have a first electrode 211, a second electrode 212, a third electrode 213 and two fourth electrodes 214.

[0027] 8 and 9 , the first electrode 211 faces either the first conductive part 1121 or the second conductive part 1122. A current corresponding to the power before being converted by the semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the drain electrode of the semiconductor element 21.

[0028] 5 , 8 , and 9 , the second electrode 212 is located on the opposite side of the first electrode 211 in the thickness direction z. A current corresponding to the power converted by the semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the source electrode of the semiconductor element 21.

[0029] 5, the third electrode 213 is located on the same side as the second electrode 212 in the thickness direction z. A gate voltage for driving the semiconductor element 21 is applied to the third electrode 213. That is, the third electrode 213 corresponds to the gate electrode of the semiconductor element 21. As shown in FIG. 5, the area of ​​the third electrode 213 is smaller than the area of ​​the second electrode 212 in a plan view.

[0030] 5 , 8 , and 9 , the two fourth electrodes 214 are located on the same side as the second electrode 212 in the thickness direction z and adjacent to the third electrode 213 in the first direction x. In the illustrated example, the two fourth electrodes 214 are arranged on both sides of the third electrode 213 in the second direction y, with the third electrode 213 sandwiched therebetween. The potential of each fourth electrode 214 is equal to the potential of the second electrode 212. The fourth electrode 214 corresponds to a source sense electrode. Unlike the illustrated example, each semiconductor element 21 may include only one of the two fourth electrodes 214, or may include neither of the two fourth electrodes 214.

[0031] As shown in FIGS. 8 and 9 , the first bonding layer 23 is interposed between one of the first conductive portions 1121 and 1122 and the first electrode 211 of one of the plurality of semiconductor elements 21. The first bonding layer 23 is conductive. The first bonding layer 23 is, for example, solder. Alternatively, the first bonding layer 23 may include a sintered body of metal particles (sintered metal). The first electrodes 211 of the plurality of first elements 21A are conductively bonded to the first conductive portion 1121 via the first bonding layer 23. More specifically, the first electrodes 211 of the plurality of first elements 21A (semiconductor elements 21) are bonded to the support surface 1120 of the third metal layer 112B in the first conductive portion 1121 via the first bonding layer 23. As a result, the first electrodes 211 of the plurality of first elements 21A are electrically connected to the first conductive portion 1121. The first electrodes 211 of the plurality of second elements 21B are conductively bonded to the second conductive portion 1122 via the first bonding layer 23. More specifically, the first electrodes 211 of the plurality of second elements 21B (semiconductor elements 21) are bonded to the support surface 1120 of the third metal layer 112B in the second conductive portion 1122 via the first bonding layer 23. As a result, the first electrodes 211 of the plurality of second elements 21B are electrically connected to the second conductive portion 1122. The plurality of semiconductor elements 21 (the plurality of first elements 21A and the plurality of second elements 21B) bonded to the support surface 1120 via the first bonding layer 23 is an example of a "bonding object" in the present disclosure.

[0032] The plurality of power terminals 13 are electrically connected to the plurality of semiconductor elements 21, respectively. A current corresponding to the power before being converted by the plurality of semiconductor elements 21 or a current corresponding to the power after being converted by the plurality of semiconductor elements 21 flows through the plurality of power terminals 13. The plurality of power terminals 13 include a first power terminal 14, two second power terminals 15, and two third power terminals 16.

[0033] As shown in FIGS. 4 and 11 , the first power terminal 14 is joined to the first conductive portion 1121. This joining method is not limited to any particular method and may be performed using a conductive bonding material (e.g., solder), laser welding, or crimping. The first power terminal 14 is electrically connected to the first electrodes 211 of the plurality of first elements 21A via the first conductive portion 1121. The first power terminal 14 is a P terminal (positive electrode) to which a DC power supply voltage to be converted into power is applied. As shown in FIG. 4 , the first power terminal 14 is located on the opposite side of the second conductive portion 1122 in the first direction x, with the first conductive portion 1121 sandwiched therebetween. The first power terminal 14 extends from the first conductive portion 1121 toward the x1 side in the first direction x and protrudes from the sealing resin 50 toward the x1 side in the first direction x. As shown in FIG. 3 , the first power terminal 14 includes a portion covered by the sealing resin 50 and a portion exposed from the sealing resin 40. In the first power terminal 14, a portion covered with the sealing resin 50 is joined to the first conductive portion 1121. In addition, in the first power terminal 14, a portion exposed from the sealing resin 50 is used as the aforementioned P terminal of the semiconductor device A1.

[0034] A second conductive member 32 is joined to the two second power terminals 15. The two second power terminals 15 are electrically connected to the second electrodes 212 of the multiple second elements 21B via the second conductive member 32. The two second power terminals 15 are N terminals (negative electrodes) to which a DC power supply voltage to be converted is applied. The two second power terminals 15 are spaced apart from each other in the second direction y. The first power terminal 14 is located between the two second power terminals 15. As shown in FIG. 4 , the two second power terminals 15 are located on the same side as the first power terminal 14 with respect to the first conductive portion 1121 and the second conductive portion 1122 in the first direction x. The two second power terminals 15 are spaced apart from the first conductive portion 1121 and the second conductive portion 1122. Each of the two second power terminals 15 extends in the first direction x and protrudes from the sealing resin 50 toward the x1 side in the first direction x. As shown in Fig. 3, each of the two second power terminals 15 includes a portion covered with the sealing resin 50 and a portion exposed from the sealing resin 50. In each of the second power terminals 15, the second conductive member 32 is joined to the portion covered with the sealing resin 50. In addition, in each of the second power terminals 15, the portion exposed from the sealing resin 50 is used as the aforementioned N terminal of the semiconductor device A1.

[0035] As shown in FIGS. 4 and 7 , the two third power terminals 16 are each joined to the second conductive portion 1122. This joining is not limited to any particular method and may be performed using a conductive joining material (e.g., solder) (not shown), laser welding, or crimping. Each of the two third power terminals 16 is electrically connected to the first electrodes 211 of the plurality of second elements 21B via the second conductive portion 1122. Each of the two third power terminals 16 is also electrically connected to the second electrodes 212 of the plurality of first elements 21A via the second conductive portion 1122 and the first conductive member 31. AC power converted by the plurality of semiconductor elements 21 (the plurality of first elements 21A and the plurality of second elements 21B) is output from the two third power terminals 16. In other words, each of the two third power terminals 16 is an output terminal for the AC power. The two third power terminals 16 are spaced apart from each other in the second direction y. As shown in FIG. 4 , the two third power terminals 16 are located on the opposite side of the first conductive portion 1121 in the first direction x, with the second conductive portion 1122 sandwiched therebetween. Each of the two third power terminals 16 extends from the second conductive portion 1122 toward the x2 side in the first direction x and protrudes from the sealing resin 50 toward the x2 side in the first direction x. As shown in FIG. 3 , each of the two third power terminals 16 includes a portion covered with the sealing resin 50 and a portion exposed from the sealing resin 50. In each third power terminal 16, the portion covered with the sealing resin 50 is bonded to the second conductive portion 1122. In addition, in each third power terminal 16, the portion exposed from the sealing resin 50 is used as the aforementioned output terminal of the semiconductor device A1.

[0036] In this embodiment, the semiconductor device A1 includes four first elements 21A and four second elements 21B. However, the number of first elements 21A and the number of second elements 21B are not limited to this configuration and may be changed as appropriate depending on the performance required of the semiconductor device A1. In the example shown in FIG. 5, four first elements 21A and four second elements 21B are arranged. The number of first elements 21A and the number of second elements 21B may be two, three, or five or more. The number of first elements 21A and the number of second elements 21B may be equal to or different from each other. The number of first elements 21A and the number of second elements 21B is determined by the current capacity handled by the semiconductor device A1.

[0037] The semiconductor device A1 is configured, for example, as a half-bridge switching circuit. In this case, a plurality of first elements 21A form an upper arm circuit of the semiconductor device A1, and a plurality of second elements 21B form a lower arm circuit. In the upper arm circuit, the plurality of first elements 21A are connected in parallel with each other, and in the lower arm circuit, the plurality of second elements 21B are connected in parallel with each other. Each first element 21A and each second element 21B are connected in series to form a bridge layer.

[0038] Each of the plurality of control terminals 45 is a pin-shaped terminal for controlling the driving of each of the first elements 21A and each of the second elements 21B. Each of the plurality of control terminals 45 is, for example, a press-fit terminal. The plurality of control terminals 45 includes a plurality of first control terminals 46A to 46C and a plurality of second control terminals 47A to 47D. The plurality of first control terminals 46A to 46C are used for controlling each of the first elements 21A, etc. The plurality of second control terminals 47A to 47D are used for controlling each of the second elements 21B, etc.

[0039] The multiple first control terminals 46A to 46C are arranged at intervals in the second direction y. As shown in Figures 5, 11, and 12, each of the first control terminals 46A to 46C is supported by the first conductive portion 1121 via a control terminal support body 48 (a first support portion 48A described below). As shown in Figures 4 and 5, each of the first control terminals 46A to 46C is located in the first direction x between the multiple first elements 21A and the first power terminal 14 and two second power terminals 15.

[0040] The first control terminal 46A is a terminal (gate terminal) for inputting a drive signal for the plurality of first elements 21A. A drive signal for driving the plurality of first elements 21A is input to the first control terminal 46A (for example, a gate voltage is applied).

[0041] The first control terminal 46B is a terminal (source sense terminal) for detecting source signals of the multiple first elements 21 A. The first control terminal 46B detects a voltage (a voltage corresponding to a source current) applied to each second electrode 212 (source electrode) of the multiple first elements 21 A.

[0042] The first control terminal 46C is a terminal (drain sense terminal) for detecting the drain voltages of the multiple first elements 21 A. The first control terminal 46C detects the voltage (voltage corresponding to the drain current) applied to each first electrode 211 (drain electrode) of the multiple first elements 21 A.

[0043] The second control terminals 47A to 47D are spaced apart in the second direction y. As shown in Figures 5 and 11, each of the second control terminals 47A to 47D is supported by the second conductive portion 1122 via a control terminal support 48 (a second support portion 48B described below). As shown in Figures 4 and 5, each of the second control terminals 47A to 47D is located between the second elements 21B and the two third power terminals 16 in the first direction x.

[0044] The second control terminal 47A is a terminal (gate terminal) for inputting drive signals for the multiple second elements 21B. A drive signal for driving the multiple second elements 21B is input to the second control terminal 47A (for example, a gate voltage is applied). The second control terminal 47B is a terminal (source sense terminal) for detecting source signals for the multiple second elements 21B. The second control terminal 47B detects a voltage (a voltage corresponding to a source current) applied to each second electrode 212 (source electrode) of the multiple second elements 21B. The second control terminal 47C and the second control terminal 47D are not electrically connected to any of the multiple second elements 21B. The second control terminal 47C and the second control terminal 47D are terminals electrically connected to the thermistor 22.

[0045] Each of the plurality of control terminals 45 (the plurality of first control terminals 46A to 46C and the plurality of second control terminals 47A to 47D) includes a holder 451 and a metal pin 452.

[0046] The holder 451 is made of a conductive material. The holder 451 is disposed on the support surface 1120 of the first metal portion 112 (support substrate 11). In this embodiment, as shown in FIG. 15 , the holder 451 is bonded to the control terminal support 48 (a metal layer 482 described below) via a conductive bonding layer 459. The holder 451 includes a cylindrical portion, an upper flange, and a lower flange. The upper flange is connected to the upper part of the cylindrical portion, and the lower flange is connected to the lower part of the cylindrical portion. A metal pin 452 is inserted through at least the upper flange and the cylindrical portion of the holder 451. A portion of the holder 451 is covered with sealing resin 50.

[0047] The metal pin 452 is a rod-shaped member extending in the thickness direction z. The metal pin 452 is supported by the holder 451 by being press-fitted into the holder 451. The metal pin 452 is electrically connected to the control terminal support body 48 (a metal layer 482 described below) via the holder 451 and the conductive bonding layer 459. The metal pin 452 protrudes toward the z1 side in the thickness direction z from the upper surface of the sealing resin 50 (a resin main surface 51 described below).

[0048] The control terminal support body 48 supports the plurality of control terminals 45. The control terminal support body 48 is interposed between the support surface 1120 of the first conductive portion 1121 and the support surface 1120 of the second conductive portion 1122 and the plurality of control terminals 45 in the thickness direction z.

[0049] The control terminal support 48 includes a first support portion 48A and a second support portion 48B. The first support portion 48A is disposed on the first conductive portion 1121 and supports a plurality of first control terminals 46A to 46C among the plurality of control terminals 45. As shown in FIG. 15 , the first support portion 48A is bonded to the first conductive portion 1121 via a bonding layer 49. More specifically, the first support portion 48A is bonded to a support surface 1120 of the third metal layer 112B in the first conductive portion 1121 via the bonding layer 49. The bonding layer 49 may be conductive or insulating, and may be, for example, solder. The second support portion 48B is disposed on the second conductive portion 1122 and supports a plurality of second control terminals 47A to 47D among the plurality of control terminals 45. Like the first support portion 48A, the second support portion 48B is bonded to the second conductive portion 1122 via a bonding layer (not shown). More specifically, second support portion 48B is joined via the bonding layer to support surface 1120 of third metal layer 112B in second conductive portion 1122. Control terminal support body 48 (first support portion 48A and second support portion 48B) joined to support surface 1120 via bonding layer 49 or the like is an example of a "joining object" in the present disclosure.

[0050] The control terminal support 48 (each of the first support portion 48A and the second support portion 48B) is made of, for example, a direct bonded copper (DBC) substrate. The control terminal support 48 has an insulating layer 481, a metal layer 482, and a metal layer 483 stacked on top of each other.

[0051] The insulating layer 481 is made of, for example, ceramics and has, for example, a rectangular shape in plan view.

[0052] As shown in FIG. 15 and other figures, the metal layer 482 is formed on the upper surface of the insulating layer 481. Each control terminal 45 is provided upright on the metal layer 482. The metal layer 482 includes, for example, Cu (copper) or a Cu (copper) alloy. As shown in FIG. 5 and other figures, the metal layer 482 includes a first portion 482A, a second portion 482B, a third portion 482C, a fourth portion 482D, and a fifth portion 482E. The first portion 482A, the second portion 482B, the third portion 482C, the fourth portion 482D, and the fifth portion 482E are spaced apart and insulated from one another.

[0053] The fourth portion 482D has a plurality of first wires 41 joined thereto and is electrically connected to the third electrodes 213 (gate electrodes) of the first elements 21A (second elements 21B) via the first wires 41. A plurality of third wires 43 are connected between the fourth portion 482D and the first portion 482A. As a result, the first portion 482A is electrically connected to the third electrodes 213 (gate electrodes) of the first elements 21A (second elements 21B) via the third wires 43 and the first wires 41. As shown in FIG. 5 , a first control terminal 46A is joined to the first portion 482A of the first support portion 48A, and a second control terminal 47A is joined to the first portion 482A of the second support portion 48B.

[0054] The second portion 482B has a plurality of second wires 42 joined thereto, and is electrically connected to the fourth electrode 214 (source sense electrode) of each first element 21A (each second element 21B) via each second wire 42. As shown in Fig. 5, a first control terminal 46B is joined to the second portion 482B of the first support portion 48A, and a second control terminal 47B is joined to the second portion 482B of the second support portion 48B.

[0055] The second control terminal 47C is joined to the third portion 482C. As shown in FIG. 5 , the second control terminal 47C is joined to the third portion 482C of the second support portion 48B. The first control terminal 46C and the second control terminal 47D are joined to the fifth portion 482E. The first control terminal 46C is joined to the fifth portion 482E of the first support portion 48A. One end of the fourth wire 44 is joined to the fifth portion 482E of the first support portion 48A. The other end of the fourth wire 44 is joined to the first conductive portion 1121. More specifically, as shown in FIG. 16 , the fourth wire 44 is joined to the support surface 1120 of the third metal layer 112B in the first conductive portion 1121. As a result, the fifth portion 482E of the first support portion 48A is electrically connected to the first electrode 211 (drain electrode) of each first element 21A via the fourth wire 44. The second control terminal 47D is joined to the fifth portion 482E of the second support portion 48B. The fourth wire 44 joined to the support surface 1120 is an example of the "object to be joined" in the present disclosure.

[0056] The thermistor 22 is conductively joined across the third portion 482C and the fifth portion 482E of the second support portion 48B. The thermistor 22 is, for example, an NTC (Negative Temperature Coefficient) thermistor. An NTC thermistor has a characteristic in which its resistance decreases gradually with increasing temperature. The thermistor 22 is used as a temperature detection sensor for the semiconductor device A1.

[0057] Each of the plurality of first wires 41, the plurality of second wires 42, the plurality of third wires 43, and the fourth wire 44 is, for example, a bonding wire. The constituent material of each of the first wires 41, the plurality of second wires 42, the plurality of third wires 43, and the fourth wire 44 is not particularly limited and may include, for example, Au (gold), Al (aluminum), or Cu (copper). Note that the plurality of first wires 41, the plurality of second wires 42, the plurality of third wires 43, and the fourth wire 44 are omitted in Figures 3, 7 to 9, 11, and 12.

[0058] 15, the metal layer 483 is formed on the lower surface (surface facing the z2 side in the thickness direction z) of the insulating layer 481. As shown in Fig. 15, the metal layer 483 of the first support portion 48A is joined to the first conductive portion 1121 via a bonding layer 49. The metal layer 483 of the second support portion 48B, like the metal layer 483 of the first support portion 48A, is joined to the second conductive portion 1122 via a bonding layer (not shown).

[0059] As shown in FIGS. 4 and 7 , the first conductive member 31 is conductively bonded to the second electrodes 212 of the plurality of first elements 21A and the second conductive portion 1122. This electrically connects the second electrodes 212 of the plurality of first elements 21A to the second conductive portion 1122. The constituent material of the first conductive member 31 is not particularly limited and may include, for example, copper. The first conductive member 31 is a plate-shaped metal clip (plate-shaped conductive member). As shown in FIGS. 4 and 7 , the first conductive member 31 has a main body 311, a plurality of first joint portions 312, and a plurality of second joint portions 313.

[0060] The main body portion 311 forms a major portion of the first conductive member 31. As shown in FIG. 4 , the main body portion 311 extends in the second direction y. As shown in FIGS. 4 and 7 , the main body portion 311 straddles the first conductive portion 1121 and the second conductive portion 1122. As shown in FIG. 4 , a plurality of through holes 310 are formed in the main body portion 311. Each of the plurality of through holes 310 penetrates the main body portion 311 in the thickness direction z. In a plan view, the plurality of through holes 310 overlap between the first conductive portion 1121 and the second conductive portion 1122. This allows the sealing resin 50 to flow smoothly downward in the thickness direction z of the main body portion 311 (toward the z2 side in the thickness direction z) when the sealing resin 50 is formed.

[0061] As shown in FIGS. 4 and 7 , the multiple first joints 312 are individually joined to the second electrodes 212 of the multiple first elements 21A. Each of the multiple first joints 312 faces one of the second electrodes 212 of the multiple first elements 21A. In a plan view, each first joint 312 extends from the main body 311 toward the x1 side in the first direction x. In the illustrated example, the multiple first joints 312 are bifurcated from the main body 311, but they do not necessarily need to be bifurcated. The base end of each first joint 312 (the end connected to the main body 311) is bent downward in the thickness direction z (toward the z2 side in the thickness direction z). Therefore, the tip of each first joint 312 (the end opposite to the end connected to the main body 311) is located downward in the thickness direction z (toward the z2 side in the thickness direction z) from the main body 311 in the thickness direction z.

[0062] As shown in FIGS. 4 , 7 , and 10 , the multiple second joints 313 are joined to the second conductive portion 1122. Each of the multiple second joints 313 faces the second conductive portion 1122. In a plan view, each second joint 313 extends from the main body portion 311 toward the x1 side in the first direction x. The base end of each second joint 313 (the end connected to the main body portion 311) is bent downward in the thickness direction z (toward the z2 side in the thickness direction z). Therefore, the tip end of each second joint 313 (the end opposite to the end connected to the main body portion 311) is located downward in the thickness direction z (toward the z2 side in the thickness direction z) relative to the main body portion 311 in the thickness direction z.

[0063] 8, the semiconductor device A1 further includes a first conductive bonding layer 33. The first conductive bonding layer 33 is interposed between the second electrodes 212 of the plurality of first elements 21A and the plurality of first bonding portions 312. The first conductive bonding layer 33 conductively bonds the second electrodes 212 of the plurality of first elements 21A to the plurality of first bonding portions 312. The first conductive bonding layer 33 is, for example, solder. Alternatively, the first conductive bonding layer 33 may include a sintered body of metal particles (sintered metal).

[0064] As shown in FIGS. 7 and 10 , the semiconductor device A1 further includes a second conductive bonding layer 34. The second conductive bonding layer 34 is interposed between the second conductive portion 1122 and the second bonding portion 313. The second conductive bonding layer 34 conductively bonds the second conductive portion 1122 and the second bonding portion 313. More specifically, the second bonding portion 313 (first conductive member 31) is bonded to the support surface 1120 of the third metal layer 112B in the second conductive portion 1122 via the second conductive bonding layer 34. The second conductive bonding layer 34 is, for example, solder. Alternatively, the second conductive bonding layer 34 may include a sintered body of metal particles (sintered metal). The second bonding portion 313 (first conductive member 31) bonded to the support surface 1120 via the second conductive bonding layer 34 is an example of a “bonding object” in the present disclosure.

[0065] As shown in FIG. 3 , the second conductive member 32 is conductively joined to the second electrodes 212 of the plurality of second elements 21B and the two second power terminals 15. This electrically connects the second electrodes 212 of the plurality of second elements 21B to the two second power terminals 15. The material of the second conductive member 32 is not particularly limited, and may include, for example, copper. The second conductive member 32 is a plate-shaped metal clip. As shown in FIGS. 3 , 7 , and 11 to 14 , the second conductive member 32 has a pair of main body portions 321, a plurality of third joint portions 322, a pair of fourth joint portions 324, a plurality of intermediate portions 326, a plurality of horizontal beam portions 327, and a pair of hanging portions 328.

[0066] As shown in Fig. 3 , the pair of main bodies 321 are positioned apart from each other in the second direction y. The pair of main bodies 321 extend in the first direction x. As shown in Figs. 7 and 12 , the pair of main bodies 321 are arranged parallel to the upper surfaces of the first conductive part 1121 and the second conductive part 1122. The pair of main bodies 321 are positioned further away from the first conductive part 1121 and the second conductive part 1122 than the main body part 311 of the first conductive member 31.

[0067] 3, 13, and 14, the intermediate portions 326 are spaced apart from one another in the second direction y and are located between the pair of main body portions 321 in the second direction y. The intermediate portions 326 extend in the first direction x.

[0068] As shown in FIGS. 3 and 14 , the third joints 322 are individually joined to the second electrodes 212 of the second elements 21B. Each of the third joints 322 faces one of the second electrodes 212 of the second elements 21B. In a plan view, the third joints 322 extend in the second direction y from the intermediate portions 326. The base end of each third joint 322 (the end connected to the intermediate portion 326) is bent downward in the thickness direction z (toward the z2 side in the thickness direction z). Therefore, the tip of each third joint 322 (the end opposite to the end connected to the intermediate portion 326) is located downward in the thickness direction z (toward the z2 side in the thickness direction z) from the intermediate portion 326 in the thickness direction z.

[0069] 3 and 7 , the pair of fourth joint portions 324 are individually joined to the two second power terminals 15. Each of the pair of fourth joint portions 324 faces a corresponding one of the two second power terminals 15.

[0070] As shown in Fig. 3 , the multiple cross beam portions 327 are arranged along the second direction y. In a plan view, the multiple cross beam portions 327 include regions that individually overlap the multiple first joint portions 312 of the first conductive member 31. As shown in Figs. 3 and 13 , one of the multiple cross beam portions 327 that is located at the center in the second direction y is connected on both sides in the second direction y to the multiple intermediate portions 326. The remaining two of the multiple cross beam portions 327 are connected on both sides in the second direction y to one of the pair of main body portions 321 and one of the multiple intermediate portions 326.

[0071] 3 and 13 , the pair of hanging portions 328 are individually connected to the pair of main body portions 321. As shown in FIG. 13 , each of the pair of hanging portions 328 extends downward in the thickness direction z (toward the z2 side in the thickness direction z) from the corresponding one of the pair of main body portions 321. Each of the pair of hanging portions 328 is connected to the outer edge of the corresponding one of the pair of main body portions 321 in the second direction y. In the illustrated example, the lower ends (edges on the z2 side in the thickness direction z) of the pair of hanging portions 328 overlap the first conductive portion 1121 when viewed along the second direction y.

[0072] 9 , the semiconductor device A1 further includes a third conductive bonding layer 35. The third conductive bonding layer 35 is interposed between the second electrodes 212 of the plurality of second elements 21B and the plurality of third bonding portions 322. The third conductive bonding layer 35 conductively bonds the second electrodes 212 of the plurality of second elements 21B to the plurality of third bonding portions 322. The third conductive bonding layer 35 is, for example, solder. Alternatively, the third conductive bonding layer 35 may include a sintered body of metal particles (sintered metal).

[0073] 7 , the semiconductor device A1 further includes a fourth conductive bonding layer 36. The fourth conductive bonding layer 36 is interposed between the two second power terminals 15 and the pair of fourth joints 324. The fourth conductive bonding layer 36 conductively bonds the two second power terminals 15 and the pair of fourth joints 324. The fourth conductive bonding layer 36 is, for example, solder. Alternatively, the fourth conductive bonding layer 36 may include a sintered body of metal particles (sintered metal).

[0074] As shown in FIGS. 1 to 16 , the sealing resin 50 covers the semiconductor elements 21, the thermistor 22, the first conductive member 31, the second conductive member 32, the first wires 41, the second wires 42, the third wires 43, and the fourth wires 44. Furthermore, the sealing resin 50 covers a portion of each of the support substrate 11, the power terminals 13, and the control terminal support 48. The sealing resin 50 has electrical insulation properties. The sealing resin 50 includes, for example, a black epoxy resin. The sealing resin 50 is formed, for example, by molding. As shown in FIGS. 1 to 3 and 6 to 14 , the sealing resin 50 has a resin main surface 51, a resin back surface 52, resin side surfaces 531 to 534, recesses 511, and a pair of recesses 531a.

[0075] As shown in FIGS. 7 and 11 to 14 , the resin main surface 51 faces the same direction in the thickness direction z as the upper surface (support surface 1120) of the first conductive portion 1121 and the upper surface (support surface 1120) of the second conductive portion 1122. Metal pins 452 of the control terminals 45 (the first control terminals 46A to 46C and the second control terminals 47A to 47D) protrude from the resin main surface 51. As shown in FIGS. 7 and 11 to 14 , the resin back surface 52 faces the opposite side of the resin main surface 51 in the thickness direction z. As shown in FIG. 6 , the resin back surface 52 has a frame shape in a plan view that surrounds the lower surface (bottom surface 1130) of the second metal portion 113 of the support substrate 11. The second metal portion 113 (fourth metal layer 113B) of the support substrate 11 is exposed from the resin back surface 52. The lower surface (bottom surface 1130) of second metal portion 113 is flush with resin rear surface 52, for example.

[0076] As shown in Figures 2, 3, 7, and 11, the resin side surface 531 and the resin side surface 532 are spaced apart from each other in the first direction x. The resin side surface 531 and the resin side surface 532 face opposite each other in the first direction x and extend in the second direction y. The resin side surface 531 and the resin side surface 532 are connected to the resin main surface 51. The resin side surface 531 faces the x1 side in the first direction x, and the resin side surface 532 faces the x2 side in the first direction x. A first power terminal 14 and two second power terminals 15 each protrude from the resin side surface 531. Two third power terminals 16 each protrude from the resin side surface 532.

[0077] 2, 3, and 12 to 14, the resin side surface 533 and the resin side surface 534 are spaced apart from each other in the second direction y. The resin side surface 533 and the resin side surface 534 face opposite each other in the second direction y and extend in the first direction x. The resin side surface 533 and the resin side surface 534 are connected to the resin main surface 51 and the resin back surface 52. The resin side surface 533 faces the y1 side in the second direction y, and the resin side surface 534 faces the y2 side in the second direction y.

[0078] 1 , 11 , 12 , etc., each of the plurality of recesses 511 is recessed from the resin main surface 51 toward the z2 side in the thickness direction z. In this embodiment, the plurality of recesses 511 are individually provided corresponding to the plurality of control terminals 45. The plurality of control terminals 45 are individually arranged corresponding to the plurality of recesses 511, respectively.

[0079] 2, the pair of recesses 531a are recessed from the resin side surface 531 toward the x2 side in the first direction x. The pair of recesses 531a extend from the resin main surface 51 to the resin back surface 52 in the thickness direction z. The pair of recesses 531a are located on both sides of the first power terminal 14 in the second direction y.

[0080] Next, the operation of the semiconductor device A1 will be described.

[0081] The support substrate 11 includes an insulating layer 111, a first metal portion 112 located on the z1 side of the insulating layer 111 in the thickness direction z, and a second metal portion 113 located on the z2 side of the insulating layer 111 in the thickness direction z. The first metal portion 112 has a support surface 1120 facing the z1 side of the thickness direction z. The second metal portion 113 has a bottom surface 1130 facing the z2 side of the thickness direction z. The first metal material constituting the support surface 1120 and the second metal material constituting the bottom surface 1130 are different from each other. This configuration can improve performance when different objects are bonded to the support surface 1120 and the bottom surface 1130, respectively.

[0082] In this embodiment, the semiconductor element 21 is bonded to the support surface 1120 of the third metal layer 112B via the first bonding layer 23. The first metal material constituting the support surface 1120 contains Ni (nickel) as its main component. Nickel has better wettability with tin, the main component of solder, than copper. When the first bonding layer 23 is solder, the support surface 1120 containing nickel as its main component improves the bonding reliability between the support surface 1120 and the semiconductor element 21 via the first bonding layer 23. Meanwhile, a heat dissipation member such as a heat sink is attached to the bottom surface 1130 of the fourth metal layer 113B. The second metal material constituting the bottom surface 1130 contains Ag (silver) as its main component. With this configuration, the bottom surface 1130 and the heat dissipation member can be bonded using a sintered body (sintered metal) of metal particles such as silver. Bonding using sintered metal has superior thermal conductivity compared to bonding using a heat dissipation sheet or heat dissipation grease, and can improve the heat dissipation performance of the heat dissipation member.

[0083] In this embodiment, a wire (fourth wire 44 in this embodiment) is bonded to the support surface 1120. When the wire is made of aluminum (Al), bonding the wire to a component containing copper (Cu) can easily cause the Kirkendall phenomenon between the aluminum and copper, resulting in the generation of Kirkendall voids (depletion points). In this embodiment, the first metal material constituting the support surface 1120 contains nickel as its main component. When the support surface 1120 is made of nickel, the Kirkendall phenomenon is suppressed and Kirkendall voids can be reduced, even when, for example, an aluminum wire is bonded. This improves the bonding reliability of the wire to the support surface 1120.

[0084] The control terminal support 48 (first support portion 48A and second support portion 48B) is joined to the support surface 1120 via a bonding layer 49 or the like. The first metal material constituting the support surface 1120 contains Ni (nickel) as its main component. Nickel has better wettability with tin, which is the main component of solder, than copper. When the bonding layer 49 or the like is solder, the support surface 1120 containing nickel as its main component improves the bonding reliability between the support surface 1120 and the control terminal support 48 via the bonding layer 49.

[0085] The first conductive member 31 (second bonding portion 313) is bonded to the support surface 1120 via the second conductive bonding layer 34. The first metal material constituting the support surface 1120 contains Ni (nickel) as its main component. Nickel has better wettability with tin, which is the main component of solder, than copper. When the second conductive bonding layer 34 is solder, the support surface 1120 containing nickel as its main component improves the bonding reliability between the support surface 1120 and the first conductive member 31 via the second conductive bonding layer 34.

[0086] The first metal portion 112 includes a first metal layer 112A formed on the z1 side of the insulating layer 111 in the thickness direction z, and a third metal layer 112B located on the z1 side of the first metal layer 112A in the thickness direction z. The third metal layer 112B is a plating layer stacked on the first metal layer 112A and has a support surface 1120. The second metal portion 113 includes a second metal layer 113A formed on the z2 side of the insulating layer 111 in the thickness direction z, and a fourth metal layer 113B located on the z2 side of the second metal layer 113A in the thickness direction z. The fourth metal layer 113B is a plating layer stacked on the second metal layer 113A and has a bottom surface 1130. With this configuration, the insulating layer 111, the first metal layer 112A, and the second metal layer 113A in the support substrate 11 can be formed, for example, by a DBC substrate. The support substrate 11 is formed by laminating a third metal layer 112B (plated layer) on the first metal layer 112A and a fourth metal layer 113B (plated layer) on the second metal layer 113A. This allows the support substrate 11 to be fabricated relatively easily. The insulating layer 111, the first metal layer 112A, and the second metal layer 113A of the support substrate 11 may be formed of a DBA (Direct Bonded Aluminum) substrate instead of the DBC substrate described above. In this case, the metal material forming the first metal layer 112A and the second metal layer 113A is aluminum (Al), unlike the above.

[0087] In the above example, the first metal material constituting the support surface 1120 contains nickel as a primary component. However, the first metal material constituting the support surface 1120 is not limited to nickel and may be other metals. The first metal material constituting the support surface 1120 may contain, for example, nickel-palladium-gold as a primary component. When the first metal material constituting the support surface 1120 contains nickel-palladium-gold as a primary component, good bonding can be achieved when bonding the bonding object and the support surface 1120 with a sintered body (sintered metal) of gold metal particles. Bonding using sintered metal has superior thermal conductivity compared to bonding via solder, and can efficiently dissipate heat generated in, for example, the semiconductor element 21 to the first metal portion 112 (support substrate 11) side.

[0088] Furthermore, the second metal material constituting the bottom surface 1130 is not limited to the above-mentioned silver, and may be other metal species. The second metal material constituting the bottom surface 1130 may, for example, include nickel-palladium-gold as its primary component. When the second metal material constituting the bottom surface 1130 includes nickel-palladium-gold as its primary component, a heat dissipation component such as a heat sink can be bonded to the bottom surface 1130 using a sintered body (sintered metal) of gold metal particles. Bonding using sintered metal has superior thermal conductivity compared to bonding via a heat dissipation sheet or thermal grease, and can improve the heat dissipation performance of the heat dissipation component. Furthermore, the second metal material constituting the bottom surface 1130 may, for example, include copper as its primary component. When the second metal material constituting the bottom surface 1130 includes copper as its primary component, a heat dissipation component such as a heat sink can be bonded to the bottom surface 1130 using a sintered body (sintered metal) of copper metal particles. Bonding using sintered metal has superior thermal conductivity compared to bonding using a heat dissipation sheet or heat dissipation grease, and can improve the heat dissipation performance of the heat dissipation member.

[0089] 17 to 31 show modified examples of the semiconductor device of the present disclosure. In these figures, elements that are the same as or similar to those in the above embodiment are given the same reference numerals as in the above embodiment, and redundant explanations will be omitted. Furthermore, the configurations of the various parts in each modified example can be combined with each other as appropriate within the scope of not causing technical contradictions.

[0090] First Modification: Figures 17 to 23 show a first modification of the semiconductor device A1. Figure 17 is a cross-sectional view similar to Figure 7, showing a semiconductor device A11 according to this modification. Figure 18 is a cross-sectional view similar to Figure 8, showing the semiconductor device A11. Figure 19 is a cross-sectional view similar to Figure 9, showing the semiconductor device A11. Figure 20 is a cross-sectional view similar to Figure 10, showing the semiconductor device A11. Figure 21 is a cross-sectional view similar to Figure 11, showing the semiconductor device A11. Figure 22 is a cross-sectional view similar to Figure 15, showing the semiconductor device A11. Figure 23 is a cross-sectional view similar to Figure 16, showing the semiconductor device A11.

[0091] The semiconductor device A11 of this modification differs from the semiconductor device A1 of the above embodiment in the configuration of the first metal portion 112 and the second metal portion 113 on the support substrate 11. The first metal portion 112 includes a first metal layer 112A. However, unlike the above embodiment, the first metal portion 112 does not include a third metal layer 112B. The first metal layer 112A is bonded to the upper surface of the insulating layer 111 (the surface facing the z1 side in the thickness direction z). The first metal layer 112A has a support surface 1120. The second metal portion 113 includes a second metal layer 113A but does not include a fourth metal layer 113B. The second metal layer 113A is bonded to the lower surface of the insulating layer 111 (the surface facing the z2 side in the thickness direction z). The second metal layer 113A has a bottom surface 1130.

[0092] In this modification, the metal material (first metal material) constituting the first metal layer 112A (support surface 1120) contains Ni (nickel) as a main component. The metal material (second metal material) constituting the second metal layer 113A (bottom surface 1130) contains Ag (silver) as a main component. The second metal material (mainly Ag) constituting the bottom surface 1130 is different from the first metal material (mainly Ni) constituting the support surface 1120.

[0093] 18 , the first electrodes 211 of the plurality of first elements 21A (semiconductor elements 21) are bonded to the support surface 1120 of the first metal layer 112A in the first conductive portion 1121 via the first bonding layer 23. As shown in FIG. 19 , the first electrodes 211 of the plurality of second elements 21B (semiconductor elements 21) are bonded to the support surface 1120 of the first metal layer 112A in the second conductive portion 1122 via the first bonding layer 23.

[0094] As shown in Figures 21 and 22, the first support portion 48A (control terminal support 48) and the second support portion 48B (control terminal support 48) are joined to the support surface 1120 of the first metal layer 112A via a bonding layer 49 or the like.

[0095] As shown in Figures 17 and 20, the second joint portion 313 (first conductive member 31) is joined to the support surface 1120 of the first metal layer 112A in the second conductive portion 1122 via the second conductive joint layer 34.

[0096] As shown in FIG. 23, the wire (fourth wire 44) is bonded to the support surface 1120 of the first metal layer 112A in the first conductive portion 1121.

[0097] In the semiconductor device A11 of this modification, the first metal material constituting the support surface 1120 (first metal layer 112A) and the second metal material constituting the bottom surface 1130 (second metal layer 113A) are different from each other. This configuration can improve performance when different objects are bonded to the support surface 1120 and the bottom surface 1130, respectively.

[0098] The semiconductor element 21 is bonded to the support surface 1120 of the first metal layer 112A via a first bonding layer 23. The first metal material constituting the support surface 1120 contains Ni (nickel) as its primary component. Nickel has better wettability with tin, the primary component of solder, than copper. When the first bonding layer 23 is solder, the support surface 1120 containing nickel as its primary component improves the bonding reliability between the support surface 1120 and the semiconductor element 21 via the first bonding layer 23. Meanwhile, a heat dissipation member such as a heat sink is attached to the bottom surface 1130 of the second metal layer 113A. The second metal material constituting the bottom surface 1130 contains Ag (silver) as its primary component. With this configuration, the bottom surface 1130 and the heat dissipation member can be bonded using a sintered body (sintered metal) of metal particles such as silver. Bonding using sintered metal has superior thermal conductivity compared to bonding via a heat dissipation sheet or thermal grease, thereby improving the heat dissipation performance of the heat dissipation member. In addition, the semiconductor device A11 has the same effects as the semiconductor device A1 of the above embodiment.

[0099] The first metal material constituting the support surface 1120 (first metal layer 112A) is not limited to nickel and may be other metal types. The second metal material constituting the bottom surface 1130 (second metal layer 113A) is not limited to silver and may be other metal types. This is the same as what has been explained with respect to the semiconductor device A1 of the above embodiment.

[0100] Second Modification: Figures 24 to 27 show a second modification of the semiconductor device A1. Figure 24 is a cross-sectional view similar to Figure 7, showing a semiconductor device A12 according to this modification. Figure 25 is a cross-sectional view similar to Figure 8, showing the semiconductor device A12. Figure 26 is a cross-sectional view similar to Figure 11, showing the semiconductor device A12. Figure 27 is a cross-sectional view similar to Figure 15, showing the semiconductor device A12.

[0101] The semiconductor device A12 of this modification differs from the semiconductor device A1 of the above embodiment in the configuration of the first metal portion 112 in the support substrate 11. Specifically, the metal material constituting the first metal layer 112A of the first metal portion 112 is different from the metal material constituting the second metal layer 113A of the second metal portion 113. In this modification, the metal material constituting the first metal layer 112A is, for example, aluminum (Al), and the metal material constituting the second metal layer 113A includes, for example, copper (Cu) or a copper (Cu) alloy. The first metal layer 112A is bonded to the upper surface (surface facing the z1 side in the thickness direction z) of the insulating layer 111, and the second metal layer 113A is bonded to the lower surface (surface facing the z2 side in the thickness direction z) of the insulating layer 111. The configuration of the third metal layer 112B located above the first metal layer 112A (on the z1 side in the thickness direction z) and the configuration of the fourth metal layer 113B located below the second metal layer 113A (on the z2 side in the thickness direction z) are the same as those of the semiconductor device A1 of the above embodiment. That is, the third metal layer 112B has a support surface 1120, and the metal material (first metal material) constituting the third metal layer 112B (support surface 1120) contains Ni (nickel) as a main component. The fourth metal layer 113B has a bottom surface 1130, and the metal material (second metal material) constituting the fourth metal layer 113B (bottom surface 1130) contains Ag (silver) as a main component.

[0102] As shown in FIG. 25, the first electrodes 211 of the plurality of first elements 21A (semiconductor elements 21) are bonded to the support surface 1120 of the third metal layer 112B via the first bonding layer 23.

[0103] As shown in Figures 26 and 27, the first support portion 48A (control terminal support 48) and the second support portion 48B (control terminal support 48) are joined to the support surface 1120 of the third metal layer 112B via a bonding layer 49 or the like.

[0104] As shown in FIG. 24, the second bonding portion 313 (first conductive member 31) is bonded to the support surface 1120 of the third metal layer 112B in the second conductive portion 1122 via the second conductive bonding layer .

[0105] As in the semiconductor device A1 of the above embodiment, a wire (fourth wire 44) (not shown) is bonded to the support surface 1120 of the third metal layer 112B in the first conductive portion 1121.

[0106] In the semiconductor device A12 of this modification, the first metal material constituting the support surface 1120 (third metal layer 112B) and the second metal material constituting the bottom surface 1130 (fourth metal layer 113B) are different from each other. This configuration can improve performance when different objects are bonded to the support surface 1120 and the bottom surface 1130, respectively.

[0107] The semiconductor element 21 is bonded to the support surface 1120 of the third metal layer 112B via the first bonding layer 23. The first metal material constituting the support surface 1120 contains Ni (nickel) as its main component. Nickel has better wettability with tin, the main component of solder, than copper. When the first bonding layer 23 is solder, the support surface 1120 containing nickel as its main component improves the bonding reliability between the support surface 1120 and the semiconductor element 21 via the first bonding layer 23. Meanwhile, a heat dissipation member such as a heat sink is attached to the bottom surface 1130 of the fourth metal layer 113B. The second metal material constituting the bottom surface 1130 contains Ag (silver) as its main component. With this configuration, the bottom surface 1130 and the heat dissipation member can be bonded using a sintered body (sintered metal) of metal particles such as silver. Bonding using sintered metal has superior thermal conductivity compared to bonding using a heat dissipation sheet or heat dissipation grease, and can improve the heat dissipation performance of the heat dissipation member.

[0108] The metal material (aluminum) constituting the first metal layer 112A is softer than the metal material (copper) constituting the second metal layer 113A. As a result, for example, when bonding the semiconductor element 21 to the support surface 1120, the second metal layer 113A functions as a buffer layer. With this configuration, problems such as cracking of the insulating layer 111 made of ceramic can be reduced when bonding the semiconductor element 21 or the like to the support surface 1120. In addition, the semiconductor device A12 achieves the same effects as the semiconductor device A1 within the same range of configuration as the semiconductor device A1 of the above embodiment.

[0109] The first metal material constituting the support surface 1120 (third metal layer 112B) is not limited to nickel and may be other metal types. The second metal material constituting the bottom surface 1130 (fourth metal layer 113B) is not limited to silver and may be other metal types. This is the same as what has been explained with respect to the semiconductor device A1 of the above embodiment.

[0110] Third Modification: Figures 28 to 31 show a third modification of the semiconductor device A1. Figure 28 is a cross-sectional view similar to Figure 7, showing a semiconductor device A13 according to this modification. Figure 29 is a cross-sectional view similar to Figure 8, showing the semiconductor device A13. Figure 30 is a cross-sectional view similar to Figure 11, showing the semiconductor device A13. Figure 31 is a cross-sectional view similar to Figure 15, showing the semiconductor device A13.

[0111] The semiconductor device A13 of this modification differs from the semiconductor device A1 of the above embodiment in the configuration of the support substrate 11. Specifically, the support substrate 11 further includes a first intermediate bond 114 and a second intermediate bond 115. The first intermediate bond 114 is interposed between the insulating layer 111 and the first metal layer 112A and contacts both the insulating layer 111 and the first metal layer 112A. The second intermediate bond 115 is interposed between the insulating layer 111 and the second metal layer 113A and contacts both the insulating layer 111 and the second metal layer 113A.

[0112] The first intermediate joint 114 and the second intermediate joint 115 are made of, for example, a brazing material, and the insulating layer 111 is joined to the first metal layer 112A and the second metal layer 113A by brazing. In this modification, the first intermediate joint 114 and the second intermediate joint 115 are preferably made of a silver brazing material. In this case, the insulating layer 111, which is made of ceramic, is firmly joined to the first metal layer 112A and the second metal layer 113A.

[0113] As shown in FIG. 29, the first electrodes 211 of the plurality of first elements 21A (semiconductor elements 21) are bonded to the support surface 1120 of the third metal layer 112B via the first bonding layer 23.

[0114] As shown in Figures 30 and 31, the first support portion 48A (control terminal support 48) and the second support portion 48B (control terminal support 48) are joined to the support surface 1120 of the third metal layer 112B via a bonding layer 49 or the like.

[0115] As shown in FIG. 28, the second bonding portion 313 (first conductive member 31) is bonded to the support surface 1120 of the third metal layer 112B in the second conductive portion 1122 via the second conductive bonding layer .

[0116] As in the semiconductor device A1 of the above embodiment, a wire (fourth wire 44) (not shown) is bonded to the support surface 1120 of the third metal layer 112B in the first conductive portion 1121.

[0117] In the semiconductor device A13 of this modification, the first metal material constituting the support surface 1120 (third metal layer 112B) and the second metal material constituting the bottom surface 1130 (fourth metal layer 113B) are different from each other. This configuration can improve performance when different objects are bonded to the support surface 1120 and the bottom surface 1130, respectively.

[0118] The semiconductor element 21 is bonded to the support surface 1120 of the third metal layer 112B via the first bonding layer 23. The first metal material constituting the support surface 1120 contains Ni (nickel) as its primary component. Nickel has better wettability with tin, the primary component of solder, than copper. When the first bonding layer 23 is solder, the support surface 1120 containing nickel as its primary component improves the bonding reliability between the support surface 1120 and the semiconductor element 21 via the first bonding layer 23. Meanwhile, a heat dissipation member such as a heat sink is attached to the bottom surface 1130 of the fourth metal layer 113B. The second metal material constituting the bottom surface 1130 contains Ag (silver) as its primary component. With this configuration, the bottom surface 1130 and the heat dissipation member can be bonded using a sintered body (sintered metal) of metal particles such as silver. Bonding using sintered metal has superior thermal conductivity compared to bonding via a heat dissipation sheet or thermal grease, thereby improving the heat dissipation performance of the heat dissipation member. In addition, the semiconductor device A13 has the same effects as the semiconductor device A1 of the above embodiment.

[0119] The first metal material constituting the support surface 1120 (third metal layer 112B) is not limited to nickel and may be other metals. The second metal material constituting the bottom surface 1130 (fourth metal layer 113B) is not limited to silver and may be other metals. This is the same as what has been explained with respect to the semiconductor device A1 of the above embodiment.

[0120] Next, an example of use of the semiconductor device A1 will be described with reference to FIGS.

[0121] 32 shows a semiconductor device assembly B1 including the semiconductor device A1 of the above embodiment. Fig. 32 is a cross-sectional view of a main part of the semiconductor device assembly B1. The semiconductor device assembly B1 includes the semiconductor device A1 and a heat sink 90.

[0122] 32 , the heat sink 90 is disposed opposite the bottom surface 1130 of the semiconductor device A1 (support substrate 11). The heat sink 90 is bonded to the bottom surface 1130 via a second bonding layer 909. The heat sink 90 is an example of the "heat dissipation member" of the present disclosure. The constituent material of the heat sink 90 is not particularly limited, and may be, for example, Al (aluminum), Cu (copper), or an alloy thereof.

[0123] The second bonding layer 909 bonds the upper surface of the heat sink 90 (the surface facing the z1 side in the thickness direction z) to the bottom surface 1130 of the support substrate 11 (fourth metal layer 113B). For example, a plating layer (not shown) is formed on the upper surface of the heat sink 90, and the plating layer contains, for example, Ag (silver). The constituent material of the second bonding layer 909 is not particularly limited, and is, for example, a sintered body of metal particles (sintered metal). The second metal material constituting the bottom surface 1130 contains Ag (silver) as its main component. With this configuration, the bottom surface 1130 and the heat sink 90 can be bonded together using a sintered body of metal particles (sintered metal) such as silver. Bonding using sintered metal has superior thermal conductivity compared to bonding via a heat dissipation sheet or thermal grease, and can improve the heat dissipation performance of the heat sink 90.

[0124] 33 shows a semiconductor device assembly B2 including the semiconductor device A1 of the above embodiment. Fig. 33 is a cross-sectional view of a main part of the semiconductor device assembly B2. The semiconductor device assembly B2 includes the semiconductor device A1 and a heat sink 90.

[0125] As shown in FIG. 33 , the heat sink 90 is disposed opposite the bottom surface 1130 of the semiconductor device A1 (support substrate 11). The heat sink 90 is bonded to the bottom surface 1130 via an intermediate metal layer 80. The intermediate metal layer 80 is interposed between the upper surface of the heat sink 90 (the surface facing the z1 side in the thickness direction z) and the bottom surface 1130 of the support substrate 11 (fourth metal layer 113B). For example, a plating layer 919 is formed on the upper surface of the heat sink 90, and the plating layer 919 contains, for example, Ag (silver). The bottom surface 1130 and the intermediate metal layer 80 are bonded by solid-state diffusion bonding. Furthermore, the intermediate metal layer 80 and the heat sink 90 are bonded by solid-state diffusion bonding.

[0126] The intermediate metal layer 80 includes a first layer 81, a second layer 82, and a third layer 83. The first layer 81 is a layer bonded to the bottom surface 1130 of the support substrate 11 (fourth metal layer 113B) by solid-state diffusion bonding. The first layer 81 is made of a metal material that can be bonded by solid-state diffusion bonding, such as Ag (silver). The second layer 82 is a layer bonded to the plating layer 919 on the heat sink 90 by solid-state diffusion bonding. The second layer 82 is made of a metal material that can be bonded by solid-state diffusion bonding, such as Ag (silver).

[0127] The third layer 83 is a layer interposed between the first layer 81 and the second layer 82. The third layer 83 is preferably made of a metal material that is softer than the first layer 81 and the second layer 82. The metal material that makes up the third layer 83 is, for example, Al (aluminum).

[0128] As described above, in the semiconductor device assembly B2, the bottom surface 1130 of the support substrate 11 (fourth metal layer 113B) and the heat sink 90 (plating layer 919) are bonded by solid-state diffusion bonding. Bonding by solid-state diffusion bonding has superior thermal conductivity compared to bonding via a heat dissipation sheet or heat dissipation grease, and can improve the heat dissipation performance of the heat sink 90.

[0129] Furthermore, in the intermediate metal layer 80, the metal material (aluminum) constituting the third layer 83 interposed between the first layer 81 and the second layer 82 is softer than the metal material (silver) constituting the first layer 81 and the second layer 82. As a result, for example, when the support substrate 11, the intermediate metal layer 80, and the heat sink 90 are collectively bonded by solid-state diffusion bonding, the third layer 83 functions as a buffer layer. As a result, even if there is some variation in the flatness of the bottom surface 1130 or the top surface of the heat sink 90 (the surface facing the z1 side in the thickness direction z), the bottom surface 1130 and the heat sink 90 can be appropriately bonded by solid-state diffusion bonding.

[0130] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways.

[0131] In the above embodiment and each modified example, among the plurality of control terminals 45, the plurality of first control terminals 46A to 46C are located closer to the x1 side in the first direction x, where the first power terminal 14 and the second power terminal 15 are arranged, and the other plurality of second control terminals 47A to 47D are located closer to the x2 side in the first direction x, where the third power terminal 16 is arranged. However, the present disclosure is not limited to this. For example, all of the plurality of control terminals 45 may be located closer to the x1 side in the first direction x, where the first power terminal 14 and the second power terminal 15 are arranged, or all of the plurality of control terminals 45 may be located closer to the x2 side in the first direction x, where the third power terminal 16 is arranged.

[0132] The present disclosure includes configurations related to the following supplementary notes. Supplementary note 1. A semiconductor device comprising: a support substrate having a support surface facing one side in a thickness direction and a bottom surface facing the other side in the thickness direction; a bonding object bonded to the support surface; and a sealing resin covering at least a portion of the support substrate and the bonding object, wherein the support substrate includes an insulating layer, a first metal portion located on one side of the insulating layer in the thickness direction and having the support surface, and a second metal portion located on the other side of the insulating layer in the thickness direction and having the bottom surface, wherein the first metal material constituting the support surface and the second metal material constituting the bottom surface are different. Supplementary note 2. The semiconductor device according to Supplementary note 1, wherein the first metal portion includes a first metal layer formed on one side of the insulating layer in the thickness direction, and the second metal portion includes a second metal layer formed on the other side of the insulating layer in the thickness direction. Supplementary note 3. The semiconductor device according to Supplementary note 2, wherein the first metal layer has the support surface, and the second metal layer has the bottom surface. Appendix 4. The semiconductor device according to Appendix 2, wherein the first metal portion includes a third metal layer located on one side of the first metal layer in the thickness direction, and the third metal layer has the support surface. Appendix 5. The semiconductor device according to Appendix 4, wherein the third metal layer is a plating layer. Appendix 6. The semiconductor device according to Appendix 2, wherein the second metal portion includes a fourth metal layer located on the other side of the second metal layer in the thickness direction, and the fourth metal layer has the bottom surface. Appendix 7. The semiconductor device according to Appendix 6, wherein the fourth metal layer is a plating layer. Appendix 8. The semiconductor device according to any of Appendixes 1 to 7, wherein the bonding object includes at least one semiconductor element. Appendix 9. The semiconductor device according to Appendix 8, further comprising a first bonding layer interposed between the semiconductor element and the support surface. Appendix 10. The semiconductor device according to any of Appendixes 1 to 9, wherein the bonding object includes at least one wire. Appendix 11. 11. The semiconductor device according to claim 1, wherein the object to be joined includes at least one plate-shaped conductive member.Appendix 12. The semiconductor device according to any one of Appendixes 1 to 11, further comprising: at least one terminal including a holder located on one side of the support surface in the thickness direction and having conductivity, and a metal pin inserted into the holder; and a terminal support interposed between the support surface and the at least one terminal in the thickness direction, wherein the joining object includes the terminal support. Appendix 13. The semiconductor device according to any one of Appendixes 1 to 12, wherein the first metal material contains nickel as a main component, and the second metal material contains silver as a main component. Appendix 14. The semiconductor device according to any one of Appendixes 1 to 12, wherein the first metal material contains nickel-palladium-gold as a main component, and the second metal material contains silver as a main component. Appendix 15. The semiconductor device according to any one of Appendix 2 to 7, wherein the support substrate includes a first intermediate bonding portion interposed between the insulating layer and the first metal layer and in contact with the insulating layer and the first metal layer, and a second intermediate bonding portion interposed between the insulating layer and the second metal layer and in contact with the insulating layer and the second metal layer. Appendix 16. A semiconductor device assembly comprising the semiconductor device according to any one of Appendixes 1 to 15 and a heat dissipation member bonded to the bottom surface. Appendix 17. The semiconductor device assembly according to Appendix 16, wherein the heat dissipation member is bonded to the bottom surface via a second bonding layer. Appendix 18. The semiconductor device assembly according to Appendix 17, wherein the second bonding layer is a sintered metal. Appendix 19. The semiconductor device assembly according to Appendix 16, wherein the bottom surface and the heat dissipation member are bonded by solid-state diffusion bonding.

[0133] A1, A11, A12, A13: semiconductor device B1, B2: semiconductor device assembly 11: supporting substrate 111: insulating layer 112: first metal portion 112A: first metal layer 112B: third metal layer 1120: main surface 1121: first conductive portion 1122: second conductive portion 113: second metal portion 113A: second metal layer 113B: fourth metal layer 1130: bottom surface 114: first intermediate joint 115: second intermediate joint 13: power terminal 14: first power terminal 15: second power terminal 16: third power terminal 21: semiconductor element (object to be joined) 21A: first element (semiconductor element, object to be joined) 21B: second element (semiconductor element, object to be joined) 211: first electrode 212: second electrode 213: Third electrode 214: Fourth electrode 22: Thermistor 23: First bonding layer 31: First conductive member (bonding object) 310: Through hole 311: Main body portion 312: First bonding portion 313: Second bonding portion 32: Second conductive member 321: Main body portion 322: Third bonding portion 324: Fourth bonding portion 326: Intermediate portion 327: Horizontal beam portion 328: Hanging portion 33: First conductive bonding layer 34: Second conductive bonding layer 35: Third conductive bonding layer 36: Fourth conductive bonding layer 41: First wire 42: Second wire 43: Third wire 44: Fourth wire (bonding object) 45: Control terminal (terminal) 451: Holder 452: Metal pin 459: Conductive bonding layer 46A, 46B, 46C: First control terminal 47A, 47B, 47C, 47D: Second control terminal 48: Control terminal support (terminal support, joining object) 48A: First support portion (joining object) 48B: Second support portion (joining object) 481: Insulating layer 482: Metal layer 482A: First portion 482B: Second portion 482C: Third portion 482D: Fourth portion 482E: Fifth portion 483: Metal layer 49: Joining layer 50: Sealing resin 51: Resin main surface 511: Recess 52: Resin back surface 531-534: Resin side surface 531a: Recess 80: Intermediate metal layer 81: First layer 82: Second layer 83: Third layer 90: Heat sink (heat dissipation member) 909: Second joining layer 919: plating layer

Claims

1. A semiconductor device comprising: a support substrate having a support surface facing one side in a thickness direction and a bottom surface facing the other side in the thickness direction; a bonding object bonded to the support surface; and a sealing resin covering at least a part of the support substrate and the bonding object, wherein the support substrate includes an insulating layer, a first metal part located on one side of the insulating layer in the thickness direction and having the support surface, and a second metal part located on the other side of the insulating layer in the thickness direction and having the bottom surface, and wherein the first metal material constituting the support surface and the second metal material constituting the bottom surface are different.

2. The semiconductor device described in claim 1, wherein the first metal portion includes a first metal layer formed on one side of the insulating layer in the thickness direction, and the second metal portion includes a second metal layer formed on the other side of the insulating layer in the thickness direction.

3. The semiconductor device according to claim 2, wherein the first metal layer has the support surface, and the second metal layer has the bottom surface.

4. The semiconductor device according to claim 2, wherein the first metal portion includes a third metal layer located on one side of the first metal layer in the thickness direction, and the third metal layer has the support surface.

5. The semiconductor device according to claim 4, wherein the third metal layer is a plating layer.

6. The semiconductor device according to claim 2, wherein the second metal portion includes a fourth metal layer located on the other side of the second metal layer in the thickness direction, and the fourth metal layer has the bottom surface.

7. The semiconductor device according to claim 6, wherein the fourth metal layer is a plating layer.

8. The semiconductor device according to any one of claims 1 to 7, wherein the object to be bonded includes at least one semiconductor element.

9. The semiconductor device according to claim 8, further comprising a first bonding layer interposed between said semiconductor element and said support surface.

10. The semiconductor device according to any one of claims 1 to 9, wherein the object to be bonded includes at least one wire.

11. The semiconductor device according to any one of claims 1 to 10, wherein the object to be joined includes at least one plate-shaped conductive member.

12. A semiconductor device as described in any one of claims 1 to 11, further comprising: at least one terminal located on one side of the support surface in the thickness direction and including a conductive holder and a metal pin inserted into the holder; and a terminal support interposed between the support surface and the at least one terminal in the thickness direction, wherein the joining object includes the terminal support.

13. The semiconductor device according to any one of claims 1 to 12, wherein the first metal material contains nickel as a main component, and the second metal material contains silver as a main component.

14. The semiconductor device according to any one of claims 1 to 12, wherein the first metal material contains nickel-palladium-gold as a main component, and the second metal material contains silver as a main component.

15. A semiconductor device as described in any one of claims 2 to 7, wherein the support substrate includes a first intermediate joint interposed between the insulating layer and the first metal layer and in contact with the insulating layer and the first metal layer, and a second intermediate joint interposed between the insulating layer and the second metal layer and in contact with the insulating layer and the second metal layer.

16. A semiconductor device assembly comprising: a semiconductor device according to any one of claims 1 to 15; and a heat dissipation member bonded to the bottom surface.

17. The semiconductor device assembly according to claim 16, wherein the heat dissipation member is bonded to the bottom surface via a second bonding layer.

18. The semiconductor device assembly of claim 17, wherein said second bonding layer is a sintered metal.

19. The semiconductor device assembly according to claim 16, wherein said bottom surface and said heat dissipation member are bonded by solid state diffusion bonding.

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