Consumable chip, consumable container and printing device

Abstract

Provided are a consumable chip (40, 50, ... 120), a consumable container and a printing device. The consumable chip (40, 50, ... 120) comprises a substrate and an electronic module provided on the substrate, a plurality of connection terminals being provided on the surface of the substrate, the electronic module being provided with a plurality of pins, and each connection terminal being connected to a corresponding pin. The plurality of connection terminals do not include a grounding terminal, or a grounding terminal among the connection terminals is shielded by an electric insulating part. The plurality of connection terminals include a power supply terminal (41, 51, ..., 161); the plurality of pins include a power supply pin, the power supply terminal (41, 51, ..., 161) being connected to the power supply pin, and the power supply terminal (41, 51, ..., 161) being connected to a first end of a power supply device; and the plurality of pins further include a grounding pin, the grounding pin being connected to a second end of the power supply device. The present invention does not need to arrange a grounding terminal on the substrate, thus reducing the area of the substrate on one hand, and on the other hand, avoiding falling of foreign matters on grounding terminals, which affects communication between the consumable chip (40, 50, ..., 120) and a printing device.

Description

Consumable chips, consumable containers and printing equipment Technical Field

[0001] The present invention relates to the technical field of inkjet printing, and in particular to a consumable chip, a consumable container having the consumable chip, and a printing device equipped with the consumable container. Background Art

[0002] Printing equipment, as a common office equipment, provides great convenience for modern office. Common printing equipment is divided into inkjet printing equipment and laser printing equipment. Inkjet printing equipment uses an ink cartridge containing ink as a consumable container to spray ink onto paper to form the text or pattern to be printed on the paper; laser printing equipment uses a toner cartridge containing toner as a consumable container to form the text or pattern to be printed on the medium.

[0003] Referring to Figure 1 , a conventional color inkjet printer comprises a housing 11. The inkjet printer shown in Figure 1 omits the support plate of housing 11. Housing 11 houses the inkjet printer's movement 12, along with a slide bar. A print carriage 14 reciprocates along the slide bar, driven by a motor (not visible in Figure 1 ). A main control circuit board (not visible in Figure 1 ) is housed within print carriage 14, which communicates with movement 12 via a flat cable 13.

[0004] Multiple ink cartridges 15 are detachably mounted on the print carriage 14. Different ink cartridges 15 contain different colors of ink. The structure of the ink cartridges 15 is shown in Figure 2. The ink cartridges 15 comprise a housing 16 that defines a cavity for holding ink. An ink outlet 17 is located at the lower end of the cavity. Ink in the cavity flows out through the outlet 17 and is supplied to the ink supply needle of the print carriage 14.

[0005] A chip 18 is mounted on the outer wall of the cartridge body 16 of the ink cartridge 15. Chip 18 comprises a substrate with multiple connection terminals 19 on one side for electrical connection to the contact pins on the print carriage 14. A memory (not visible in Figure 2) is located on the other side of the substrate. Typically, this memory is a non-volatile memory such as EEPROM or FLASH. It stores information related to the ink cartridge, including variable and constant information. Variable information changes with each printing operation, such as the remaining ink level, print duration, and number of pages printed. Constant information, such as the cartridge model, compatible inkjet printer model, and ink color, remains constant.

[0006] After the ink cartridge 15 is installed in the print carriage 14 of the inkjet printer, the inkjet printer powers on the chip 18 and reads the data stored in the memory of the chip 18 to determine whether the ink cartridge 15 is of the correct model and whether there is sufficient ink in the ink cartridge 15. The inkjet printer can only print after determining that the ink cartridge 15 is of the correct model and has sufficient ink in it.

[0007] Referring to Figure 3, five connection terminals 21, 22, 23, 24, and 25 are provided on one surface of a substrate 20 of an existing ink cartridge chip 18. The five connection terminals include a power terminal, a ground terminal, a clock terminal, a data terminal, and a chip select terminal. Usually, the distance between the ground terminal 25 and the other connection terminals is large.

[0008] When an inkjet printer communicates with an ink cartridge chip, the ink cartridge chip's five connection terminals are connected to corresponding pins on the inkjet printer. For example, the ground terminal needs to be connected to the inkjet printer's ground pin to provide a reference ground for the inkjet printer chip, thus forming a current loop. However, if there is an insulating foreign object on the ground terminal 25, such as residual double-sided tape or dried ink, the insulating foreign object will cause the electrical connection between the ground terminal 25 and the inkjet printer's ground pin to be disconnected. This will prevent the ink cartridge chip from recognizing the signal output by the inkjet printer and thus from responding to the signal sent by the inkjet printer. As a result, the inkjet printer will believe that the ink cartridge is not installed correctly and cannot print.

[0009] In addition, it can be seen from Figure 3 that among the five connection terminals, the distance between the power terminal, the clock terminal, the data terminal and the chip select terminal is small, and they are located on the left side of the central axis of the substrate 20. Only the ground terminal 25 is located on the right side of the central axis of the substrate 20, resulting in a larger area of ​​the ink cartridge chip 18. If the ground terminal can be omitted on the substrate 20, on the one hand, the area of ​​the substrate can be reduced and the production cost of the ink cartridge chip 18 can be reduced. On the other hand, it can also avoid the problem of foreign matter adhering to the ground contact 25 and affecting the communication between the inkjet printing device and the ink cartridge chip. Technical issues

[0010] In order to solve the above-mentioned problems, a first object of the present invention is to provide a consumable chip that prevents a plurality of connection terminals from short-circuiting due to solder dripping.

[0011] A second object of the present invention is to provide a consumable container equipped with the above-mentioned consumable chip.

[0012] A third object of the present invention is to provide a printing device using the above-mentioned consumable material container. Solution

[0013] To achieve the first purpose of the present invention, the consumable chip provided by the present invention includes a substrate, a plurality of connection terminals and an electronic module are arranged on the surface of the substrate, the electronic module has a plurality of pins, and each connection terminal is connected to a corresponding pin; wherein, the plurality of connection terminals do not include a ground terminal, or the ground terminal in the connection terminals is blocked by an electrically insulating component; the plurality of connection terminals include a power terminal, the plurality of pins include a power pin, and the power terminals are connected to the power pins; the power terminal is directly or indirectly connected to the first end of the power supply device, and the plurality of pins also include a ground pin, and the ground pin is directly or indirectly connected to the second end of the power supply device.

[0014] A preferred solution is that the power supply device is a first capacitor, the first end of the first capacitor is directly connected to the power terminal, and the second end of the first capacitor is directly connected to the ground pin; the multiple connection terminals also include at least one communication terminal, and the multiple pins also include a communication pin, and each communication terminal is connected to the corresponding communication pin; a unidirectional conductive device or a controlled conductive device is connected between the second end of the first capacitor and at least one communication terminal.

[0015] A preferred solution is that the unidirectional conducting device is a diode, the anode terminal of the diode is connected to the second end of the first capacitor, and the cathode terminal of the diode is connected to the connecting terminal.

[0016] A further solution is that the controlled conduction device includes a first switching device, and a control end of the first switching device receives a signal output by a power terminal.

[0017] An optional solution is that the power supply device is a battery, the positive terminal of the battery is directly or indirectly connected to the power terminal, and the negative terminal of the battery is directly or indirectly connected to the ground pin.

[0018] A further solution is that a second switch device is further provided between the connecting terminal and the positive terminal of the battery; or a second switch device is connected between the negative terminal of the battery and the ground pin.

[0019] In a further embodiment, the second switch device is a mechanical switch or an electronic switch. Preferably, the second switch device is a push switch; or the second switch device is an insulating film connected between the battery and the substrate.

[0020] Another optional solution is that the first end of the power supply device is directly connected to the power terminal, the multiple connection terminals also include at least one communication terminal, the multiple pins also include a communication pin, and each communication terminal is connected to the corresponding communication pin; a third switching device is provided on the substrate, the second end of the power supply device is connected to the ground pin through the third switching device, the control end of the third switching device is connected to the fourth switching device, the control end of the fourth switching device is connected to the communication terminal, and the fourth switching device is also connected to the first end of the second capacitor. When the fourth switching device is turned on, the second capacitor is charged, and when the fourth switching device is turned off, the second capacitor discharges to the control end of the third switching device.

[0021] A further solution is that the third switching device is a field effect transistor, and the control end of the third switching device is also connected to the first end of the second capacitor.

[0022] A further solution is that the fourth switching device is a field effect transistor, and the source of the fourth switching device is connected to the power terminal.

[0023] A further solution is that the second end of the second capacitor is directly connected to the second end of the power supply device.

[0024] A further solution is that the multiple communication pins include a chip select pin, the control end of the fifth switch device is connected to the chip select pin, and the second end of the power supply device is connected to the ground pin through the fifth switch device.

[0025] A further solution is that the multiple communication pins include a chip select pin and a clock pin, and the multiple communication terminals include a chip select terminal and a clock terminal; the control end of the sixth switching device is connected to the chip select terminal, and the sixth switching device is also connected between the clock terminal and the clock pin.

[0026] A further solution is that a first unidirectional conducting device is connected between the chip select terminal and the chip select pin, and the first unidirectional conducting device only allows current to flow from the chip select terminal to the chip select pin.

[0027] A further solution is that the multiple communication terminals include a clock terminal, and a seventh switching device, an eighth switching device and a ninth switching device are also provided on the substrate; the seventh switching device is controlled to be turned on and off by the electronic module, and the seventh switching device is connected between the first end of the power supply device and the power terminal; the control end of the eighth switching device is connected to the clock terminal, and the eighth switching device is connected between the power terminal and the ninth switching device; the ninth switching device is controlled to be turned on and off by the electronic module, and the ninth switching device is connected between the first end of the power supply device and the eighth switching device.

[0028] A further solution is that a first inverter is connected between an output pin of the electronic module and the control terminal of the seventh switch device; a second inverter is connected between another output pin of the electronic module and the control terminal of the ninth switch device.

[0029] A further solution is that the multiple communication terminals include a chip select terminal; the electronic module is provided with a voltage detection pin, and a second unidirectional conductive device is provided between the voltage detection pin and the chip select terminal, and the second unidirectional conductive device only allows current to flow from the chip select terminal to the voltage detection pin.

[0030] A further solution is that the seventh switching device, the eighth switching device and the ninth switching device are all field effect transistors.

[0031] An optional solution is that the multiple connection terminals include at least one communication terminal; the electronic module includes a processor, which obtains the voltage signal of the communication terminal and determines whether the printing device is powered off based on the obtained voltage signal. If the printing device is powered off, the battery stops supplying power to the electronic module.

[0032] A further solution is that a tenth switching device is provided on the substrate, the first end of the power supply device is connected to the power terminal through the tenth switching device, the control end of the tenth switching device is connected to the eleventh switching device, and the control end of the eleventh switching device is directly or indirectly connected to the power terminal; when the processor confirms that the printing device is powered off, it outputs a control signal to the twelfth switching device to control the on-off state of the eleventh switching device to change, so that the tenth switching device is turned off.

[0033] A further solution is that a voltage reducing device is further connected between the control terminal of the eleventh switching device and the power terminal.

[0034] A further solution is that the processor detects the voltage of the communication terminal through a voltage detection pin.

[0035] To achieve the above-mentioned second purpose, the consumable container provided by the present invention can be detachably installed on a printing device. The consumable container includes a box body, a cavity is formed in the box body, the cavity contains printing consumables, and a consumable outlet is provided on one side of the cavity; wherein the above-mentioned consumable chip is provided on the outer wall of the box body.

[0036] To achieve the third objective mentioned above, the present invention provides a printing device comprising a body, in which a main control circuit board is provided, wherein one or more of the above-mentioned consumable material containers are installed in the printing device. Beneficial effects

[0037] Using the solution of the present invention, a power supply device is provided on the ink cartridge chip. One end of the power supply device is connected to a power terminal, and the other end can be connected to a ground pin. The power supply device creates a voltage differential between the power terminal and the ground pin, for example, a 3.3V voltage difference, thereby meeting the operating voltage requirements of the electronic module. Because a ground terminal is not required on the substrate, the substrate area can be reduced and communication between the consumable chip and the printing device can be prevented from being affected by foreign objects falling on the ground terminal.

[0038] When the printing device first begins operation, the communication terminal is typically in a weak pull-down state. Since the second end of the first capacitor can be connected to the communication terminal via a unidirectional conductive device or a controlled conductive device, the current output from the power terminal can flow through the first capacitor and then the unidirectional conductive device or the controlled conductive device before flowing into the communication terminal, thereby charging the first capacitor and enabling the electronic module to operate. When the communication terminal is weakly pulled down or at a low level, the first capacitor charges; when both communication terminals are at a high level, the first capacitor discharges, maintaining the ground pin at a relatively low ground reference voltage, meeting the operating requirements of the electronic module.

[0039] In the present invention, a diode is provided between the second end of the first capacitor and the communication terminal, which can prevent the reverse flow of current and ensure the stable operation of the electronic module.

[0040] The present invention controls the on and off of the first switching device through the signal output by the power terminal. Since the first switching device is a voltage-controlled device, even if all communication terminals are in a weak pull-down state when power is first applied, the first switching device can still be in the on state to charge the first capacitor, thereby ensuring that the electronic module has sufficient power to be successfully turned on.

[0041] Since the positive and negative terminals of the battery have a certain driving capability, the battery ensures that the voltage of the ground pin is lower than the voltage of the power terminal, thereby maintaining a lower voltage on the ground pin and ensuring that the electronic module can work normally.

[0042] The present invention provides a second switch device so that the battery will discharge only when the switch is closed, thereby avoiding power loss of the battery due to long-term discharge of the battery.

[0043] In a further embodiment, the second switch device is a mechanical switch or an electronic switch. Preferably, the second switch device is a push switch; or the second switch device is an insulating film connected between the battery and the substrate.

[0044] A push switch or an insulating film is provided so that after the consumable container is installed in the printing device, the push switch is opened only when other components abut against it, or the second switch device is opened only after the insulating film is torn off before the consumable container is used. That is, before the consumable container is not used, the second switch device is always in the disconnected state, thereby preventing the battery from discharging before the consumable container is used.

[0045] The present invention can control the on / off of the third switching device through the fourth switching device. When the third switching device is on, the power supply device can supply power to the electronic module through the third switching device, and when the third switching device is off, the power supply device will not supply power to the electronic module. Furthermore, because the on / off of the third switching device is controlled by the fourth switching device, and the fourth switching device is connected to the communication terminal, that is, the fourth switching device will only be turned on when the communication terminal is at a low level, the power supply device will only supply power to the electronic module when the consumable chip is working. When the consumable chip stops working, the power supply device will continue to supply power for a period of time before automatically stopping supplying power to the electronic module, thereby avoiding excessive loss of power from the power supply device.

[0046] The second capacitor is charged when the fourth switching device is turned on. When the fourth switching device is turned off due to the high level of the communication terminal, the second capacitor can continue to discharge to the third switching device for a short time, thereby maintaining the third switching device turned on for a period of time; after the printing device stops supplying power, since the fourth switching device is always in the off state, the second capacitor will not be charged. After the second capacitor discharges for a period of time, the third switching device is turned off, and the power supply device stops supplying power to the electronic module.

[0047] The present invention can ensure that the other end of the power supply device can be always connected to the ground pin of the consumable chip during operation by providing the fifth switch device, so that the power supply device can quickly supply power to the electronic module.

[0048] The present invention can avoid the situation where the fourth switch device is always in the on state and the third switch device cannot be turned off by providing the sixth switch device.

[0049] The present invention can prevent the reverse flow of current by providing the first unidirectional conducting device, thereby preventing the fifth switching device from being mis-conducted.

[0050] Furthermore, the present invention can effectively avoid the problem of the fifth switching device being accidentally turned back on.

[0051] By providing the seventh and eighth switching devices, the present invention can effectively avoid the problem of reverse current flow from the control pin of the electronic module, thereby causing the third switching device to be falsely triggered, and can also effectively reduce the static power consumption of the electronic module.

[0052] In addition, the present invention provides a processor and controls the working condition of the battery according to the power failure condition of the printing device through the processor, so that the battery only supplies power to the processor when the processor is working and does not supply power when the processor does not need to work, thereby extending the service life of the battery.

[0053] The present invention controls the switching of the working state of the battery by arranging three switch devices, which can realize the switching of the working state of the battery at a low cost, thereby reducing the production cost of the ink cartridge chip.

[0054] The present invention sets a voltage reducing device between the control end and the power terminal of the eleventh switching device, so that the eleventh switching device will only be turned on when the driving voltage applied by the inkjet printing device is high enough, and will automatically shut down before the voltage on the power terminal drops to the processor operating voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] FIG1 is a structural diagram of an existing inkjet printing device.

[0056] FIG2 is a schematic structural diagram of an existing ink cartridge.

[0057] FIG3 is a structural diagram of an existing ink cartridge chip.

[0058] FIG4 is an electrical schematic diagram of the first embodiment of the consumable chip and the printing device of the present invention.

[0059] FIG5 is an electrical schematic diagram of a second embodiment of the consumable chip and a printing device according to the present invention.

[0060] FIG6 is an electrical schematic diagram of a third embodiment of a consumable chip and a printing device according to the present invention.

[0061] FIG. 7 is an electrical schematic diagram of a fourth embodiment of a consumable chip and a printing device according to the present invention.

[0062] FIG8 is an electrical schematic diagram of a fifth embodiment of a consumable chip and a printing device according to the present invention.

[0063] FIG9 is an electrical schematic diagram of a sixth embodiment of the consumable chip and a printing device according to the present invention.

[0064] FIG. 10 is an electrical schematic diagram of a seventh embodiment of a consumable chip and a printing device according to the present invention.

[0065] FIG. 11 is an electrical schematic diagram of an eighth embodiment of a consumable chip and a printing device according to the present invention.

[0066] FIG12 is an electrical schematic diagram of a ninth embodiment of the consumable chip of the present invention.

[0067] FIG13 is an electrical schematic diagram of the consumable chip according to the tenth embodiment of the present invention.

[0068] FIG14 is an electrical schematic diagram of the eleventh embodiment of the consumable chip of the present invention.

[0069] FIG15 is an electrical schematic diagram of the consumable chip according to the twelfth embodiment of the present invention.

[0070] FIG16 is an electrical schematic diagram of the consumable chip according to the thirteenth embodiment of the present invention.

[0071] The present invention will be further described below with reference to the accompanying drawings and embodiments. Modes for Carrying Out the Invention

[0072] The printing device of the present invention can be an inkjet printing device or a laser printing device. The following description will take an inkjet printing device as an example. The inkjet printing device has a body, in which one or more ink cartridges are disposed. The ink cartridges are the consumable containers of the present invention, and each ink cartridge has an ink cartridge chip disposed on its side wall. The present invention improves the circuit of the ink cartridge chip, thereby eliminating the grounding contact on the ink cartridge chip or shielding the grounding contact, that is, shielding the grounding contact. Even if an electrically insulating foreign object drips onto the grounding contact, it will not affect the communication between the ink cartridge and the inkjet printing device.

[0073] First embodiment:

[0074] The inkjet printing device of this embodiment is provided with a body, in which a printing carriage is formed, and the ink cartridge is detachably installed in the printing carriage. Each ink cartridge has a box body, which encloses a cavity for accommodating ink. An ink outlet connected to the cavity is provided below the cavity. The ink in the cavity can flow into the nozzle of the inkjet printing device through the ink outlet. An ink cartridge chip is detachably installed on the front wall of the ink cartridge.

[0075] The inkjet printer's print carriage is equipped with a stylus holder. The main control circuit board and ink cartridge are located on either side of the stylus holder, which is equipped with multiple stylus pins. Referring to Figure 4 , the stylus pins of the inkjet printer 30 include a power pin 31, a data pin 32, a clock pin 33, a chip select pin 34, and a ground pin 35.

[0076] In addition, the ink cartridge chip 40 includes a substrate with multiple connection terminals disposed on its surface. These terminals include a power terminal 41, a data terminal 42, a clock terminal 43, and a chip select terminal 44. Each connection terminal corresponds to a contact pin. When the ink cartridge is installed in the inkjet printing device, each connection terminal on the ink cartridge chip 40 connects to the corresponding contact pin. For example, the power terminal 41 is electrically connected to the power contact pin 31, and so on. Furthermore, the ink cartridge chip 40 does not have a ground terminal. Instead, a virtual ground 45 is formed. This virtual ground 45 is not a metal plate formed on the substrate surface and, therefore, is not electrically connected to the ground contact pin 35.

[0077] Because power terminal 41 is electrically connected to power contact pin 31, power contact pin 31 outputs a high voltage of approximately 3.3V when the inkjet printer is operating. Therefore, power terminal 41 receives a high-level signal. Data terminal 42, clock terminal 43, and chip select terminal 44 are communication terminals, connected to data contact pin 32, clock contact pin 33, and chip select contact pin 34, respectively. Because data contact pin 32, clock contact pin 33, and chip select contact pin 34 of the inkjet printer are equivalently connected to ground contact pin 35 through a relatively high-resistance resistor when not transmitting a signal, data terminal 42, clock terminal 43, and chip select terminal 44 typically exhibit a low-level signal when idle, i.e., a weakly pulled-down state.

[0078] An electronic module is also provided on the substrate of the ink cartridge chip 40. The electronic module can be located on the side of the substrate opposite the multiple connection terminals, or on the same side as the multiple connection terminals. This embodiment does not limit the arrangement of the multiple connection terminals and the electronic module on the substrate. A processor U11 is provided within the electronic module. Of course, memory and peripheral circuits may also be provided. The electronic module has multiple functional pins, including a power pin, a data pin, a chip select pin, a clock pin, and a ground pin. Each functional pin is connected to a corresponding connection terminal. In addition, since the ink cartridge chip 40 does not have a ground terminal, the ground pin is directly connected to the virtual ground 45.

[0079] Since the ink cartridge chip 40 is not provided with a ground pin, in order to ensure that the virtual ground 45 can continuously provide a ground reference voltage and form a current loop, a power supply device is provided on the ink cartridge chip 40. The power supply device of this embodiment is a capacitor C11. The first end of the capacitor is connected to the power terminal 41, and the second end of the capacitor C11 is connected to the virtual ground 45. In addition, the second end of the capacitor C11 is also directly connected to the ground pin of the processor U11.

[0080] In order for the virtual ground 45 to continuously provide a ground reference voltage, it is necessary to connect the virtual ground 45 directly or indirectly to the ground contact pin 35 of the inkjet printing device to form a sufficient potential difference with the power terminal 41, thereby forming a current loop. Therefore, in this embodiment, unidirectional conductive devices D11, D12, and D13 are respectively provided between the data terminal 42, the clock terminal 43, the chip select terminal 44, and the virtual ground 45. For example, a diode D11 is provided between the virtual ground 45 and the data terminal 42, a diode D12 is provided between the virtual ground 45 and the clock terminal 43, and a diode D13 is provided between the virtual ground 45 and the chip select terminal 44. The anode end of each diode is connected to the virtual ground 45, and the cathode end is connected to each communication terminal.

[0081] Through the above configuration, when the ink cartridge is installed in the inkjet printing device, the power terminal 41 receives the high-level signal output by the inkjet printing device. Since the various connection terminals are in an idle state when power is first applied, as described above, they are actually in a weak pull-down state. This causes diodes D11, D12, and D13 to conduct, forming a voltage difference across capacitor C11, and capacitor C11 begins to charge. Since capacitor C11 is connected between the power pin and the ground pin of processor U11, the voltage difference between the power pin and the ground pin of processor U11 is 3.3V minus the voltage difference of the unidirectional conducting device. The voltage difference of a typical diode is approximately 0.2V to 0.3V, thus meeting the operating requirements of processor U11. Furthermore, by providing multiple unidirectional conducting devices, the charging speed of capacitor C11 can be accelerated when power is first applied, allowing processor U11 to start quickly.

[0082] When ink cartridge chip 40 receives data "1" or transmits data "1," data terminal 42, clock terminal 43, and chip select terminal 44 are all high. However, due to the presence of capacitor C11, the voltage across them cannot rise suddenly. Therefore, the voltage on virtual ground 45 slowly increases. However, when the received or transmitted data becomes "0," or the clock signal periodically becomes low, capacitor C11 can continue to charge, causing the voltage on virtual ground 45 to begin to decrease again, thereby maintaining virtual ground 45 as a relatively low-voltage ground reference point. Therefore, by selecting capacitor C11 with appropriate parameters and minimizing the power consumption of processor U11, ink cartridge chip 40 can achieve a sufficient potential difference to function properly.

[0083] Since the power pin of processor U11 is at a high level and the ground pin is at a low level, processor U11 compares the levels of the data pin, clock pin, and chip select pin with the levels of the power pin and ground pin, and can obtain the level status of the data pin, clock pin, and chip select pin, that is, identify the high and low level status of the data pin, clock pin, and chip select pin, thereby identifying the data sent by the inkjet printing device.

[0084] Because the ink cartridge chip 40 lacks a ground terminal, the circuit board area of ​​the ink cartridge chip 40 can be reduced, reducing production costs. Furthermore, even if a foreign object falls onto the location where the ground terminal would otherwise be located, the operation of the ink cartridge chip 40 will not be affected. The ink cartridge chip 40 will still correctly identify the signal sent by the inkjet printing device and return a corresponding response signal.

[0085] Second embodiment:

[0086] The consumable container of this embodiment is an ink cartridge installed in an inkjet printing device. An ink cartridge chip is provided on the side wall of the ink cartridge. Referring to Figure 5, the ink cartridge chip 50 has a substrate, and a plurality of connection terminals are provided on the surface of the substrate. The plurality of connection terminals include a power terminal 51, a data terminal 52, a clock terminal 53, and a chip select terminal 54.

[0087] The contact pins of the inkjet printing device 30 include a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35. Each connection terminal on the ink cartridge chip 50 corresponds to a corresponding contact pin on the inkjet printing device. When the ink cartridge is installed in the inkjet printing device, each connection terminal is connected to the corresponding contact pin. For example, the power terminal 51 is electrically connected to the power contact pin 31, and so on. Similar to the first embodiment, the ink cartridge chip 50 of this embodiment does not have a ground terminal. Instead, a virtual ground 55 is formed, which is not electrically connected to the ground contact pin 35.

[0088] An electronic module is also provided on the substrate of the ink cartridge chip 50. A processor U21 is housed within the electronic module. The electronic module has multiple functional pins, including a power pin, a data pin, a chip select pin, a clock pin, and a ground pin. Each functional pin is connected to a corresponding connection terminal. Furthermore, since the ink cartridge chip 50 does not have a ground terminal, the ground pin is connected to a virtual ground 55. Furthermore, a capacitor C21 is connected between the power terminal 51 and the power pin. A first end of the capacitor C21 is connected to the power terminal 51, and a second end of the capacitor C21 is directly connected to the ground pin and to the virtual ground 55.

[0089] Unlike the first embodiment, in this embodiment, a unidirectional conductive device is not provided between the second end of capacitor C21 and each communication terminal, but rather a controlled conductive device. Specifically, the controlled conductive device is a first switching device, such as a triode or a field-effect transistor. As can be seen from Figure 5, a field-effect transistor Q21 is provided between the second end of capacitor C21 and data terminal 52. The gate of field-effect transistor Q21, i.e., the control terminal, is connected to voltage terminal 51 via resistor R21. The drain of field-effect transistor Q21 is connected to the second end of capacitor C21, and the source is connected to data terminal 52. Accordingly, a field-effect transistor Q22 is provided between the second end of capacitor C21 and clock terminal 53, and a field-effect transistor Q23 is provided between the second end of capacitor C21 and chip select terminal 54.

[0090] In this way, when the power terminal 51 outputs a high level, the field effect transistors Q21, Q22, and Q23 are turned on. When any of the data terminal 52, the clock terminal 53, and the chip select terminal 54 is at a low level, current can flow from the power terminal 51 through the capacitor C21 and into the corresponding communication terminal through the field effect transistor, thereby charging the capacitor C21. Since the voltage of the power terminal 51 is approximately 3.3V, the voltage difference between the power pin and the ground pin of the processor U21 is approximately 3.3V, which can maintain the operation of the electronic module. In addition, since the field effect transistor is a voltage-controlled device, even if the data terminal 52, the clock terminal 53, and the chip select terminal 54 are all in a weak pull-down state when power is first applied, the field effect transistor can still be turned on to charge the capacitor C21, thereby ensuring that the processor U21 has enough power to successfully start.

[0091] Third embodiment:

[0092] The consumable container of this embodiment is an ink cartridge installed in an inkjet printing device. An ink cartridge chip is provided on the side wall of the ink cartridge. Referring to Figure 6, the ink cartridge chip 60 has a substrate, and a plurality of connection terminals are provided on the surface of the substrate. The plurality of connection terminals include a power terminal 61, a data terminal 62, a clock terminal 63, and a chip select terminal 64.

[0093] The contact pins of the inkjet printing device 30 include a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35. Each connection terminal of the ink cartridge chip 60 corresponds to a corresponding contact pin on the inkjet printing device. When the ink cartridge is installed in the inkjet printing device, each connection terminal is connected to the corresponding contact pin. For example, the power terminal 61 is electrically connected to the power contact pin 31, and so on. Similar to the first embodiment, the ink cartridge chip 60 of this embodiment does not have a ground terminal. Instead, a virtual ground 65 is formed, which is not electrically connected to the ground contact pin 35.

[0094] An electronic module is also provided on the substrate of the ink cartridge chip 60. A processor U31 is provided in the electronic module. The electronic module has multiple functional pins, including a power pin, a data pin, a chip select pin, a clock pin and a ground pin. Each functional pin is connected to a corresponding connection terminal. In addition, since the ink cartridge chip 60 does not have a ground terminal, the ground pin is connected to the virtual ground 65.

[0095] Unlike the first embodiment, in this embodiment, the power supply device provided between the power terminal 61 and the power pin of the processor U31 is not a capacitor, but a battery BAT1. The positive terminal of the battery BAT1 is directly connected to the power terminal 61, and the negative terminal of the battery BAT1 is directly connected to the ground pin of the processor U31 and to the virtual ground 65.

[0096] Preferably, the voltage difference between the positive and negative terminals of battery BAT1 is 3.3V, which is the same as the voltage difference between the power contact pin 31 and the contact pin 35 of the inkjet printing device. Furthermore, the positive terminal of battery BAT1 is connected to the power terminal 61. Therefore, the ink cartridge chip 60 and the power bus of the inkjet printing device have the same reference potential. Even if the virtual ground 65 of the ink cartridge chip 60 is not connected to the ground contact pin of the inkjet printing device, the processor U31 can still determine whether the received signal is high or low based on the difference between the potential of the received signal and the potential at the power terminal 61. Furthermore, because battery BAT1 itself has driving capability, it can maintain the virtual ground 65 at a voltage 3.3V lower than the positive terminal, that is, the voltage of the virtual ground 65 is maintained at the ground reference potential of 0V.

[0097] In addition, since the battery BAT1 itself stores electrical energy, the processor U31 can also obtain electrical energy before the inkjet printing device supplies power to the ink cartridge chip 60. It does not need to obtain electrical energy after the capacitor is charged to work, which can improve the response speed of the ink cartridge chip 60 to the instructions sent by the inkjet printing device.

[0098] Fourth embodiment:

[0099] The consumable container of this embodiment is an ink cartridge installed in an inkjet printing device. An ink cartridge chip is provided on the side wall of the ink cartridge. Referring to Figure 7, the ink cartridge chip 70 has a substrate, and a plurality of connection terminals are provided on the surface of the substrate. The plurality of connection terminals include a power terminal 71, a data terminal 72, a clock terminal 73, and a chip select terminal 74.

[0100] The contact pins of the inkjet printing device 30 include a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35. Each connection terminal of the ink cartridge chip 70 corresponds to a corresponding contact pin on the inkjet printing device. When the ink cartridge is installed in the inkjet printing device, each connection terminal is connected to the corresponding contact pin. For example, the power terminal 71 is electrically connected to the power contact pin 31, and so on. Similar to the first embodiment, the ink cartridge chip 70 of this embodiment does not have a ground terminal. Instead, a virtual ground 75 is formed, which is not electrically connected to the ground contact pin 35.

[0101] In addition, a battery BAT2 is provided between power terminal 71 and a power pin of processor U41. The positive terminal of battery BAT2 is indirectly connected to power terminal 71, while the negative terminal of battery BAT2 is directly connected to a ground pin of processor U41 and to virtual ground 75. Preferably, the voltage difference between the positive and negative terminals of battery BAT2 is 3.3V.

[0102] Compared to the third embodiment, the electronic module of this embodiment further includes a second switch device S1, which is connected between the power terminal 71 and the positive terminal of the battery BAT2. Alternatively, the second switch device S1 can be connected between the negative terminal of the battery and the ground pin of the processor U41. The second switch device S1 can be a mechanical switch or an electronic switch. If it is an electronic switch, it can be a transistor or a field-effect transistor, and the control terminal of the electronic switch is connected to the power terminal 71.

[0103] If a mechanical switch is used, a push-button switch or an insulating film can be used. For example, the second switch element S1 is a push-button switch located on the side wall of the ink cartridge. When the push-button switch is pressed, it closes, and the battery BAT2 discharges. In this way, the battery BAT2 discharges only after multiple ink cartridges are installed in the print carriage of the inkjet printer and the ink cartridges come into contact with each other, causing the push-button switch to close. This prevents power loss caused by the battery BAT2 discharging before the ink cartridges are installed in the inkjet printer.

[0104] Alternatively, the second switching device S1 is an insulating film connecting the positive / negative electrodes of the battery BAT2 to the ink cartridge chip substrate. When installing the ink cartridge, the insulating film needs to be removed, electrically connecting the positive / negative electrodes of the battery BAT2 to the ink cartridge chip substrate, thereby establishing electrical communication between the battery BAT2 and the processor U41 and discharging. Alternatively, the insulating film itself is part of the label on the ink cartridge's air inlet. When installing the ink cartridge in the inkjet printer, the user needs to tear off the air inlet label, that is, remove the insulating film. At this point, the battery BAT2 is electrically connected to the processor U41 and begins discharging.

[0105] Fifth embodiment:

[0106] The consumable container of this embodiment is an ink cartridge installed in an inkjet printing device. An ink cartridge chip is provided on the side wall of the ink cartridge. Referring to Figure 8, the ink cartridge chip 80 has a substrate, and a plurality of connection terminals are provided on the surface of the substrate. The plurality of connection terminals include a power terminal 81, a data terminal 82, a clock terminal 83, and a chip select terminal 84.

[0107] The contact pins of the inkjet printing device 30 include a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35. Each connection terminal of the ink cartridge chip 80 corresponds to a corresponding contact pin on the inkjet printing device. When the ink cartridge is installed in the inkjet printing device, each connection terminal is connected to the corresponding contact pin. For example, the power terminal 81 is electrically connected to the power contact pin 31, and so on. Similar to the first embodiment, the ink cartridge chip 80 of this embodiment does not have a ground terminal. Instead, a virtual ground 85 is formed, which is not electrically connected to the ground contact pin 35.

[0108] In addition, power terminal 81 is directly connected to a power pin of processor U51. The positive terminal of battery BAT3 is directly connected to power terminal 81, and the negative terminal of battery BAT3 is indirectly connected to a ground pin of processor U51. However, the negative terminal of battery BAT3 is not connected to virtual ground 85. Preferably, the voltage difference between the positive and negative terminals of battery BAT3 is 3.3V.

[0109] When the inkjet printing device 30 is powered on, the clock contact pin 33 is in a weak pull-down state, that is, the switch S2 in Figure 8 is closed. At this time, a resistor R51 is connected between the clock contact pin 33 and the contact contact pin 35. It should be noted that the switch S2 and resistor R51 in Figure 8 are schematic, indicating that the clock contact pin 33 is in a weak pull-down state after the inkjet printing device 30 is powered on. When the inkjet printing device 30 is powered off, which is equivalent to the switch S2 being open, the clock contact pin 33 is not electrically connected to the ground contact pin 35 and is suspended.

[0110] The substrate of the ink cartridge chip 80 also includes a third switching device Q53 and a fourth switching device Q54, as well as resistors R52 and R53 and a capacitor C51. The third switching device Q53 and the fourth switching device Q54 are both field-effect transistors. The control terminal, i.e., the gate, of the fourth switching device Q54 is connected to the clock terminal 83, and the source is connected to the power terminal 81. A resistor R52 is connected between the gate and the source, i.e., between the clock terminal 83 and the source of the fourth switching device Q54. Preferably, the resistance of resistor R52 is a predetermined multiple of the resistance of resistor R51, for example, three times the resistance of resistor R51. The proportional relationship between the resistance value of resistor R52 and the resistance value of resistor R51 is set. On the one hand, it is necessary to provide an electron leakage channel between the gate and source of the fourth switching device Q54 to avoid false triggering of the fourth switching device Q54. On the other hand, it is also necessary to ensure that when the inkjet printing device 30 is first powered on, the weak pull-down state of the clock pin 33 is not changed to a large extent, ensuring that the fourth switching device Q54 can be turned on normally.

[0111] The control terminal, or gate, of the third switching device Q53 is connected to the drain of the fourth switching device Q54. The source of the third switching device Q53 is connected to the negative terminal of the battery BAT3, and the drain is connected to the ground pin of the electronics module. A first terminal of capacitor C51 is connected to the gate of the third switching device Q53. The drain of the fourth switching device Q54 is also connected to the first terminal of capacitor C51, and the second terminal of capacitor C51 is connected to the negative terminal of the battery. Therefore, the negative terminal of the battery BAT3 is indirectly connected to the ground pin of the processor U51 through the third switching device Q53.

[0112] When the inkjet printing device 30 is initially powered on, the power contact pin of the inkjet printing device 30 outputs a voltage of 3.3V to the power terminal 81. The voltage of the battery BAT3 is also 3.3V. At this point, the switch S2 is essentially closed, and the clock contact pin 33 is connected to the ground contact pin 35 via the resistor R51, placing the clock contact pin 33 in a weak pull-down state. Furthermore, because the resistance of the resistor R52 is a predetermined multiple of the resistance of the resistor R51, for example, three times, the gate-source voltage difference of the fourth switching device Q54 is -3 / 4*VCC = -2.5V. At this point, the fourth switching device Q54 is in the on state.

[0113] After the fourth switching device Q54 is turned on, the voltage at the power terminal 81 can be applied to the gate of the third switching device Q53. At the same time, because the source of the third switching device Q53 is directly connected to the negative electrode of the battery BAT3, and the voltage difference between the positive and negative electrodes of the battery BAT3 is equal to the VCC voltage of the inkjet printing device 30, the gate-source voltage difference of the third switching device Q53 is +3.3V, causing the third switching device Q53 to turn on. After the third switching device Q53 is turned on, the negative electrode of the battery BAT3 is connected to the ground pin of the processor U51, and the processor U51 is powered on and starts operating. Furthermore, after the fourth switching device Q54 is turned on, it begins charging the capacitor C51.

[0114] When the clock signal is high, the gate and source voltages of the fourth switch device Q54 are equal, so the fourth switch device Q54 is in the off state. However, since capacitor C51 is already charged, capacitor C51 can discharge to the gate of the third switch device Q53. Therefore, the gate voltage of the third switch device Q53 does not immediately decrease, but gradually decreases as capacitor C51 discharges to resistor R53. However, since the clock signal periodically exhibits high and low levels, when the clock signal is low, the fourth switch device Q54 turns on again and charges capacitor C51 again, thus allowing the third switch device Q53 to remain in the on state. Therefore, as long as the inkjet printing device 30 is powered on and the control terminal of the fourth switch device Q54 is alternating between high and low levels, the third switch device Q53 remains in the on state, and the battery BAT3 can continue to supply power to the processor U51.

[0115] When the inkjet printing device 30 loses power, the clock contact pin 33 is no longer electrically connected to the ground contact pin 35, equivalent to the switch S2 being in the off state. Consequently, the gate and source of the fourth switch device Q54 are both in a high-level state, i.e., the gate and source voltages are equal, and the fourth switch device Q54 is turned off. Because capacitor C51 continues to discharge, after capacitor C51 has discharged for a period of time, the third switch device Q53 is immediately turned off, and the battery BAT3 stops supplying power to the processor U51. By selecting capacitor C51 and resistor R53 with appropriate parameters, the duration that battery BAT3 continues to supply power after the inkjet printing device 30 loses power can be set according to actual needs. In this way, battery BAT3 does not continuously supply power to the processor U51, but only supplies power to the processor U51 after the inkjet printing device 30 is powered on. This prevents rapid energy loss from battery BAT3 and extends the service life of the ink cartridge chip 80.

[0116] Of course, in other embodiments, the gate of the fourth switching device Q54 is not necessarily connected to the clock terminal 83, but can also be connected to a communication terminal such as a data terminal or a chip select terminal where the signal changes high and low, which can also achieve the same effect.

[0117] Sixth embodiment:

[0118] In the fifth embodiment, the ink cartridge chip in some inkjet printing devices 30 may experience a situation where the clock signal at the clock terminal remains high for a long period of time, for example, 100 ms. In this case, increasing the capacitance of capacitor C51 may result in a slow charging of capacitor C51, and a delay in the timely on-state of the third switch Q53. However, if the ink cartridge chip waits for more than 100 ms before turning off the third switch Q53, the battery may remain operating for an extended period of time, leading to excessive battery power consumption.

[0119] To this end, this embodiment improves the ink cartridge chip in view of the above situation. Referring to Figure 9, the ink cartridge chip 90 of this embodiment has a substrate, and a plurality of connection terminals are arranged on the surface of the substrate. The plurality of connection terminals include a power terminal 91, a data terminal 92, a clock terminal 93 and a chip select terminal 94.

[0120] The contact pins of the inkjet printing device 30 include a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35. Each connection terminal of the ink cartridge chip 90 corresponds to a corresponding contact pin on the inkjet printing device. When the ink cartridge is installed in the inkjet printing device, each connection terminal is connected to the corresponding contact pin. For example, the power terminal 91 is electrically connected to the power contact pin 31, and so on. In this embodiment, the ink cartridge chip 90 does not have a ground terminal. Instead, a virtual ground 95 is formed, which is not electrically connected to the ground contact pin 35.

[0121] In addition, power terminal 91 is directly connected to a power pin of processor U61. The positive terminal of battery BAT6 is directly connected to power terminal 91, and the negative terminal of battery BAT6 is indirectly connected to a ground pin of processor U61. However, the negative terminal of battery BAT6 is not connected to virtual ground 95. Preferably, the voltage difference between the positive and negative terminals of battery BAT6 is 3.3V.

[0122] A third switching device Q63 and a fourth switching device Q64 are also provided on the substrate of the ink cartridge chip 90, as well as resistors R62, R63 and a capacitor C61. The third switching device Q63 and the fourth switching device Q64 are both field effect transistors. The gate of the fourth switching device Q64 is connected to the clock terminal 93, the source is connected to the power supply terminal 91, and a resistor R62 is connected between the gate and the source.

[0123] The gate of the third switching device Q63 is connected to the drain of the fourth switching device Q64. The source of the third switching device Q63 is connected to the negative terminal of the battery BAT6, and the drain is connected to the ground pin of the processor U61. A first terminal of a capacitor C61 is connected to the gate of the third switching device Q63. The drain of the fourth switching device Q64 is also connected to the first terminal of the capacitor C61. The second terminal of the capacitor C61 is connected to the negative terminal of the battery BAT6. Therefore, the negative terminal of the battery BAT6 is indirectly connected to the ground pin of the processor U61 through the third switching device Q63.

[0124] Compared with the fifth embodiment, this embodiment provides a fifth switching device Q65 and a resistor R65 between the chip select terminal 94 and the ground pin of the processor U61. The fifth switching device is an N-type field effect transistor. The control electrode, i.e., the gate, of the fifth switching device Q65 is connected to the chip select terminal 94, the source is connected to the negative terminal of the battery BAT6, and the drain is connected to the ground pin of the processor U61. The resistor R65 is connected between the gate and the source of the fifth switching device Q65.

[0125] When chip select terminal 94 is at a high level, it indicates that the current ink cartridge chip has been selected for communication with the inkjet printing device 30 and needs to enter an operational state. Since chip select terminal 94 is at a high level, fifth switch Q65 is turned on, directly connecting the negative terminal of battery BAT6 to the ground pin of processor U61. As long as chip select terminal 94 maintains a high level signal, fifth switch Q65 remains on. When chip select terminal 94 is at a low level signal, the ink cartridge chip is waiting to receive instructions. Since clock terminal 93 is at a low level signal or in a weak pull-down state, third switch Q63 also remains on, ensuring a stable power supply to processor U61.

[0126] Seventh embodiment:

[0127] In the fifth embodiment, after the ink cartridge chip is powered on, an equivalent resistance is formed between the clock pin and the ground pin of its processor. This creates a loop by connecting the positive terminal of the battery through resistor R52, the clock pin, and then the ground pin. This can cause the voltage divider on resistor R52 to keep the fourth switch Q54 in a permanently on state, preventing the third switch Q53 from turning off.

[0128] To solve this problem, this embodiment isolates the clock pin 33 of the printing device from the clock pin of the processor U71.

[0129] 10 , the ink cartridge chip 100 of this embodiment includes a substrate, on the surface of which a plurality of connection terminals are provided. The plurality of connection terminals include a power terminal 101 , a data terminal 102 , a clock terminal 103 and a chip select terminal 104 .

[0130] The contact pins of the inkjet printing device 30 include a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35. Each connection terminal of the ink cartridge chip 100 corresponds to a corresponding contact pin on the inkjet printing device. When the ink cartridge is installed in the inkjet printing device, each connection terminal is connected to the corresponding contact pin. For example, the power terminal 101 is electrically connected to the power contact pin 31, and so on. In this embodiment, the ink cartridge chip 100 does not have a ground terminal. Instead, a virtual ground 105 is formed, which is not electrically connected to the ground contact pin 35.

[0131] In addition, the power terminal 101 is directly connected to the power pin of the processor U71, the positive terminal of the battery BAT7 is directly connected to the power terminal 101, and the negative terminal of the battery BAT7 is indirectly connected to the ground pin of the processor U71, but the negative terminal of the battery BAT7 is not connected to the virtual ground 105.

[0132] A third switching device Q73 and a fourth switching device Q74 are also provided on the substrate of the ink cartridge chip 100, as well as resistors R72, R73 and a capacitor C71. The third switching device Q73 and the fourth switching device Q74 are both field-effect transistors. The gate of the fourth switching device Q74 is connected to the clock terminal 103, and the source is also connected to the power terminal 101. A resistor R72 is connected between the gate and the source.

[0133] The gate of the third switching device Q73 is connected to the drain of the fourth switching device Q74. The source of the third switching device Q73 is connected to the negative terminal of the battery BAT7, and the drain is connected to the ground pin of the processor U71. A first terminal of a capacitor C71 is connected to the gate of the third switching device Q73. The drain of the fourth switching device Q74 is also connected to the first terminal of the capacitor C71. The second terminal of the capacitor C71 is connected to the negative terminal of the battery BAT7. Therefore, the negative terminal of the battery BAT7 is indirectly connected to the ground pin of the processor U71 through the third switching device Q73.

[0134] A fifth switching device Q75 and a resistor R75 are provided between the chip select terminal 104 and the ground pin of the processor U71. The gate of the fifth switching device Q75 is connected to the chip select terminal 104, the source is connected to the negative terminal of the battery BAT7, the drain is connected to the ground pin of the processor U71, and the resistor R75 is connected between the gate and source of the fifth switching device Q75.

[0135] In addition, a sixth switching device Q76 is also provided on the substrate 100. The sixth switching device Q76 is also an N-type field effect transistor. Its control end, that is, the gate is connected to the chip select terminal 104, the source is connected to the clock terminal 103, and the drain is connected to the clock pin of the processor U71. There is a resistor R76 between the power terminal 101 and the drain of the sixth switching device Q76. The resistance of the resistor R76 is a preset multiple smaller than the equivalent resistance between the clock pin and the ground pin of the processor 71.

[0136] As shown in Figure 10, the sixth switch device Q76 is only in the on state when the chip select terminal 104 outputs a high-level signal and the clock terminal 103 outputs a low-level signal. At this time, the clock pin of the processor U71 is connected to ground, causing the clock pin of the processor U71 to be a low-level signal. When the chip select terminal 103 is a low-level signal or is left floating, the sixth switch device Q76 is in the off state. At this time, the voltage divided by the equivalent resistor between the clock pin and the ground pin of the processor U71 keeps the clock pin at a high-level signal. However, since the chip select terminal 103 is a low-level signal or is left floating, it indicates that the printing device does not need to communicate with the current ink cartridge chip, and the ink cartridge chip does not require a valid clock signal. Therefore, it does not affect the normal operation of the printing device.

[0137] In some other embodiments, two inverters can be connected in series between the clock terminal 103 and the clock pin of the processor U71 to isolate the input of the clock signal to prevent the voltage divided by the resistor R72 from being too high, causing the fourth switching device Q74 to erroneously enter the on state.

[0138] Eighth embodiment:

[0139] In view of the problem in the seventh embodiment that the fifth switch device Q75 may be triggered erroneously, this embodiment makes an improvement.

[0140] 11 , the ink cartridge chip 110 of this embodiment includes a substrate, on the surface of which a plurality of connection terminals are provided. The plurality of connection terminals include a power terminal 111 , a data terminal 112 , a clock terminal 113 and a chip select terminal 114 .

[0141] The contact pins of the inkjet printing device 30 include a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35. Each connection terminal of the ink cartridge chip 110 corresponds to a corresponding contact pin on the inkjet printing device. When the ink cartridge is installed in the inkjet printing device, each connection terminal is connected to the corresponding contact pin. For example, the power terminal 111 is electrically connected to the power contact pin 31, and so on. In this embodiment, the ink cartridge chip 110 does not have a ground terminal. Instead, a virtual ground 115 is formed, which is not electrically connected to the ground contact pin 35.

[0142] In addition, the power terminal 111 is directly connected to the power pin of the processor U81, the positive terminal of the battery BAT8 is directly connected to the power terminal 111, and the negative terminal of the battery BAT8 is indirectly connected to the ground pin of the processor U81, but the negative terminal of the battery BAT8 is not connected to the virtual ground 115.

[0143] A third switching device Q83 and a fourth switching device Q84 are also provided on the substrate of the ink cartridge chip 110, as well as resistors R82, R83 and a capacitor C81. The third switching device Q83 and the fourth switching device Q84 are both field effect transistors. The gate of the fourth switching device Q84 is connected to the clock terminal 113, and the source is also connected to the power supply terminal 111. A resistor R82 is connected between the gate and the source.

[0144] The gate of the third switching device Q83 is connected to the drain of the fourth switching device Q84. The source of the third switching device Q83 is connected to the negative terminal of the battery BAT8, and the drain is connected to the ground pin of the processor U81. A first terminal of a capacitor C81 is connected to the gate of the third switching device Q83. The drain of the fourth switching device Q84 is also connected to the first terminal of the capacitor C81. The second terminal of the capacitor C81 is connected to the negative terminal of the battery BAT8. Therefore, the negative terminal of the battery BAT8 is indirectly connected to the ground pin of the processor U81 through the third switching device Q83.

[0145] A fifth switching device Q85 and a resistor R85 are provided between the chip select terminal 114 and the ground pin of the processor U81. The gate of the fifth switching device Q85 is connected to the chip select terminal 114, the source is connected to the negative terminal of the battery BAT8, the drain is connected to the ground pin of the processor U81, and the resistor R85 is connected between the gate and source of the fifth switching device Q85.

[0146] In addition, a sixth switching device Q86 is also provided on the substrate 110. The sixth switching device Q86 is also an N-type field effect transistor, whose gate is connected to the chip select terminal 114, the source is connected to the clock terminal 113, and the drain is connected to the clock pin of the processor U81. There is a resistor R86 between the power terminal 111 and the drain of the sixth switching device Q86.

[0147] Compared to the seventh embodiment, this embodiment provides a first unidirectional conducting device between the chip select terminal 114 and the chip select pin of the processor U81. For example, the first unidirectional conducting device is a diode D81. The positive terminal of the diode D81 is connected to the chip select terminal 114, and the negative terminal is connected to the chip select pin of the processor U81. Therefore, the diode D81 only allows current to flow from the chip select terminal 114 to the chip select pin of the processor U81. The provision of the diode D81 can prevent the formation of an equivalent resistance between the chip select pin and the power supply terminal 111 after the processor U81 is powered on, and then forming a loop through the resistor R85 to the negative terminal of the battery BAT8, thereby causing the fifth switch device Q85 to be falsely triggered. At the same time, since the voltage drop of diode D81 is generally 0.4V to 0.7V, when the voltage of the chip select signal output by the inkjet printing device 30 is 3.3V at a high level, the signal voltage received at the chip select pin of the processor U81 is still 2.6V to 2.9V, which is still within the high level voltage threshold range and will not affect the communication with the inkjet printing device 30.

[0148] Ninth embodiment:

[0149] In the sixth embodiment, after certain inkjet printing devices have completed communication with the ink cartridge chip or have been powered off, if the positive terminal of the battery remains connected to the power terminal of the inkjet printing device, the battery may even leak electricity through the main control circuit board of the inkjet printing device to other communication terminals. For example, after the inkjet printing device stops supplying power to the ink cartridge chip, the potential difference between the chip select terminal of the inkjet printing device and the negative terminal of the battery may exceed 2V, causing the fifth switch device to reopen. To address this issue, this embodiment further improves the circuit.

[0150] Referring to Figure 12 , the ink cartridge chip 120 of this embodiment includes a substrate with a plurality of connection terminals disposed on its surface. The plurality of connection terminals include a power terminal 121, a data terminal 122, a clock terminal 123, and a chip select terminal 124. However, the ink cartridge chip 120 does not have a ground terminal, but instead forms a virtual ground 125.

[0151] The power terminal 121 is directly connected to the power pin of the processor U91, the positive terminal of the battery BAT9 is directly connected to the power terminal 121, and the negative terminal of the battery BAT9 is indirectly connected to the ground pin of the processor U91, but the negative terminal of the battery BAT9 is not connected to the virtual ground 125.

[0152] A third switching device Q93 and a fourth switching device Q94 are also provided on the substrate of the ink cartridge chip 120, as well as a resistor R93 and a capacitor C91. The third switching device Q93 and the fourth switching device Q94 are both field effect transistors, and the gate of the fourth switching device Q94 is connected to the clock terminal 123, and the source is also connected to the power terminal 121.

[0153] The gate of the third switching device Q93 is connected to the drain of the fourth switching device Q94. The source of the third switching device Q93 is connected to the negative terminal of the battery BAT9, and the drain is connected to the ground pin of the processor U91. A first terminal of the capacitor C91 is connected to the gate of the third switching device Q93. The drain of the fourth switching device Q94 is also connected to the first terminal of the capacitor C91. The second terminal of the capacitor C91 is connected to the negative terminal of the battery BAT9. Therefore, the negative terminal of the battery BAT9 is indirectly connected to the ground pin of the processor U91 through the third switching device Q93.

[0154] A fifth switching device Q95 and a resistor R95 are provided between the chip select terminal 124 and the ground pin of the processor U91. The gate of the fifth switching device Q95 is connected to the chip select terminal 124, the source is connected to the negative terminal of the battery BAT9, the drain is connected to the ground pin of the processor U91, and the resistor R95 is connected between the gate and source of the fifth switching device Q95.

[0155] This embodiment adds three P-type field-effect transistors (PFETs): seventh switching devices Q97, Q98, and Q99, between the positive terminal of the battery BAT9 and the power terminal 121. The gate of the seventh switching device Q97 is connected to an output pin P2 of the processor U91 via a first inverter U2A. Therefore, the seventh switching device Q97 is controlled on and off by the processor U91. Its source is connected to the positive terminal of the battery BAT9, and its drain is connected to the power terminal 121. That is, the seventh switching device Q97 is connected between the positive terminal of the battery BAT9 and the power terminal 121. The control terminal (gate) of the eighth switching device Q98 is connected to the clock terminal 123, its source is connected to the power terminal 121, and its drain is connected to the drain of the ninth switching device Q99. Therefore, the eighth switching device Q98 is connected between the power terminal 121 and the ninth switching device Q99. The gate of the ninth switching device Q99 is connected to another output pin P2 of the processor U91 through the second inverter U2B, so the ninth switching device Q99 is controlled by the processor U91 to be turned on and off, the source is connected to the positive terminal of the battery BAT9, and the drain is connected to the drain of the eighth switching device Q98, that is, the ninth switching device Q99 is connected between the positive terminal of the battery BAT9 and the eighth switching device Q98.

[0156] Initially, the ninth switch device Q99 is in the on state, while the eighth switch device Q98 determines its on state based on the voltage level at the clock terminal 121. To ensure that both the eighth switch device Q98 and the fourth switch device Q94 are in the on state when the ink cartridge signal is first powered on, this embodiment provides a resistor R97 between the clock terminal 123 and the chip select terminal 124. This ensures that both the eighth switch device Q98 and the fourth switch device Q94 are in the on state when the ink cartridge chip is first powered on. Furthermore, since the ninth switch device Q99 is also in the on state, the positive terminal of the battery BAT9 is connected to the power terminal 121 via the ninth and eighth switches Q99 and Q98, providing a common reference potential.

[0157] When the fourth switch device Q94 is turned on, the third switch device Q93 is turned on immediately, and the processor U91 is powered normally and enters the working state. At this time, the processor U91 continuously outputs a high-level signal through the output pin P2. The high-level signal becomes a low-level signal after passing through the first inverter U1A, thereby causing the seventh switch device Q97 to enter the on state. Keeping the seventh switch device Q97 in the on state can prevent the eighth switch device Q98 from being turned off after the clock signal is converted into a high-level signal, causing the positive end of the battery BAT9 to be unable to be connected to the power terminal 121.

[0158] After the inkjet printer device completes communication with the ink cartridge chip, if the positive terminal of the battery BAT9 still leaks electricity through the eighth and ninth switching devices Q98 and Q99, the processor U91 can detect the leakage voltage through the voltage detection pin ADC. At this point, it first continuously outputs a low-level signal through output pin P2, thereby turning off the seventh switching device Q97. Then, it temporarily outputs a low-level signal through output pin P1, temporarily turning off the ninth switching device Q99. Once the seventh and ninth switching devices Q97 and Q99 are turned off, the positive terminal of the battery BAT9 cannot leak electricity to the power terminal. Therefore, the eighth switching device Q98 also enters the off state. When the seventh, eighth, and ninth switching devices Q97, Q98, and Q99 are all turned off, the processor U91 also loses power, isolating the positive terminal of the battery BAT9 from the power terminal 121. Since the processor U91 no longer outputs a low-level signal after powering off, its output pin P1 no longer outputs a low-level signal, and the ninth switching device Q99 re-enters the on state. In this way, if the potential difference applied by the inkjet printing device is received between the gate and source of the eighth switching device Q98 again, the eighth switching device Q98 will enter the conductive state again, so that the processor U91 enters the working state again.

[0159] This embodiment provides two inverters U1A and U1B, preventing the battery BAT9 from leaking through the two output pins P1 and P2 and causing false triggering of the switching device, while also reducing the static power consumption of the processor U91. Furthermore, this embodiment provides a first unidirectional conducting device and a second unidirectional conducting device. The first unidirectional conducting device is a diode D91, and the second unidirectional conducting device is a diode D92. Diodes D91 and D92 are connected in series and connected between the chip select terminal 124 and the chip select pin of the processor U91. In particular, diode D92, provided between the voltage detection pin ADC of the processor U91 and the chip select terminal 124, only allows current to flow from the chip select terminal 124 to the voltage detection pin ADC, thereby preventing the power supply pin of the processor U91 from leaking through the chip select terminal 124 and affecting the reading of the voltage detection pin ADC. Preferably, both diodes D91 and D92 have a low forward voltage drop to prevent excessive voltage drop in the high-level chip select signal output by the inkjet printing device 30.

[0160] Tenth embodiment:

[0161] The ninth embodiment uses more devices. In order to reduce the production cost of the ink cartridge chip, this embodiment further improves the circuit.

[0162] Referring to Figure 13 , the ink cartridge chip of this embodiment includes a substrate with a plurality of connection terminals disposed on its surface. These terminals include a power terminal 131, a data terminal 132, a clock terminal 133, and a chip select terminal 134. However, the ink cartridge chip does not have a ground terminal, but instead forms a virtual ground 135.

[0163] The power terminal 131 is directly connected to the power pin of the processor U101. Three switching devices are also provided on the substrate of the ink cartridge chip, namely, the field effect transistor Q101 serving as the tenth switching device of this embodiment, the field effect transistor Q102 serving as the eleventh switching device of this embodiment, and the field effect transistor Q103 serving as the twelfth switching device of this embodiment. In addition, a resistor R101 is also provided on the substrate.

[0164] Output pin P1 of processor U101 is connected to the control terminal, or gate, of field-effect transistor Q103. Field-effect transistor Q103 has a drain connected to power supply terminal 131, and a source connected to the source of field-effect transistor Q102. Field-effect transistor Q102 also has a control terminal, or gate, connected to power supply terminal 131, and a drain connected to the control terminal, or gate, of field-effect transistor Q101. The source of field-effect transistor Q101 is connected to a first terminal of battery BAT10, a second terminal of battery BAT10 is connected to a ground pin of processor U101, and the second terminal of battery BAT10 is also connected to the source of field-effect transistor Q102 via resistor R101.

[0165] In the initial state, that is, when the ink cartridge chip is not installed in the inkjet printing device, or when it is installed in the inkjet printing device but the inkjet printing device does not output the driving voltage VCC, the ground pin of the processor U101 is used as the ground reference potential point. Since the resistance between the power pin and the ground pin of the processor U101 is much smaller than the resistance between the drain and the source when the field effect transistor Q101 is in the off state, the power terminal 131 is in a weak pull-down state, which can be considered as a low-level state. At this time, the field effect transistor Q102 is in the off state, the field effect transistor Q103 is also in the off state, and the battery BAT10 does not output the driving voltage to the processor U101, that is, it does not supply power to the processor U101. When the inkjet printer begins operating, the voltage output from power terminal 131 begins to rise. However, since the inkjet printer's clock pin is in a weak pull-down state, it can be understood that this pin is pulled down to the inkjet printer's ground through a relatively large resistor. Furthermore, since the inkjet printer's clock pin is directly connected to the inkjet printer's clock terminal 133, an equivalent impedance is formed between the processor U101's clock pin and the inkjet printer's ground pin. Consequently, an equivalent resistance of approximately 1MΩ is superimposed between the inkjet printer's ground and the second terminal of battery BAT10. Consequently, after the DC voltage output from the inkjet printer increases, the gate voltage of field-effect transistor Q102 is higher than the source voltage of field-effect transistor Q102. Because the resistance of resistor R101 is much smaller than the equivalent resistance between the inkjet printer's ground and the second terminal of battery BAT10, field-effect transistor Q102 turns on. After the FET Q102 is turned on, the second end of the battery BAT101 is connected to the gate of the FET Q101 through the resistor R101, so that the FET Q101 is also turned on, and the battery BAT10 discharges to the processor U101 through the FET Q101.

[0166] When the inkjet printing device begins to lose power, the voltage at power terminal 131 gradually decreases rather than immediately dropping to zero. Therefore, FET Q101 remains on for a period of time. During this period, reverse leakage from battery BAT10 flows into the inkjet printing device, and this leakage voltage is fed to the voltage detection pin ADC of processor U101 via chip select terminal 134. When ADC detects a persistent leakage voltage, processor U101 deems the inkjet printing device to have lost power. At this point, it outputs a high level via output pin P1, turning on FET Q103. After FET Q103 turns on, the source power supply of FET Q102 becomes equal to the voltage at power terminal 131. At this point, FET Q102 turns off, and FET Q101 also turns off, halting battery BAT101's supply to processor U101. After the inkjet printing device is powered off, the field effect transistor Q102 will return to its initial state, and the ink cartridge chip will also return to its initial state, waiting for the next power-on of the inkjet printing device.

[0167] It can be seen that this embodiment can achieve control of the battery working state by using fewer devices, thereby reducing the production cost of the ink cartridge chip.

[0168] Eleventh embodiment:

[0169] This embodiment improves upon the tenth embodiment. Referring to FIG. 14 , the ink cartridge chip of this embodiment comprises a substrate having a plurality of connection terminals disposed on its surface. The plurality of connection terminals include a power terminal 141, a data terminal 142, a clock terminal 143, and a chip select terminal 144. However, the ink cartridge chip does not have a ground terminal, but instead forms a virtual ground 145.

[0170] Power terminal 141 is directly connected to a power pin of processor U111. Output pin P1 of processor U111 is connected to the gate of field-effect transistor Q113. The drain of field-effect transistor Q113 is connected to power terminal 141, and the source is connected to the source of field-effect transistor Q112. The gate of field-effect transistor Q112 is also connected to power terminal 141, and the drain is connected to the gate of field-effect transistor Q111. The source of field-effect transistor Q111 is connected to a first terminal of battery BAT11. The second terminal of battery BAT11 is connected to a ground pin of processor U111. The second terminal of battery BAT11 is also connected to the source of field-effect transistor Q112 via resistor R111.

[0171] Compared to the tenth embodiment, this embodiment adds a voltage-reducing device, namely, a diode D111, between chip select terminal 144 and the chip select pin of processor U111. The positive terminal of diode D111 is connected to chip select terminal 144, and the negative terminal is connected to the chip select pin of processor U111. Furthermore, processor U111 does not have a voltage detection pin, so a processor without a voltage detection function can be used, thereby reducing the production cost of ink cartridge chips. The purpose of providing diode D111 in this embodiment is to reduce the voltage of the chip select signal received by processor U111. For example, if the voltage of the high-level signal output from chip select terminal 144 is 3.3V, after passing through diode D111, the voltage of the chip select signal received by processor U111 is 2.6V. Thus, during normal operation, the chip select signal received by the processor U111 still has a voltage of 2.6V when at a high level, and the processor U111 can still recognize that it is a high-level chip select signal. When the inkjet printing device loses power and the battery BAT11 leaks back into the inkjet printing device, the voltage recognized by the chip select pin of the processor U111 is approximately 1.5V, and therefore it will be recognized as a low level. In this way, the processor U111 can identify whether the inkjet printing device has lost power by determining whether the chip select signal is at a low level within a preset time. The operating principle of the ink cartridge chip of this embodiment is basically the same as that of the tenth embodiment and will not be repeated here. Of course, in some other embodiments, it can also be set to determine the duration of the chip select signal being at a low level after the instruction ends, so as to improve the stability of the ink cartridge chip data reading and writing.

[0172] Of course, in some other embodiments, if there is no leakage voltage on the chip select terminal or the leakage voltage is lower than the high level voltage threshold after some inkjet printing devices are powered off, the diode D111 may not be provided.

[0173] Twelfth embodiment:

[0174] This embodiment is an improvement on the tenth embodiment. Referring to FIG. 15 , the ink cartridge chip of this embodiment includes a substrate with a plurality of connection terminals disposed on its surface. The plurality of connection terminals include a power terminal 151, a data terminal 152, a clock terminal 153, and a chip select terminal 154. However, the ink cartridge chip does not have a ground terminal, but instead forms a virtual ground 155.

[0175] Power terminal 151 is directly connected to a power pin of processor U121. Output pin P1 of processor U121 is connected to the gate of field-effect transistor Q123. The drain of field-effect transistor Q123 is connected to power terminal 151, and the source is connected to the source of field-effect transistor Q122. The gate of field-effect transistor Q122 is also connected to power terminal 151, and the drain is connected to the gate of field-effect transistor Q121. The source of field-effect transistor Q121 is connected to the first terminal of battery BAT12. The second terminal of battery BAT12 is connected to the ground pin of processor U121. The second terminal of battery BAT12 is also connected to the source of field-effect transistor Q122 through resistor R121.

[0176] Unlike the tenth embodiment, this embodiment adds a voltage-reducing device, namely, a diode D121, between the clock terminal 153 and the clock pin of the processor U121. The positive terminal of the diode D121 is connected to the clock terminal 153, and the negative terminal is connected to the clock pin of the processor U121. Furthermore, the processor U121 does not have a voltage detection pin, so a processor without a voltage detection function can be used, thereby reducing the production cost of the ink cartridge chip.

[0177] Furthermore, the chip select terminal 154 of this embodiment is not connected to the chip select pin of the processor U121. Therefore, a chip select pin need not be provided on the substrate. With this design, communication with the inkjet printing device can be performed using the communication method disclosed in Chinese Invention Patent Application Publication No. CN116483292A. The ink cartridge chip of this embodiment determines whether the inkjet printing device has experienced a power failure by determining whether the clock signal is at a low level within a preset time. The remaining operating principles are essentially the same as those of the tenth embodiment and will not be further described.

[0178] Thirteenth embodiment:

[0179] This embodiment improves upon the twelfth embodiment. Referring to FIG. 16 , the ink cartridge chip of this embodiment comprises a substrate having a plurality of connection terminals disposed on its surface. The plurality of connection terminals include a power terminal 161, a data terminal 162, a clock terminal 163, and a chip select terminal 164. However, the ink cartridge chip does not have a ground terminal, but instead forms a virtual ground 165.

[0180] Power terminal 161 is directly connected to a power pin of processor U131. Output pin P1 of processor U131 is connected to the gate of field-effect transistor Q133. The drain of field-effect transistor Q133 is connected to power terminal 131, and the source is connected to the source of field-effect transistor Q132. The gate of field-effect transistor Q132 can receive the voltage output from power terminal 151, and its drain is connected to the gate of field-effect transistor Q131. The source of field-effect transistor Q131 is connected to the first terminal of battery BAT13, the second terminal of battery BAT13 is connected to the ground pin of processor U131, and the second terminal of battery BAT13 is also connected to the source of field-effect transistor Q132 via resistor R131. A diode D131 is provided between clock terminal 163 and a clock pin of processor U131. The anode terminal of diode D131 is connected to clock terminal 163, and the cathode terminal is connected to the clock pin of processor U131.

[0181] Compared to the twelfth embodiment, this embodiment further adds a voltage-reducing device, namely, a diode D132, between the power terminal 161 and the gate of the field-effect transistor Q132. The positive terminal of diode D132 is connected to the power terminal 161, and the negative terminal is connected to the gate of the field-effect transistor Q132. The purpose of diode D132 is to reduce the voltage applied to the gate of the field-effect transistor Q132. When the processor U131 detects a power failure in the inkjet printing device and output pin P1 outputs a high level, the voltage at output pin P1 rises rapidly. After reaching the conduction threshold voltage of the field-effect transistor Q133, the field-effect transistor Q133 turns on, the field-effect transistor Q132 turns off, and the field-effect transistor Q131 also turns off. At this point, the voltage at power terminal 161 begins to decrease. When the voltage at power terminal 161 drops to the minimum voltage required for processor U131 operation, processor U131 ceases operation, and output pin P1 no longer outputs a high-level signal. However, since the power terminal 161 still has a relatively high voltage, for example, 2.8V, if diode D132 is not provided, the FET Q132 will likely turn on again. Thus, by providing diode D132, the processor U131 can turn on the FET Q132 only when the drive voltage output by the inkjet printing device is sufficiently high. Furthermore, the FET Q132 can be automatically turned off before the voltage at the power terminal 161 drops below the minimum voltage required for the processor U131 to operate. Of course, in other embodiments, a resistor with a larger resistance value can be used in place of the diode D132.

[0182] Since the power-on and power-off times of the processor U131 are substantially synchronized with those of the inkjet printing device, for a solution using a battery and shielding the ground terminal 165, even if the inkjet printing device pulls down each communication terminal to ground upon powering up, the processor U131 is still in the initialization phase and has not yet begun receiving data. Therefore, the processor U131 will not mistakenly interpret this action as a single bit of data. Of course, in other embodiments, a capacitor may be added between the power terminal 161 and the second end of the battery BAT13 to delay the power-on time of the processor U131, thereby ensuring that the inkjet printing device pulls down the communication terminals to ground before the processor U131 completes initialization.

[0183] In the above embodiments, the ink cartridge chip is not provided with a ground terminal. In actual application, a ground terminal may also be provided on the ink cartridge chip, but an insulating component may be provided on the surface of the ground terminal. For example, the insulating component is a layer of insulating film, and the insulating film covers the contact terminal, so that the ground contact pin of the inkjet printing device is electrically insulated from the ground terminal.

[0184] Because the ink cartridge chip contains a capacitor or battery, it maintains a stable voltage difference between the power terminal and the ground pin of the electronic module. This provides a stable voltage to the electronic module to maintain its operation. Furthermore, the electronic module can determine the voltage levels of the data pin, clock pin, and chip select pin based on the voltages of the power and ground pins, thereby enabling communication between the inkjet printer and the ink cartridge. Therefore, even if there is a foreign object at the ground terminal, it will not affect the operation of the ink cartridge. Industrial Applicability

[0185] The consumable chip of the present invention can be detachably mounted on a consumable container, which can be an ink cartridge used in an inkjet printer. Because the consumable chip does not require a ground terminal, the area of ​​the consumable chip's circuit board can be reduced, and the communication between the cartridge chip and the inkjet printer can be prevented from being affected by foreign matter falling onto the connection terminals.

[0186] The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. The above content is only an embodiment adopted to facilitate understanding of the present invention and is not intended to limit the present invention. Any person skilled in the art can make any modifications and changes in the form and details of implementation without departing from the technical scope disclosed by the present invention, which should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A consumable chip comprising a substrate, an electronic module and a plurality of connection terminals disposed on a surface of the substrate, the electronic module having a plurality of pins, each of the connection terminals being connected to a corresponding pin; Its characteristics are: The plurality of connection terminals do not include a ground terminal, or the ground terminal among the connection terminals is blocked by an electrical insulating component; The plurality of connection terminals include a power terminal, the plurality of pins include a power pin, the power terminal is connected to the power pin, and the power terminal is directly or indirectly connected to the first end of the power supply device; The plurality of pins further include a ground pin, which is directly or indirectly connected to the second end of the power supply device.

2. The consumable chip according to claim 1, wherein: The power supply device is a first capacitor, a first end of the first capacitor is directly connected to the power terminal, and a second end of the first capacitor is directly connected to the ground pin; The plurality of connection terminals further include at least one communication terminal, the plurality of pins further include a communication pin, and each of the communication terminals is connected to a corresponding communication pin; A unidirectional conductive device or a controlled conductive device is connected between the second end of the first capacitor and at least one of the communication terminals.

3. The consumable chip according to claim 2, wherein: The unidirectional conducting device is a diode, an anode terminal of the diode is connected to the second end of the first capacitor, and a cathode terminal of the diode is connected to the connection terminal.

4. The consumable chip according to claim 2, wherein: The controlled conduction device includes a first switching device, wherein a control terminal of the first switching device receives a signal output by the power terminal.

5. The consumable chip according to claim 1, wherein: The power supply device is a battery, the positive terminal of the battery is directly or indirectly connected to the power terminal, and the negative terminal of the battery is directly or indirectly connected to the ground pin.

6. The consumable chip according to claim 5, wherein: A second switching device is further provided between the power terminal and the positive terminal of the battery; or A second switch device is connected between the negative terminal of the battery and the ground pin.

7. The consumable chip according to claim 6, wherein: The second switching device is a mechanical switch or an electronic switch.

8. The consumable chip according to claim 6, wherein: The second switch device is a push switch; or The second switching device is an insulating film connected between the battery and the substrate.

9. The consumable chip according to claim 1, wherein: The first end of the power supply device is directly connected to the power terminal, the plurality of connection terminals further include at least one communication terminal, the plurality of pins further include a communication pin, and each of the communication terminals is connected to the corresponding communication pin; A third switching device is provided on the substrate, the second end of the power supply device is connected to the ground pin through the third switching device, the control end of the third switching device is connected to the fourth switching device, the control end of the fourth switching device is connected to the communication terminal, and the fourth switching device is also connected to the first end of the second capacitor. When the fourth switching device is turned on, the second capacitor is charged, and when the fourth switching device is turned off, the second capacitor discharges to the control end of the third switching device.

10. The consumable chip according to claim 9, wherein: The third switching device is a field effect transistor, and the control end of the third switching device is also connected to the first end of the second capacitor.

11. The consumable chip according to claim 9, wherein: The fourth switching device is a field effect transistor, and a source of the fourth switching device is connected to the power terminal.

12. The consumable chip according to claim 11, wherein: The second terminal of the second capacitor is directly connected to the second terminal of the power supply device.

13. The consumable chip according to any one of claims 9 to 12, wherein: The plurality of communication pins include a chip select pin, the control end of the fifth switch device is connected to the chip select pin, and the second end of the power supply device is connected to the ground pin through the fifth switch device.

14. The consumable chip according to any one of claims 9 to 12, wherein: The plurality of communication pins include a chip select pin and a clock pin, and the plurality of communication terminals include a chip select terminal and a clock terminal; A control terminal of a sixth switch device is connected to the chip select terminal, and the sixth switch device is further connected between the clock terminal and the clock pin.

15. The consumable chip according to claim 14, wherein: A first unidirectional conducting device is connected between the chip select terminal and the chip select pin, and the first unidirectional conducting device only allows current to flow from the chip select terminal to the chip select pin.

16. The consumable chip according to any one of claims 9 to 12, wherein: The plurality of communication terminals include a clock terminal, and the substrate is further provided with a seventh switching device, an eighth switching device and a ninth switching device; The seventh switch device is controlled to be turned on and off by the electronic module, and the seventh switch device is connected between the first end of the power supply device and the power terminal; The control terminal of the eighth switching device is connected to the clock terminal, and the eighth switching device is connected between the power terminal and the ninth switching device; The ninth switch device is controlled to be turned on and off by the electronic module, and the ninth switch device is connected between the first end of the power supply device and the eighth switch device.

17. The consumable chip according to claim 16, wherein: A first inverter is connected between an output pin of the electronic module and the control terminal of the seventh switch device; A second inverter is connected between another output pin of the electronic module and the control terminal of the ninth switching device.

18. The consumable chip according to claim 16, wherein: The plurality of communication terminals include a chip select terminal; The electronic module is provided with a voltage detection pin. A second unidirectional conductive device is provided between the voltage detection pin and the chip select terminal. The second unidirectional conductive device only allows current to flow from the chip select terminal to the voltage detection pin.

19. The consumable chip according to claim 16, wherein: The seventh switching device, the eighth switching device and the ninth switching device are all field effect transistors.

20. The consumable chip according to claim 5, wherein: The plurality of connection terminals include at least one communication terminal; The electronic module includes a processor, which obtains the voltage signal of the communication terminal and determines whether the printing device is powered off according to the obtained voltage signal. If the printing device is powered off, the battery stops supplying power to the electronic module.

21. The consumable chip according to claim 20, wherein: A tenth switching device is provided on the substrate, the first end of the power supply device is connected to the power terminal through the tenth switching device, the control end of the tenth switching device is connected to an eleventh switching device, and the control end of the eleventh switching device is directly or indirectly connected to the power terminal; When the processor determines that the printing device is powered off, the processor outputs a control signal to the twelfth switching device to control the on / off state of the eleventh switching device to change, so that the tenth switching device is turned off.

22. The consumable chip according to claim 21, wherein: A voltage reducing device is further connected between the control end of the eleventh switching device and the power terminal.

23. The consumable chip according to claim 21, wherein: The processor detects the voltage of the communication terminal through a voltage detection pin.

24. A consumables container, detachably mounted on a printing device, the consumables container comprising: A box body is formed with a cavity therein, wherein printing consumables are accommodated in the cavity, and a consumables outlet is provided on one side of the cavity; Its characteristics are: The consumable chip according to any one of claims 1 to 23 is arranged on the outer wall of the box body.

25. A printing device comprising a body, wherein a main control circuit board is disposed in the body, characterized in that: One or more consumable material containers as claimed in claim 24 are installed in the printing device.

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