Production method for semiconductor device, semiconductor device, and vehicle

Abstract

A semiconductor device according to the present invention comprises a heat dissipation member, a substrate, and a semiconductor element. The heat dissipation member has a principal surface that faces one side in a first direction, a back surface that faces the other side in the first direction, and a heat dissipation part that protrudes from the back surface to the other side in the first direction. The substrate has a conductive layer and is joined to the principal surface. The semiconductor element is joined to the conductive layer. The heat dissipation member also has a recess that is recessed from the back surface to the one side in the first direction. In one example, the heat dissipation part has a protrusion that protrudes in a direction that is orthogonal to the first direction.

Description

Semiconductor device manufacturing method, semiconductor device and vehicle

[0001] The present disclosure relates to a method for manufacturing a semiconductor device, a semiconductor device obtained by the manufacturing method, and a vehicle equipped with the semiconductor device.

[0002] Conventionally, semiconductor devices equipped with semiconductor elements (such as MOSFETs and IGBTs) having switching functions have been widely known and are primarily used for power conversion. Patent Document 1 discloses an example of such a semiconductor device. The semiconductor device disclosed in this document includes a substrate (a heat sink in Patent Document 1) on which the semiconductor elements are mounted, a sealing resin (a sealing body in Patent Document 1) that covers a portion of the substrate and the semiconductor elements, and a heat dissipation member (a heat dissipation fin in Patent Document 1) that faces the substrate. The sealing resin is attached to the heat dissipation member via screws. This improves the heat dissipation performance of the semiconductor device.

[0003] In addition to the semiconductor device disclosed in Patent Document 1, a semiconductor device in which a substrate is bonded to a heat dissipation member via a bonding member is also conceivable. In such a semiconductor device, the work of attaching a sealing resin to the heat dissipation member is unnecessary. When bonding the substrate to a heat dissipation member having heat dissipation pins as a heat dissipation part, for example, if bonding is performed while applying pressure using solid-state diffusion bonding or the like, there is a possibility that the heat dissipation pins will buckle due to the pressure.

[0004] International Publication No. 2019 / 239997

[0005] [Summary] An object of the present disclosure is to provide an improved semiconductor device. In particular, in view of the above circumstances, an object of the present disclosure is to provide a method for manufacturing a semiconductor device in which a substrate is bonded to a heat dissipation member, and which can reduce the possibility of the heat dissipation portion buckling during bonding, and to provide a semiconductor device manufactured by the manufacturing method.

[0006] A semiconductor device provided by a first aspect of the present disclosure comprises a heat dissipation member having a main surface facing one side in a first direction, a back surface facing the other side in the first direction, and a heat dissipation portion protruding from the back surface to the other side in the first direction, a substrate having a conductive layer and bonded to the main surface, and a semiconductor element bonded to the conductive layer, wherein the heat dissipation member further comprises a recess recessed from the back surface to one side in the first direction.

[0007] A vehicle provided by a second aspect of the present disclosure includes a drive source and the semiconductor device provided by the first aspect of the present disclosure, the semiconductor device being electrically connected to the drive source.

[0008] A manufacturing method of a semiconductor device provided by a third aspect of the present disclosure includes a first step of joining a substrate to a main surface of a heat dissipation member having a main surface facing one side in a first direction, a back surface facing the other side in the first direction, and a heat dissipation portion protruding from the back surface to the other side in the first direction, while applying pressure with a pressure device, and a mold to which the heat dissipation member is fixed has an abutment portion that abuts against the back surface.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1. FIG. 3 is a right side view of the semiconductor device shown in FIG. 1. FIG. 4 is a front view of the semiconductor device shown in FIG. 1. FIG. 5 is a rear view of the semiconductor device shown in FIG. 1. FIG. 6 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 7 is a plan view corresponding to FIG. 2, taken through the sealing resin and omitting the illustration of the heat dissipation member. FIG. 8 is a plan view corresponding to FIG. 2, taken through the sealing resin and omitting the illustration of the second conductive member and the heat dissipation member. FIG. 9 is a plan view corresponding to FIG. 2, taken through the sealing resin and omitting the illustration of the first conductive member, the second conductive member, and the heat dissipation member. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 7. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 7. FIG. 12 is a partially enlarged view of the first semiconductor element and its periphery shown in FIG. 11. 13 is a partial enlarged view of the second semiconductor element and its periphery shown in FIG. 11 . FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 7 . FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 7 . FIG. 16 is a partial enlarged view of FIG. 10 . FIG. 17 is a partial enlarged view of FIG. 10 . FIG. 18 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 19 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 20 is a plan view of a mold used in the manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 21 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 22 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 23 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 24 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 25 is a schematic diagram of a vehicle equipped with the semiconductor device shown in FIG. 1 . FIG. 26 is a bottom view illustrating a semiconductor device according to a first modified example of the first embodiment of the present disclosure. FIG. 27 is a bottom view illustrating a semiconductor device according to a second modified example of the first embodiment of the present disclosure. Fig. 28 is a bottom view showing a semiconductor device according to a third modified example of the first embodiment of the present disclosure. Fig. 29 is a bottom view showing a semiconductor device according to a fourth modified example of the first embodiment of the present disclosure. Fig. 30 is a cross-sectional view showing a semiconductor device according to a fifth modified example of the first embodiment of the present disclosure. Fig. 31 is a cross-sectional view showing a semiconductor device according to a sixth modified example of the first embodiment of the present disclosure.32 is a partially enlarged cross-sectional view showing a semiconductor device according to a seventh modified example of the first embodiment of the present disclosure. FIG. 33 is a partially enlarged cross-sectional view showing a semiconductor device according to an eighth modified example of the first embodiment of the present disclosure. FIG. 34 is a bottom view of a semiconductor device according to a second embodiment of the present disclosure. FIG. 35 is a plan view of a mold used in the manufacturing process of the semiconductor device shown in FIG. 34. FIG. 36 is a cross-sectional view of a semiconductor device according to a third embodiment of the present disclosure. FIG. 37 is a cross-sectional view illustrating the manufacturing process of the semiconductor device shown in FIG. 36. FIG. 38 is a cross-sectional view illustrating the manufacturing process of the semiconductor device shown in FIG. 36. FIG. 39 is a perspective view of a semiconductor device according to a fourth embodiment of the present disclosure. FIG. 40 is a plan view of a semiconductor device according to a fifth embodiment of the present disclosure. FIG. 41 is a right side view of the semiconductor device shown in FIG. 40. FIG. 42 is a plan view of a semiconductor device according to a sixth embodiment of the present disclosure. FIG. 43 is a bottom view of the semiconductor device shown in FIG. 42.

[0011] DETAILED DESCRIPTION The present disclosure will be described in detail with reference to the accompanying drawings.

[0012] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 17 . The semiconductor device A10 includes a substrate 11, a bonding member 19, a first power terminal 13, two second power terminals 14, two third power terminals 15, a plurality of semiconductor elements 20, a first bonding layer 29, a first conductive member 31, a second conductive member 32, a second bonding layer 39, a sealing resin 50, and a heat dissipation member 70. The semiconductor device A10 further includes a first signal terminal 161, a second signal terminal 162, a third signal terminal 171, a fourth signal terminal 172, two fifth signal terminals 181, two sixth signal terminals 182, two thermistors 23, a first terminal support 61, and a second terminal support 62. For ease of understanding, FIGS. 7 to 9 show views through the sealing resin 50 and omit the heat dissipation member 70. 7 to 9, the transmitted sealing resin 50 is indicated by an imaginary line (two-dot chain line). For ease of understanding, the second conductive member 32 is also omitted from illustration in Fig. 8. For ease of understanding, the first conductive member 31 and the second conductive member 32 are also omitted from illustration in Fig. 9.

[0013] In the description of the semiconductor device A10, for convenience, the normal direction to a main surface 711 of a heat dissipation member 70 (described later) is referred to as the "first direction z." The direction perpendicular to the first direction z is referred to as the "second direction x." The direction perpendicular to both the first direction z and the second direction x is referred to as the "third direction y."

[0014] The semiconductor device A10 converts DC power input to the first power terminal 13 and the two second power terminals 14 into AC power using a plurality of semiconductor elements 20. The converted AC power is input from each of the two third power terminals 15 to a power supply target such as a motor.

[0015] The heat dissipation member 70 is used to cool the semiconductor device A10. The heat dissipation member 70 contains a metal, such as aluminum (Al) or copper (Cu).

[0016] As shown in FIGS. 3 to 5 , the heat dissipation member 70 has a base 71 and a heat dissipation portion 72. The base 71 is flat. The base 71 has a main surface 711, multiple end surfaces 712, a back surface 713, and a recess 714. The main surface 711 and the back surface 713 face opposite each other in the first direction z. The main surface 711 faces one side in the first direction z. In the semiconductor device A10, a portion of the main surface 711 is exposed from the sealing resin 50. The back surface 713 faces the other side in the first direction z. The back surface 713 is exposed from the sealing resin 50. Multiple end surfaces 712 are connected to the main surface 711 and the back surface 713. Each of the multiple end surfaces 712 faces a direction perpendicular to the first direction z. Each of the multiple end surfaces 712 is exposed from the sealing resin 50. 17 , the base 71 includes a plating layer 71a disposed closest to the main surface 711 in the first direction z. The plating layer 71a is made of silver (Ag). In some cases, the base 71 may not include the plating layer 71a.

[0017] As shown in FIGS. 3 to 5 , the heat dissipation portion 72 is connected to the base portion 71. The heat dissipation portion 72 protrudes from the rear surface 713 toward the other side in the first direction z. In the semiconductor device A10, the heat dissipation portion 72 is a plurality of rod-shaped heat dissipation pins 721 extending in the first direction z. As shown in FIG. 6 , each of the plurality of heat dissipation pins 721 has a circular cross section perpendicular to the first direction z. The plurality of heat dissipation pins 721 are arranged in a staggered manner as viewed in the first direction. That is, the plurality of heat dissipation pins 721 are arranged at equal intervals apart from one another in the second direction x, and rows aligned in the second direction x are arranged alternately with their positions in the second direction x shifted from adjacent rows. As viewed in the first direction z, the heat dissipation portion 72 is located inward of the periphery 501 of the sealing resin 50.

[0018] As shown in FIGS. 10 , 11 , 14 , and 15 , the recess 714 of the base 71 is recessed from the back surface 713 to one side in the first direction z. As shown by dotted lines in FIG. 6 , the recess 714 is disposed between the multiple heat dissipation pins 721 on the back surface 713. In the semiconductor device A10, the recesses 714 are connected together. As shown in FIG. 6 , a portion of the back surface 713 is located between the recess 714 and the heat dissipation pin 721 when viewed in the first direction z. In this embodiment, the area S1 of the bottom surface of the recess 714, which is the surface facing the other side in the first direction z, is larger than the area S2 obtained by adding together the areas of the tip surfaces of the multiple heat dissipation pins 721, which are the surfaces facing the other side in the first direction z. It is desirable that the area S1 be at least twice the area S2. The area S1 may be equal to or smaller than the area S2. The recess 714 is formed by pressing a mold for fixing the heat dissipation member 70 against the base 71 in the step of joining the substrate 11 to the main surface 711 of the heat dissipation member 70 in the manufacturing process described below.

[0019] As shown in Figures 6, 10, 11, 14, and 15, the base 71 of the heat dissipation member 70 is provided with an engagement portion 73 recessed from the main surface 711. A portion of the sealing resin 50 is accommodated in the engagement portion 73. As shown in Figures 2 and 6, the base 71 of the heat dissipation member 70 is provided with a positioning hole 74 penetrating in the first direction z. The positioning hole 74 is a portion for positioning the heat dissipation member 70 when it is placed in a mold. The number and arrangement of the positioning holes 74 are not limited. If another positioning method is used, the heat dissipation member 70 does not need to have the positioning hole 74.

[0020] 16 , the heat dissipation member 70 has an inner circumferential surface 715 that is connected to the main surface 711 and defines the engagement portion 73. The inner circumferential surface 715 is included in the base portion 71. The sealing resin 50 is in contact with the inner circumferential surface 715.

[0021] As shown in FIGS. 10 , 11 , 14 , and 15 , the sealing resin 50 covers the substrate 11, the first conductive layer 121, the second conductive layer 122, the multiple semiconductor elements 20, the first conductive member 31, and the second conductive member 32. The sealing resin 50 also covers a portion of each of the first power terminal 13, the third power terminal 15, and the second power terminal 14. The sealing resin 50 has electrical insulation properties. The sealing resin 50 is made of a material containing, for example, black epoxy resin. As shown in FIG. 2 , the sealing resin 50 is located inward from the periphery 701 of the heat dissipation member 70 when viewed in the first direction z. As shown in FIGS. 3 to 5 , the sealing resin 50 has a top surface 51, a bottom surface 52, a first side surface 53, a second side surface 54, and multiple recesses 55.

[0022] 10 , 11 , 14 , and 15 , top surface 51 faces the side where first conductive layer 121 and second conductive layer 122 are located with base material 11 as the reference in first direction z. That is, top surface 51 faces the same side as main surface 711 of heat dissipation member 70 in first direction z. Bottom surface 52 faces the side opposite top surface 51 in first direction z. As shown in FIGS. 10 , 11 , 14 , and 15 , bottom surface 52 is in contact with main surface 711.

[0023] 3 and 4, the first side surface 53 and the second side surface 54 are spaced apart from each other in the second direction x. The first side surface 53 and the second side surface 54 face in opposite directions from each other in the second direction x.

[0024] 2, 4, and 5, each of the multiple recesses 55 is recessed from the top surface 51 and either the first side surface 53 or the second side surface 54. The multiple recesses 55 include a first recess 55A, two second recesses 55B, and two third recesses 55C. The first recess 55A and the two second recesses 55B are each connected to the first side surface 53. In the third direction y, the first recess 55A is located between the two second recesses 55B. The two third recesses 55C are connected to the second side surface 54. The two third recesses 55C are spaced apart from each other in the third direction y.

[0025] As shown in FIGS. 10 , 11 , 14 , and 15 , the substrate 11 is bonded to the main surface 711 of the heat dissipation member 70. In the semiconductor device A10, the substrate 11 is formed, for example, from a DBC (Direct Bonded Copper) substrate. The substrate 11 may also be formed from an AMB (Active Metal Brazing) substrate. The substrate 11 has an insulating layer 111, a metal layer 112, a first conductive layer 121, and a second conductive layer 122. The substrate 11 is covered with a sealing resin 50.

[0026] As shown in Figures 10, 11, 14, and 15, the metal layer 112 is bonded to the main surface 711 of the heat dissipation member 70. The metal layer 112 contains copper (Cu). As shown in Figure 17, the metal layer 112 includes a plating layer 112a that is located on the outermost side in the first direction z (the side farthest from the insulating layer 111 in the first direction). The plating layer 112a is made of silver (Ag). In some cases, the metal layer 112 may not include the plating layer 112a. When viewed in the first direction z, the metal layer 112 is located inward from the periphery 111A of the insulating layer 111.

[0027] As shown in Figures 10, 11, 14, and 15, the insulating layer 111 is located between the metal layer 112 and the first and second conductive layers 121 and 122 in the first direction z. That is, the insulating layer 111 is located between the main surface 711 of the heat dissipation member 70 and the first and second conductive layers 121 and 122. The metal layer 112 is also bonded to the insulating layer 111. The insulating layer 111 is made of a material with relatively high thermal conductivity. The insulating layer 111 is made of ceramics containing aluminum nitride (AlN), for example. The insulating layer 111 may be made of an insulating resin sheet instead of ceramics.

[0028] As shown in FIGS. 10 , 11 , 14 , and 15 , the first conductive layer 121 and the second conductive layer 122 are located on the opposite side of the insulating layer 111 from the metal layer 112. Each of the first conductive layer 121 and the second conductive layer 122 is bonded to the insulating layer 111. As shown in FIGS. 8 and 9 , each of the first conductive layer 121 and the second conductive layer 122 is located inward from the periphery 111A of the insulating layer 111. Each of the first conductive layer 121 and the second conductive layer 122 contains copper. The first conductive layer 121 and the second conductive layer 122 are spaced apart from each other in the second direction x. The dimension of each of the first conductive layer 121 and the second conductive layer 122 in the first direction z is greater than the dimension of the insulating layer 111 in the first direction z. The first conductive layer 121 has a first mounting surface 121A that faces the same side as the main surface 711 of the heat dissipation member 70 in the first direction z. The first mounting surface 121A faces the multiple semiconductor elements 20. The second conductive layer 122 has a second mounting surface 122A that faces the same side as the first mounting surface 121A in the first direction z.

[0029] 10 , 11 , 14 , and 15 , the bonding member 19 is interposed between the main surface 711 of the heat dissipation member 70 and the metal layer 112, and bonds the main surface 711 of the heat dissipation member 70 and the metal layer 112. The bonding member 19 is covered with a sealing resin 50. In this embodiment, the bonding member 19 is a metal foil having a thickness dimension (dimension in the first direction z) of about 100 μm.

[0030] As shown in FIG. 17 , the joining member 19 includes a first metal layer 191, a second metal layer 192, and a third metal layer 193. The first metal layer 191 is the main body of the joining member 19 and is made of, for example, aluminum (Al) or an Al alloy. The second metal layer 192 is laminated on one side of the first metal layer 191 in the first direction z (on the same side as the base material 11 relative to the first metal layer 191 in the first direction z). The second metal layer 192 is made of silver (Ag). A nickel (Ni) layer in contact with the first metal layer 191 and a copper (Cu) layer in contact with the second metal layer 192 are laminated between the first metal layer 191 and the second metal layer 192 as intermediate layers (not shown). The third metal layer 193 is laminated on the other side of the first metal layer 191 in the first direction z (on the same side as the heat dissipation member 70 relative to the first metal layer 191 in the first direction z). The third metal layer 193 is made of silver (Ag). Between the first metal layer 191 and the third metal layer 193, a nickel (Ni) layer in contact with the first metal layer 191 and a copper (Cu) layer in contact with the third metal layer 193 are stacked as intermediate layers (not shown). That is, a second metal layer 192 and a third metal layer 193 made of silver (Ag) are disposed on both ends of the bonding member 19 in the first direction z. Each intermediate layer is formed by, for example, plating the first metal layer 191. The second metal layer 192 and the third metal layer 193 are each formed by, for example, plating the respective intermediate layers. The method for forming the bonding member 19 is not limited. The materials constituting the first metal layer 191 and each intermediate layer are not limited.

[0031] The second metal layer 192 of the joining member 19 is solid-state bonded to the metal layer 112 (plated layer 112a) of the base material 11. The third metal layer 193 of the joining member 19 is solid-state bonded to the base portion 71 (plated layer 71a) of the heat dissipation member 70. The heat dissipation member 70, the joining member 19, and the base material 11 are placed in this order in a mold in the first direction z, and solid-state bonding is performed between the components by a pressure treatment using a pressure device that performs solid-state bonding.

[0032] As shown in FIGS. 7 to 9 , each of the plurality of semiconductor elements 20 is mounted on either the first conductive layer 121 or the second conductive layer 122. The plurality of semiconductor elements 20 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Alternatively, the plurality of semiconductor elements 20 may be switching elements such as IGBTs (Insulated Gate Bipolar Transistors) or diodes. In the description of the semiconductor device A10, the plurality of semiconductor elements 20 are n-channel MOSFETs with a vertical structure. The plurality of semiconductor elements 20 include a compound semiconductor substrate. The compound semiconductor substrate includes silicon carbide (SiC).

[0033] 9 , in the semiconductor device A10, the multiple semiconductor elements 20 include multiple first semiconductor elements 21 and multiple second semiconductor elements 22. The structure of each of the multiple second semiconductor elements 22 is the same as the structure of each of the multiple first semiconductor elements 21. The multiple first semiconductor elements 21 are mounted on a first mounting surface 121A of a first conductive layer 121. The multiple first semiconductor elements 21 are arranged along the third direction y. The multiple second semiconductor elements 22 are mounted on a second mounting surface 122A of a second conductive layer 122. The multiple second semiconductor elements 22 are arranged along the third direction y.

[0034] As shown in FIGS. 9 and 12, each of the plurality of first semiconductor elements 21 has a first electrode 211 , a second electrode 212 , a first gate electrode 213 and a first detection electrode 214 .

[0035] As shown in FIG. 12 , the first electrode 211 faces the first mounting surface 121A of the first conductive layer 121. A current corresponding to the power before conversion by the first semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the drain electrode of the first semiconductor element 21. The first electrode 211 is conductively bonded to the first mounting surface 121A via a first bonding layer 29. As a result, the first electrode 211 of each of the multiple first semiconductor elements 21 is electrically connected to the first conductive layer 121. The first bonding layer 29 is a sintered body of metal particles containing silver (Ag) or the like. The first bonding layer 29 may be solder or a metal layer formed by brazing using silver or the like.

[0036] 12 , the second electrode 212 is located on the opposite side of the first conductive layer 121 from the side facing the first mounting surface 121A in the first direction z. Therefore, the first electrode 211 and the second electrode 212 are located on opposite sides of each other in the first direction z. A current corresponding to the power converted by the first semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the source electrode of the first semiconductor element 21.

[0037] 12 , the first gate electrode 213 is located on the opposite side of the first conductive layer 121 in the first direction z from the side facing the first mounting surface 121A. Therefore, the first gate electrode 213 is located on the same side as the second electrode 212 in the first direction z. A gate voltage for driving the first semiconductor element 21 is applied to the first gate electrode 213. As shown in FIG. 9 , the area of ​​the first gate electrode 213 is smaller than the area of ​​the second electrode 212 when viewed in the first direction z.

[0038] 9 , the first detection electrode 214 is located on the same side as the second electrode 212 and the first gate electrode 213 in the first direction z. The first detection electrode 214 is located adjacent to the first gate electrode 213 in the third direction y. A voltage equivalent to the voltage applied to the second electrode 212 is applied to the first detection electrode 214. When viewed in the first direction z, the area of ​​the first detection electrode 214 is equal to (or approximately equal to) the area of ​​the first gate electrode 213.

[0039] As shown in FIGS. 9 and 13 , each of the plurality of second semiconductor elements 22 has a third electrode 221 , a fourth electrode 222 , a second gate electrode 223 and a second detection electrode 224 .

[0040] 13 , the third electrode 221 faces the second mounting surface 122A of the second conductive layer 122. A current corresponding to the power before being converted by the second semiconductor element 22 flows through the third electrode 221. In other words, the third electrode 221 corresponds to the drain electrode of the second semiconductor element 22. The third electrode 221 is conductively bonded to the second mounting surface 122A via the first bonding layer 29. As a result, the third electrode 221 of each of the multiple second semiconductor elements 22 is electrically connected to the second conductive layer 122.

[0041] 13 , the fourth electrode 222 is located on the opposite side of the second conductive layer 122 from the side facing the second mounting surface 122A in the first direction z. Therefore, the third electrode 221 and the fourth electrode 222 are located on opposite sides of each other in the first direction z. A current corresponding to the power converted by the second semiconductor element 22 flows through the fourth electrode 222. In other words, the fourth electrode 222 corresponds to the source electrode of the second semiconductor element 22.

[0042] 13 , the second gate electrode 223 is located on the opposite side of the second conductive layer 122 in the first direction z from the side facing the second mounting surface 122A. Therefore, the second gate electrode 223 is located on the same side as the fourth electrode 222 in the first direction z. A gate voltage for driving the second semiconductor element 22 is applied to the second gate electrode 223. As shown in FIG. 9 , the area of ​​the second gate electrode 223 is smaller than the area of ​​the fourth electrode 222 when viewed in the first direction z.

[0043] 9 , the second detection electrode 224 is located on the same side as the fourth electrode 222 and the second gate electrode 223 in the first direction z. The second detection electrode 224 is located adjacent to the second gate electrode 223 in the third direction y. A voltage equivalent to the voltage applied to the fourth electrode 222 is applied to the second detection electrode 224. When viewed in the first direction z, the area of ​​the second detection electrode 224 is equal to (or approximately equal to) the area of ​​the second gate electrode 223.

[0044] As shown in FIG. 9 , the first power terminal 13 is located on the opposite side of the second semiconductor elements 22 from the first semiconductor elements 21 in the second direction x. The first power terminal 13 is disposed on the substrate 11. The first power terminal 13 is conductively bonded to the first conductive layer 121. This electrically connects the first power terminal 13 to the first electrodes 211 of the first semiconductor elements 21 via the first conductive layer 121. The first power terminal 13 is a P terminal (positive electrode) to which DC power to be converted is input. As shown in FIG. 2 , the first power terminal 13 is exposed from the top surface 51 of the sealing resin 50. As viewed in the first direction z, the first power terminal 13 is surrounded by a periphery 501 of the sealing resin 50 and is located inward from the periphery of the top surface 51. As shown in FIG. 11 , the first power terminal 13 has a first connection surface 131 exposed from the sealing resin 50. The first connecting surface 131 faces the same side as the main surface 711 of the heat dissipation member 70 in the first direction z. As shown in Figures 5 and 11, in the semiconductor device A10, the first connecting surface 131 is accommodated in a first recess 55A among the multiple recesses 55 in the sealing resin 50. In addition to the configuration of the first power terminal 13 in the semiconductor device A10, the first power terminal 13 may be configured to protrude from the first side surface 53 of the sealing resin 50 in the second direction x.

[0045] As shown in FIG. 9 , each of the two second power terminals 14 is located on the same side as the first power terminal 13 in the second direction x with respect to the multiple first semiconductor elements 21. The two second power terminals 14 are disposed on the substrate 11. Each of the two second power terminals 14 is disposed on the insulating layer 111. Each of the two second power terminals 14 is electrically connected to the fourth electrodes 222 of each of the multiple second semiconductor elements 22. The two second power terminals 14 are N terminals (negative electrodes) to which DC power to be converted is input. The second power terminals 14 are spaced apart from each other in the third direction y. The first power terminal 13 is located between the two second power terminals 14 in the third direction y. As shown in FIG. 2 , each of the two second power terminals 14 is exposed from the top surface 51 of the sealing resin 50. As viewed in the first direction z, each of the two second power terminals 14 is surrounded by a periphery 501 of the sealing resin 50 and is located inward from the periphery of the top surface 51. As shown in FIG. 10 , each of the two second power terminals 14 has a second connection surface 141 exposed from the sealing resin 50. The second connection surface 141 faces the same side as the main surface 711 of the heat dissipation member 70 in the first direction z. As shown in FIGS. 5 and 10 , in the semiconductor device A10, the two second connection surfaces 141 are individually accommodated in two second recesses 55B among the multiple recesses 55 in the sealing resin 50. In addition to the configuration of two second power terminals 14 in the semiconductor device A10, a configuration in which two second power terminals 14 each protrude from the first side surface 53 of the sealing resin 50 in the second direction x may also be used.

[0046] As shown in FIG. 9 , each of the two third power terminals 15 is located on the opposite side of the first power terminal 13 and the two second power terminals 14 in the second direction x with respect to the plurality of semiconductor elements 20. The two third power terminals 15 are disposed on the substrate 11. Each of the two third power terminals 15 is conductively bonded to the second conductive layer 122. As a result, each of the two third power terminals 15 is electrically connected to the third electrodes 221 of the plurality of second semiconductor elements 22 via the second conductive layer 122. AC power converted by the plurality of semiconductor elements 20 is output from each of the two third power terminals 15. In the semiconductor device A10, the two third power terminals 15 are spaced apart from each other in the third direction y. As shown in FIG. 2 , each of the two third power terminals 15 is exposed from the top surface 51 of the sealing resin 50. As viewed in the first direction z, each of the two third power terminals 15 is surrounded by a periphery 501 of the sealing resin 50 and is located inward from the periphery of the top surface 51. As shown in FIG. 10 , each of the two third power terminals 15 has a third connection surface 151 exposed from the sealing resin 50. The third connection surface 151 faces the same side as the main surface 711 of the heat dissipation member 70 in the first direction z. As shown in FIGS. 4 and 10 , in the semiconductor device A10, the two third connection surfaces 151 are individually accommodated in two third recesses 55C among the multiple recesses 55 in the sealing resin 50. In addition to the configuration of two third power terminals 15 in the semiconductor device A10, two third power terminals 15 may be configured such that each protrudes from the second side surface 54 of the sealing resin 50 in the second direction x.

[0047] As shown in Fig. 12 , the first terminal support 61 is bonded to the first mounting surface 121A of the first conductive layer 121. The first terminal support 61 is located on the opposite side of the plurality of second semiconductor elements 22 from the plurality of first semiconductor elements 21 in the second direction x. The first terminal support 61 is electrically connected to the plurality of first semiconductor elements 21 and the first conductive layer 121. As shown in Figs. 9 and 12 , the first terminal support 61 has a first mounting layer 611, a first metal layer 612, two first gate wiring layers 613, a first detection wiring layer 614, two first temperature detection wiring layers 615, and a second detection wiring layer 616.

[0048] 9 , the first mounting layer 611 includes two first gate wiring layers 613, a first detection wiring layer 614, two first temperature detection wiring layers 615, and a second detection wiring layer 616. The first mounting layer 611 is an insulator. The first mounting layer 611 is made of, for example, ceramics. Alternatively, the first mounting layer 611 may be made of an insulating resin sheet.

[0049] As shown in FIG. 12 , the first metal layer 612 is located on the side facing the first mounting surface 121A of the first conductive layer 121 in the first direction z, with the first mounting layer 611 as the reference. The first metal layer 612 is bonded to the first mounting layer 611. The first metal layer 612 contains copper. The first metal layer 612 is bonded to the first mounting surface 121A via a second bonding layer 39. The second bonding layer 39 contains a metal. The second bonding layer 39 is solder. Therefore, the second bonding layer 39 contains tin (Sn). Alternatively, the second bonding layer 39 may be a sintered body of metal particles containing silver (Ag) or the like. The glass transition point of the sealing resin 50 is lower than the melting point of the second bonding layer 39.

[0050] As shown in FIGS. 9 and 12 , the two first gate wiring layers 613 are located on the opposite side of the first metal layer 612 with respect to the first mounting layer 611. The two first gate wiring layers 613 are bonded to the first mounting layer 611. A plurality of first wires 41 are conductively bonded to one of the two first gate wiring layers 613. The first wires 41 are so-called bonding wires, and are made of a conductive material such as aluminum (Al), gold (Au), copper (Cu), or an alloy containing any of these. The same applies to the second wires 42, fourth wires 44, fifth wires 45, sixth wires 46, and seventh wires 47, which will be described later. The plurality of first wires 41 are individually conductively bonded to the first gate electrodes 213 of the plurality of first semiconductor elements 21. Furthermore, a plurality of sixth wires 46 are conductively bonded to each of the two first gate wiring layers 613. As a result, each of the two first gate wiring layers 613 is electrically connected to the first gate electrode 213 of each of the multiple first semiconductor elements 21 .

[0051] 9 and 12 , the first detection wiring layer 614 is located on the opposite side of the first metal layer 612 with respect to the first mounting layer 611. The first detection wiring layer 614 is bonded to the first mounting layer 611. A plurality of second wires 42 are conductively bonded to the first detection wiring layer 614. Furthermore, the plurality of second wires 42 are individually conductively bonded to the first detection electrodes 214 of the plurality of first semiconductor elements 21. As a result, the first detection wiring layer 614 is electrically connected to the first detection electrodes 214 of the plurality of first semiconductor elements 21.

[0052] 9 , the two first temperature detection wiring layers 615 are located on the opposite side of the first mounting layer 611 from the first metal layer 612. The two first temperature detection wiring layers 615 are bonded to the first mounting layer 611. The two first temperature detection wiring layers 615 are adjacent to each other in the third direction y.

[0053] 9, the second detection wiring layer 616 is located on the opposite side of the first mounting layer 611 from the first metal layer 612. The second detection wiring layer 616 is bonded to the first mounting layer 611.

[0054] As shown in Fig. 13 , the second terminal support 62 is bonded to the second mounting surface 122A of the second conductive layer 122. The second terminal support 62 is located on the opposite side of the second semiconductor elements 22 from the first semiconductor elements 21 in the second direction x. The second terminal support 62 is electrically connected to the second semiconductor elements 22 and the second conductive layer 122. As shown in Figs. 9 and 13 , the second terminal support 62 has a second mounting layer 621, a second metal layer 622, two second gate wiring layers 623, a third detection wiring layer 624, two second temperature detection wiring layers 625, and a fourth detection wiring layer 626.

[0055] 9 , the second mounting layer 621 includes two second gate wiring layers 623, a third detection wiring layer 624, two second temperature detection wiring layers 625, and a fourth detection wiring layer 626. The second mounting layer 621 is an insulator. The second mounting layer 621 is made of, for example, ceramics. Alternatively, the second mounting layer 621 may be made of an insulating resin sheet.

[0056] 13 , the second metal layer 622 is located on a side of the second conductive layer 122 facing the second mounting surface 122A with respect to the second mounting layer 621 in the first direction z. The second metal layer 622 is bonded to the second mounting layer 621. The second metal layer 622 contains copper. The second metal layer 622 is bonded to the second mounting surface 122A via the second bonding layer 39.

[0057] 9 and 13 , the two second gate wiring layers 623 are located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The two second gate wiring layers 623 are bonded to the second mounting layer 621. A plurality of fourth wires 44 are conductively bonded to one of the two second gate wiring layers 623. The plurality of fourth wires 44 are individually conductively bonded to the second gate electrodes 223 of the second semiconductor elements 22. Furthermore, a plurality of seventh wires 47 are conductively bonded to each of the two second gate wiring layers 623. As a result, each of the two second gate wiring layers 623 is electrically connected to the second gate electrodes 223 of the second semiconductor elements 22.

[0058] 9 and 13 , the third detection wiring layer 624 is located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The third detection wiring layer 624 is bonded to the second mounting layer 621. A plurality of fifth wires 45 are conductively bonded to the third detection wiring layer 624. Furthermore, the plurality of fifth wires 45 are individually conductively bonded to the second detection electrodes 224 of the plurality of second semiconductor elements 22. As a result, the third detection wiring layer 624 is electrically connected to the second detection electrodes 224 of the plurality of second semiconductor elements 22.

[0059] 9 , the two second temperature detection wiring layers 625 are located on the opposite side of the second mounting layer 621 from the second metal layer 622. The two second temperature detection wiring layers 625 are bonded to the second mounting layer 621. The two second temperature detection wiring layers 625 are adjacent to each other in the third direction y.

[0060] 9, the fourth detection wiring layer 626 is located on the opposite side of the second mounting layer 621 from the second metal layer 622. The fourth detection wiring layer 626 is bonded to the second mounting layer 621.

[0061] As shown in FIGS. 12 and 13 , each of the multiple sleeves 63 is conductively bonded to either the first terminal support 61 or the second terminal support 62 via a second bonding layer 39. The second bonding layer 39 is, for example, solder. The multiple sleeves 63 are made of a conductive material such as metal. Each of the multiple sleeves 63 has a cylindrical shape extending in the first direction z. As shown in FIGS. 2 and 11 , each of the multiple sleeves 63 has an end surface 631 that faces the same side as the first mounting surface 121A of the first conductive layer 121 in the first direction z. The end surface 631 is exposed from the top surface 51 of the sealing resin 50, which will be described later.

[0062] 8 and 9, one of the two thermistors 23 is conductively joined to the two first temperature detection wiring layers 615 of the first terminal support 61. The other of the two thermistors 23 is conductively joined to the two second temperature detection wiring layers 625 of the second terminal support 62. The two thermistors 23 are used as temperature detection sensors for the semiconductor device A10.

[0063] As shown in Figures 4 and 5 , each of the first signal terminal 161, the second signal terminal 162, the third signal terminal 171, the fourth signal terminal 172, the two fifth signal terminals 181, and the two sixth signal terminals 182 is formed as a metal pin extending in the first direction z. These terminals protrude from the top surface 51 of the sealing resin 50. Furthermore, these terminals are individually press-fitted into a plurality of sleeves 63. As a result, each of these terminals is supported by one of the plurality of sleeves 63 and is electrically connected to one of the first terminal support bodies 61 and the second terminal support bodies 62.

[0064] 9 , the first signal terminal 161 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two first gate wiring layers 613 of the first terminal support body 61. This allows the first signal terminal 161 to be electrically connected to the first gate electrodes 213 of the multiple first semiconductor elements 21 via the two first gate wiring layers 613. A gate voltage for driving the multiple first semiconductor elements 21 is applied to the first signal terminal 161.

[0065] 9 and 11 , the second signal terminal 162 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two second gate wiring layers 623 of the second terminal support body 62. This allows the second signal terminal 162 to be electrically connected to the second gate electrodes 223 of the multiple second semiconductor elements 22 via the two second gate wiring layers 623. A gate voltage for driving the multiple second semiconductor elements 22 is applied to the second signal terminal 162.

[0066] As shown in Fig. 2 , the third signal terminal 171 is located adjacent to the first signal terminal 161 in the third direction y. As shown in Figs. 9 and 11 , the third signal terminal 171 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the first detection wiring layer 614 of the first terminal support body 61. This allows the third signal terminal 171 to be electrically connected to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 via the first detection wiring layer 614. A voltage equivalent to the voltage applied to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 is applied to the third signal terminal 171.

[0067] As shown in Fig. 2 , the fourth signal terminal 172 is located adjacent to the second signal terminal 162 in the third direction y. As shown in Fig. 9 , the fourth signal terminal 172 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the third detection wiring layer 624 of the second terminal support body 62. This allows the fourth signal terminal 172 to be electrically connected to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 via the third detection wiring layer 624. A voltage equivalent to the voltage applied to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 is applied to the fourth signal terminal 172.

[0068] As shown in Fig. 2 , the two fifth signal terminals 181 are located on the opposite side of the first signal terminal 161 from the third signal terminal 171 in the third direction y. The two fifth signal terminals 181 are adjacent to each other in the third direction y. As shown in Fig. 9 , the two fifth signal terminals 181 are individually press-fitted into two of the multiple sleeves 63 that are individually conductively joined to the two first temperature detection wiring layers 615 of the first terminal support body 61. As a result, the two fifth signal terminals 181 are electrically connected to the two thermistors 23 that are conductively joined to the two first temperature detection wiring layers 615, out of the two thermistors 23.

[0069] As shown in Fig. 2 , the two sixth signal terminals 182 are located on the opposite side of the second signal terminal 162 from the fourth signal terminal 172 in the third direction y. The two sixth signal terminals 182 are adjacent to each other in the third direction y. As shown in Fig. 9 , the two sixth signal terminals 182 are individually press-fitted into two of the multiple sleeves 63 that are individually conductively joined to the two second temperature detection wiring layers 625 of the second terminal support body 62. As a result, the two sixth signal terminals 182 are electrically connected to the two thermistors 23 that are conductively joined to the two second temperature detection wiring layers 625 of the two thermistors 23.

[0070] As shown in FIGS. 8 and 12 , the first conductive member 31 is conductively bonded to the second electrodes 212 of the plurality of first semiconductor elements 21 and the second mounting surface 122A of the second conductive layer 122. As a result, the second electrodes 212 of the plurality of first semiconductor elements 21 are electrically connected to the second conductive layer 122. The first conductive member 31 contains copper. The first conductive member 31 is a metal clip. As shown in FIG. 5 , the first conductive member 31 has a main portion 311, a plurality of first bonding portions 312, a plurality of first connecting portions 313, a second bonding portion 314, and a second connecting portion 315.

[0071] The main portion 311 forms a main portion of the first conductive member 31. As shown in Fig. 8 , the main portion 311 extends in the third direction y. The main portion 311 straddles between the first conductive layer 121 and the second conductive layer 122.

[0072] 8 and 12 , the multiple first bonding portions 312 are individually bonded to the second electrodes 212 of the multiple first semiconductor elements 21. Each of the multiple first bonding portions 312 faces the second electrode 212 of one of the multiple first semiconductor elements 21.

[0073] 8 and 12 , the multiple first connecting portions 313 are connected to the main portion 311 and the multiple first bonding portions 312. The multiple first connecting portions 313 are spaced apart from one another in the third direction y. When viewed in the third direction y, the multiple first connecting portions 313 are inclined in a direction away from the first mounting surface 121A of the first conductive layer 121 as they extend from the multiple first bonding portions 312 toward the main portion 311.

[0074] 8 and 11, each of the plurality of second bonding portions 314 is bonded to the second mounting surface 122A of the second conductive layer 122. Each of the plurality of second bonding portions 314 faces the second mounting surface 122A.

[0075] 8 and 11 , the multiple second connecting portions 315 are connected to the main portion 311 and the multiple second bonding portions 314. The multiple second connecting portions 315 are spaced apart from one another in the third direction y. As viewed in the third direction y, the multiple second connecting portions 315 are inclined in a direction away from the second mounting surface 122A of the second conductive layer 122 as they move from the multiple second bonding portions 314 toward the main portion 311. The multiple second bonding portions 314 may be connected together, in which case the multiple second connecting portions 315 may also be configured to be connected together.

[0076] 12 , a second bonding layer 39 is located between the second electrode 212 of each of the multiple first semiconductor elements 21 and each of the multiple first bonding portions 312. The second bonding layer 39 electrically conductively bonds each of the multiple first bonding portions 312 to the second electrode 212 of each of the multiple first semiconductor elements 21. The second bonding layer 39 is, for example, solder. As shown in FIG. 11 , the second bonding layer 39 is located between the second mounting surface 122A of the second conductive layer 122 and the second bonding portion 314. The second bonding layer 39 electrically conductively bonds the second mounting surface 122A to the second bonding portion 314.

[0077] As shown in Figures 7 and 13 , the second conductive member 32 is conductively joined to the fourth electrodes 222 of the multiple second semiconductor elements 22 and the two second power terminals 14. As a result, the second electrodes 212 of the multiple second semiconductor elements 22 are electrically connected to the second power terminals 14. The second conductive member 32 contains copper. The second conductive member 32 is a metal clip. As shown in Figure 7 , the second conductive member 32 has two main portions 321, multiple third joint portions 322, multiple third connecting portions 323, multiple intermediate portions 326, and a cross beam portion 327.

[0078] As shown in Fig. 7 , the two main portions 321 are spaced apart from each other in the third direction y. The two main portions 321 extend in the second direction x. As shown in Fig. 10 , the two main portions 321 are arranged parallel to the first mounting surface 121A of the first conductive layer 121 and the second mounting surface 122A of the second conductive layer 122. The two main portions 321 are spaced apart from the first mounting surface 121A and the second mounting surface 122A more than the main portion 311 of the first conductive member 31.

[0079] 7 , the intermediate portions 326 are spaced apart from one another in the third direction y and are located between the two main portions 321 in the third direction y. The intermediate portions 326 extend in the second direction x. The dimension of each of the intermediate portions 326 in the second direction x is smaller than the dimension of each of the two main portions 321 in the second direction x.

[0080] 13 , the multiple third bonding portions 322 are individually bonded to the fourth electrodes 222 of the multiple second semiconductor elements 22. Each of the multiple third bonding portions 322 faces the fourth electrode 222 of one of the multiple second semiconductor elements 22.

[0081] 7 and 15 , the multiple third connecting portions 323 are connected to both sides of the multiple third joint portions 322 in the third direction y. Furthermore, the multiple third connecting portions 323 are connected to either of the two main portions 321 or the multiple intermediate portions 326. When viewed in the second direction x, each of the multiple third connecting portions 323 is inclined in a direction away from the second mounting surface 122A of the second conductive layer 122 as it moves from either of the multiple third joint portions 322 to either of the two main portions 321 or the multiple intermediate portions 326.

[0082] As shown in Fig. 7 , the cross beam portion 327 extends in the third direction y. As shown in Fig. 14 , when viewed in the first direction z, the cross beam portion 327 includes regions that overlap with each of the multiple first joint portions 312 of the first conductive member 31. Both sides of the cross beam portion 327 in the third direction y are individually connected to the two main portions 321.

[0083] 13 , a second bonding layer 39 is located between the fourth electrode 222 of each of the second semiconductor elements 22 and each of the third bonding portions 322. The second bonding layer 39 electrically conductively bonds each of the third bonding portions 322 to the fourth electrode 222 of each of the second semiconductor elements 22. As shown in FIG. 10 , a second bonding layer 39 is located between two second power terminals 14 and two main portions 321. The second bonding layer 39 electrically conductively bonds each of the second power terminals 14 to the two main portions 321.

[0084] Next, an example of a manufacturing method for the semiconductor device A10 will be described with reference to Figures 18 to 24. Figures 18, 19, and 21 to 24 are cross-sectional views showing a step in the manufacturing method for the semiconductor device A10, and correspond to Figure 10 showing the semiconductor device A10. Figure 20 is a plan view of a mold used in a first process P1, which will be described later.

[0085] First, as shown in Fig. 18 , the first conductive layer 121 and the second conductive layer 122 are each bonded to one side of the insulating layer 111 in the first direction z. At the same time, the metal layer 112 is bonded to the other side of the insulating layer 111 in the first direction z. Then, the first power terminal 13 is conductively bonded to the first conductive layer 121 (see Fig. 11 ). Two second power terminals 14 are each placed on the insulating layer 111. Two third power terminals 15 are each conductively bonded to the second conductive layer 122.

[0086] Next, a first process P1 is performed to bond the substrate 11 to the heat dissipation member 70. In the first process P1, the metal layer 112 is bonded to the main surface 711 of the heat dissipation member 70 via the bonding member 19. In the first process P1, first, as shown in FIG. 19 , the heat dissipation member 70 is fixed to the mold 9. At this stage, the recess 714 is not formed in the heat dissipation member 70.

[0087] 19 and 20 , the mold 9 has an upper surface 91, an abutment surface 92, multiple recesses 93, and multiple positioning pins 94. The upper surface 91 faces one side in the first direction z and faces the back surface 713 of the heat dissipation member 70. The abutment surface 92 faces one side in the first direction z and is located on one side of the upper surface 91 in the first direction z. The abutment surface 92 abuts against the back surface 713 of the heat dissipation member 70 when the heat dissipation member 70 is fixed to the mold 9, as shown in FIG.

[0088] Each of the multiple recesses 93 is recessed from the contact surface 92 toward the other side in the first direction z. The multiple recesses 93 are arranged to correspond to the positions of the multiple heat dissipation pins 721 of the heat dissipation member 70. Each recess 93 is circular when viewed in the first direction z, and the diameter of each recess 93 is larger than the diameter of the heat dissipation pin 721 (the diameter of the cross section perpendicular to the first direction z). As shown in FIG. 19 , when the heat dissipation member 70 is fixed to the mold 9, each heat dissipation pin 721 of the heat dissipation member 70 is inserted into the corresponding recess 93. At this time, the heat dissipation pin 721 does not contact the inner surface of the recess 93 or the bottom surface 93 a of the recess 93.

[0089] The multiple positioning pins 94 are members for determining the position of the heat dissipation member 70 relative to the mold 9 in a direction perpendicular to the first direction z, and each protrudes from the upper surface 91 to one side in the first direction z at a predetermined position on the upper surface 91. The number and arrangement of the positioning pins 94 are not limited. The heat dissipation member 70 is fixed at a predetermined position on the mold 9 by inserting each positioning pin 94 into a corresponding positioning hole 74 in the heat dissipation member 70. The mold 9 does not need to include the positioning pins 94, in which case the heat dissipation member 70 is positioned by some other method.

[0090] Next, as shown in FIG. 19, the bonding members 19 are placed at predetermined positions on the main surface 711 of the heat dissipation member 70, and then the base material 11 is placed thereon.

[0091] 21 , a pressure device (not shown) applies heat while applying pressure in the first direction z and vibration in a direction perpendicular to the first direction z, thereby bonding the substrate 11 to the heat dissipation member 70 via the bonding member 19. The second metal layer 192 of the bonding member 19 is solid-state bonded to the metal layer 112 (plating layer 112 a) of the substrate 11, and the third metal layer 193 of the bonding member 19 is solid-state bonded to the base 71 (plating layer 71 a) of the heat dissipation member 70, thereby bonding the substrate 11 and the heat dissipation member 70. Because the bonding member 19 is made of flexible metal foil, the opposing surfaces of the bonding member 19 and the substrate 11, and the bonding member 19 and the heat dissipation member 70, are directly and firmly attached to each other, thereby solid-state bonding them together. The mold 9 is made of a material, such as steel, which is harder than the heat dissipation member 70. Therefore, when pressure is applied in the first direction z by the pressure device, the portion of the back surface 713 of the heat dissipation member 70 that abuts against the abutment surface 92 of the mold 9 is recessed, forming a recess 714. In this embodiment, in the first step P1, the tip surface 721a of the heat dissipation pin 721 does not contact the mold 9 (the bottom surface 93a of the recess 93). The pressure device is not limited to this, and does not need to apply heat or vibration as long as it can solid-state weld the opposing surfaces of the members together. The mold 9 may be fixed to the pressure device in advance, or may be fixed to the pressure device after the heat dissipation member 70, etc. are placed thereon.

[0092] Next, a second process P2 is performed in which each of the plurality of semiconductor elements 20 is conductively bonded to either the first conductive layer 121 or the second conductive layer 122. In the second process P2, as shown in FIG. 22 , each of the plurality of first semiconductor elements 21 is conductively bonded to the first conductive layer 121 via a first bonding layer 29. Each of the plurality of second semiconductor elements 22 is conductively bonded to the second conductive layer 122 via the first bonding layer 29. The first bonding layer 29 is formed by sintering metal particles containing silver or the like. The temperature at which the first bonding layer 29 is formed in the second process P2 is, for example, 200° C. or higher and 600° C. or lower. The second process P2 is performed by moving the mold 9 to which the heat dissipation member 70 has been fixed after the first process P1 to equipment for the second process P2.

[0093] Next, as shown in FIG. 23 , a third process P3 is performed in which the first conductive member 31 and the second conductive member 32 are conductively bonded to each other. In the third process P3, the first conductive member 31 is conductively bonded to each of the plurality of first semiconductor elements 21 and the second conductive layer 122 via the second bonding layer 39. Additionally, the second conductive member 32 is conductively bonded to each of the plurality of second semiconductor elements 22 and the two second power terminals 14 via the second bonding layer 39. In the third process P3, the first terminal support 61, to which the thermistor 23 and the plurality of sleeves 63 are conductively bonded, is bonded to the first conductive layer 121 via the second bonding layer 39 (see FIG. 11 ). Additionally, the second terminal support 62, to which the thermistor 23 and the plurality of sleeves 63 are conductively bonded, is bonded to the second conductive layer 122 via the second bonding layer 39 (see FIG. 11 ). Furthermore, although not shown, in the third process P3, the plurality of first wires 41, the plurality of second wires 42, the plurality of fourth wires 44, the plurality of fifth wires 45, the plurality of sixth wires 46, and the plurality of seventh wires 47 are each formed. The temperature at which the second bonding layer 39 is formed in the third process P3 is, for example, approximately 260°C. The second bonding layer 39 is formed by melting solder by reflow and then solidifying the solder. The third process P3 is performed by moving the mold 9 to which the heat dissipation member 70 is fixed after the second process P2 to equipment for the third process P3.

[0094] Next, as shown in FIG. 24 , a fourth process P4 is performed to form a sealing resin 50 that covers the semiconductor elements 20. In the fourth process P4, the base material 11, the first conductive member 31, and the second conductive member 32 are covered with the sealing resin 50. The sealing resin 50 is formed by transfer molding. The fourth process P4 is performed after the first process P1, the second process P2, and the third process P3 are completed. The temperature at which the sealing resin 50 is formed in the fourth process P4 is, for example, approximately 180° C. Therefore, the temperature at which the sealing resin 50 is formed in the fourth process P4 is lower than the temperature at which the first bonding layer 29 is formed in the second process P2 and the temperature at which the second bonding layer 39 is formed in the third process P3. In the fourth process P4, the bottom surface 52 of the sealing resin 50 is in contact with the main surface 711 of the heat dissipation member 70. Additionally, each of the multiple end surfaces 712 of the heat dissipation member 70 is exposed from the sealing resin 50. Furthermore, when viewed in the first direction z, the sealing resin 50 is positioned inward from the periphery 701 of the heat dissipation member 70 .

[0095] 24 , in the fourth step P4, the first power terminal 13, the two second power terminals 14, and the two third power terminals 15 are exposed from the top surface 51 of the sealing resin 50. Furthermore, the sealing resin 50 is forced into the engagement portions 73 provided on the heat dissipation member 70. The fourth step P4 is performed by moving the mold 9 to which the heat dissipation member 70 has been fixed after the third step P3 to equipment for the fourth step P4.

[0096] Finally, the first signal terminal 161, the second signal terminal 162, the third signal terminal 171, the fourth signal terminal 172, the two fifth signal terminals 181, and the two sixth signal terminals 182 are individually inserted into the multiple sleeves 63. This causes these signal terminals to protrude from the top surface 51 of the sealing resin 50. This process is performed after the fourth process P4 is completed. Through the above processes, the semiconductor device A10 is obtained.

[0097] The manufacturing method of the semiconductor device A10 is not limited to the above. In the above manufacturing method, the heat dissipation member 70 is fixed to the mold 9 in the first step P1, and then the mold 9 to which the heat dissipation member 70 is fixed is moved to perform the second step P2 to the fourth step P4, but this is not limiting. In the second step P2 to the fourth step P4, since a large pressure like that in the first step P1 is not applied, the heat dissipation member 70 may be fixed to a mold with a flat upper surface that does not have the recess 93 formed therein.

[0098] Next, a vehicle B equipped with the semiconductor device A10 will be described with reference to Fig. 25. The vehicle B is, for example, an electric vehicle (EV).

[0099] As shown in Fig. 25, vehicle B includes an on-board charger 81, a storage battery 82, and a drive system 83. Power is supplied to the on-board charger 81 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 81 via a wired connection. The on-board charger 81 is configured with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 81 is stepped up by the converter and then supplied to the storage battery 82. The stepped-up voltage is, for example, 600 V.

[0100] The drive system 83 drives the vehicle B. The drive system 83 includes an inverter 831 and a drive source 832. The semiconductor device A10 constitutes part of the inverter 831. Power stored in the storage battery 82 is supplied to the inverter 831. The power supplied from the storage battery 82 to the inverter 831 is DC power. Alternatively, unlike the power system shown in FIG. 25 , a step-up DC-DC converter may be further provided between the storage battery 82 and the inverter 831. The inverter 831 converts DC power into AC power. The inverter 831 including the semiconductor device A10 is connected to the drive source 832. The drive source 832 includes an AC motor and a transmission. When the AC power converted by the inverter 831 is supplied to the drive source 832, the AC motor rotates and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotation speed transmitted from the AC motor and then rotates the drive shaft of the vehicle B. This drives vehicle B. To drive vehicle B, it is necessary to freely control the rotation speed of the AC motor based on information such as the amount of accelerator pedal fluctuation. Therefore, semiconductor device A10 in inverter 831 is necessary to output AC power whose frequency has been appropriately changed to correspond to the required rotation speed of the AC motor.

[0101] Next, the effects of the manufacturing method of the semiconductor device A10 will be described.

[0102] According to this embodiment, in first step P1 of the manufacturing method of the semiconductor device A10, when the heat dissipation member 70 is fixed to the mold 9, each heat dissipation pin 721 of the heat dissipation member 70 is inserted into a corresponding recess 93 of the mold 9, and the abutment surface 92 of the mold 9 abuts against the back surface 713 of the heat dissipation member 70. Therefore, even when a pressure device applies pressure in the first direction z to bond the base material 11 to the heat dissipation member 70, the heat dissipation pin 721 does not buckle. In this embodiment, in first step P1, the tip surface 721a of the heat dissipation pin 721 does not contact the mold 9 (the bottom surface 93a of the recess 93). Therefore, the heat dissipation pin 721 does not deform due to contact between the tip surface 721a and the mold 9.

[0103] According to this embodiment, in the first process P1, the pressure applied by the pressure device in the first direction z recesses the portion of the back surface 713 of the heat dissipation member 70 where the contact surface 92 of the mold 9 abuts, forming a recess 714. The area S1 of the bottom of the recess 714 (the area of ​​the contact surface 92 of the mold 9) is greater than the total area S2 of the tip surfaces 721a of the multiple heat dissipation pins 721. Therefore, when the contact surface 92 of the mold 9 abuts the back surface 713 of the heat dissipation member 70, the area to which the pressure from the pressure device in the first process P1 is transmitted is larger than when the tip surfaces 721a of the heat dissipation pins 721 abut against the mold. This improves the bonding reliability of the bonding member 19 of the semiconductor device A10 according to this embodiment. In the semiconductor device A10 according to this embodiment, the formation of the recess 714 in the heat dissipation member 70 increases the surface area of ​​the heat dissipation member 70, thereby improving heat dissipation performance.

[0104] According to the present embodiment, in the manufacturing method of the semiconductor device A10, in processes subsequent to the fourth step P4 in which the sealing resin 50 is formed, the semiconductor device A10 in the process of manufacture is not placed in an environment with a temperature higher than the temperature at which the sealing resin 50 is formed. Therefore, the semiconductor device A10 can better maintain the shape of the sealing resin 50. The temperature at which the sealing resin 50 is formed in the fourth step P4 is lower than the temperature at which the first bonding layer 29 is formed in the second step P2. Therefore, melting of the first bonding layer 29 can be prevented when the sealing resin 50 is formed. The temperature at which the sealing resin 50 is formed in the fourth step P4 is lower than the temperature at which the second bonding layer 39 is formed in the third step P3. Therefore, melting of the second bonding layer 39 can be prevented when the sealing resin 50 is formed.

[0105] In the fourth process P4, the sealing resin 50 is brought into contact with the main surface 711 of the heat dissipation member 70. At the same time, the base material 11 is covered with the sealing resin 50, and an end surface 712 of the heat dissipation member 70 is exposed from the sealing resin 50. Furthermore, when viewed in the first direction z, the sealing resin 50 is positioned inward from the periphery 701 of the heat dissipation member 70. By adopting this configuration, when forming the sealing resin 50 in the fourth process P4, the molding die can be pressed against the heat dissipation member 70 without any gaps. This further improves the molding state of the sealing resin 50.

[0106] The semiconductor device A10 further includes a first power terminal 13 electrically connected to the semiconductor element 20 (first semiconductor element 21). The first power terminal 13 is exposed from a top surface 51 of the sealing resin 50. When viewed in the first direction z, the first power terminal 13 is located inward from the periphery of the top surface 51. This configuration ensures a longer creepage distance (the distance along the surface of the sealing resin 50) from the first power terminal 13 to the heat dissipation member 70. This makes it possible to further improve the dielectric strength voltage of the semiconductor device A10.

[0107] The heat dissipation member 70 has an engagement portion 73 recessed from the main surface 711. In a fourth process P4, the sealing resin 50 is recessed into the engagement portion 73. This configuration allows the sealing resin 50 to have an anchor effect on the heat dissipation member 70. This makes it possible to prevent the sealing resin 50 from peeling off from the main surface 711.

[0108] The semiconductor device A10 further includes a first signal terminal 161 that is electrically connected to the semiconductor element 20 (first semiconductor element 21). The first signal terminal 161 protrudes from the top surface 51 of the sealing resin 50. This configuration makes it possible to ensure a longer creepage distance from the first signal terminal 161 to the heat dissipation member 70.

[0109] Next, modified examples of the first embodiment of the present disclosure will be described with reference to Figures 26 to 33. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted.

[0110] First Modification: Figure 26 is a diagram for explaining a semiconductor device A11 according to a first modification. Figure 26 is a bottom view showing the semiconductor device A11, and corresponds to Figure 6 showing the semiconductor device A10. The semiconductor device A11 differs from the semiconductor device A10 in the arrangement of the multiple heat dissipation pins 721. In the semiconductor device A11 according to this modification, the multiple heat dissipation pins 721 are arranged in a row on the back surface 713, spaced apart from each other at equal intervals in the second direction x and the third direction y. In other words, the multiple heat dissipation pins 721 are arranged in a matrix when viewed in the first direction.

[0111] Second Modification: Fig. 27 is a diagram illustrating a semiconductor device A12 according to a second modification. Fig. 27 is a bottom view showing the semiconductor device A12, and corresponds to Fig. 6 showing the semiconductor device A10. The semiconductor device A12 differs from the semiconductor device A10 in the cross-sectional shape of the multiple heat dissipation pins 721 perpendicular to the first direction z. In the semiconductor device A12 according to this modification, the multiple heat dissipation pins 721 all have a rectangular cross-section perpendicular to the first direction z.

[0112] Third Modification: FIG. 28 is a diagram illustrating a semiconductor device A13 according to a third modification. FIG. 28 is a bottom view showing the semiconductor device A13 and corresponds to FIG. 6 showing the semiconductor device A10. The semiconductor device A13 differs from the semiconductor device A10 in the cross-sectional shape of the multiple heat dissipation pins 721 perpendicular to the first direction z. In the semiconductor device A12 according to this modification, the cross-section of each of the multiple heat dissipation pins 721 perpendicular to the first direction z is a diamond shape that is elongated in the third direction y. In this modification, the direction in which the cooling water flows is the third direction y, so the cross-sectional shape of the multiple heat dissipation pins 721 is elongated in the third direction y.

[0113] As can be seen from the first to third modifications, the arrangement and cross-sectional shape of the multiple heat dissipation pins 721 are not limited. For example, the multiple heat dissipation pins 721 may be arranged irregularly. The cross-sectional shape of the heat dissipation pins 721 may be elliptical or rectangular with one side longer than the other. In these shapes, it is desirable from the perspective of cooling effectiveness to align the longitudinal direction with the direction of the cooling water flow. The combination of the arrangement and cross-sectional shape of the multiple heat dissipation pins 721 is not limited to those described above.

[0114] Fourth Modification: FIG. 29 is a diagram illustrating a semiconductor device A14 according to a fourth modification. FIG. 29 is a bottom view of the semiconductor device A14, corresponding to FIG. 6 showing the semiconductor device A10. The semiconductor device A14 differs from the semiconductor device A10 in the form of the heat dissipation portion 72. In the semiconductor device A14 according to this modification, the heat dissipation portion 72 is a plurality of heat dissipation fins 722, each of which is plate-shaped. In this modification, the direction in which the cooling water flows is the third direction y, so the plurality of heat dissipation fins 722 are arranged parallel to the third direction y and the first direction z and are equally spaced apart in the second direction x.

[0115] Fifth Modification: FIG. 30 is a diagram illustrating a semiconductor device A15 according to a fifth modification. FIG. 30 is a cross-sectional view of the semiconductor device A15, corresponding to FIG. 11 showing the semiconductor device A10. The semiconductor device A15 differs from the semiconductor device A10 in the configuration of bonding the base material 11 to the heat dissipation member 70. In the semiconductor device A15 according to this modification, the metal layer 112 of the base material 11 is bonded to the main surface 711 of the heat dissipation member 70 via a first bonding layer 29 (a sintered body of metal particles containing silver (Ag) or the like). In this modification, in the first step P1 of the manufacturing method according to the first embodiment, the metal layer 112 of the base material 11 is bonded to the main surface 711 of the heat dissipation member 70 via the first bonding layer 29. The first step P1 and the second step P2 may be performed simultaneously.

[0116] Sixth Modification: FIG. 31 is a diagram illustrating a semiconductor device A16 according to a sixth modification. FIG. 31 is a cross-sectional view of the semiconductor device A16, corresponding to FIG. 11 showing the semiconductor device A10. The semiconductor device A16 differs from the semiconductor device A10 in the configuration of conductive bonding of each of the multiple semiconductor elements 20 to either the first conductive layer 121 or the second conductive layer 122. In the semiconductor device A16 according to this modification, the first electrode 211 of each of the multiple first semiconductor elements 21 is conductively bonded to the first mounting surface 121A of the first conductive layer 121 via the bonding member 19. The third electrode 221 of the multiple second semiconductor elements 22 is conductively bonded to the second mounting surface 122A of the second conductive layer 122 via the bonding member 19. In this modified example, in second step P2 of the manufacturing method of the first embodiment, a plurality of first semiconductor elements 21 (second semiconductor elements 22) are conductively joined to the first conductive layer 121 (second conductive layer 122) by solid-state bonding via the bonding member 19. The second step P2 may be performed simultaneously with the first step P1.

[0117] Seventh Modification: FIG. 32 is a diagram illustrating a semiconductor device A17 according to a seventh modification. FIG. 32 is a partially enlarged cross-sectional view of the semiconductor device A17, corresponding to FIG. 17 showing the semiconductor device A10. The semiconductor device A17 differs from the semiconductor device A10 in the configuration of bonding the substrate 11 to the heat dissipation member 70. In the semiconductor device A15 according to this modification, the metal layer 112 (plating layer 112a) of the substrate 11 is directly solid-state bonded to the base 71 (plating layer 71a) of the heat dissipation member 70. In this modification, there is no need to place a bonding member 19 between the main surface 711 of the heat dissipation member 70 and the substrate 11 in the first step P1 of the manufacturing method according to the first embodiment.

[0118] Eighth Modification: Figure 33 is a diagram for explaining a semiconductor device A18 according to an eighth modification. Figure 33 is a partially enlarged cross-sectional view showing the semiconductor device A18, and corresponds to Figure 16 showing the semiconductor device A10. The semiconductor device A18 differs from the semiconductor device A10 in the configuration of the engagement portion 73 of the heat dissipation member 70. In the semiconductor device A18 according to this modification, the engagement portion 73 protrudes from the main surface 711 of the heat dissipation member 70. The engagement portion 73 is recessed into the sealing resin 50.

[0119] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 34 and 35. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Figure 34 is a bottom view showing the semiconductor device A20, and corresponds to Figure 6 showing the semiconductor device A10. Figure 35 is a plan view of a mold used in the manufacturing process of the semiconductor device A20, and corresponds to Figure 20.

[0120] In the semiconductor device A20 according to this embodiment, the shape of the recess 714 is different from that of the semiconductor device A10 according to the first embodiment. The configuration and operation of other parts of this embodiment are the same as those of the first embodiment. The parts of the first embodiment and the modifications described above may be combined in any manner.

[0121] As shown in FIG. 34 , in the semiconductor device A20 according to this embodiment, the recess 714 is divided into multiple portions. In FIG. 34 , the recess 714 is dotted for ease of understanding. In this embodiment, each portion of the recess 714 is rectangular when viewed in the first direction z. The shape of each portion of the recess 714 is not limited. Each portion of the recess 714 is disposed between multiple heat dissipation pins 721 on the back surface 713. In this embodiment, too, the total area S1 of the bottom surfaces of each portion of the recess 714, which are surfaces facing the other side in the first direction z, is greater than the total area S2 of the tip surfaces of the multiple heat dissipation pins 721. The area S1 may be equal to or smaller than the area S2. The recess 714 is formed during the manufacturing process by pressing the mold 9 for fixing the heat dissipation member 70 against the base 71 during the process of bonding the substrate 11 to the main surface 711 of the heat dissipation member 70.

[0122] As shown in FIG. 35 , the mold 9 used in the first step P1 has an upper surface 91, multiple protrusions 95, and multiple positioning pins 94. The upper surface 91 faces one side in the first direction z and faces the back surface 713 of the heat dissipation member 70. The multiple protrusions 95 each protrude from the upper surface 91 toward one side in the first direction z. Each of the multiple protrusions 95 is positioned so as to avoid the multiple heat dissipation pins 721 of the heat dissipation member 70. Each protrusion 95 has a rectangular shape when viewed in the first direction z. The shape of each protrusion 95 when viewed in the first direction z is not limited. A tip surface 95 a of each protrusion 95 faces one side in the first direction z and is located on one side of the upper surface 91 in the first direction z. Each tip surface 95 a abuts against the back surface 713 of the heat dissipation member 70 when the heat dissipation member 70 is fixed to the mold 9. At this time, the heat dissipation pins 721 of the heat dissipation member 70 are positioned between the protrusions 95 when viewed in the first direction, and do not come into contact with the protrusions 95 or the upper surface 91 .

[0123] In the first process P1, when the pressure device applies pressure in the first direction z to join the substrate 11 to the heat dissipation member 70, the portion of the back surface 713 of the heat dissipation member 70 that abuts against the tip surface 95a of the protrusion 95 of the mold 9 becomes recessed, forming a recess 714.

[0124] Next, the effects of the manufacturing method of the semiconductor device A20 will be described.

[0125] According to the present embodiment, in first step P1 of the manufacturing method of the semiconductor device A20, when the heat dissipation member 70 is fixed to the mold 9, each heat dissipation pin 721 of the heat dissipation member 70 is positioned between each protrusion 95 when viewed in the first direction, and the tip surface 95a of the protrusion 95 of the mold 9 abuts the back surface 713 of the heat dissipation member 70. Therefore, even when a pressure device applies pressure in the first direction z to bond the base material 11 to the heat dissipation member 70, the heat dissipation pin 721 does not buckle. In the present embodiment, in first step P1, the tip surface 721a of the heat dissipation pin 721 does not contact the mold 9 (top surface 91). Therefore, the heat dissipation pin 721 does not deform due to contact between the tip surface 721a and the mold 9.

[0126] According to this embodiment, in the first process P1, the pressure applied by the pressure device in the first direction z recesses the portion of the back surface 713 of the heat dissipation member 70 where the tip surface 95a of the protrusion 95 of the mold 9 abuts, forming a recess 714. The total area S1 of the bottom surfaces of the recess 714 (the total area of ​​the tip surfaces 95a of the mold 9) is greater than the total area S2 of the tip surfaces 721a of the multiple heat dissipation pins 721. Therefore, when the tip surface 95a of the mold 9 abuts the back surface 713 of the heat dissipation member 70, the area to which the pressure from the pressure device in the first process P1 is transmitted is larger than when the tip surface 721a of the heat dissipation pins 721 abut the mold. This improves the bonding reliability of the bonding member 19 of the semiconductor device A20 according to this embodiment. In the semiconductor device A20 according to this embodiment, the formation of the recess 714 in the heat dissipation member 70 increases the surface area of ​​the heat dissipation member 70, thereby improving heat dissipation performance. Furthermore, the semiconductor device A20 and its manufacturing method have the same configuration as the semiconductor device A10 and its manufacturing method, and thus have the same effects as the semiconductor device A10 and its manufacturing method.

[0127] Third Embodiment: A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to FIGS. 36, 37, and 38. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and redundant description will be omitted. FIG. 36 is a cross-sectional view showing the semiconductor device A30, corresponding to FIG. 10 showing the semiconductor device A10. FIG. 37 is a cross-sectional view illustrating a manufacturing process for the semiconductor device A30, corresponding to FIG. 19. FIG. 38 is a cross-sectional view illustrating a manufacturing process for the semiconductor device A30, corresponding to FIG. 21.

[0128] In the semiconductor device A30 according to this embodiment, the shape of the tip portion of the heat dissipation pin 721 differs from that of the semiconductor device A10 according to the first embodiment. The configuration and operation of other parts of this embodiment are the same as those of the first embodiment. The parts of the first and second embodiments and their modified examples may be combined in any manner.

[0129] 36 , in the semiconductor device A30 according to this embodiment, each heat dissipation pin 721 of the heat dissipation member 70 has a protrusion 721b at its tip that protrudes in a direction perpendicular to the first direction z. As shown in FIG. 37 , in first step P1 of the manufacturing method of the semiconductor device A30, when the heat dissipation member 70 is fixed to the mold 9, the tip surface 721a of the heat dissipation pin 721 contacts the bottom surface 93a of the recess 93. Then, as shown in FIG. 38 , when a pressure device applies pressure in the first direction z to bond the substrate 11 to the heat dissipation member 70, the recess 714 is formed. At this time, the tip surface 721a of the heat dissipation pin 721 is pressed against the bottom surface 93a of the recess 93, and the tip portion of the heat dissipation pin 721 is crushed and deformed, forming the protrusion 721b.

[0130] Next, the effects of the manufacturing method of the semiconductor device A30 will be described.

[0131] Also in this embodiment, when the heat dissipation member 70 is fixed to the mold 9 in the first step P1 of the manufacturing method of the semiconductor device A30, each heat dissipation pin 721 of the heat dissipation member 70 is inserted into a corresponding recess 93 of the mold 9, and the abutment surface 92 of the mold 9 abuts against the back surface 713 of the heat dissipation member 70. Therefore, even when a pressure device applies pressure in the first direction z to bond the base material 11 to the heat dissipation member 70, the heat dissipation pin 721 does not buckle.

[0132] According to this embodiment, when the heat dissipation member 70 is fixed to the mold 9 in the first step P1, the contact surface 92 of the mold 9 contacts the back surface 713 of the heat dissipation member 70, and the tip surfaces 721a of the heat dissipation pins 721 contact the bottom surfaces 93a of the recesses 93. Therefore, compared to when the contact surface 92 of the mold 9 simply contacts the back surface 713 of the heat dissipation member 70, the area to which the pressure from the pressure device is transmitted in the first step P1 is further increased. This further improves the bonding reliability of the bonding members 19 of the semiconductor device A30 according to this embodiment. In the semiconductor device A30 according to this embodiment, the formation of the recesses 714 in the heat dissipation member 70 increases the surface area of ​​the heat dissipation member 70, thereby improving heat dissipation performance. Furthermore, the semiconductor device A30 and its manufacturing method share a configuration common to the semiconductor device A10 and its manufacturing method, thereby achieving the same effects as the semiconductor device A10 and its manufacturing method.

[0133] Fourth Embodiment: A semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to Fig. 39. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Fig. 39 is a perspective view showing the semiconductor device A40, and corresponds to Fig. 1 showing the semiconductor device A10.

[0134] In the semiconductor device A40 according to this embodiment, the arrangement positions of the signal terminals are different from those of the semiconductor device A10 according to the first embodiment. The configuration and operation of other parts of this embodiment are the same as those of the first embodiment. The parts of the first to third embodiments and the modified examples described above may be combined in any manner.

[0135] 39 , in the semiconductor device A40 according to this embodiment, the signal terminals 161, 162, 171, 172, 181, and 182 are concentrated in the second direction x on the side where the third power terminal 15 is located. The positions of the signal terminals 161, 162, 171, 172, 181, and 182 in the third direction y are not limited.

[0136] Next, the effects of the manufacturing method of the semiconductor device A40 will be described.

[0137] Also in this embodiment, when the heat dissipation member 70 is fixed to the mold 9 in the first step P1 of the manufacturing method of the semiconductor device A40, each heat dissipation pin 721 of the heat dissipation member 70 is inserted into a corresponding recess 93 of the mold 9, and the abutment surface 92 of the mold 9 abuts against the back surface 713 of the heat dissipation member 70. Therefore, even when a pressure device applies pressure in the first direction z to bond the base material 11 to the heat dissipation member 70, the heat dissipation pins 721 do not buckle.

[0138] In this embodiment, too, the area S1 of the bottom surface of the recess 714 (the area of ​​the contact surface 92 of the mold 9) is larger than the area S2 obtained by summing the areas of the tip surfaces 721a of the multiple heat dissipation pins 721. Therefore, when the contact surface 92 of the mold 9 contacts the back surface 713 of the heat dissipation member 70, the area to which the pressure from the pressure device in the first step P1 is transmitted is larger than when the tip surfaces 721a of the heat dissipation pins 721 contact the mold. This improves the bonding reliability of the bonding member 19 of the semiconductor device A40 according to this embodiment. In the semiconductor device A40 according to this embodiment, the formation of the recess 714 in the heat dissipation member 70 increases the surface area of ​​the heat dissipation member 70, thereby improving heat dissipation. Furthermore, the semiconductor device A40 and its manufacturing method share the same configuration as the semiconductor device A10 and its manufacturing method, thereby achieving the same effects as the semiconductor device A10 and its manufacturing method.

[0139] The signal terminals 161, 162, 171, 172, 181, and 182 may be arranged in a concentrated manner on the side where the first power terminal 13 and the second power terminal 14 are arranged in the second direction x.

[0140] Fifth Embodiment: A semiconductor device A50 according to a fifth embodiment of the present disclosure will be described with reference to FIGS. 40 and 41. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. FIG. 40 is a plan view showing the semiconductor device A50, and corresponds to FIG. 2 showing the semiconductor device A10. FIG. 41 is a right side view showing the semiconductor device A50, and corresponds to FIG. 3 showing the semiconductor device A10.

[0141] The semiconductor device A50 according to this embodiment differs from the semiconductor device A10 according to the first embodiment in the relationship between the heat dissipation member 70 and the sealing resin 50, and the arrangement and shape of each terminal. The configuration and operation of other parts of this embodiment are the same as those of the first embodiment. The parts of the first to fourth embodiments and their modified examples may be combined in any manner.

[0142] As shown in FIG. 41, in a semiconductor device A50 according to this embodiment, the entire main surface 711 and each of the end faces 712 of the base 71 of the heat dissipation member 70 are covered with the sealing resin 50.

[0143] As shown in Figure 40 , the first power terminal 13 and the two second power terminals 14 protrude in the second direction x from the first side surface 53 of the sealing resin 50. There is one third power terminal 15, and it protrudes in the second direction x from the center of the second side surface 54 of the sealing resin 50 in the third direction y. As shown in Figures 40 and 41 , each signal terminal 161, 162, 171, 172, 181, 182 is conductively joined to each wiring layer, protrudes in the second direction x from the second side surface 54 of the sealing resin 50, bends to one side in the first direction z, and extends in the first direction z. The number and arrangement of each terminal are not limited.

[0144] Next, the effects of the manufacturing method of the semiconductor device A50 will be described.

[0145] Also in this embodiment, when the heat dissipation member 70 is fixed to the mold 9 in the first step P1 of the manufacturing method of the semiconductor device A50, each heat dissipation pin 721 of the heat dissipation member 70 is inserted into a corresponding recess 93 of the mold 9, and the abutment surface 92 of the mold 9 abuts against the back surface 713 of the heat dissipation member 70. Therefore, even when a pressure device applies pressure in the first direction z to bond the base material 11 to the heat dissipation member 70, the heat dissipation pins 721 do not buckle.

[0146] In this embodiment, too, the area S1 of the bottom surface of the recess 714 (the area of ​​the contact surface 92 of the mold 9) is larger than the area S2 obtained by summing the areas of the tip surfaces 721a of the multiple heat dissipation pins 721. Therefore, when the contact surface 92 of the mold 9 contacts the back surface 713 of the heat dissipation member 70, the area to which the pressure from the pressure device in the first step P1 is transmitted is larger than when the tip surfaces 721a of the heat dissipation pins 721 contact the mold. This improves the bonding reliability of the bonding member 19 of the semiconductor device A50 according to this embodiment. In the semiconductor device A50 according to this embodiment, the formation of the recess 714 in the heat dissipation member 70 increases the surface area of ​​the heat dissipation member 70, thereby improving heat dissipation. Furthermore, the semiconductor device A50 and its manufacturing method share a configuration common to the semiconductor device A10 and its manufacturing method, thereby achieving the same effects as the semiconductor device A10 and its manufacturing method.

[0147] Sixth Embodiment: A semiconductor device A60 according to a sixth embodiment of the present disclosure will be described with reference to FIGS. 42 and 43. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. FIG. 42 is a plan view showing the semiconductor device A60, and corresponds to FIG. 2 showing the semiconductor device A10. FIG. 43 is a bottom view showing the semiconductor device A60, and corresponds to FIG. 6 showing the semiconductor device A10.

[0148] The semiconductor device A60 according to this embodiment is the semiconductor device A10 according to the first embodiment, except for the heat dissipation member 70, and has three parts joined to the heat dissipation member 70. The configuration and operation of other parts of this embodiment are the same as those of the first embodiment. The parts of the above-described first to fifth embodiments and their modified examples may be combined in any desired manner.

[0149] 42 , in the semiconductor device A60 according to this embodiment, three portions of the semiconductor device A10 excluding the heat dissipation member 70 (portions covered with the sealing resin 50) are joined to the main surface 711 of one heat dissipation member 70 in a line in the third direction y. As shown in FIG. 43 , the heat dissipation member 70 according to this embodiment has heat dissipation portions 72 (plurality of heat dissipation pins 721) and recesses 714 arranged on the rear surface 713 at positions on the main surface 711 where the sealing resin 50 is arranged. The heat dissipation member 70 may also have heat dissipation portions 72 (plurality of heat dissipation pins 721) or recesses 714 arranged on positions on the rear surface 713 where the sealing resin 50 is not arranged on the main surface 711.

[0150] In the manufacturing method of the semiconductor device A60, in a first step P1, three bonding members 19 are placed side by side in the third direction y on a main surface 711 of a heat dissipation member 70 fixed to a mold 9, and three base materials 11 are placed on each bonding member 19. After each base material 11 and the heat dissipation member 70 are bonded via the bonding members 19 by a pressure device, each base material 11 is subjected to processing in a second step P2 to a fourth step P4.

[0151] Next, the effects of the manufacturing method of the semiconductor device A60 will be described.

[0152] Also in this embodiment, when the heat dissipation member 70 is fixed to the mold 9 in the first step P1 of the manufacturing method of the semiconductor device A60, each heat dissipation pin 721 of the heat dissipation member 70 is inserted into a corresponding recess 93 of the mold 9, and the abutment surface 92 of the mold 9 abuts against the back surface 713 of the heat dissipation member 70. Therefore, even when a pressure device applies pressure in the first direction z to bond the base material 11 to the heat dissipation member 70, the heat dissipation pin 721 does not buckle.

[0153] In this embodiment, too, the area S1 of the bottom surface of the recess 714 (the area of ​​the contact surface 92 of the mold 9) is larger than the area S2 obtained by summing the areas of the tip surfaces 721a of the multiple heat dissipation pins 721. Therefore, when the contact surface 92 of the mold 9 contacts the back surface 713 of the heat dissipation member 70, the area to which the pressure from the pressure device in the first step P1 is transmitted is larger than when the tip surfaces 721a of the heat dissipation pins 721 contact the mold. This improves the bonding reliability of the bonding member 19 of the semiconductor device A60 according to this embodiment. In the semiconductor device A60 according to this embodiment, the formation of the recess 714 in the heat dissipation member 70 increases the surface area of ​​the heat dissipation member 70, thereby improving heat dissipation. Furthermore, the semiconductor device A60 and its manufacturing method share a configuration common to the semiconductor device A10 and its manufacturing method, thereby achieving the same effects as the semiconductor device A10 and its manufacturing method.

[0154] In the present embodiment, three portions of the semiconductor device A10 excluding the heat dissipation member 70 are disposed on the main surface 711 of the heat dissipation member 70. However, this is not limitative and two or four or more portions may be disposed. The positions of these portions on the main surface 711 of the heat dissipation member 70 are not limited.

[0155] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0156] The present disclosure includes embodiments described in the following supplementary notes. Supplementary note 1. A semiconductor device comprising: a heat dissipation member (70) having a main surface (711) facing one side in a first direction (z), a back surface (713) facing the other side in the first direction, and a heat dissipation portion (72) protruding from the back surface to the other side in the first direction; a substrate (11) having a conductive layer (121) and bonded to the main surface; and a semiconductor element (20) bonded to the conductive layer, wherein the heat dissipation member further comprises a recess (714) recessed from the back surface to one side in the first direction. Supplementary note 2. The semiconductor device according to Supplementary note 1, wherein the heat dissipation portion has a protrusion (721b) at a tip portion thereof protruding in a direction perpendicular to the first direction. Supplementary note 3. The semiconductor device according to any one of Supplementary Notes 1 to 4, further comprising a bonding member (19) interposed between the main surface of the heat dissipation member and the base material, the bonding member having a first metal layer (191), a second metal layer (192) stacked on one side of the first metal layer in the first direction, and a third metal layer (193) stacked on the other side of the first metal layer in the first direction, the second metal layer being solid-state bonded to the base material, and the third metal layer being solid-state bonded to the heat dissipation member. Supplementary Note 4. The semiconductor device according to Supplementary Note 3, further comprising a bonding member (19) interposed between the main surface of the heat dissipation member and the base material, the bonding member having a first metal layer (191), a second metal layer (192) stacked on one side of the first metal layer in the first direction, and a third metal layer (193) stacked on the other side of the first metal layer in the first direction, the second metal layer being solid-state bonded to the base material, and the third metal layer being solid-state bonded to the heat dissipation member. The semiconductor device according to any one of Supplements 1 to 4, further comprising a bonding layer (29) interposed between the main surface of the heat dissipation member and the base, the bonding layer being a sintered metal. Supplementary Note 6-1. The semiconductor device according to any one of Supplements 1 to 4, wherein the heat dissipation member and the base are solid-state bonded. Supplementary Note 7. The semiconductor device according to any one of Supplements 1 to 6, wherein the heat dissipation portion includes a plurality of rod-shaped heat dissipation pins (721) each extending in the first direction. Supplementary Note 7-1. The semiconductor device according to Supplementary Note 7, wherein each of the plurality of heat dissipation pins has a circular cross section perpendicular to the first direction.Appendix 7-2. The semiconductor device according to Appendix 7, wherein each of the plurality of heat dissipation fins has a rectangular cross section perpendicular to the first direction. Appendix 7-3. The semiconductor device according to Appendix 7, wherein the plurality of heat dissipation fins are arranged in a staggered pattern when viewed in the first direction. Appendix 7-4. The semiconductor device according to Appendix 7, wherein the plurality of heat dissipation fins are arranged in a matrix pattern when viewed in the first direction. Appendix 8. The semiconductor device according to any of Appendixes 1 to 6, wherein the heat dissipation portion includes a plurality of plate-shaped heat dissipation fins (722). Appendix 9. The semiconductor device according to any of Appendixes 1 to 8, further comprising a sealing resin (50) covering the conductive layer and the semiconductor element, wherein the heat dissipation member further has an end face (712) facing in a direction perpendicular to the first direction, the sealing resin being located inward from the periphery of the heat dissipation member when viewed in the first direction and in contact with the main surface, and the end face being exposed from the sealing resin. Appendix 10. The semiconductor device according to any one of Supplementary Notes 1 to 9, further comprising: a second semiconductor element (22) bonded to the conductive layer; a first signal terminal (161) for controlling the semiconductor element; and a second signal terminal (162) for controlling the second semiconductor element, wherein the first signal terminal and the second signal terminal are each disposed on the main surface and extend in the first direction. Supplementary Note 10-1. The semiconductor device according to Supplementary Note 10, wherein the semiconductor element and the second semiconductor element each have a gate electrode (213, 223) facing one side of the first direction, the first signal terminal is conductively connected to the gate electrode (213) of the semiconductor element via a conductive first wire (41), and the second signal terminal is conductively connected to the gate electrode (223) of the second semiconductor element via a conductive fourth wire (44). Supplementary Note 11. 11. The semiconductor device according to claim 10, further comprising a terminal support (61) interposed between the main surface and the first signal terminal and having a mounting layer (611) that is an insulator.Appendix 12. The semiconductor device according to Appendix 11, wherein the terminal support further includes a wiring layer (613) stacked on one side of the mounting layer in the first direction, and a metal layer (612) stacked on the other side of the mounting layer in the first direction and joined to the conductive layer so as to face the main surface. Appendix 13. A vehicle comprising: a drive source (832); and the semiconductor device according to any of Appendixes 1 to 12, wherein the semiconductor device is electrically connected to the drive source. Appendix 14. A method for manufacturing a semiconductor device, comprising: a first step of bonding a substrate to a main surface of a heat dissipation member while applying pressure with a pressure device, the main surface of the heat dissipation member having a main surface facing one side in a first direction, a back surface facing the other side in the first direction, and a heat dissipation portion protruding from the back surface to the other side in the first direction, wherein a mold to which the heat dissipation member is fixed includes an abutting portion that abuts against the back surface. Appendix 15. Appendix 16. The method for manufacturing a semiconductor device according to Appendix 14, wherein the mold comprises a contact surface facing one side in the first direction and a mold recess recessed from the contact surface to the other side in the first direction, and the contact portion is the contact surface. Appendix 16. The method for manufacturing a semiconductor device according to Appendix 14, wherein the mold comprises a mold upper surface facing one side in the first direction and a mold protrusion protruding from the mold upper surface to one side in the first direction, and the contact portion is the tip surface of the mold protrusion. Appendix 16-1. The method for manufacturing a semiconductor device according to any of Appendixes 14 to 16, wherein the contact portion of the mold is harder than the heat dissipation member. Appendix 17. The method for manufacturing a semiconductor device according to any of Appendixes 14 to 16, wherein in the first step, the tip of the heat dissipation portion does not contact the mold. Appendix 18. The method for manufacturing a semiconductor device according to any of Appendixes 14 to 16, wherein in the first step, the tip of the heat dissipation portion contacts the mold. Appendix 19. The method for manufacturing a semiconductor device according to any one of appendices 14 to 18, wherein in the first step, the heat dissipation member and the base material are joined by solid-state welding via a joining member. Appendix 20. The method for manufacturing a semiconductor device according to any one of appendices 14 to 18, wherein in the first step, the heat dissipation member and the base material are joined via a sintered metal.Appendix 21. The method for manufacturing a semiconductor device according to any one of appendices 14 to 20, further comprising a second step, performed after the first step, of bonding a semiconductor element to the base material while the heat dissipation member is fixed to the mold.

[0157] A10 to A18, A20, A30, A40, A50, A60: semiconductor device B: vehicle 11: base material 111: insulating layer 111A: rim 112: metal layer 112a: plating layer 121: first conductive layer 121A: first mounting surface 122: second conductive layer 122A: second mounting surface 13: first power terminal 131: first connecting surface 14: second power terminal 141: second connecting surface 15: third power terminal 151: third connecting surface 161: first signal terminal 162: second signal terminal 171: third signal terminal 172: fourth signal terminal 181: fifth signal terminal 182: sixth signal terminal 19: joining member 191: first metal layer 192: second metal layer 193: third metal layer 20: Semiconductor element 21: First semiconductor element 211: First electrode 212: Second electrode 213: First gate electrode 214: First detection electrode 22: Second semiconductor element 221: Third electrode 222: Fourth electrode 223: Second gate electrode 224: Second detection electrode 23: Thermistor 29: First bonding layer 31: First conductive member 311: Main portion 312: First bonding portion 313: First connecting portion 314: Second bonding portion 315: Second connecting portion 32: Second conductive member 321: Main portion 322: Third bonding portion 323: Third connecting portion 326: Middle portion 327: Horizontal beam portion 39: Second bonding layer 41: First wire 42: Second wire 44: Fourth wire 45: Fifth wire 46: Sixth wire 47: Seventh wire 50: Sealing resin 501: Periphery 51: Top surface 52: Bottom surface 53: First side surface 54: Second side surface 55: Recess 55A: First recess 55B: Second recess 55C: Third recess 61: First terminal support 611: First mounting layer 612: First metal layer 613: First gate wiring layer 614: First detection wiring layer 615: First temperature detection wiring layer 616: Second detection wiring layer 62: Second terminal support 621: Second mounting layer 622: Second metal layer 623: Second gate wiring layer 624: Third detection wiring layer 625: Second temperature detection wiring layer 626: Fourth detection wiring layer 63: Sleeve 631: End surface 70: Heat dissipation member 701: Periphery71: Base 71a: Plating layer 711: Main surface 712: End surface 713: Back surface 714: Recessed portion 715: Inner peripheral surface 72: Heat dissipation portion 721: Heat dissipation pin 721a: Tip surface 721b: Protrusion 722: Heat dissipation fin 73: Engagement portion 74: Positioning hole 81: On-board charger 82: Storage battery 83: Drive system 831: Inverter 832: Drive source 9: Mold 91: Top surface 92: Contact surface 93: Recessed portion 93a: Bottom surface 94: Positioning pin 95: Protrusion 95a: Tip surface P1 to P4: 1st to 4th steps z: 1st direction x: 2nd direction y: 3rd direction

Claims

1. A semiconductor device comprising: a heat dissipation member having a main surface facing one side in a first direction, a back surface facing the other side in the first direction, and a heat dissipation portion protruding from the back surface to the other side in the first direction; a substrate having a conductive layer and bonded to the main surface; and a semiconductor element bonded to the conductive layer, wherein the heat dissipation member further has a recess recessed from the back surface to one side in the first direction.

2. The semiconductor device according to claim 1, wherein said heat dissipation portion has a protrusion at a tip portion thereof that protrudes in a direction perpendicular to said first direction.

3. The semiconductor device according to claim 1 or 2, wherein the recess has a bottom surface facing the other side in the first direction, the heat dissipation portion has a tip surface facing the other side in the first direction, and a first total area of ​​the bottom surface is larger than a second total area of ​​the tip surface.

4. The semiconductor device according to claim 3, wherein said first total area is at least twice as large as said second total area.

5. A semiconductor device according to any one of claims 1 to 4, further comprising a bonding member interposed between the main surface of the heat dissipation member and the base material, the bonding member having a first metal layer, a second metal layer stacked on one side of the first metal layer in the first direction, and a third metal layer stacked on the other side of the first metal layer in the first direction, the second metal layer being solid-state bonded to the base material, and the third metal layer being solid-state bonded to the heat dissipation member.

6. The semiconductor device according to any one of claims 1 to 4, further comprising a bonding layer interposed between the main surface of the heat dissipation member and the base material, the bonding layer being made of a sintered metal.

7. The semiconductor device according to claim 1, wherein said heat dissipation portion includes a plurality of rod-shaped heat dissipation pins each extending in said first direction.

8. The semiconductor device according to any one of claims 1 to 6, wherein said heat dissipation portion includes a plurality of heat dissipation fins, each of which is plate-shaped.

9. A semiconductor device as described in any one of claims 1 to 8, further comprising a sealing resin covering the conductive layer and the semiconductor element, wherein the heat dissipation member further comprises an end face facing in a direction perpendicular to the first direction, the sealing resin being located inward from the periphery of the heat dissipation member when viewed in the first direction and in contact with the main surface, and the end face being exposed from the sealing resin.

10. A semiconductor device according to any one of claims 1 to 9, further comprising: a second semiconductor element bonded to the conductive layer; a first signal terminal for controlling the semiconductor element; and a second signal terminal for controlling the second semiconductor element, wherein the first signal terminal and the second signal terminal are each disposed on the main surface and extend in the first direction.

11. The semiconductor device according to claim 10, further comprising a terminal support interposed between said main surface and said first signal terminal and having a mounting layer made of an insulator.

12. The semiconductor device according to claim 11, wherein the terminal support further comprises: a wiring layer stacked on one side of the mounting layer in the first direction; and a metal layer stacked on the other side of the mounting layer in the first direction and joined to the conductive layer so as to face the main surface.

13. A vehicle comprising: a drive source; and a semiconductor device according to any one of claims 1 to 12, wherein the semiconductor device is electrically connected to the drive source.

14. A method for manufacturing a semiconductor device, comprising: a first step of bonding a substrate to the main surface of a heat dissipation member having a main surface facing one side in a first direction, a back surface facing the other side in the first direction, and a heat dissipation portion protruding from the back surface to the other side in the first direction, while applying pressure with a pressure device; and a mold to which the heat dissipation member is fixed has an abutment portion that abuts against the back surface.

15. The method for manufacturing a semiconductor device according to claim 14, wherein the mold has an abutment surface facing one side in the first direction and a mold recess recessed from the abutment surface toward the other side in the first direction, and the abutment portion is the abutment surface.

16. A method for manufacturing a semiconductor device as described in claim 14, wherein the mold has a mold upper surface facing one side in the first direction and a mold protrusion protruding from the mold upper surface to one side in the first direction, and the abutment portion is a tip surface of the mold protrusion.

17. The method for manufacturing a semiconductor device according to any one of claims 14 to 16, wherein in the first step, the tip of the heat dissipation portion does not come into contact with the mold.

18. The method for manufacturing a semiconductor device according to any one of claims 14 to 16, wherein in the first step, the tip of the heat dissipation portion comes into contact with the mold.

19. A method for manufacturing a semiconductor device according to any one of claims 14 to 18, wherein in the first step, the heat dissipation member and the base material are joined by solid-state bonding via a joining member.

20. A method for manufacturing a semiconductor device according to any one of claims 14 to 18, wherein in the first step, the heat dissipation member and the base material are joined via a sintered metal.

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