Semiconductor device and vehicle

The semiconductor device addresses long conductive paths and high parasitic resistance by arranging semiconductor elements with bonded electrodes on a conductive layer, reducing power loss through optimized path lengths and inductance.

WO2025177840A1PCT designated stage Publication Date: 2025-08-28ROHM CO LTD
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Patent Information

Application Number
PCT/JP2025/003722
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-22
Filing Date
2025-02-05
Publication Date
2025-08-28

AI Technical Summary

Technical Problem

Conventional semiconductor devices with multiple semiconductor elements have long conductive paths and high parasitic resistance and inductance due to wiring relay regions, leading to increased power loss.

Method used

A semiconductor device design with a conductive member and semiconductor elements arranged such that their electrodes are bonded to the same side of a conductive layer, reducing the length of conductive paths and using a single conductive member to minimize parasitic inductance.

Benefits of technology

This configuration reduces power loss by shortening conductive paths and minimizing parasitic inductance, enhancing the efficiency of power conversion.

✦ Generated by Eureka AI based on patent content.

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Abstract

This semiconductor device is provided with a conductive member (first conductive layer), and a first semiconductor element and a second semiconductor element that are positioned on one side in a first direction of the first conductive layer. The first semiconductor element has a first electrode and a second electrode that are positioned on opposite sides to each other in the first direction, and a first gate electrode. The second semiconductor element has a third electrode and a fourth electrode that are positioned on opposite sides to each other in the first direction, and a second gate electrode. The polarity of the second electrode and the polarity of the third electrode are different from each other. The second electrode and the third electrode are each conductively bonded to the conductive member. When the first gate electrode is positioned on the same side as the first electrode in the first direction, the second gate electrode is positioned on the same side as the fourth electrode in the first direction.
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Description

Semiconductor device and vehicle

[0001] The present disclosure relates to a semiconductor device and a vehicle equipped with the semiconductor device.

[0002] Conventionally, semiconductor devices equipped with multiple semiconductor elements having switching functions, such as MOSFETs and IGBTs, have been widely known. Such semiconductor devices are primarily used for power conversion. Patent Document 1 discloses an example of a semiconductor device equipped with multiple semiconductor elements having switching functions. In the semiconductor device, multiple wiring layers (metal patterns 4 a, 4 b) are arranged on a surface of an insulating substrate. Furthermore, in the semiconductor device, multiple wiring relay regions are arranged on the surface of the insulating substrate. Each of the multiple wiring relay regions, together with the multiple wiring layers, constitutes a conductive path of the semiconductor device.

[0003] The semiconductor device disclosed in Patent Document 1 includes multiple wiring relay regions. This results in a relatively long conductive path length in the semiconductor device, which increases parasitic resistance. Furthermore, the conductive paths between the multiple wiring relay regions and the multiple semiconductor elements are wires. Wire conductive paths are one factor that increases the parasitic inductance of the semiconductor device.

[0004] JP 2009-158787 A

[0005] [Summary] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can reduce power loss.

[0006] A semiconductor device provided by a first aspect of the present disclosure includes a conductive member and first and second semiconductor elements located on one side of the conductive member in a first direction. The first semiconductor element has a first electrode and a second electrode located opposite each other in the first direction, and a first gate electrode. The second semiconductor element has a third electrode and a fourth electrode located opposite each other in the first direction, and a second gate electrode. The polarity of the second electrode is different from the polarity of the third electrode. The second electrode and the third electrode are each conductively bonded to the conductive member. When the first gate electrode is located on the same side as the first electrode in the first direction, the second gate electrode is located on the same side as the fourth electrode in the first direction. When the first gate electrode is located on the same side as the second electrode in the first direction, the second gate electrode is located on the same side as the third electrode in the first direction.

[0007] A vehicle provided by a second aspect of the present disclosure includes a drive source and a semiconductor device. The semiconductor device is electrically connected to the drive source. Compared to the semiconductor device provided by the first aspect of the present disclosure, the semiconductor device further includes a first conductive layer, a first conductive member, an insulating layer, a heat dissipation layer, a first signal wiring, a second signal wiring, a sealing resin, a first signal terminal, and a second signal terminal. The conductive member is the first conductive layer.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0009] FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view corresponding to FIG. 1 , seen through a sealing resin. FIG. 3 is a plan view corresponding to FIG. 2 , seen through a first conductive member and a second conductive member. FIG. 4 is a bottom view of the semiconductor device shown in FIG. 1 . FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2 . FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 2 . FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 2 . FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 2 . FIG. 9 is a partial enlarged view of FIG. 5 , showing a first semiconductor element and its vicinity. FIG. 10 is a partial enlarged view of FIG. 5 , showing a second semiconductor element and its vicinity. FIG. 11 is a plan view of a first semiconductor element included in the semiconductor device shown in FIG. 1 . FIG. 12 is a bottom view of the first semiconductor element included in the semiconductor device shown in FIG. 1 . FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 11 . FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 11 . FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 11 . FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 11 . FIG. 17 is a schematic diagram of a vehicle equipped with the semiconductor device shown in FIG. 1 . FIG. 18 is a plan view of a semiconductor device according to a second embodiment of the present disclosure, seen through the sealing resin. FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 18 . FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 18 . FIG. 21 is a plan view of a semiconductor device according to a third embodiment of the present disclosure, seen through the sealing resin. FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. 21 . FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. 21 . FIG. 24 is a plan view of a semiconductor device according to a fourth embodiment of the present disclosure. FIG. 25 is a plan view corresponding to FIG. 24 , seen through the sealing resin. Fig. 26 is a cross-sectional view taken along line XXVI-XXVI in Fig. 25. Fig. 27 is a cross-sectional view taken along line XXVII-XXVII in Fig. 25. Fig. 28 is a plan view of a semiconductor module according to an embodiment of the present disclosure. Fig. 29 is a cross-sectional view taken along line XXIX-XXIX in Fig. 28. Fig. 30 is a plan view of a semiconductor device according to a fifth embodiment of the present disclosure. Fig. 31 is a plan view corresponding to Fig. 30 , seen through the sealing resin. Fig. 32 is a plan view corresponding to Fig. 31 , seen through the first conductive member.Fig. 33 is a cross-sectional view taken along line XXXIII-XXXIII in Fig. 31. Fig. 34 is a cross-sectional view taken along line XXXIV-XXXIV in Fig. 31. Fig. 35 is a partial enlarged view of Fig. 33 showing the first semiconductor element and its vicinity. Fig. 36 is a partial enlarged view of Fig. 33 showing the second semiconductor element and its vicinity. Fig. 37 is a plan view of a semiconductor device according to a sixth embodiment of the present disclosure.

[0010] DETAILED DESCRIPTION The present disclosure will be described in detail with reference to the accompanying drawings.

[0011] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 10 . The semiconductor device A10 includes an insulating layer 11, a heat dissipation layer 12, a first conductive layer 13, a first relay layer 16, two second relay layers 17, first signal wiring 21 to fourth signal wiring 24, a plurality of first semiconductor elements 31, a plurality of second semiconductor elements 32, a first conductive member 48, a second conductive member 49, and a sealing resin 60. The semiconductor device A10 further includes a first substrate 27, a plurality of sleeves 29, a first power terminal 41, two second power terminals 42, a third power terminal 43, a first signal terminal 44 to a fourth signal terminal 47, and a first wire 51 to a fourth wire 54. For ease of understanding, FIG. 2 shows the sealing resin 60 in a see-through manner. For ease of understanding, FIG. 3 shows the first conductive member 48 and the second conductive member 49 in a see-through manner compared to FIG. 2. 2, the outline of the transmitted sealing resin 60 is shown by an imaginary line (two-dot chain line). In Fig. 3, the transmitted first conductive member 48, second conductive member 49, and sealing resin 60 are shown by imaginary lines.

[0012] In the description of the semiconductor device A10, for convenience, for example, the normal direction of the first mounting surface 131 of the first conductive layer 13 described later will be referred to as the "first direction z." Furthermore, for example, the direction perpendicular to the first direction z will be referred to as the "second direction x." Furthermore, for example, the direction perpendicular to the first direction z and the second direction x will be referred to as the "third direction y." Furthermore, in the description of the semiconductor device A10, "overlapping" refers to two different elements, and includes cases where one element entirely overlaps the other, as well as cases where one element partially overlaps the other.

[0013] The semiconductor device A10 converts DC power applied to a first power terminal 41 and two second power terminals 42 into AC power using a plurality of first semiconductor elements 31 and a plurality of second semiconductor elements 32. The converted AC power is input to a power supply target such as a motor from a third power terminal 43. The semiconductor device A10 constitutes part of a power conversion circuit such as an inverter.

[0014] As shown in FIGS. 5 to 8 , the sealing resin 60 covers the plurality of first semiconductor elements 31 and the plurality of second semiconductor elements 32. The sealing resin 60 has electrical insulating properties. The sealing resin 60 is made of a material containing, for example, black epoxy resin. The sealing resin 60 has a top surface 61, a bottom surface 62, a first side surface 63, and a second side surface 64.

[0015] 5 to 8, the top surface 61 faces the same side in the first direction z as a first mounting surface 131 of the first conductive layer 13, which will be described later. The bottom surface 62 faces the opposite side to the top surface 61 in the first direction z.

[0016] 1 and 4 to 6, the first side surface 63 and the second side surface 64 face in opposite directions in the second direction x. The first side surface 63 and the second side surface 64 are connected to the top surface 61 and the bottom surface 62, respectively.

[0017] As shown in FIGS. 5 to 8 , the insulating layer 11 is located on the opposite side of the first conductive layer 13 in the first direction z from the plurality of first semiconductor elements 31 and the plurality of second semiconductor elements 32. The insulating layer 11 carries the first conductive layer 13, the first relay layer 16, and two second relay layers 17. The elements including the insulating layer 11, the heat dissipation layer 12, the first conductive layer 13, the first relay layer 16, and the two second relay layers 17 are composed of a substrate formed, for example, by active metal brazing (AMB). The dimension of the insulating layer 11 in the first direction z is smaller than the dimensions of the heat dissipation layer 12 and the first conductive layer 13 in the first direction z. The insulating layer 11 is covered with a sealing resin 60.

[0018] As shown in FIGS. 5 to 8 , the heat dissipation layer 12 is located on the opposite side of the insulating layer 11 from the first conductive layer 13 in the first direction z. The heat dissipation layer 12 is bonded to the insulating layer 11. As shown in FIG. 4 , the heat dissipation layer 12 is exposed to the outside from the bottom surface 62 of the sealing resin 60. When the semiconductor device A10 is in use, the heat dissipation layer 12 is bonded to a heat dissipation member 71, which will be described later. The composition of the heat dissipation layer 12 includes copper (Cu). When viewed in the first direction z, the heat dissipation layer 12 is located inward from the periphery 111 of the insulating layer 11.

[0019] As shown in FIGS. 5 to 7 , the first conductive layer 13 is located on one side of the multiple first semiconductor elements 31 in the first direction z. Additionally, the first conductive layer 13 is located on the opposite side of the heat dissipation layer 12 relative to the insulating layer 11 in the first direction z. The multiple first semiconductor elements 31, the multiple second semiconductor elements 32, and the first substrate 27 are mounted on the first conductive layer 13. The first conductive layer 13 contains copper. The first conductive layer 13 is covered with a sealing resin 60. As shown in FIG. 3 , the first conductive layer 13 overlaps the heat dissipation layer 12 as viewed in the first direction z. As viewed in the first direction z, the first conductive layer 13 is located inward from the periphery 111 of the insulating layer 11. As shown in FIGS. 5 to 8 , the first conductive layer 13 has a first mounting surface 131 facing away from the side facing the insulating layer 11 in the first direction z.

[0020] In the semiconductor device A10, the conductive member 80 is the first conductive layer 13.

[0021] As shown in FIG. 5 , the first relay layer 16 is located on the opposite side of the insulating layer 11 from the heat dissipation layer 12 in the first direction z. As shown in FIG. 3 , the first relay layer 16 is located on one side of the first conductive layer 13 in the second direction x. The first relay layer 16 is a conductor. The first relay layer 16 supports the first power terminal 41. The composition of the first relay layer 16 includes copper. The first relay layer 16 is covered with a sealing resin 60. As viewed in the first direction z, the first conductive layer 13 overlaps the heat dissipation layer 12. As viewed in the first direction z, the first relay layer 16 is located inward from the periphery 111 of the insulating layer 11.

[0022] As shown in FIG. 6 , the two second relay layers 17 are located on the opposite side of the heat dissipation layer 12 from the insulating layer 11 in the first direction z. As shown in FIG. 3 , the two second relay layers 17 are located on the opposite side of the first relay layer 16 in the third direction y. The two second relay layers 17 are conductors. The two second relay layers 17 individually support the two second power terminals 42. The composition of the two second relay layers 17 includes copper. The two second relay layers 17 are covered with a sealing resin 60. As viewed in the first direction z, each of the two second relay layers 17 overlaps the heat dissipation layer 12. As viewed in the first direction z, the two second relay layers 17 are located inward from the periphery 111 of the insulating layer 11.

[0023] As shown in FIGS. 5 to 7 , the multiple first semiconductor elements 31 are bonded to the first mounting surface 131 of the first conductive layer 13. Each of the multiple first semiconductor elements 31 is the same element. Here, the body 315 (details of which will be described later) of each of the multiple first semiconductor elements 31 shown in FIG. 9 is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET). The body 315 may also include a field-effect transistor such as a metal-insulator-semiconductor field-effect transistor (MISFET) or a bipolar transistor such as an insulated gate bipolar transistor (IGBT). In the description of the semiconductor device A10, the body 315 of each of the multiple first semiconductor elements 31 is an n-channel MOSFET with a vertical structure. The body 315 includes a compound semiconductor substrate. The compound semiconductor substrate contains silicon carbide (SiC). The multiple first semiconductor elements 31 are arranged along the third direction y.

[0024] As shown in FIGS. 3 and 9 , each of the plurality of first semiconductor elements 31 has a first electrode 311 , a second electrode 312 , a first gate electrode 313 and a first detection electrode 314 .

[0025] 9 , the first electrode 311 is located on the side of the first conductive layer 13 opposite to the side facing the first mounting surface 131 in the first direction z. In the semiconductor device A10, a current corresponding to the power before being converted by the first semiconductor element 31 flows through the first electrode 311. In other words, the first electrode 311 corresponds to the drain of the first semiconductor element 31.

[0026] As shown in FIG. 9 , the second electrode 312 is located on the opposite side of the first electrode 311 in the first direction z. In the semiconductor device A10, a current corresponding to the power converted by the first semiconductor element 31 flows through the second electrode 312. That is, the second electrode 312 corresponds to the source of the first semiconductor element 31. The second electrode 312 is conductively bonded to the first mounting surface 131 of the first conductive layer 13 via the bonding layer 39. As a result, the second electrode 312 of each of the multiple first semiconductor elements 31 is electrically connected to the first conductive layer 13. The bonding layer 39 is, for example, solder. Alternatively, the bonding layer 39 may be a sintered body of metal particles. In this case, the metal particles include, for example, silver (Ag).

[0027] 9 , the first gate electrode 313 is located on the same side as the first electrode 311 in the first direction z. A gate voltage for driving the first semiconductor element 31 is applied to the first gate electrode 313. As shown in FIG. 3 , the area of ​​the first gate electrode 313 is smaller than the area of ​​the second electrode 312 when viewed in the first direction z.

[0028] 3 , the first detection electrode 314 is located on the same side as the first electrode 311 and the first gate electrode 313 in the first direction z. As will be described later, the first detection electrode 314 is electrically connected to the second electrode 312. Therefore, a voltage equivalent to the voltage applied to the second electrode 312 is applied to the first detection electrode 314. When viewed in the first direction z, the area of ​​the first detection electrode 314 is approximately equal to the area of ​​the first gate electrode 313.

[0029] As shown in Figures 5, 6 and 8, the multiple second semiconductor elements 32 are bonded to the first mounting surface 131 of the first conductive layer 13. Each of the multiple second semiconductor elements 32 is the same element as the body 315 of each of the multiple first semiconductor elements 31 shown in Figure 9. Therefore, the multiple second semiconductor elements 32 are n-channel MOSFETs with a vertical structure. The multiple second semiconductor elements 32 are arranged along the third direction y.

[0030] As shown in FIG. 10 , each of the plurality of second semiconductor elements 32 has a third electrode 321 , a fourth electrode 322 and a second gate electrode 323 .

[0031] 10 , the third electrode 321 faces the first mounting surface 131 of the first conductive layer 13. In the semiconductor device A10, a current corresponding to the power before being converted by the second semiconductor element 32 flows through the third electrode 321. That is, the third electrode 321 corresponds to the drain of the second semiconductor element 32. Therefore, the polarity of the third electrode 321 is different from the polarity of the second electrode 312 of each of the multiple first semiconductor elements 31. The third electrode 321 is conductively bonded to the first mounting surface 131 via the bonding layer 39. As a result, the third electrode 321 of each of the multiple second semiconductor elements 32 is electrically connected to the first conductive layer 13.

[0032] 10 , the fourth electrode 322 is located on the opposite side to the third electrode 321 in the first direction z. In the semiconductor device A10, a current corresponding to the power converted by the second semiconductor element 32 flows through the fourth electrode 322. In other words, the fourth electrode 322 corresponds to the source of the second semiconductor element 32.

[0033] 10 , the second gate electrode 323 is located on the same side as the fourth electrode 322 in the first direction z. A gate voltage for driving the second semiconductor element 32 is applied to the second gate electrode 323. As shown in FIG. 3 , the area of ​​the second gate electrode 323 is smaller than the area of ​​the fourth electrode 322 when viewed in the first direction z.

[0034] 5 and 6 , the first substrate 27 is located on the opposite side of the insulating layer 11 from the heat dissipation layer 12 in the first direction z. As shown in Fig. 3 , the first substrate 27 is located between the multiple first semiconductor elements 31 and the multiple second semiconductor elements 32 when viewed in the first direction z. The first substrate 27 has a first insulating layer 271 and a first metal layer 272.

[0035] 3 and 5, the first insulating layer 271 carries the first signal wiring 21 to the fourth signal wiring 24. The first insulating layer 271 is made of, for example, ceramics. Alternatively, the first insulating layer 271 may be made of a resin sheet.

[0036] 5 and 6 , the first metal layer 272 is located between the first mounting surface 131 of the first conductive layer 13 and the first insulating layer 271 in the first direction z. The first metal layer 272 is bonded to the first insulating layer 271. The first metal layer 272 contains copper. The first metal layer 272 is bonded to the first mounting surface 131 via the bonding layer 39.

[0037] 5 , the first signal wiring 21 is located on the opposite side of the first conductive layer 13 in the first direction z with respect to the first insulating layer 271 of the first substrate 27. Therefore, the first signal wiring 21 is located on the opposite side of the heat dissipation layer 12 in the first direction z with respect to the insulating layer 11. The first signal wiring 21 is bonded to the first insulating layer 271. The first signal wiring 21 extends in the third direction y. The composition of the first signal wiring 21 includes copper. The first signal wiring 21 is covered with a sealing resin 60.

[0038] As shown in FIG. 5 , the second signal wiring 22 is located on the opposite side of the first conductive layer 13 in the first direction z with respect to the first insulating layer 271 of the first substrate 27. Therefore, the second signal wiring 22 is located on the opposite side of the heat dissipation layer 12 in the first direction z with respect to the insulating layer 11. As shown in FIG. 3 , the second signal wiring 22 is located between the first signal wiring 21 and the multiple first semiconductor elements 31 in the second direction x. The second signal wiring 22 is bonded to the first insulating layer 271. The second signal wiring 22 extends in the third direction y. The composition of the second signal wiring 22 includes copper. The second signal wiring 22 is covered with a sealing resin 60.

[0039] As shown in FIG. 5 , the third signal wiring 23 is located on the opposite side of the first conductive layer 13 from the first insulating layer 271 of the first substrate 27 in the first direction z. Therefore, the third signal wiring 23 is located on the opposite side of the heat dissipation layer 12 from the insulating layer 11 in the first direction z. As shown in FIG. 3 , the third signal wiring 23 is located on the opposite side of the first semiconductor elements 31 from the first signal wiring 21 in the second direction x and adjacent to the first signal wiring 21 in the second direction x. The third signal wiring 23 is bonded to the first insulating layer 271. The third signal wiring 23 extends in the third direction y. The third signal wiring 23 contains copper. The third signal wiring 23 is covered with a sealing resin 60.

[0040] As shown in FIG. 5 , the fourth signal wiring 24 is located on the opposite side of the first conductive layer 13 in the first direction z with respect to the first insulating layer 271 of the first substrate 27. Therefore, the fourth signal wiring 24 is located on the opposite side of the heat dissipation layer 12 with respect to the insulating layer 11 in the first direction z. As shown in FIG. 3 , the fourth signal wiring 24 is located on the opposite side of the first signal wiring 21 with respect to the third signal wiring 23 in the second direction x. The fourth signal wiring 24 is bonded to the first insulating layer 271. The fourth signal wiring 24 extends in the third direction y. The composition of the fourth signal wiring 24 includes copper. The fourth signal wiring 24 is covered with a sealing resin 60.

[0041] 3 and 6, the multiple sleeves 29 are conductively bonded to any one of the first signal wiring 21 to the fourth signal wiring 24 via a bonding layer 39. Each of the multiple sleeves 29 has a cylindrical shape extending in the first direction z. The multiple first side surfaces 63 are made of a conductive material such as metal.

[0042] As shown in Figures 3 and 5, the first power terminal 41 is conductively bonded to the first relay layer 16. A portion of the first power terminal 41 protrudes from a first side surface 63 of the sealing resin 60 to the outside. In the semiconductor device A10, the first power terminal 41 is a P terminal (positive electrode) to which DC power to be converted is applied. The first power terminal 41 contains copper. A first mounting hole 411 is provided in the first power terminal 41. The first mounting hole 411 is exposed to the outside from the sealing resin 60. The first mounting hole 411 penetrates in the first direction z.

[0043] As shown in FIGS. 3 and 6 , the two second power terminals 42 are individually conductively bonded to the two second relay layers 17. A portion of each of the two second power terminals 42 protrudes from the first side surface 63 of the sealing resin 60 to the outside. In the semiconductor device A10, the two second power terminals 42 are N terminals (negative electrodes) to which DC power to be converted is applied. The composition of the two second power terminals 42 includes copper. A second mounting hole 421 is provided in each of the two second power terminals 42. The second mounting hole 421 is exposed to the outside from the sealing resin 60. The second mounting hole 421 penetrates in the first direction z.

[0044] As shown in FIGS. 3 and 5 , the third power terminal 43 is conductively bonded to the first mounting surface 131 of the first conductive layer 13. This electrically connects the third power terminal 43 to the first conductive layer 13, the second electrodes 312 of the first semiconductor elements 31, and the third electrodes 321 of the second semiconductor elements 32. The third power terminal 43 is located on the opposite side of the first power terminal 41 from the first semiconductor elements 31 and the second semiconductor elements 32 in the second direction x. A portion of the third power terminal 43 protrudes from the second side surface 64 of the sealing resin 60. The AC power converted by the first semiconductor elements 31 and the second semiconductor elements 32 is output from the third power terminal 43. The third power terminal 43 contains copper. The third power terminal 43 has a third mounting hole 431. The third mounting hole 431 is exposed to the outside from the sealing resin 60. The third mounting hole 431 penetrates in the first direction z.

[0045] As shown in FIG. 5 , the first conductive member 48 is located on the opposite side of the first conductive layer 13 with respect to the multiple first semiconductor elements 31. The first conductive member 48 is spaced from the first conductive layer 13. The first conductive member 48 is a metal clip. The first conductive member 48 contains copper. The first conductive member 48 is covered with a sealing resin 60. One side of the first conductive member 48 in the second direction x is conductively bonded to the first power terminal 41 via the bonding layer 39. This allows the first conductive member 48 to be electrically connected to the first power terminal 41 and the first relay layer 16. As shown in FIG. 2 , the first conductive member 48 overlaps the first power terminal 41 when viewed in the first direction z. As shown in FIG. 9 , the other side of the first conductive member 48 in the second direction x is conductively bonded to the first electrodes 311 of each of the multiple first semiconductor elements 31 via the bonding layer 39. As a result, the first conductive member 48 is electrically connected to the first electrodes 311 of each of the multiple first semiconductor elements 31. Therefore, the first power terminal 41 is electrically connected to the first electrodes 311 of each of the multiple first semiconductor elements 31.

[0046] As shown in FIGS. 2 and 7 , the second conductive member 49 is located on the opposite side of the first conductive layer 13 with respect to the first conductive member 48. The second conductive member 49 is spaced apart from the first conductive layer 13 and the first conductive member 48. As viewed in the first direction z, the second conductive member 49 overlaps the first conductive member 48. The second conductive member 49 is a metal clip. The second conductive member 49 contains copper. The second conductive member 49 is covered with a sealing resin 60. One side of the second conductive member 49 in the second direction x is conductively bonded to two second power terminals 42 via a bonding layer 39. As a result, the second conductive member 49 is electrically connected to the two second power terminals 42 and the two second relay layers 17. As viewed in the first direction z, the second conductive member 49 overlaps each of the two second power terminals 42. 10 , the other side of the second conduction member 49 in the second direction x is conductively bonded to the fourth electrodes 322 of the second semiconductor elements 32 via the bonding layer 39. This allows the second conduction member 49 to be electrically connected to the fourth electrodes 322 of the second semiconductor elements 32. Therefore, each of the two second power terminals 42 is electrically connected to the fourth electrodes 322 of the second semiconductor elements 32.

[0047] 3 and 6 , the first signal terminal 44 is press-fitted into one of the multiple sleeves 29 that is conductively joined to the first signal wiring 21. This allows the first signal terminal 44 to be electrically connected to the first signal wiring 21. A gate voltage for driving the multiple first semiconductor elements 31 is applied to the first signal terminal 44. The first signal terminal 44 is a metal pin that extends in the first direction z. A portion of the first signal terminal 44 protrudes from the top surface 61 of the sealing resin 60.

[0048] 3 and 9 , each of the multiple first wires 51 is conductively bonded to the first gate electrode 313 of each of the multiple first semiconductor elements 31 and the first signal wiring 21. As a result, the first signal terminal 44 and the first signal wiring 21 are electrically connected to the first gate electrode 313 of each of the multiple first semiconductor elements 31. As shown in FIG. 5 , the multiple first wires 51 are covered with a sealing resin 60. The composition of the multiple first wires 51 includes gold (Au). Alternatively, the composition of the multiple first wires 51 may include either aluminum (Al) or copper.

[0049] As shown in FIG. 3 , the second signal terminal 45 is press-fitted into one of the multiple sleeves 29 that is conductively joined to the second signal wiring 22. This allows the second signal terminal 45 to be electrically connected to the second signal wiring 22. A voltage that is equipotential to the voltage applied to the first detection electrodes 314 of each of the multiple first semiconductor elements 31 is applied to the second signal terminal 45. The second signal terminal 45 is a metal pin that extends in the first direction z. As shown in FIGS. 7 and 8 , a portion of the second signal terminal 45 protrudes from the top surface 61 of the sealing resin 60.

[0050] As shown in Fig. 3 , each of the multiple second wires 52 is conductively bonded to the first detection electrode 314 of each of the multiple first semiconductor elements 31 and the second signal wiring 22. As a result, the second signal terminal 45 and the second signal wiring 22 are electrically connected to the first detection electrode 314 of each of the multiple first semiconductor elements 31 and the second electrode 312 of each of the multiple first semiconductor elements 31. As shown in Fig. 6 , the multiple second wires 52 are covered with a sealing resin 60. The composition of the multiple second wires 52 includes gold. Alternatively, the composition of the multiple second wires 52 may include either aluminum or copper.

[0051] As shown in FIG. 3 , the third signal terminal 46 is press-fitted into one of the multiple sleeves 29 that is conductively joined to the third signal wiring 23. This allows the third signal terminal 46 to be electrically connected to the third signal wiring 23. A gate voltage for driving the multiple second semiconductor elements 32 is applied to the third signal terminal 46. The third signal terminal 46 is a metal pin that extends in the first direction z. As shown in FIGS. 7 and 8 , a portion of the third signal terminal 46 protrudes from the top surface 61 of the sealing resin 60.

[0052] 3 and 10 , each of the multiple third wires 53 is conductively bonded to the second gate electrode 323 of each of the multiple second semiconductor elements 32 and the third signal wiring 23. As a result, the third signal terminal 46 and the third signal wiring 23 are electrically connected to the second gate electrode 323 of each of the multiple second semiconductor elements 32. As shown in FIG. 5 , the multiple third wires 53 are covered with a sealing resin 60. The composition of the multiple third wires 53 includes gold. Alternatively, the composition of the multiple third wires 53 may include either aluminum or copper.

[0053] As shown in FIG. 3 , the fourth signal terminal 47 is press-fitted into one of the multiple sleeves 29 that is conductively joined to the fourth signal wiring 24. This allows the fourth signal terminal 47 to be electrically connected to the fourth signal wiring 24. A voltage having the same potential as the voltage applied to each of the fourth electrodes 322 of the multiple second semiconductor elements 32 is applied to the fourth signal terminal 47. The fourth signal terminal 47 is a metal pin that extends in the first direction z. As shown in FIGS. 7 and 8 , a portion of the fourth signal terminal 47 protrudes from the top surface 61 of the sealing resin 60.

[0054] As shown in Fig. 3 , each of the multiple fourth wires 54 is conductively bonded to the fourth electrode 322 of each of the multiple second semiconductor elements 32 and the fourth signal wiring 24. As a result, the fourth signal terminal 47 and the fourth signal wiring 24 are electrically connected to the fourth electrode 322 of each of the multiple second semiconductor elements 32. As shown in Fig. 6 , the multiple fourth wires 54 are covered with a sealing resin 60. The composition of the multiple fourth wires 54 includes gold. Alternatively, the composition of the multiple fourth wires 54 may include either aluminum or copper.

[0055] 1, the first to fourth signal terminals 44 to 47 are arranged along the third direction y. As shown in Fig. 2, the first to fourth signal terminals 44 to 47 are surrounded by a first conductive member 48 and a second conductive member 49 when viewed in the first direction z.

[0056] Next, the configuration of each of the plurality of first semiconductor elements 31 included in the semiconductor device A10 will be described with reference to FIGS.

[0057] 11 and 12 , each of the plurality of first signal wirings 21 has, in addition to the above-mentioned first electrode 311, second electrode 312, first gate electrode 313, and first detection electrode 314, a main body 315, a first rewiring 316, a second rewiring 317, a protective layer 318, and a covering layer 319. The plurality of first semiconductor elements 31 are packaged in resin.

[0058] The body 315 corresponds to a MOSFET separated from the wafer. The body 315 includes a first pad 315A and a second pad 315B. As shown in FIG. 9 , the first pad 315A and the second pad 315B are located on the side of the first conductive layer 13 facing the first mounting surface 131 in the first direction z. The first pad 315A corresponds to the source of the body 315. The second pad 315B corresponds to the gate of the body 315. The first electrode 311 is included in the body 315 as the drain of the body 315. Therefore, the polarity of the first electrode 311 and the polarity of the first pad 315A are different from each other. Furthermore, the first pad 315A and the second pad 315B are located on the opposite side of the first electrode 311 in the first direction z.

[0059] 13 to 16 , the protective layer 318 covers a part of the main body 315 and at least a part of each of the first redistribution lines 316 and the second redistribution lines 317. The first electrode 311, the second electrode 312, the first gate electrode 313, and the first detection electrode 314 are exposed from the protective layer 318.

[0060] 13 to 15, the second electrode 312 is electrically connected to the first pad 315A of the main body 315. As shown in Fig. 11, when viewed in the first direction z, the second electrode 312 includes a portion that protrudes outward from the first electrode 311. When viewed in the first direction z, the area of ​​the second electrode 312 is larger than the area of ​​the first pad 315A.

[0061] 11 , 13 , and 14 , the first gate electrode 313 and the first detection electrode 314 are located on the same side as the first electrode 311 in the first direction z. The first detection electrode 314 is spaced apart from the first gate electrode 313 in the third direction y.

[0062] 11 to 13, the first rewiring 316 is electrically connected to the second pad 315B of the main body 315 and the first gate electrode 313. This allows the first gate electrode 313 to be electrically connected to the second pad 315B. A portion of the first rewiring 316 is covered with a protective layer 318.

[0063] 11 , 12 , and 14 , the second rewiring 317 is electrically connected to each of the second electrode 312 and the first detection electrode 314. As a result, the first detection electrode 314 is electrically connected to the second electrode 312. A portion of the second rewiring 317 is covered with a protective layer 318.

[0064] The first redistribution line 316, the second redistribution line 317, and the protective layer 318 can be formed by, for example, the laser direct structuring (LDS) method disclosed in U.S. Patent Application Publication No. 2010 / 0019370. In this case, the material of the protective layer 318 includes an additive containing a metal element. Each of the first redistribution line 316 and the second redistribution line 317 includes the metal element.

[0065] 12 to 14 and 16 , the covering layer 319 covers the portions of the first rewiring 316 and the second rewiring 317 that are exposed from the protective layer 318. The covering layer 319 is an insulator. The covering layer 319 is in contact with the first rewiring 316, the second rewiring 317, and the protective layer 318. The covering layer 319 is, for example, a solder resist.

[0066] Next, a vehicle C equipped with the semiconductor device A10 will be described with reference to Fig. 17. The vehicle C is, for example, an electric vehicle (EV).

[0067] As shown in Fig. 17, vehicle C includes an on-board charger 91, a storage battery 92, and a drive system 93. Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection. The on-board charger 91 is configured with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600 V.

[0068] The drive system 93 drives the vehicle C. The drive system 93 includes an inverter 931 and a drive source 932. The semiconductor device A10 constitutes part of the inverter 931. Alternatively, the inverter 931 may include a plurality of the aforementioned semiconductor modules B. Power stored in the storage battery 92 is supplied to the inverter 931. The power supplied from the storage battery 92 to the inverter 931 is DC power. Alternatively, unlike the power system shown in FIG. 17 , a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931, including the semiconductor device A10, is electrically connected to the drive source 932. The drive source 932 includes an AC motor and a transmission. When AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates, and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotational speed transmitted from the AC motor and then rotates the drive shaft of vehicle C. This drives vehicle C. To drive vehicle C, it is necessary to freely control the rotational speed of the AC motor based on information such as the amount of fluctuation in the accelerator pedal. Therefore, semiconductor device A10 in inverter 931 is necessary to output AC power whose frequency has been appropriately changed to correspond to the required rotational speed of the AC motor.

[0069] Next, the effects of the semiconductor device A10 will be described.

[0070] The semiconductor device A10 includes a first conductive layer 13 as a conductive member 80, a first semiconductor element 31, and a second semiconductor element 32. The polarity of the second electrode 312 of the first semiconductor element 31 is different from the polarity of the third electrode 321 of the second semiconductor element 32. The second electrode 312 and the third electrode 321 are conductively bonded to the first conductive layer 13. The first gate electrode 313 of the first semiconductor element 31 is located on the same side as the first electrode 311 in the first direction z. In this case, the second gate electrode 323 of the second semiconductor element 32 is located on the same side as the fourth electrode 322 in the first direction z. This configuration further shortens the length of the conductive path from the second electrode 312 to the third electrode 321. Furthermore, since the conductive path can be formed using a single conductive member 80, this contributes to reducing parasitic inductance and the like of the semiconductor device A10. Therefore, this configuration enables the semiconductor device A10 to reduce power loss.

[0071] The semiconductor device A10 further includes an insulating layer 11, a heat dissipation layer 12, and a first conductive layer 13. In the semiconductor device A10, the conductive member 80 is the first conductive layer 13. This configuration allows heat generated from the second electrode 312 of the first semiconductor element 31 and the third electrode 321 of the second semiconductor element 32 to be conducted to the heat dissipation layer 12 via the first conductive layer 13 and the insulating layer 11. This improves the heat dissipation properties of the semiconductor device A10.

[0072] The semiconductor device A10 further includes a first signal wiring 21 electrically connected to a first gate electrode 313 of the first semiconductor element 31, a second signal wiring 22 electrically connected to a second electrode 312 of the first semiconductor element 31, and a third signal wiring 23 electrically connected to a second gate electrode 323 of the second semiconductor element 32. Here, the first gate electrode 313 is located on the same side as the first electrode 311 in the first direction z. In this case, the second gate electrode 323 is located on the same side as the fourth electrode 322 in the first direction z. By adopting this configuration, a conductive path between the first gate electrode 313 and the first signal wiring 21 and a conductive path between the second gate electrode 323 and the third signal wiring 23 can each be set in the semiconductor device A10 without interfering with the first conductive layer 13, which is the conductive member 80.

[0073] The semiconductor device A10 further includes a first signal terminal 44 electrically connected to the first signal wiring 21, a second signal terminal 45 electrically connected to the second signal wiring 22, and a third signal terminal 46 electrically connected to the third signal wiring 23. When viewed in the first direction z, the first signal terminal 44, the second signal terminal 45, and the third signal terminal 46 are located between the first semiconductor element 31 and the second semiconductor element 32. With this configuration, when a wiring board is connected to the first signal terminal 44, the second signal terminal 45, and the third signal terminal 46, it is possible to consolidate the circuits on the wiring board.

[0074] The semiconductor device A10 further includes a first relay layer 16, a first power terminal 41, and a first conductive member 48. As viewed in the first direction z, the first relay layer 16 overlaps the heat dissipation layer 12. The first power terminal 41 is conductively joined to the first relay layer 16. The first conductive member 48 is conductively joined to the first electrode 311 of the first semiconductor element 31 and the first power terminal 41. As viewed in the first direction z, the first conductive member 48 overlaps the first power terminal 41. With this configuration, heat generated from the first electrode 311 of the first semiconductor element 31 can be conducted to the heat dissipation layer 12 via the first relay layer 16 and the insulating layer 11.

[0075] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 18 to 20. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. For ease of understanding, Figure 18 shows a perspective view of the sealing resin 60. In Figure 18, the outline of the sealing resin 60 is shown by imaginary lines.

[0076] In semiconductor device A20, instead of the first relay layer 16, two second relay layers 17, first power terminal 41, and two second power terminals 42 in semiconductor device A10, it has two first relay layers 16, a second relay layer 17, two first power terminals 41, and a second power terminal 42.

[0077] 18 , the two first relay layers 16 are located on opposite sides of each other in the third direction y, with the second relay layer 17 sandwiched therebetween. The two first power terminals 41 are individually conductively bonded to the two first relay layers 16. As shown in FIG. 19 , the second power terminal 42 is conductively bonded to the second relay layer 17.

[0078] As shown in FIGS. 18 and 20, the second conductive member 49 overlaps the first conductive member 48 when viewed in the first direction z.

[0079] Next, the effects of the semiconductor device A20 will be described.

[0080] The semiconductor device A20 includes a first conductive layer 13 as a conductive member 80, a first semiconductor element 31, and a second semiconductor element 32. The polarity of the second electrode 312 of the first semiconductor element 31 is different from the polarity of the third electrode 321 of the second semiconductor element 32. The second electrode 312 and the third electrode 321 are conductively bonded to the first conductive layer 13. The first gate electrode 313 of the first semiconductor element 31 is located on the same side as the first electrode 311 in the first direction z. In this case, the second gate electrode 323 of the second semiconductor element 32 is located on the same side as the fourth electrode 322 in the first direction z. Therefore, this configuration enables the semiconductor device A20 to reduce power loss. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A20 achieves the same effects as the semiconductor device A10.

[0081] In the semiconductor device A20, when viewed in the first direction z, the second conductive member 49 overlaps the first conductive member 48. By adopting this configuration, the parasitic inductance of the semiconductor device A20 can be reduced.

[0082] Third Embodiment: A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 21 to 23. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. For ease of understanding, Figure 21 shows a perspective view of the sealing resin 60. In Figure 21, the outline of the sealing resin 60 is shown by imaginary lines.

[0083] The semiconductor device A30 differs from the semiconductor device A10 in that it does not include the first substrate 27.

[0084] 21 to 23 , openings 132 that penetrate in the first direction z are provided in the first conductive layer 13. The first signal wiring 21 to the fourth signal wiring 24 are joined to the insulating layer 11 and housed in the openings 132.

[0085] Next, the effects of the semiconductor device A30 will be described.

[0086] The semiconductor device A30 includes a first conductive layer 13 as a conductive member 80, a first semiconductor element 31, and a second semiconductor element 32. The polarity of the second electrode 312 of the first semiconductor element 31 is different from the polarity of the third electrode 321 of the second semiconductor element 32. The second electrode 312 and the third electrode 321 are conductively bonded to the first conductive layer 13. The first gate electrode 313 of the first semiconductor element 31 is located on the same side as the first electrode 311 in the first direction z. In this case, the second gate electrode 323 of the second semiconductor element 32 is located on the same side as the fourth electrode 322 in the first direction z. Therefore, this configuration enables the semiconductor device A30 to reduce power loss. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0087] Fourth Embodiment: A semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to Figures 24 to 27. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated explanations will be omitted. For ease of understanding, Figure 25 shows a perspective view of the sealing resin 60. In Figure 25, the outline of the sealing resin 60 is shown by imaginary lines.

[0088] The semiconductor device A40 differs from the semiconductor device A10 in the configuration of the sealing resin 60 and in that it further includes a first dummy terminal 58 and a second dummy terminal 59.

[0089] 24 and 26 , a first opening 65 is provided in the sealing resin 60, penetrating from the top surface 61 to the bottom surface 62. As viewed in the first direction z, the first opening 65 is spaced apart from the insulating layer 11. As shown in FIGS. 24 and 27 , a second opening 66 is provided in the sealing resin 60, penetrating from the top surface 61 to the bottom surface 62. As viewed in the first direction z, the second opening 66 is spaced apart from the insulating layer 11. The second opening 66 is located on the opposite side of the third power terminal 43 from the first opening 65 in the third direction y.

[0090] As shown in FIG. 25 , the first dummy terminal 58 and the second dummy terminal 59 are located on opposite sides of the third power terminal 43 in the third direction y. The first dummy terminal 58 and the second dummy terminal 59 are each separated from the first conductive layer 13, the first power terminal 41, the two second power terminals 42, and the third power terminal 43. Therefore, the first dummy terminal 58 and the second dummy terminal 59 are not electrically connected to these. During the manufacture of the semiconductor device A40, the first dummy terminal 58 and the second dummy terminal 59 are included in the same lead frame as the first power terminal 41, the two second power terminals 42, and the third power terminal 43. Therefore, the composition of each of the first dummy terminal 58 and the second dummy terminal 59 is the same as the composition of each of the first power terminal 41, the two second power terminals 42, and the third power terminal 43.

[0091] 25 and 26 , the first dummy terminal 58 has a first engagement portion 581. The first engagement portion 581 is exposed from the first opening 65 of the sealing resin 60. The first engagement portion 581 penetrates the first dummy terminal 58 in the first direction z. As viewed in the first direction z, the first engagement portion 581 is located inward from the periphery 651 of the first opening 65 and is spaced apart from the insulating layer 11. In the first direction z, the first engagement portion 581 is spaced apart from each of the top surface 61 and the bottom surface 62 of the sealing resin 60.

[0092] 25 and 27 , the second dummy terminal 59 has a second engagement portion 591. The second engagement portion 591 is exposed from the second opening 66 of the sealing resin 60. The second engagement portion 591 penetrates the second dummy terminal 59 in the first direction z. As viewed in the first direction z, the second engagement portion 591 is located inward from the periphery 661 of the second opening 66 and is spaced apart from the insulating layer 11. In the first direction z, the second engagement portion 591 is spaced apart from each of the top surface 61 and the bottom surface 62 of the sealing resin 60.

[0093] 24 , 26 , and 27 , a portion of each of the first dummy terminal 58 and the second dummy terminal 59 protrudes from the second side surface 64 of the sealing resin 60. As shown in Fig. 18 , when viewed in the first direction z, the shape of the second engagement portion 591 differs from the shape of the first engagement portion 581. In the semiconductor device A40, the first engagement portion 581 is circular, while the second engagement portion 591 is oval in shape extending in the third direction y.

[0094] 28 and 29, a semiconductor module B according to an embodiment of the present disclosure will be described. The semiconductor module B includes a plurality of semiconductor devices A40, a heat dissipation member 71, and a bonding layer 72.

[0095] The plurality of semiconductor devices A40 are mounted on a heat dissipation member 71. The plurality of semiconductor devices A40 are arranged along the third direction y on the heat dissipation member 71. In the description of the semiconductor module B, one semiconductor device A40 will be extracted and described from the plurality of semiconductor devices A40.

[0096] The heat dissipation member 71 is used to cool the semiconductor device A40. The heat dissipation member 71 contains metal. For example, the heat dissipation member 71 is made of a material containing aluminum. In the semiconductor module B, the heat dissipation member 71 is flat. Additionally, the heat dissipation member 71 may be provided with fins or the like on one side in the first direction z to improve heat dissipation.

[0097] 28 and 29 , the heat dissipation member 71 has a mounting surface 71A, a first convex portion 711, and a second convex portion 712. The mounting surface 71A faces the bottom surface 62 of the sealing resin 60 of the semiconductor device A40. The first convex portion 711 and the second convex portion 712 protrude from the mounting surface 71A. The first convex portion 711 is inserted into the first opening 65 of the semiconductor device A40 and engages with the first engaging portion 581 of the semiconductor device A40. The second convex portion 712 is inserted into the second opening 66 of the semiconductor device A40 and engages with the second engaging portion 591 of the semiconductor device A40. This allows the semiconductor device A40 to be positioned relative to the heat dissipation member 71 in the semiconductor module B.

[0098] 29 , the bonding layer 72 bonds the mounting surface 71A of the heat dissipation member 71 to the heat dissipation layer 12 of the semiconductor device A40. The bonding layer 72 includes a sintered body of metal particles. The metal particles include silver. Alternatively, the metal particles may include copper.

[0099] Next, the effects of the semiconductor device A40 will be described.

[0100] The semiconductor device A40 includes a first conductive layer 13 as a conductive member 80, a first semiconductor element 31, and a second semiconductor element 32. The polarity of the second electrode 312 of the first semiconductor element 31 is different from the polarity of the third electrode 321 of the second semiconductor element 32. The second electrode 312 and the third electrode 321 are conductively bonded to the first conductive layer 13. The first gate electrode 313 of the first semiconductor element 31 is located on the same side as the first electrode 311 in the first direction z. In this case, the second gate electrode 323 of the second semiconductor element 32 is located on the same side as the fourth electrode 322 in the first direction z. Therefore, this configuration enables the semiconductor device A40 to reduce power loss. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A40 achieves the same effects as the semiconductor device A10.

[0101] The semiconductor device A40 further includes a first dummy terminal 58 spaced from the first conductive layer 13. The sealing resin 60 has a first opening 65 penetrating from the top surface 61 to the bottom surface 62. The first dummy terminal 58 has a first engaging portion 581 exposed through the first opening 65. This configuration allows the first protrusion 711 of the heat dissipation member 71 to be inserted into the first opening 65 and engage with the first engaging portion 581 in the semiconductor module B, as shown in FIGS. 28 and 29 . This reduces misalignment of the semiconductor device A40 relative to the heat dissipation member 71. Furthermore, during manufacturing of the semiconductor device A40, the first dummy terminal 58 and the third power terminal 43 are included in the same lead frame, allowing the first engaging portion 581 to be set based on the position of the lead frame. As a result, in the semiconductor module B, the positional misalignment between the third power terminal 43 and the connection object (such as a motor) can be effectively reduced compared to when the first engagement portion 581 is set based on the insulating layer 11.

[0102] As viewed in the first direction z, the first engagement portion 581 is located inward from the periphery 651 of the first opening 65 of the sealing resin 60. In the first direction z, the first engagement portion 581 is spaced apart from both the top surface 61 and the bottom surface 62 of the sealing resin 60. The first engagement portion 581 penetrates the first dummy terminal 58 in the first direction z. This configuration allows ejector pins to be inserted into both sides of the first opening 65 in the first direction z when forming the sealing resin 60 in the manufacture of the semiconductor device A40. This prevents molten resin from flowing into the first engagement portion 581 when forming the sealing resin 60. Furthermore, in the semiconductor module B, the dimension of the first protrusion 711 of the heat dissipation member 71 in the first direction z can be freely set.

[0103] The semiconductor device A40 further includes a second dummy terminal 59 spaced from the first conductive layer 13. The sealing resin 60 has a second opening 66 penetrating from the top surface 61 to the bottom surface 62. The second dummy terminal 59 has a second engagement portion 591 exposed from the second opening 66. As viewed in the first direction z, the size of the second engagement portion 591 is different from the size of the first engagement portion 581. With this configuration, when positioning the semiconductor device A40 relative to the heat dissipation member 71, it becomes easier to adjust the position of the semiconductor device A40 in a direction perpendicular to the first direction z, and rotation of the semiconductor device A40 around the first direction z can be restricted.

[0104] Fifth Embodiment: A semiconductor device A50 according to a fifth embodiment of the present disclosure will be described with reference to FIGS. 30 to 36. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Here, for ease of understanding, FIG. 31 shows the sealing resin 60 in a see-through manner. For ease of understanding, FIG. 32 shows the first conductive member 48 in a see-through manner compared to FIG. 31. In FIG. 31, the outline of the see-through sealing resin 60 is shown in imaginary lines. In FIG. 32, the see-through first conductive member 48 and sealing resin 60 are shown in imaginary lines.

[0105] The semiconductor device A50 differs from the semiconductor device A10 in that it further includes a second conductive layer 14, a third conductive layer 15, and a second substrate 28, and does not include a first relay layer 16, two second relay layers 17, or a second conductive member 49. Furthermore, the semiconductor device A50 differs from the semiconductor device A10 in the configurations of the plurality of first semiconductor elements 31, the plurality of second semiconductor elements 32, the two first power terminals 41, the second power terminal 42, and the third power terminal 43.

[0106] As shown in FIGS. 33 and 34 , the second conductive layer 14 is located on the opposite side of the insulating layer 11 from the heat dissipation layer 12 in the first direction z. As shown in FIG. 32 , the second conductive layer 14 is located adjacent to the first conductive layer 13. The second conductive layer 14 carries a plurality of second semiconductor elements 32 and a second substrate 28. The second conductive layer 14 contains copper. The second conductive layer 14 is covered with a sealing resin 60. As viewed in the first direction z, the second conductive layer 14 overlaps the heat dissipation layer 12. As viewed in the first direction z, the second conductive layer 14 is located inward from the periphery 111 of the insulating layer 11. The second conductive layer 14 has a second mounting surface 141 facing the same side as the first mounting surface 131 of the first conductive layer 13 in the first direction z.

[0107] As shown in Figures 33 and 34 , the third conductive layer 15 is located on the opposite side of the heat dissipation layer 12 with respect to the insulating layer 11 in the first direction z. As shown in Figure 32 , the third conductive layer 15 is located on the opposite side of the second conductive layer 14 with respect to the first conductive layer 13. The third conductive layer 15 contains copper. The third conductive layer 15 is covered with a sealing resin 60. As viewed in the first direction z, the third conductive layer 15 overlaps the heat dissipation layer 12. As viewed in the first direction z, the third conductive layer 15 is located inward from the periphery 111 of the insulating layer 11.

[0108] 35 , in each of the multiple first semiconductor elements 31, the first electrode 311 and the second electrode 312 are reversed compared to those in the semiconductor device A10. The first electrode 311 is conductively bonded to the first mounting surface 131 of the first conductive layer 13 via the bonding layer 39. As a result, the first electrode 311 of each of the multiple first semiconductor elements 31 is electrically connected to the first conductive layer 13. The second electrode 312 is located on the opposite side of the first direction z from the side facing the first mounting surface 131. The first gate electrode 313 and the first detection electrode 314 are located on the same side as the second electrode 312 in the first direction z. In the semiconductor device A50, the first electrode 311 corresponds to the source of the first semiconductor element 31. In addition, the second electrode 312 corresponds to the drain of the first semiconductor element 31.

[0109] As shown in FIG. 36 , in each of the multiple second semiconductor elements 32, the third electrode 321 and the fourth electrode 322 are reversed compared to those in the semiconductor device A10. The fourth electrode 322 is conductively bonded to the second mounting surface 141 of the second conductive layer 14 via the bonding layer 39. As a result, the fourth electrode 322 of each of the multiple second semiconductor elements 32 is electrically connected to the second conductive layer 14. The third electrode 321 is located on the opposite side of the second mounting surface 141 in the first direction z. The second gate electrode 323 is located on the same side as the third electrode 321 in the first direction z. In the semiconductor device A50, the third electrode 321 corresponds to the source of the second semiconductor element 32. In addition, the fourth electrode 322 corresponds to the drain of the first semiconductor element 31. Therefore, in the semiconductor device A50 as well, the polarities of the third electrode 321 and the second electrode 312 of the first semiconductor element 31 are opposite to each other.

[0110] As shown in Figures 32 and 34 , the two first power terminals 41 are conductively joined to the first conductive layer 13. The two first power terminals 41 are N-terminals (negative electrodes) to which DC power to be converted is applied. As shown in Figures 32 and 33 , the second power terminal 42 is conductively joined to the second conductive layer 14. The second power terminal 42 is a P-terminal (positive electrode) to which DC power to be converted is applied. The second power terminal 42 is located between the two first power terminals 41 in the third direction y. As shown in Figures 32 and 33 , the third power terminal 43 is conductively joined to the third conductive layer 15.

[0111] 35 and 36 , the first conductive member 48 is conductively bonded to the second electrode 312 of each of the multiple first semiconductor elements 31 and the third electrode 321 of each of the multiple second semiconductor elements 32 via the bonding layer 39. As a result, the third electrode 321 of each of the multiple second semiconductor elements 32 is electrically connected to the second electrode 312 of each of the multiple first semiconductor elements 31. As shown in FIG. 34 , the first conductive member 48 is conductively bonded to the third conductive layer 15 via the bonding layer 39. As a result, the third power terminal 43 is electrically connected to the first conductive layer 13, the second electrode 312 of each of the multiple first semiconductor elements 31, and the third electrode 321 of each of the multiple second semiconductor elements 32.

[0112] In the semiconductor device A50, the conductive member 80 is the first conductive member 48.

[0113] 33 and 34 , the second substrate 28 is located on the opposite side of the insulating layer 11 from the heat dissipation layer 12 in the first direction z. As shown in Fig. 32 , the first substrate 27 is located between the multiple first semiconductor elements 31 and the second power terminals 42 when viewed in the first direction z. The second substrate 28 has a second insulating layer 281 and a second metal layer 282.

[0114] 32 to 34, the second insulating layer 281 carries the third signal wiring 23 and the fourth signal wiring 24. The second insulating layer 281 is made of, for example, ceramics. Alternatively, the second insulating layer 281 may be made of a resin sheet.

[0115] 33 and 34 , the second metal layer 282 is located between the second mounting surface 141 of the second conductive layer 14 and the second insulating layer 281 in the first direction z. The second metal layer 282 is bonded to the second insulating layer 281. The second metal layer 282 contains copper. The second metal layer 282 is bonded to the second mounting surface 141 via the bonding layer 39.

[0116] 33 and 34 , the third signal wiring 23 and the fourth signal wiring 24 are located on the opposite side of the second insulating layer 281 from the second conductive layer 14 in the first direction z. The third signal wiring 23 and the fourth signal wiring 24 are joined to the second insulating layer 281.

[0117] Next, the effects of the semiconductor device A50 will be described.

[0118] The semiconductor device A50 includes a first conductive member 48 as a conductive member 80, a first semiconductor element 31, and a second semiconductor element 32. The polarity of the second electrode 312 of the first semiconductor element 31 is different from the polarity of the third electrode 321 of the second semiconductor element 32. The second electrode 312 and the third electrode 321 are conductively bonded to the first conductive layer 13. The first gate electrode 313 of the first semiconductor element 31 is located on the same side as the second electrode 312 in the first direction z. In this case, the second gate electrode 323 of the second semiconductor element 32 is located on the same side as the third electrode 321 in the first direction z. Therefore, according to this configuration, the semiconductor device A50 can also reduce power loss. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A50 achieves the same effects as the semiconductor device A10.

[0119] Sixth Embodiment: A semiconductor device A60 according to a sixth embodiment of the present disclosure will be described with reference to Fig. 37. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted.

[0120] In the semiconductor device A60, the configurations of the first to fourth signal terminals 44 to 47 are different from those of the semiconductor device A50 described above.

[0121] 37 , the first to fourth signal terminals 44 to 47 are arranged along the third direction y. When viewed in the first direction z, the first to fourth signal terminals 44 to 47 are located closer to the third power terminal 43 than the two first power terminals 41 and the second power terminal 42.

[0122] Next, the effects of the semiconductor device A60 will be described.

[0123] The semiconductor device A60 includes a first conductive member 48 as a conductive member 80, a first semiconductor element 31, and a second semiconductor element 32. The polarity of the second electrode 312 of the first semiconductor element 31 is different from the polarity of the third electrode 321 of the second semiconductor element 32. The second electrode 312 and the third electrode 321 are conductively bonded to the first conductive layer 13. The first gate electrode 313 of the first semiconductor element 31 is located on the same side as the second electrode 312 in the first direction z. In this case, the second gate electrode 323 of the second semiconductor element 32 is located on the same side as the third electrode 321 in the first direction z. Therefore, according to this configuration, the semiconductor device A60 can also reduce power loss. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A60 achieves the same effects as the semiconductor device A10.

[0124] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0125] The present disclosure includes embodiments described in the following supplementary notes. Supplementary note 1. A semiconductor device comprising: a conductive member (80); and a first semiconductor element (31) and a second semiconductor element (32) located on one side of the conductive member (80) in a first direction, wherein the first semiconductor element (31) has a first electrode (311) and a second electrode (312) located opposite each other in the first direction, and a first gate electrode (313), wherein the second semiconductor element has a third electrode (321) and a fourth electrode (322) located opposite each other in the first direction, and a second gate electrode (323), wherein the polarity of the second electrode (312) and the polarity of the third electrode (321) are different from each other, and the second electrode (312) and the third electrode (321) are each conductively bonded to the conductive member (80), A semiconductor device in which, when the first gate electrode (313) is located on the same side as the first electrode (311) in the first direction, the second gate electrode (323) is located on the same side as the fourth electrode (322) in the first direction, and, when the first gate electrode (313) is located on the same side as the second electrode (312) in the first direction, the second gate electrode (323) is located on the same side as the third electrode (321) in the first direction. Appendix 2. The semiconductor device according to Appendix 1, further comprising a first conductive layer (13) located on one side of the first semiconductor element (31) in the first direction, and the first conductive layer (13) is electrically connected to the first semiconductor element (31). Appendix 3. The semiconductor device according to Supplementary Note 2, further comprising a first conductive member (48) located on the opposite side of the first semiconductor element (31) from the first conductive layer (13), the first conductive member (48) being spaced apart from the first conductive layer (13) and conducting to the first semiconductor element (31).Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein the conductive member (80) is the first conductive layer (13), and the first conductive member (48) is conductively joined to the first electrode (311).Supplementary Note 5. The semiconductor device according to Supplementary Note 4, further comprising: an insulating layer (11) located on the opposite side of the first conductive layer (13) from the first semiconductor element (31) and the second semiconductor element (32); and a heat dissipation layer (12) located on the opposite side of the insulating layer (11) from the first conductive layer (13), wherein the first conductive layer (13) and the heat dissipation layer (12) are bonded to the insulating layer (11). Supplementary Note 6. The semiconductor device according to Supplementary Note 5, further comprising: a first signal wiring (21) conducting to the first gate electrode (313), wherein the first signal wiring (21) is located on the opposite side of the insulating layer (11) from the heat dissipation layer (12), and wherein the first signal wiring (21) is located between the first semiconductor element (31) and the second semiconductor element (32) when viewed in the first direction. Supplementary Note 7. Supplementary Note 6: The semiconductor device according to Supplementary Note 6, further comprising a second signal wiring (22) electrically connected to the second electrode (312), the second signal wiring (22) being located on the opposite side of the insulating layer (11) from the heat dissipation layer (12), and the second signal wiring (22) being located between the first semiconductor element (31) and the second semiconductor element (32) when viewed in the first direction. Supplementary Note 8: The semiconductor device according to Supplementary Note 7, wherein the first signal wiring (31) and the second signal wiring (32) are located on the opposite side of the insulating layer (11) from the first conductive layer (13). Supplementary Note 9: The semiconductor device according to Supplementary Note 7, wherein the first conductive layer (13) is provided with an opening (132) penetrating in the first direction, and the first signal wiring (21) and the second signal wiring (22) are joined to the insulating layer (11) and housed in the opening (132).Supplementary Note 10. The semiconductor device according to Supplementary Note 7, wherein the first semiconductor element (31) has a body (315) including the first electrode (311), a first pad (315A), and a second pad (315B), and a first rewiring (316) electrically connected to the second pad (315B), wherein the polarity of the first electrode (311) and the polarity of the first pad (315A) are different from each other, the first pad (315A) and the second pad (315B) are located on the opposite side of the first electrode (311) in the first direction, the second electrode (312) is electrically connected to the first pad (315A), and the first rewiring (316) is electrically connected to the first gate electrode (313). Supplementary Note 11. The semiconductor device according to Supplementary Note 10, wherein the first semiconductor element (31) has a first detection electrode (314) that is conductive to the second signal wiring (22) and a second rewiring (317) that is electrically connected to the first detection electrode (314), the first detection electrode (314) is located on the same side as the first electrode (311) in the first direction, and the second rewiring (317) is electrically connected to the second electrode (312).Supplementary Note 12. The semiconductor device according to any one of Supplementary Notes 7 to 11, further comprising a sealing resin (60) that covers the conductive member (80), the first semiconductor element (31), and the second semiconductor element (32), the sealing resin (60) having a bottom surface (62) that faces one side in the first direction, and the heat dissipation layer (12) is exposed from the bottom surface (62).Supplementary Note 13. The semiconductor device according to Appendix 12, further comprising: a first signal terminal (44) electrically connected to the first signal wiring (21); and a second signal terminal (45) electrically connected to the second signal wiring (22), wherein, as viewed in the first direction, the first signal terminal (44) and the second signal terminal (45) are located between the first semiconductor element (31) and the second semiconductor element (32), the sealing resin (60) has a top surface (61) facing opposite to the bottom surface in the first direction, and a portion of each of the first signal terminal (44) and the second signal terminal (45) protrudes from the top surface (61).Appendix 14. The semiconductor device according to Appendix 13, further comprising: a first relay layer (16) located on the opposite side of the insulating layer (11) from the heat dissipation layer (12) and bonded to the insulating layer (11); and a first power terminal (41) exposed from the sealing resin (60) and conductively bonded to the first relay layer (16), wherein the first conductive member (48) is conductive to the first relay layer (16), and the first relay layer (16) overlaps the heat dissipation layer (12) when viewed in the first direction. Appendix 15. The semiconductor device according to Appendix 14, wherein the first conductive member (48) is conductively bonded to the first power terminal (41), and the first conductive member (48) overlaps the first power terminal (41) when viewed in the first direction. Appendix 16. Appendix 17. The semiconductor device according to Appendix 15, further comprising: a second power terminal (42) exposed from the sealing resin (60); and a second conductive member (49) conductively joined to the fourth electrode (322) and the second power terminal (42), wherein the second conductive member (49) overlaps the first conductive member (48) when viewed in the first direction. Appendix 17. The semiconductor device according to Appendix 16, further comprising: a first dummy terminal (58) spaced from the first conductive layer (13), wherein a portion of the first dummy terminal (58) is covered with the sealing resin (60), the sealing resin (60) has a first opening (65) penetrating from the top surface (61) to the bottom surface (62), and the first dummy terminal (58) has a first engagement portion (581) exposed from the first opening (65). Appendix 18. The semiconductor device of Appendix 17 further comprises a second dummy terminal (59) spaced apart from the first conductive layer (13), a portion of the second dummy terminal (59) being covered with the sealing resin (60), the second dummy terminal (59) being spaced apart from the first dummy terminal (58) as viewed in the first direction, the sealing resin (60) having a second opening (66) penetrating from the top surface (61) to the bottom surface (62), the second dummy terminal (59) having a second engagement portion (591) exposed from the second opening (66), and as viewed in the first direction, a size of the second engagement portion (591) differs from a size of the first engagement portion (581).Appendix 19. The semiconductor device according to Appendix 3, wherein the conductive member (80) is the first conductive member (48). Appendix 20. A vehicle comprising: a drive source (93); and the semiconductor device (A10) according to Appendix 13, wherein the semiconductor device (A10) is electrically connected to the drive source (93). Appendix 21. The semiconductor device according to Appendix 10, wherein the first semiconductor element (31) has a protective layer (318) covering the main body (315) and the first rewiring (316), and wherein the first electrode (311), the second electrode (312), and the first gate electrode (313) are exposed from the protective layer (318). Appendix 22. The semiconductor device according to Appendix 16, wherein, when viewed in the first direction, the first signal terminal (21) and the second signal terminal (22) are surrounded by the first conductive member (48) and the second conductive member (49). Appendix 23. Appendix 16: The semiconductor device according to Appendix 16, further comprising a third signal wiring (23) electrically connected to the second gate electrode (323), the third signal wiring (23) being located on the opposite side of the insulating layer (11) from the heat dissipation layer (12), and the third signal wiring (23) being located between the first semiconductor element (31) and the second semiconductor element (32) as viewed in the first direction. Appendix 24: The semiconductor device according to Appendix 23, further comprising a third signal terminal (46) electrically connected to the third signal wiring (23), a portion of the third signal terminal (46) protruding from the top surface (61). Appendix 25: The semiconductor device according to Appendix 24, further comprising a third signal terminal (46) electrically connected to the third signal wiring (23), the third signal terminal (45) being located on the opposite side of the insulating layer (11) from the heat dissipation layer (12), and the third signal terminal (46) being located between the first semiconductor element (31) and the second semiconductor element (32) as viewed in the first direction. Appendix 26: The semiconductor device according to Appendix 24, further comprising a third signal terminal (46) electrically connected to the third signal wiring (23), the portion of the third signal terminal (46) protruding from the top surface (61). Appendix 27: The semiconductor device according to Appendix 24, further comprising a third signal terminal (46) electrically connected to the third signal wiring (23), the portion of the third signal terminal (46) protruding from the top surface (61). Appendix 28: The semiconductor device according to Appendix 24, further comprising a third signal terminal (46) electrically connected to the third signal wiring (23), the portion of the third signal terminal (46) protruding from the top surface (61). Appendix 29: The semiconductor device according to Appendix 24, further comprising a third signal terminal (46) electrically connected to the third signal terminal (44), the second signal terminal (45), and the third signal terminal (46) being surrounded by the first conductive member (48) and the 25. The semiconductor device according to claim 24, wherein the first signal terminal (44), the second signal terminal (45), and the third signal terminal (46) are arranged along a direction perpendicular to the first direction.Supplementary Note 27. The semiconductor device according to Supplementary Note 16, further comprising a second relay layer (17) located on the opposite side of the insulating layer (11) from the heat dissipation layer (12) and bonded to the insulating layer (11), the second power terminal (42) being conductively bonded to the second relay layer (17), and the second relay layer (17) overlapping the heat dissipation layer (12) as viewed in the first direction. Supplementary Note 28. The semiconductor device according to Supplementary Note 18, further comprising a third power terminal (43) conductively bonded to the first conductive layer (13), and the first dummy terminal (58) and the second dummy terminal (59) being located on opposite sides of the third power terminal (43) as viewed in the first direction.

[0126] A10 to A60: semiconductor device B: semiconductor module C: vehicle 11: insulating layer 111: periphery 12: heat dissipation layer 13: first conductive layer 131: first mounting surface 14: second conductive layer 141: second mounting surface 15: third conductive layer 16, 17: first relay layer, second relay layer 21 to 24: first signal wiring to fourth signal wiring 27: first substrate 271: first insulating layer 272: first metal layer 28: second substrate 281: second insulating layer 282: second metal layer 29: sleeve 31: first semiconductor element 311, 312: first electrode, second electrode 313: first gate electrode 314: first detection electrode 315: main body 315A, 315B: first pad, second pad 316, 317: First rewiring, second rewiring 318: Protective layer 319: Covering layer 32: Second semiconductor element 321, 322: Third electrode, fourth electrode 323: Second gate electrode 39: Bonding layer 41: First power terminal 411: First mounting hole 42: Second power terminal 421: Second mounting hole 43: Third power terminal 431: Third mounting hole 44-47: First signal terminal to fourth signal terminal 48, 49: First conductive member, second conductive member 51-54: First wire to fourth wire 58: First dummy terminal 581: First engaging portion 59: Second dummy terminal 591: Second engaging portion 60: Sealing resin 61: Top surface 62: Bottom surface 63, 64: First side surface, second side surface 65, 66: First opening, second opening 651, 661: Periphery 71: Heat dissipation member 71A: Mounting surface 711, 712: First convex portion, second convex portion 72: Bonding layer 80: Conductive member 91: On-board charger 92: Storage battery 93: Drive system 931: Inverter 932: Drive source z, x, y: First direction, second direction, third direction

Claims

1. A semiconductor device comprising: a conductive member; and a first semiconductor element and a second semiconductor element located on one side of the conductive member in a first direction, wherein the first semiconductor element has a first electrode and a second electrode located opposite each other in the first direction, and a first gate electrode; the second semiconductor element has a third electrode and a fourth electrode located opposite each other in the first direction, and a second gate electrode; the polarity of the second electrode and the polarity of the third electrode are different from each other; the second electrode and the third electrode are each conductively joined to the conductive member; when the first gate electrode is located on the same side as the first electrode in the first direction, the second gate electrode is located on the same side as the fourth electrode in the first direction; and when the first gate electrode is located on the same side as the second electrode in the first direction, the second gate electrode is located on the same side as the third electrode in the first direction.

2. The semiconductor device according to claim 1, further comprising a first conductive layer located on one side of the first semiconductor element in the first direction, the first conductive layer being electrically connected to the first semiconductor element.

3. The semiconductor device according to claim 2, further comprising a first conductive member located on the opposite side of the first semiconductor element from the first conductive layer, the first conductive member being spaced apart from the first conductive layer and electrically connected to the first semiconductor element.

4. The semiconductor device according to claim 3, wherein the conductive member is the first conductive layer, and the first conductive member is conductively joined to the first electrode.

5. The semiconductor device according to claim 4, further comprising: an insulating layer located on the opposite side of the first conductive layer from the first semiconductor element and the second semiconductor element; and a heat dissipation layer located on the opposite side of the insulating layer from the first conductive layer, wherein the first conductive layer and the heat dissipation layer are bonded to the insulating layer.

6. The semiconductor device according to claim 5, further comprising a first signal wiring electrically connected to the first gate electrode, the first signal wiring being located on the opposite side of the insulating layer from the heat dissipation layer, and the first signal wiring being located between the first semiconductor element and the second semiconductor element when viewed in the first direction.

7. The semiconductor device according to claim 6, further comprising a second signal wiring that is electrically connected to the second electrode, the second signal wiring being located on the opposite side of the insulating layer from the heat dissipation layer, and the second signal wiring being located between the first semiconductor element and the second semiconductor element when viewed in the first direction.

8. The semiconductor device according to claim 7, wherein said first signal wiring and said second signal wiring are located on the opposite side of said insulating layer with respect to said first conductive layer.

9. The semiconductor device according to claim 7, wherein the first conductive layer has an opening penetrating in the first direction, and the first signal wiring and the second signal wiring are joined to the insulating layer and housed in the opening.

10. The semiconductor device described in claim 7, wherein the first semiconductor element has a body including the first electrode, a first pad, and a second pad, and a first rewiring electrically connected to the second pad, the polarity of the first electrode and the polarity of the first pad are different from each other, the first pad and the second pad are located on the opposite side of the first electrode in the first direction, the second electrode is electrically connected to the first pad, and the first rewiring is electrically connected to the first gate electrode.

11. The semiconductor device described in claim 10, wherein the first semiconductor element has a first detection electrode that is conductive to the second signal wiring and a second rewiring that is electrically connected to the first detection electrode, the first detection electrode being located on the same side as the first electrode in the first direction, and the second rewiring being electrically connected to the second electrode.

12. A semiconductor device according to any one of claims 7 to 11, further comprising a sealing resin covering the conductive member, the first semiconductor element, and the second semiconductor element, the sealing resin having a bottom surface facing one side of the first direction, and the heat dissipation layer being exposed from the bottom surface.

13. The semiconductor device according to claim 12, further comprising a first signal terminal electrically connected to the first signal wiring and a second signal terminal electrically connected to the second signal wiring, wherein when viewed in the first direction, the first signal terminal and the second signal terminal are located between the first semiconductor element and the second semiconductor element, the sealing resin has a top surface facing opposite to the bottom surface in the first direction, and a portion of each of the first signal terminal and the second signal terminal protrudes from the top surface.

14. The semiconductor device described in claim 13, further comprising: a first relay layer located on the opposite side of the insulating layer from the heat dissipation layer and bonded to the insulating layer; and a first power terminal exposed from the sealing resin and conductively bonded to the first relay layer, wherein the first conductive member is conductive to the first relay layer, and when viewed in the first direction, the first relay layer overlaps the heat dissipation layer.

15. The semiconductor device according to claim 14, wherein the first conductive member is conductively joined to the first power terminal, and when viewed in the first direction, the first conductive member overlaps the first power terminal.

16. The semiconductor device described in claim 15, further comprising: a second power terminal exposed from the sealing resin; and a second conductive member conductively joined to the fourth electrode and the second power terminal, wherein the second conductive member overlaps the first conductive member when viewed in the first direction.

17. The semiconductor device described in claim 16, further comprising a first dummy terminal spaced from the first conductive layer, a portion of the first dummy terminal being covered with the sealing resin, the sealing resin having a first opening penetrating from the top surface to the bottom surface, and the first dummy terminal having a first engaging portion exposed from the first opening.

18. The semiconductor device described in claim 17, further comprising a second dummy terminal spaced from the first conductive layer, a portion of the second dummy terminal being covered with the sealing resin, the second dummy terminal being spaced from the first dummy terminal when viewed in the first direction, the sealing resin having a second opening penetrating from the top surface to the bottom surface, the second dummy terminal having a second engagement portion exposed from the second opening, and the size of the second engagement portion being different from the size of the first engagement portion when viewed in the first direction.

19. The semiconductor device according to claim 3, wherein the conductive member is the first conductive member.

20. A vehicle comprising: a drive source; and the semiconductor device according to claim 13, wherein the semiconductor device is electrically connected to the drive source.

Citation Information

Patent Citations

  • Semiconductor device and manufacturing method for semiconductor device

    JP2021125569A

  • Power-MOSFETs with Improved Efficiency for Multi-channel Class-D Audio Amplifiers and Packaging Thereof

    US20080252372A1

  • Semiconductor device, semiconductor module, and semiconductor module mounting structure

    WO2023243464A1