Semiconductor testing device and wafer prober

The semiconductor testing device uses an infrared camera and digital signal processor to convert luminance to temperature distribution, addressing temperature measurement inaccuracies in conventional systems by imaging through probe card holes, ensuring precise temperature measurement.

WO2025183630A1PCT designated stage Publication Date: 2025-09-04TERADYNE (ASIA) PTE LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
PCT/SG2025/050119
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-28
Filing Date
2025-02-21
Publication Date
2025-09-04

AI Technical Summary

Technical Problem

Conventional semiconductor testing systems face challenges in accurately measuring the temperature of semiconductor wafers due to temperature variations and non-uniform distributions, and temperature sensors on wafers require calibration, complicating the testing process.

Method used

A semiconductor testing device equipped with an infrared camera and digital signal processor to convert luminance distribution in infrared images to temperature distribution, using through-holes in the probe card to image die surfaces, and a cover to block external light interference.

Benefits of technology

Enables accurate measurement of semiconductor wafer temperatures during electrical testing, ensuring uniformity and precision in temperature assessment.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure SG2025050119_04092025_PF_FP_ABST
    Figure SG2025050119_04092025_PF_FP_ABST
Patent Text Reader

Abstract

A semiconductor testing device 10 performs electrical testing by causing a probe needle 42 of a probe card 40 to contact dies formed on a semiconductor wafer 110, the semiconductor testing device 10 comprising: an infrared camera 26 which is provided at a predetermined height from a top surface of the probe card 40 and is capable of imaging a field of view including at least a portion of the top surface of the probe card 40; and a digital signal processor for converting a luminance distribution in an infrared image captured by the infrared camera 26 to a temperature distribution, wherein the probe card 40 comprises a through-hole 41 formed so that a surface of a die being electrically tested by contact of the probe needle 42 provided on a bottom surface of the probe card 40 can be imaged by the infrared camera 26.
Need to check novelty before this filing date? Find Prior Art

Description

[Document Name] SPECIFICATION[Title of the Invention] Semiconductor testing device and wafer prober[Technical Field]

[0001] The present invention relates to a semiconductor testing device and a wafer prober capable of measuring the temperature of a semiconductor wafer under test. [Background Art]

[0002] Semiconductor testing systems in conventional use comprise a combination of a semiconductor testing device, also referred to as a semiconductor tester, in which numerous dies formed on a main surface of a semiconductor wafer are electrically tested by way of probe needles on a probe card, and a wafer prober for driving the semiconductor wafer so that the probe needles successively contact the individual dies on the semiconductor wafer. It is necessary to ascertain the temperature of the semiconductor wafer under test in this kind of system.

[0003] To this end, technology has been proposed for controlling the temperature of a wafer chuck by providing a heater on the wafer chuck on which the semiconductor is mounted in the wafer prober (see Patent Document 1) , and by allowing a heating medium to flow through a flow path provided within the wafer chuck (see Patent Document 2) . Furthermore, technology has also been proposed for detecting the temperature by forming a temperature sensor on the semiconductor wafer being tested (see Patent Document 3) . [Prior Art Documents] [Patent Document]

[0004] [Patent Document 1] JP H02-008141 U [Patent Document 2] JP 2016-192485 A [Patent Document 3] JP Hll-126807 A[Summary of the Invention][Problems to be Solved by the Invention]

[0005] In the technology for controlling the temperature of the wafer chuck, the semiconductor wafer mounted on the wafer chuck is assumed to be at the same temperature as the wafer chuck, but the temperature of the dies which are energized by the electrical testing may increase from the temperature of the wafer chuck. Furthermore, a temperature distribution may be produced in the actual wafer chuck so that the temperature of the semiconductor wafer mounted on the wafer chuck is no longer uniform. In the technology for forming a temperature sensor on the semiconductor wafer, the temperature sensor needs to be calibrated prior to testing in order to achieve sufficient accuracy.

[0006] The present invention has been proposed in light of the situation described above, and the objective thereof lies in providing a semiconductor testing device and a wafer prober capable of measuring the temperature of a semiconductor wafer under test with sufficient accuracy.[Means for Solving the Problems]

[0007] In order to solve the problems above, a semiconductor testing device according to the present invention performs electrical testing by causing a probe needle on a probe card to contact dies formed on a semiconductor wafer, the semiconductor testing device comprising: an infrared camera which is provided at a predetermined height from a top surface of the probe card and is capable of imaging a field of view including at least a portion of the top surface of the probe card; and a digital signal processor for converting a luminance distribution in an infrared image captured by the infrared camera to a temperature distribution, wherein the probe card comprises a through-hole formed so that a surface of a die being electrically tested by contact of theprobe needle provided on a bottom surface of the probe card can be imaged by the infrared camera.

[0008] The digital signal processor may detect a temperature of the die imaged by the infrared camera through the through-hole, from the infrared image of said die. A cover which covers an optical path running from the infrared camera to the top surface of the probe card and blocks penetration of external light may further be included.

[0009] An interface board electrically connected to the probe card may further be included. A main body for housing the digital signal processor, a test head for housing the infrared camera and the interface board, and a cable for transmitting signals between the main body and the test head may further be included. The probe card may be attached to the test head.

[0010] A main body for housing the digital signal processor, and a cable for transmitting signals between the main body and the interface board may further be included. The interface board may be installed on an optical path running from the infrared camera to the top surface of the probe card so that a bottom surface thereof faces the top surface of the probe card with a predetermined gap formed therebetween, the infrared camera may be capable of imaging a field of view including at least a portion of the top surface of the interface board instead of the probe card, and the interface board may comprise a through-hole formed so that the infrared camera can image the surface of the dies through the through-hole in the probe card. The probe card may be attached to the interface board.

[0011] A wafer prober according to the present invention causes a probe needle of a probe card to successively contact dies formed on a semiconductor wafer, for the purpose of electrical testing, the wafer prober comprising: a wafer chuck for mounting, on a top surface thereof, thesemiconductor wafer on which the dies are formed, so that a top surface of said semiconductor wafer faces a bottom surface of the probe card provided with the probe needle; a drive device for driving the wafer chuck so that the dies are successively contacted by the probe needle; an infrared camera which is provided at a predetermined height from a top surface of the probe card and is capable of imaging a field of view including at least a portion of the top surface of the probe card; and a digital signal processor for converting a luminance distribution in an infrared image captured by the infrared camera to a temperature distribution, wherein the probe card comprises a through-hole formed so that a surface of a die contacted by the probe needle provided on the bottom surface of the probe card can be imaged by the infrared camera.

[0012] A method for testing a semiconductor wafer according to the present invention comprises: performing electrical testing by causing the probe needle to contact the dies formed on the semiconductor wafer; using the infrared camera to image, through the through-hole in the probe card, surfaces of the dies being electrically tested; and using the digital signal processor to detect the temperature of the dies from an infrared image captured by the infrared camera.[Advantage of the Invention]

[0013] The present invention enables the temperature of a semiconductor wafer being electrically tested to be measured with sufficient accuracy.[Brief Description of the Drawings]

[0014] [Fig. 1] shows a semiconductor testing system according to a first embodiment.[Fig. 2] is a plan view of a semiconductor wafer.[Fig. 3] shows the main parts of the semiconductor testing system.[Fig. 4] is a diagram to illustrate imaging performed by an infrared camera.[Fig. 5] shows an image indicating temperature distributions of dies.[Fig. 6] shows a semiconductor testing system comprising a semiconductor testing device according to a variant example. [Fig. 7] shows a semiconductor testing system according to a second embodiment.[Embodiments of the Invention]

[0015] Embodiments of the semiconductor testing device and wafer prober will be described in detail below with reference to the drawings .

[0016] (First Embodiment)Fig. 1 shows the schematic configuration of a semiconductor testing system according to a first embodiment. The semiconductor testing system according to the first embodiment is used for testing a semiconductor wafer 110 on which integrated circuits are formed, and comprises: a wafer prober 30 on which the semiconductor wafer 110 is mounted; and a semiconductor testing device 10 having a test head 20 removably arranged directly above the wafer prober 30, the test head 20 being connected to a main body 11 via a cable 12 for transmitting electrical signals. A probe card 40 is attached to a bottom portion of the test head 20.

[0017] The wafer prober 30 is provided with a wafer chuck 32 for gripping the semiconductor wafer 110 mounted on a top surface thereof. The wafer chuck 32 may grip the mounted semiconductor wafer 110 by suction-attachment using negative pressure, and a heating medium fluid may be circulated through an internally-provided flow path so that the wafer chuck 32 is at a predetermined temperature. The wafer chuck 32 is driven in translation in three-dimensional directions (XYZ directions) and in a rotation direction (0 direction)by means of a drive device 31 so that dies on the mounted semiconductor wafer 110 successively contact probe needles 42 formed on a bottom surface of the probe card 40.

[0018] In the semiconductor testing device 10, the test head 20 is provided with: probe towers 22 configured to contact pads on the probe card 40 attached to the bottom portion thereof; and interface boards 21 which are electrically connected to the probe towers 22 and send / receive signals with a cable 12. An infrared camera 26 having a field of view that includes a top surface of the probe card 40 is furthermore provided in the test head 20 at a predetermined height from the top surface of the probe card 40. A cover 27 for blocking external light covers the periphery of an optical path running from the infrared camera 26 to the top surface of the probe card 40. The main body 11 is provided with a digital signal processor (DSP) which is not depicted, in order to perform data processing for detecting a temperature of the semiconductor wafer 110 on the basis of an infrared image acquired by the infrared camera 26.

[0019] Fig. 2 is a plan view of the semiconductor wafer 110 which is tested by the semiconductor testing system. Numerous dies 111 each having an integrated circuit burned on are disposed on the top surface of the semiconductor wafer 110, the dies 111 being processed into individual chips in a subsequent step. The dies are electrically tested by means of the semiconductor testing device 10 through the probe needles 42 which contact the dies in succession.

[0020] Fig. 3 shows the configuration of the main parts of the semiconductor testing system. The probe needles 42 are disposed at predetermined positions on the bottom surface of the probe card 40 corresponding to the dies 111 on the semiconductor wafer 110 mounted on the wafer chuck 32. Furthermore, through-holes 41 are formed at positionscorresponding to directly above the dies 111 being tested which are contacted by the probe needles 42.

[0021] The infrared camera 26 provided at a predetermined height from the top surface of the probe card 40 is capable of also imaging the surfaces of the dies 111 being tested, through the through-holes 41 provided directly above the dies 111. Fig. 3 shows optical paths 120 running from the infrared camera 26 to the dies 111 through the through-holes 41. The section of the optical paths 120 running from the infrared camera 26 to the top surface of the probe card 40 is covered by the cover 27 in order to block penetration of external light so that imaging of the dies 111 performed by the infrared camera 26 is not affected.

[0022] Fig. 4 is a diagram to illustrate imaging performed by the infrared camera 26. Fig. 4 (a) is a partial plan view of the top surface of the probe card 40 included in the field of view of the infrared camera 26. A plurality of the through- holes 41 are arrayed on the top surface of the probe card 40. Fig. 4 (b) is a view in cross section obtained by sectioning the probe card 40 in fig. 4 (a) along the section line IVB-IVB. The through-holes 41 in the probe card 40 are formed directly above the dies 111 being tested which are contacted by pairs of the probe needles 42.

[0023] Fig. 4 (c) is a plan view showing the arrangement of dies Illa being tested, which are simultaneously contacted by the probe needles 42 of the probe card 40, among the plurality of dies 111 formed on the top surface of the semiconductor wafer 110. Among the plurality of dies 111, the dies Illa being tested constitute the dies 111 which are at positions corresponding to the arrangement of probe needles 42 provided on the probe card 40 and which are contacted by said probe needles 42. Surfaces of the dies Illa being tested are imaged by means of the infrared camera 26 through the through-holes41 formed in the probe card 40 directly above the dies Illa being tested. A plurality of dies Illa being tested can be tested at one time by means of the probe card 40. All of the dies 111 formed on the semiconductor wafer 110 can be tested by repeatedly testing a plurality of dies Illa being tested within a predetermined area in this way over the area of the dies 111.

[0024] Fig. 5 is an image showing a temperature distribution of the dies 111. This image displays the temperature distribution of the dies Illa being tested and a surrounding area, and is obtained by converting a luminance distribution, corresponding to a distribution of light quantities detected by the infrared camera in an infrared image that includes the top surface of the probe card 40 imaged by the infrared camera 26 and the surfaces of the dies 111 being tested which have been imaged through the through-holes 41 in the probe card 40, to a temperature distribution by means of the digital signal processor. The digital signal processor may consult a calibration curve, etc. prepared beforehand so that the infrared image is correctly converted to a temperature distribution.

[0025] As described above, the semiconductor testing device 10 makes it possible to measure the temperatures of the dies Illa being tested on the semiconductor wafer 110 under test, which are contacted by the probe needles 42 on the probe card 40. The temperatures of the dies 111 are obtained by the digital signal processor which processes the infrared image captured by the infrared camera 26, ensuring sufficient accuracy. This means that temperature characteristics of the dies Illa being tested on the semiconductor wafer 110 can be measured with sufficient accuracy. In other words, the temperature of the semiconductor wafer 110 under test can be measured with sufficient accuracy.

[0026] It should be noted that the semiconductor testing device 10 was configured so that the test head 20 and the main body 11 are provided separately and connected by the cable 12. However, the semiconductor testing device 10 is not limited to this configuration, and the main body 11 and the test head 20 may equally be constructed as a single piece, rather than being provided separately, so that the test head 20 in fig. 1 has the functions of both the main body 11 and the test head 20.

[0027] (Variant Example)Fig. 6 shows a semiconductor testing system according to a variant example. The semiconductor testing device 10 according to the variant example differs from the semiconductor testing device 10 shown in fig. 1 in that an interface board 24 is provided on the optical path running from the infrared camera 26 to the top surface of the probe card 40, the interface board 24 being installed so that a bottom surface thereof faces the top surface of the probe card 40 with a predetermined gap formed therebetween, and the cable 12 is attached to the interface board 24, instead of the cable 12 being connected to the test head 20. The rest of the configuration is the same as that of the semiconductor testing system of the embodiment in fig. 1, and common reference numbers are therefore assigned to corresponding components.

[0028] In the variant example, the interface board 24 is provided on the optical path running from the infrared camera 26 to the top surface of the probe card 40, so the field of view of the infrared camera 26 includes the top surface of the interface board 24 instead of the top surface of the probe card 40. Through-holes 24a are formed in the interface board 24 at least directly above the through-holes 41 in the probe card 40 so that the infrared camera 26 can image the surfaces of the dies 111 being tested through the through-holes 41formed in the probe card 40. The optical path running from the infrared camera 26 to the top surface of the interface board 24 is covered by means of the cover 27 so that external light incidence is blocked. The probe card 40 is attached to the interface board 24 and is electrically connected to the interface board 24 via probe towers 22 provided on the bottom surface of the interface board 24.

[0029] The semiconductor testing device 10 according to the variant example is also capable of measuring the temperature of the semiconductor wafer 110 under test with sufficient accuracy, by measuring the temperatures of the dies Illa being tested on the semiconductor wafer 110 under test which are contacted by the probe needles 42 on the probe card 40, in the same way as with the semiconductor testing device 10 in fig. 1. The semiconductor testing device 10 according to the variant example comprises the single interface board 24 instead of the test head 20 in fig. 1, and is therefore easy to handle and creates a smaller burden for a user. Furthermore, it is easy to adjust an optical system including the infrared camera 26 because the infrared camera 26 is exposed.

[0030] (Second Embodiment)Fig. 7 shows the schematic configuration of a semiconductor testing system according to a second embodiment. The semiconductor testing system according to the second embodiment differs from the semiconductor testing system of the first embodiment shown in fig. 1 in that the infrared camera 26 and the cover 27 are provided in the wafer prober 30. The rest of the configuration is the same as that of the semiconductor testing system of the embodiment in fig. 1, and common reference numbers are therefore assigned to corresponding components.

[0031] In the semiconductor testing system of the second embodiment, the digital signal processor for detecting the temperatureof the semiconductor wafer 110 from the infrared image captured by the infrared camera 26 is provided in the wafer prober 30 instead of in the main body 11 of the semiconductor testing device 10. The temperature of the semiconductor wafer 110 under test can be measured by the wafer prober 30 with sufficient accuracy from the infrared image of the surface of the dies 111 being tested which is captured by the infrared camera 26, in the same way as with the semiconductor testing device 10 according to the first embodiment. Furthermore, the optical system including the infrared camera 26 is easy to adjust in the wafer prober 30 of the second embodiment because the infrared camera 26 is exposed when the test head 20 has been removed.[Key to Symbols]

[0032] 10 Semiconductor testing device11 Main body12 Cable20 Test head21 Interface board22 Probe tower26 Infrared camera27 Cover30 Wafer prober31 Drive device32 Wafer chuck40 Probe card41 Through-hole42 Probe needle110 Semiconductor wafer111 Die

Claims

CLAIMS

1. A semiconductor testing device for performing electrical testing by causing a probe needle on a probe card to contact dies formed on a semiconductor wafer, the semiconductor testing device comprising: an infrared camera which is provided at a predetermined height from a top surface of the probe card and is capable of imaging a field of view including at least a portion of the top surface of the probe card; and a digital signal processor for converting a luminance distribution in an infrared image captured by the infrared camera to a temperature distribution, wherein the probe card comprises a through-hole formed so that a surface of a die being electrically tested by contact of the probe needle provided on a bottom surface of the probe card can be imaged by the infrared camera.

2. The semiconductor testing device as claimed in claim 1, wherein the digital signal processor detects a temperature of the die imaged by the infrared camera through the through-hole, from the infrared image of said die.

3. The semiconductor testing device as claimed in claim 1, further comprising a cover which covers an optical path running from the infrared camera to the top surface of the probe card and blocks penetration of external light.

4. The semiconductor testing device as claimed in claim 1, further comprising an interface board electrically connected to the probe card.

5. The semiconductor testing device as claimed in claim 4, further comprising: a main body for housing the digital signal processor; a test head for housing the infrared camera and the interface board; and a cable for transmitting signals between the main body and the test head.

6. The semiconductor testing device as claimed in claim 5, wherein the probe card isattached to the test head

7. The semiconductor testing device as claimed in claim 4, further comprising: a main body for housing the digital signal processor; and a cable for transmitting signals between the main body and the interface board.

8. The semiconductor testing device as claimed in claim 7, wherein the interface board is installed on an optical path running from the infrared camera to the top surface of the probe card so that a bottom surface thereof faces the top surface of the probe card with a predetermined gap formed therebetween, the infrared camera is capable of imaging a field of view including at least a portion of the top surface of the interface board instead of the probe card, and the interface board comprises a through-hole formed so that the infrared camera can image the surface of the dies through the through-hole in the probe card.

9. The semiconductor testing device as claimed in claim 8, wherein the probe card is attached to the interface board.

10. A wafer prober for causing a probe needle of a probe card to successively contact dies formed on a semiconductor wafer, for the purpose of electrical testing, the wafer prober comprising: a wafer chuck for mounting, on a top surface thereof, the semiconductor wafer on which the dies are formed, so that a top surface of said semiconductor wafer faces a bottom surface of the probe card provided with the probe needle; a drive device for driving the wafer chuck so that the dies are successively contacted by the probe needle; an infrared camera which is provided at a predetermined height from a top surface of the probe card and is capable of imaging a field of view including at least a portion of the top surface of the probe card; and a digital signal processor for converting a luminance distribution in an infrared image captured by the infrared camera to a temperature distribution, wherein the probe card comprises a through-hole formed so that a surface of a die contacted by the probe needle provided on the bottom surface of the probe card can be imaged by the infrared camera.

11. A semiconductor testing method for testing a semiconductor wafer employing the semiconductor testing device as claimed in any one of claims 1 to 9 or the wafer prober as claimed in claim 10, wherein the semiconductor testing method comprises: performing electrical testing by causing the probe needle to contact the dies formed on the semiconductor wafer; using the infrared camera to image, through the through-hole in the probe card, surfaces of the dies being electrically tested, and using the digital signal processor to detect the temperature of the dies from an infrared image captured by the infrared camera.

Citation Information

Patent Citations

  • Method and apparatus for testing semiconductor wafers by means of a temperature-regulated chuck device

    US20060158207A1

  • Inspection apparatus and method

    US20090009203A1

  • Method and apparatus for detecting semiconductor device property

    US20140049283A1

  • Radiometric test and configuration of an infrared focal plane array at wafer probe

    US20160061883A1

  • Method for non-contact low substrate temperature measurement

    US20200381278A1