Wafer dynamic parameter testing equipment

Abstract

The invention discloses wafer dynamic parameter testing equipment which is provided with a testing device and a probe card for testing a wafer which is placed on a probe table and is internally provided with a to-be-tested device, and the probe card is provided with a plurality of probes connected with the to-be-tested device and a plurality of conductive contact pieces connected with the probes respectively. A connecting module of the testing device is provided with a plurality of connectors connected with conductive contact pieces, a high-voltage capacitor electrically connected with a high-voltage power supply in the testing device is connected with an inductive load module through a power switch, the inductive load module is connected with the connectors, and a control module is connected with a chip to be tested through the connectors. The control module realizes the dynamic parameter test of the device to be tested in the wafer by controlling the power switch to be turned on and turned off according to a certain time sequence, and the matching value of the probe card and the connector can reduce spurious oscillation signals so as to effectively improve the accuracy of the dynamic parameter test of the wafer. And therefore, the chip testing efficiency can be improved and the chip cost can be reduced.

Description

Technical Field

[0001] This invention relates to the field of wafer parameter testing technology, and more particularly to wafer dynamic parameter testing equipment. Background Technology

[0002] A power module typically consists of multiple IGBT chips and FRD chips connected in parallel. If one chip fails, the entire module will fail. Therefore, to ensure that all chips in a power module are of good quality, wafer probe testing (CP testing) is usually performed on the wafer, followed by binning, and only the chips that pass the test (Bin1) are selected for die bonding. Chip testing includes static parameter testing, dynamic parameter testing, and aging testing. For power chips, testing only static parameters is insufficient for application purposes; dynamic characteristics also need to be tested. However, in the current wafer-level CP testing stage, due to physical bottlenecks such as parasitic inductance and capacitance causing stray noise in dynamic testing of power chips, only static parameter testing is possible.

[0003] To address the challenges of dynamic testing of power chips, a KGD (Knock-down Die) testing solution exists: a whole wafer is diced into individual chips, which are then placed on a test fixture using a die-bound method for dynamic parameter testing. However, this solution has several drawbacks: because each chip needs to be picked up individually, even with a 6-station testing setup, the testing efficiency remains extremely low, far inferior to that of wafer-level CP (Programmable Component Testing). Furthermore, since the chips are pre-diced, a die-bound device is required for gripping, and a complete set of dynamic and static testing equipment is needed to complete a series of tests, resulting in high equipment costs and extremely high testing costs. Summary of the Invention

[0004] The purpose of this invention is to provide a wafer dynamic parameter testing device that can reduce stray oscillation signals to effectively improve the accuracy of wafer dynamic parameter testing, thereby improving chip testing efficiency and reducing chip costs.

[0005] To achieve the above objectives, this invention discloses a wafer dynamic parameter testing device for testing a wafer with a device under test (DUT) disposed inside a probe stage, comprising: A probe card is disposed above the probe station. On one side of the probe card near the wafer, there are a first probe electrically connected to the input terminal of the device under test (DUT), a second probe electrically connected to the output terminal of the DUT, and a third probe electrically connected to the control terminal of the DUT. On the other side, there are a first conductive contact, a second conductive contact, and a third conductive contact electrically connected to the first probe, the second probe, and the third probe, respectively. The testing device is positioned above the probe card. The testing device includes a connection module, a control module, a power switch, an inductive load module, and a high-voltage capacitor with both ends electrically connected to a high-voltage power supply. The connection module has a first connector, a second connector, and a third connector that are electrically in contact with the first conductive contact, the second conductive contact, and the third conductive contact, respectively. The input terminal of the power switch is electrically connected to the output terminal of the high-voltage capacitor, and the output terminal of the power switch is electrically connected to the input terminal of the inductive load module. The output terminal of the inductive load module is electrically connected to the first connector, and the input terminal of the high-voltage capacitor is electrically connected to the second connector. The two output terminals of the control module are electrically connected to the control terminal of the power switch and the third connector, respectively. The control module is used to control the power switch to turn on and to control the device under test (DUT) to turn on and off in a specific timing sequence via the third connector.

[0006] Preferably, the testing device further includes a resistive load module, the input terminal of which is electrically connected to the output terminal of the power switch, and the output terminal of which is electrically connected to the first connector.

[0007] Preferably, the resistive load module includes a first switch and a resistor connected in series, the first switch being electrically connected to the output terminal of the power switch, and the resistor being electrically connected to the first connector.

[0008] Preferably, the inductive load module includes a diode and a second switch and an inductor connected in series. The second switch is electrically connected to the output terminal of the power switch, the inductor is electrically connected to the first connector, the input terminal of the diode is electrically connected to the inductor, and the output terminal of the diode is electrically connected to the second switch.

[0009] Preferably, the power switch includes an IGBT, the collector of which is electrically connected to the output terminal of the high-voltage capacitor, the emitter of which is electrically connected to the input terminal of the inductive load module, and the gate of which is electrically connected to the output terminal of the control module; or, the power switch includes a SiC MOSFET, the drain of which is electrically connected to the output terminal of the high-voltage capacitor, the source of which is electrically connected to the input terminal of the inductive load module, and the gate of which is electrically connected to the output terminal of the control module.

[0010] Preferably, the control module includes a controller, a first door driver, and a second door driver. The controller is electrically connected to the input terminals of the first door driver and the second door driver, respectively. The output terminal of the first door driver is electrically connected to the control terminal of the power switch, and the input terminal of the second door driver is electrically connected to the third connector.

[0011] Preferably, the testing device further includes an oscilloscope, a first voltmeter, a second voltmeter, and a current meter. The two detection terminals of the current meter are electrically connected to the output terminal of the inductive load module and the first connector, respectively. The two detection terminals of the first voltmeter are electrically connected to the first connector and the second connector, respectively. The two detection terminals of the second voltmeter are electrically connected to the second connector and the third connector, respectively. The detection output terminals of the current meter, the first voltmeter, and the second voltmeter are electrically connected to the current detection terminal, the first voltage detection terminal, and the second voltage detection terminal of the oscilloscope, respectively.

[0012] Preferably, the control module includes a controller, a first door driver, and a second door driver. The controller is electrically connected to the input terminals of the first door driver and the second door driver, respectively. The output terminal of the first door driver is electrically connected to the control terminal of the power switch, and the input terminal of the second door driver is electrically connected to the third connector. The testing device further includes a monitoring and protection circuit and a galvanometer. The two detection terminals of the galvanometer are electrically connected to the output terminal of the inductive load module and the first connector, respectively. The first and second detection terminals of the monitoring and protection circuit are electrically connected to the detection output terminal of the galvanometer and the detection output terminal of the second gate driver, respectively. The first and second output terminals of the monitoring and protection circuit are electrically connected to the controller. The monitoring and protection circuit is used to send a monitoring signal to the controller based on the current and voltage signals output by the galvanometer and the second gate driver. The controller is used to control the power switch and / or the device under test to turn off based on the monitoring signal. Compared with existing technologies, this invention provides a testing device and probe card to test a wafer containing a device under test (DUT) placed on a probe station. The probe card has multiple probes connected to the DUT and multiple conductive contacts connected to the probes. The testing device's connection module has multiple connectors connected to the conductive contacts. A high-voltage capacitor connected to a high-voltage power supply in the testing device is connected to an inductive load module via a power switch. The inductive load module is connected to the connectors. The control module is connected to the DUT via a connector. The control module controls the power switch to turn on and controls the DUT to turn on and off in a specific timing sequence to perform dynamic parameter testing on the DUT in the wafer. The coordinated values ​​of the probe card and connectors can reduce stray oscillation signals, effectively improving the accuracy of wafer dynamic parameter testing, thereby improving chip testing efficiency and reducing chip costs. Attached Figure Description

[0013] Figure 1 This is a circuit diagram of the wafer dynamic parameter testing device according to an embodiment of the present invention.

[0014] Figure 2 This is a three-dimensional structural diagram of the wafer dynamic parameter testing equipment according to an embodiment of the present invention.

[0015] Figure 3 This is an exploded structural diagram of the wafer dynamic parameter testing equipment according to an embodiment of the present invention.

[0016] Figure 4 This is a timing diagram of AC testing in the wafer dynamic parameter testing equipment according to an embodiment of the present invention.

[0017] Figure 5 This is a timing diagram of BI testing in the wafer dynamic parameter testing equipment according to an embodiment of the present invention. Detailed Implementation

[0018] To illustrate the technical content, structural features, objectives, and effects of the present invention in detail, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0019] Please see Figures 1 to 3 This invention discloses a wafer dynamic parameter testing device for testing a wafer with a device under test (DUT) 10 disposed inside, placed on a probe station, comprising: Probe card 1 is disposed above the probe station. On the side of probe card 1 closest to the wafer, there are a first probe 1001 electrically connected to the input terminal of the device under test 10, a second probe 1002 electrically connected to the output terminal of the device under test 10, and a third probe 1003 electrically connected to the control terminal of the device under test 10. On the other side, there are a first conductive contact 11, a second conductive contact 12, and a third conductive contact 13 electrically connected to the first probe 1001, the second probe 1002, and the third probe 1003, respectively. Test device 2 is positioned above probe card 1. Test device 2 includes connection module 21, control module 22, power switch 23, inductive load module 24, and high-voltage capacitor 25 whose two ends are electrically connected to high-voltage power supply 20. Connection module 21 is provided with first connector 211, second connector 212, and third connector 213 that are electrically connected to first conductive contact 11, second conductive contact 12, and third conductive contact 13, respectively. The input terminal of power switch 23 is electrically connected to the output terminal of high-voltage capacitor 25, the output terminal of power switch 23 is electrically connected to the input terminal of inductive load module 24, the output terminal of inductive load module 24 is electrically connected to first connector 211, and the input terminal of high-voltage capacitor 25 is electrically connected to second connector 212. The two output terminals of control module 22 are electrically connected to the control terminal of power switch 23 and third connector 213, respectively. Control module 22 is used to control power switch 23 to turn on and to control device under test 10 to turn on and off in a certain sequence through third connector 213.

[0020] Compared with the prior art, the present invention provides a test device 2 and a probe card 1 to test a wafer containing a device under test (DUT) 10 placed on a probe station. The probe card 1 is provided with multiple probes connected to the DUT 10 and multiple conductive contacts connected to the probes. The connection module 21 of the test device 2 is provided with multiple connectors connected to the conductive contacts. The high-voltage capacitor 25, which is electrically connected to the high-voltage power supply 20 in the test device 2, is connected to the inductive load module 24 through a power switch 23. The inductive load module 24 is connected to the connector. The control module 22 is connected to the DUT through the connector. The control module 22 controls the power switch 23 to turn on and controls the DUT 10 to turn on and off in a certain timing sequence to achieve dynamic parameter testing of the DUT 10 in the wafer. The coordinated values ​​of the probe card 1 and the connector can reduce stray oscillation signals and effectively improve the accuracy of wafer dynamic parameter testing, thereby improving chip testing efficiency and reducing chip cost.

[0021] It should be noted that the device under test 10 (DUT) can be a SiC chip, an IGBT chip, or an FRD chip, etc.

[0022] See Figures 1 to 3The test device 2 also includes a resistive load module 26. The input terminal of the resistive load module 26 is electrically connected to the output terminal of the power switch 23, and the output terminal of the resistive load module 26 is electrically connected to the first connector 211, which is beneficial for aging tests and early screening of chips.

[0023] Preferably, the resistive load module 26 includes a first switch 261 and a resistor 262 connected in series. The first switch 261 is electrically connected to the output terminal of the power switch 23, and the resistor 262 is electrically connected to the first connector 211.

[0024] See Figures 1 to 3 The inductive load module 24 includes a diode 241 and a second switch 242 and an inductor 243 connected in series. The second switch 242 is electrically connected to the output terminal of the power switch 23, the inductor 243 is electrically connected to the first connector 211, the input terminal of the diode 241 is electrically connected to the inductor 243, and the output terminal of the diode 241 is electrically connected to the second switch 242.

[0025] Specifically, in this embodiment, the diode 241 of the inductive load module 24 is a freewheeling diode.

[0026] Sharing the same test loop between the dynamic parameter test circuit (AC test) and the aging test circuit (Burn In test) helps reduce circuit complexity and facilitates later hardware maintenance, upgrades and expansions.

[0027] Specifically, in this embodiment, the DC high-voltage power supply 20 connected to the high-voltage capacitor 25 will charge the high-voltage capacitor 25 to store energy for the test circuit. When performing dynamic parameter testing and aging testing, the controller 221 needs to turn on the power switch 23 through the first door driver 222 so that the high-voltage capacitor 25 can provide energy for the test circuit. During dynamic parameter testing, the first switch 261 needs to be disconnected and the second switch 242 closed to allow the inductive load module 24 to be connected to the test circuit. Then, the controller 221 controls the second gate driver 223 to turn on and off via timing control, thereby controlling the on and off of the device under test (DUT) 10. When the DUT 10 is on, the current from the high-voltage capacitor 25 flows through the inductor 243 of the inductive load module 24 to the DUT 10, and returns to the high-voltage capacitor 25 through the output of the DUT 10, forming a test loop. When the DUT 10 is off, the current freewheels in the loop of the second switch 242, inductor 243, and diode 241. Simultaneously, the ammeter 274, the first voltmeter 272, and the second voltmeter 273 collect and monitor the test loop current ICE, VCE voltage, and the VGE drive voltage at the control terminal (DUT pin) of the DUT 10 to obtain the dynamic parameter data of the DUT 10. The AC test timing can be referenced. Figure 4 Dual-pulse reference timing diagram; During aging testing, the first switch 261 needs to be closed and the second switch 242 needs to be opened to connect the resistive load module 26 to the test circuit. Then, the controller 221 configures the VGE control pulse with an appropriate duty cycle, and uses this to control the second gate driver 223 to turn on and off, thereby controlling the device under test (DUT) 10 to turn on and off. When the DUT 10 is on, the current of the high-voltage capacitor 25 reaches the DUT 10 through the resistor 262 of the resistive load module 26, and returns to the high-voltage capacitor 25 through the output of the DUT 10 to form a test loop. At the same time, the ammeter 274, the first voltmeter 272, and the second voltmeter 273 collect and monitor the test loop current ICE, VCE voltage, and the VGE drive voltage of the control terminal (DUT pin terminal) of the DUT 10 to obtain the aging test data of the DUT 10. The BI test timing can be referenced. Figure 5 BI reference timing diagram.

[0028] See Figures 1 to 3 In this embodiment, the power switch 23 includes an IGBT 231. The collector of the IGBT 231 is electrically connected to the output terminal of the high-voltage capacitor 25, the emitter of the IGBT 231 is electrically connected to the input terminal of the inductive load module 24, and the gate of the IGBT is electrically connected to the output terminal of the control module 22. However, it is not limited to this. In some embodiments, the power switch 23 includes a SiC MOSFET 231. The drain of the SiC MOSFET 231 is electrically connected to the output terminal of the high-voltage capacitor 25, the source of the SiC MOSFET 231 is electrically connected to the input terminal of the inductive load module 24, and the gate of the SiC MOSFET 231 is electrically connected to the output terminal of the control module 22, which facilitates the rapid connection and disconnection of the test circuit through the controller 221.

[0029] See Figures 1 to 3 The control module 22 includes a controller 221, a first gate driver 222, and a second gate driver 223. The controller 221 is electrically connected to the input terminals of the first gate driver 222 and the second gate driver 223, respectively. The output terminal of the first gate driver 222 is electrically connected to the control terminal of the power switch 23, and the input terminal of the second gate driver 223 is electrically connected to the third connector 213.

[0030] Gate drivers can output high-voltage, high-current pulse signals to control power transistors, which is beneficial for achieving stable and reliable signal control.

[0031] See Figures 1 to 3The probe card 1 is provided with a fourth conductive contact, a fifth conductive contact and a sixth conductive contact on the side away from the wafer, which are electrically connected to the first probe 1001, the second probe 1002 and the third probe 1003 respectively. The connection module 21 is also provided with a fourth connector, a fifth connector and a sixth connector that are electrically in contact with the fourth conductive contact, the fifth conductive contact and the sixth conductive contact respectively. The testing device 2 also includes an oscilloscope 271, a first voltmeter 272, a second voltmeter 273, and an ammeter 274. The two detection terminals of the ammeter 274 are electrically connected to the output terminal of the inductive load module 24 and the fourth connector, respectively. The two detection terminals of the first voltmeter 272 are electrically connected to the fourth connector and the fifth connector, respectively. The two detection terminals of the second voltmeter 273 are electrically connected to the fifth connector and the sixth connector, respectively. The detection output terminals of the ammeter 274, the first voltmeter 272, and the second voltmeter 273 are electrically connected to the current detection terminal, the first voltage detection terminal, and the second voltage detection terminal of the oscilloscope 271, respectively.

[0032] Specifically, in this embodiment, the probes on the probe card 1 are designed according to the shape and size of the chip pads on the wafer. The probe card 1 includes a first power region 101 and a first control region 102. The first power region is provided with a first conductive contact 11 and a second conductive contact 12, and the first control region 102 is provided with a third conductive contact 13. The connection module 21 is provided with a second power region 201 and a second control region 202 corresponding to the first power region 101 and the first control region 102, respectively. The second power region 201 is provided with a first connector 211 and a second connector 212, and the second control region 202 is provided with a third connector 213. Each connector adopts a hard-connection fixture design. In this embodiment, the connector adopts a pogopin structure to ensure sufficient contact area and sufficient electrical isolation between the connector in the second control area 202 and the conductive contact in the first control area 102, and to ensure sufficient contact area between the connector in the second power area 201 and the conductive contact in the first power area 101. This helps to reduce stray oscillation signals in the circuit and improve the accuracy of dynamic parameter testing.

[0033] Specifically, in this embodiment, the controller 221 controls the device under test 10 to turn on and off at a digital drive frequency of 100MHz via the second gate driver 223, the third connector 213, the third conductive contact 13, and the third probe 1003, so as to improve the accuracy of the width of the generated pulse waveform. Furthermore, it employs real-time digital dynamic monitoring technology, using ammeter 274, first voltmeter 272, and second voltmeter 273 to simultaneously acquire and monitor the test circuit current ICE, VCE voltage, and VGE drive voltage of the control terminal (pin terminal of the DUT) of the device under test 10, so as to obtain the drive waveform of the control region and the output waveform of the power region for each working cycle, making it easier to detect faulty chips during the Burn In test.

[0034] See Figures 1 to 3 The control module 22 includes a controller 221, a first door driver 222 and a second door driver 223. The controller 221 is electrically connected to the input terminals of the first door driver 222 and the second door driver 223 respectively. The output terminal of the first door driver 222 is electrically connected to the control terminal of the power switch 23. The input terminal of the second door driver 223 is electrically connected to the third connector 213. The probe card 1 is also provided with a fourth conductive contact that is electrically connected to the first probe 1001 on the side away from the wafer, and the connection module 21 is provided with a fourth connector that is connected to the fourth conductive contact. The test device 2 also includes a monitoring and protection circuit 28 and a galvanometer 274. The two detection terminals of the galvanometer 274 are electrically connected to the output terminal of the inductive load module 24 and the fourth connector, respectively. The first detection terminal and the second detection terminal of the monitoring and protection circuit 28 are electrically connected to the detection output terminal of the galvanometer 274 and the detection output terminal of the second gate driver 223, respectively. The first output terminal and the second output terminal of the monitoring and protection circuit 28 are electrically connected to the controller 221. The monitoring and protection circuit 28 is used to send monitoring signals to the controller 221 according to the current and voltage signals output by the galvanometer 274 and the second gate driver 223. The controller 221 is used to control the power switch 23 and / or the device under test 10 to turn off according to the monitoring signals. Specifically, in this embodiment, the monitoring and protection circuit 28 includes a conventional voltage comparison circuit and a current comparison circuit, which can monitor the current in the test circuit and the voltage in the control circuit during testing. When problems such as short circuits occur, the controller 221 controls the power switch 23 and the device under test 10 to shut down, so as to power down the test circuit in time and protect the devices in the test circuit from damage due to voltage and current overload.

[0035] The above-disclosed embodiments are merely preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. Therefore, any equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.

Claims

1. A wafer dynamic parameter testing device for testing a wafer with a device under test (DUT) disposed inside a probe station, characterized in that, include: A probe card is disposed above the probe station. On one side of the probe card near the wafer, there are a first probe electrically connected to the input terminal of the device under test (DUT), a second probe electrically connected to the output terminal of the DUT, and a third probe electrically connected to the control terminal of the DUT. On the other side, there are a first conductive contact, a second conductive contact, and a third conductive contact electrically connected to the first probe, the second probe, and the third probe, respectively. The testing device is positioned above the probe card. The testing device includes a connection module, a control module, a power switch, an inductive load module, and a high-voltage capacitor with both ends electrically connected to a high-voltage power supply. The connection module has a first connector, a second connector, and a third connector that are electrically in contact with the first conductive contact, the second conductive contact, and the third conductive contact, respectively. The input terminal of the power switch is electrically connected to the output terminal of the high-voltage capacitor, and the output terminal of the power switch is electrically connected to the input terminal of the inductive load module. The output terminal of the inductive load module is electrically connected to the first connector, and the input terminal of the high-voltage capacitor is electrically connected to the second connector. The two output terminals of the control module are electrically connected to the control terminal of the power switch and the third connector, respectively. The control module is used to control the power switch to turn on and to control the device under test (DUT) to turn on and off in a specific timing sequence via the third connector.

2. The wafer dynamic parameter testing apparatus according to claim 1, wherein, The testing device further includes a resistive load module, the input terminal of which is electrically connected to the output terminal of the power switch, and the output terminal of which is electrically connected to the first connector.

3. The wafer dynamic parameter testing apparatus according to claim 2, wherein, The resistive load module includes a first switch and a resistor connected in series. The first switch is electrically connected to the output terminal of the power switch, and the resistor is electrically connected to the first connector.

4. The wafer dynamic parameter testing apparatus of claim 1, wherein, The inductive load module includes a diode, a second switch and an inductor connected in series. The second switch is electrically connected to the output terminal of the power switch, the inductor is electrically connected to the first connector, the input terminal of the diode is electrically connected to the inductor, and the output terminal of the diode is electrically connected to the second switch.

5. The wafer dynamic parameter test device of claim 1, wherein, The power switch includes an IGBT, the collector of which is electrically connected to the output terminal of the high-voltage capacitor, the emitter of which is electrically connected to the input terminal of the inductive load module, and the gate of which is electrically connected to the output terminal of the control module; or, the power switch includes a SiC MOSFET, the drain of which is electrically connected to the output terminal of the high-voltage capacitor, the source of which is electrically connected to the input terminal of the inductive load module, and the gate of which is electrically connected to the output terminal of the control module.

6. The wafer dynamic parameter testing apparatus of claim 1, wherein, The control module comprises a controller, a first gate driver and a second gate driver, the controller is electrically connected with the input terminals of the first gate driver and the second gate driver respectively, the output terminal of the first gate driver is electrically connected with the control terminal of the power switch, and the input terminal of the second gate driver is electrically connected with the third connector.

7. The wafer dynamic parameter testing apparatus of claim 1, wherein, The test device further comprises an oscilloscope, a first voltmeter, a second voltmeter and an ammeter, the two detection terminals of the ammeter are electrically connected with the output terminal of the inductive load module and the first connector respectively, the two detection terminals of the first voltmeter are electrically connected with the first connector and the second connector respectively, the two detection terminals of the second voltmeter are electrically connected with the second connector and the third connector respectively, and the detection output terminals of the ammeter, the first voltmeter and the second voltmeter are electrically connected with the current detection terminal, the first voltage detection terminal and the second voltage detection terminal of the oscilloscope respectively.

8. The wafer dynamic parameter testing apparatus of claim 1, wherein, The control module comprises a controller, a first gate driver and a second gate driver, the controller is electrically connected with the input terminals of the first gate driver and the second gate driver respectively, the output terminal of the first gate driver is electrically connected with the control terminal of the power switch, and the input terminal of the second gate driver is electrically connected with the third connector; the test device further comprises a monitoring protection circuit and an ammeter, the two detection terminals of the ammeter are electrically connected with the output terminal of the inductive load module and the first connector respectively, the first detection terminal and the second detection terminal of the monitoring protection circuit are electrically connected with the detection output terminal of the ammeter and the detection output terminal of the second gate driver respectively, the first output terminal and the second output terminal of the monitoring protection circuit are electrically connected with the controller, the monitoring protection circuit is used for sending a monitoring signal to the controller according to the current and voltage signals output by the ammeter and the second gate driver, and the controller is used for controlling the power switch and / or the device to be tested to be turned off according to the monitoring signal.

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