MEMS wafer detection system

Abstract

The invention relates to an MEMS wafer detection system, which comprises a test machine, an ASIC chip and a probe card, the ASIC chip is matched with an MEMS chip subsequently formed by crystal grains on an MEMS wafer, the test machine is in signal connection with the ASIC chip, and the ASIC chip is in signal connection with the probe card; the probe card is provided with a plurality of probes matched with the MEMS wafer and is used for transmitting analog signals generated when crystal grains on the MEMS wafer sense corresponding physical quantities to the ASIC chip; the ASIC chip is used for converting and processing the analog signal and outputting a digital signal to the test machine; and the testing machine is used for analyzing and processing the received digital signal to obtain a detection result of the MEMS wafer. In the CP test stage of the MEMS wafer, the related performance test which can only be carried out when the MEMS chip and the ASIC chip are assembled into a sensor can be realized, crystal grains on the MEMS wafer can be better screened, and the test reliability and comprehensiveness are improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor testing technology, and in particular to a MEMS wafer detection system. Background Art

[0002] A MEMS (Micro-Electro-Mechanical System) wafer contains several MEMS dies. These dies are then cut and packaged (either first, then packaged, or first, then cut) to form several MEMS chips. Before the MEMS wafer is cut and packaged, it must be tested at the wafer level using ATE (Automatic Test Equipment).

[0003] Wafer-level testing of MEMS wafers is called CP (Chip Probe) testing, which is usually built using electronic resources built into the ATE installed on a wafer probe test station. The electronic resources of the ATE usually include voltage and current measurement and excitation units, digital algorithm pattern generators, scan test units, mixed-signal arbitrary waveform generators, digital-to-analog converters, and other test instruments. These electronic resources are connected to the MEMS wafer through a probe card. The wafer probe station positions the wafer under the probe card and lifts the wafer so that it contacts the probe card at the test position for testing. Then, the wafer is moved up and down from the probe card to move (or position) the wafer to the next test position. However, this CP test of MEMS wafers cannot screen out all static faults or transient faults, and has disadvantages such as low test reliability and incomplete testing. Summary of the Invention

[0004] Based on this, it is necessary to provide a MEMS wafer detection system that can improve test reliability and comprehensiveness to address the above problems.

[0005] A MEMS wafer inspection system includes a tester, an ASIC chip, and a probe card. The ASIC chip matches a MEMS chip subsequently formed from a die on a MEMS wafer. The tester is signal-connected to the ASIC chip, and the ASIC chip is signal-connected to the probe card.

[0006] The probe card is provided with a number of probes matching the MEMS wafer, which are used to transmit the analog signals generated by the grains on the MEMS wafer when sensing the corresponding physical quantities to the ASIC chip; the ASIC chip is used to convert and process the analog signals and output digital signals to the tester; the tester is used to analyze and process the received digital signals to obtain the detection results of the MEMS wafer.

[0007] In one embodiment, the ASIC chip includes an analog signal conditioning module, an analog-to-digital conversion module, a digital signal processing module and a digital signal output module connected in sequence, the analog signal conditioning module is connected to the probe card, and the digital signal output module is connected to the tester.

[0008] In one embodiment, the MEMS wafer includes a plurality of first-type grains for sensing acceleration, and the first-type grains are used to form an acceleration sensor chip or a chip including an acceleration sensor; the analog signal conditioning module includes a first charge amplifier, and the first charge amplifier is connected to the probe card and the analog-to-digital conversion module; the probe card transmits the analog signal of the acceleration generated by the first-type grains to the first charge amplifier, and the first charge amplifier conditions the received analog signal into a voltage signal and sends it to the analog-to-digital conversion module.

[0009] In one embodiment, the MEMS wafer includes a plurality of second-type grains for sensing angular velocity, and the second-type grains are used to form a gyroscope chip or a chip including a gyroscope; the analog signal conditioning module includes a second charge amplifier, an orthogonal compensator and a demodulator, the second charge amplifier is connected to the probe card, the orthogonal compensator and the demodulator, and the demodulator is connected to the analog-to-digital conversion module; the probe card transmits the analog signal of the angular velocity generated by the second-type grain to the second charge amplifier, the orthogonal compensator compensates according to the driving detection voltage signal of the second-type grain, and outputs the compensated signal to the second charge amplifier, the second charge amplifier conditions the received analog signal and the compensated signal to obtain a voltage signal and sends it to the analog-to-digital conversion module through the demodulator.

[0010] In one embodiment, the ASIC chip further includes a driving module, which is connected to the orthogonal compensator and is also connected to the second type of grain through the probe card; the driving module is used to drive the movement of the mass block of the second type of grain and output the driving detection voltage signal of the second type of grain to the orthogonal compensator.

[0011] In one embodiment, the driving module includes a high-voltage driving unit, a high-voltage charge pump, a third charge amplifier, an automatic gain control unit and a gain coarse adjustment unit. The high-voltage driving unit is connected to the high-voltage charge pump and is also connected to the driving of the second type of grain through the probe card. The high-voltage charge pump is connected to the mass block of the second type of grain through the probe card. The third charge amplifier is connected to the driving detection end of the second type of grain through the probe card. The third charge amplifier is also connected to the orthogonal compensator and the automatic gain control unit. The automatic gain control unit is connected to the high-voltage driving unit and the gain coarse adjustment unit.

[0012] In one embodiment, the ASIC chip further includes a phase control module, which includes a phase-locked loop and a phase shift calibration unit, the phase-locked loop is connected to the third charge amplifier, the demodulator and the phase shift calibration unit, and the phase shift calibration unit is connected to the high-voltage drive unit.

[0013] In one embodiment, the digital signal processing module includes a filter, a digital compensator and a low-pass filter connected in sequence, the filter is connected to the analog-to-digital conversion module, and the low-pass filter is connected to the digital signal output module.

[0014] In one embodiment, the digital signal output module includes a multiplexer, a synchronous output unit, a first-in-first-out unit and a serial port input and output unit, the multiplexer is connected to the low-pass filter, the digital compensator, the synchronous output unit and the first-in-first-out unit, the synchronous output unit is connected to the serial port input and output unit, and the serial port input and output unit is connected to the tester.

[0015] In one embodiment, the probe card includes a base plate and signal leads, signal pads and probes arranged on the base plate. The ASIC chip is arranged on the base plate and is electrically connected to the probes through the signal leads and the signal pads. The ASIC chip is loaded with firmware for supporting CP testing.

[0016] In one embodiment, the firmware of the ASIC chip is used to determine whether the die functions in a soft transient fault mode. The firmware of the ASIC chip is used to classify the performance level of the die. The firmware of the ASIC chip is loaded with several instructions to perform noise measurements for multiple gain settings. The firmware of the ASIC chip is loaded into an auxiliary memory and loaded into the registers of the ASIC chip during testing.

[0017] In the aforementioned MEMS wafer inspection system, the probe card is equipped with probes that match the MEMS wafer and are used to transmit the analog signals generated by the MEMS wafer's grains when they sense corresponding physical quantities to the ASIC chip. The ASIC chip is used to convert and process the analog signals, outputting digital signals to the tester, which analyzes and processes the received digital signals to obtain the MEMS wafer inspection results. During the CP test phase of the MEMS wafer, relevant performance tests can be performed, which can only be performed when the MEMS chip and ASIC chip are assembled into a sensor. This allows for better screening of the grains on the MEMS wafer and improves the reliability and comprehensiveness of the test. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a structural block diagram of a MEMS wafer detection system in one embodiment;

[0019] Figure 2 Schematic diagram of the structure of a MEMS wafer detection system in one embodiment;

[0020] Figure 3 A schematic diagram of the structure of an ASIC chip and a probe card in one embodiment;

[0021] Figure 4 A block diagram of the structure of an ASIC chip in one embodiment;

[0022] Figure 5 A schematic diagram of the structure of an ASIC chip in one embodiment;

[0023] Figure 6 FIG. 4 is a structural schematic diagram of an ASIC chip in another embodiment. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application. It is understood that the term "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc., if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0026] As used herein, the singular forms "a," "an," and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include," "comprising," "having," and the like specify the presence of stated features, integers, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, operations, components, parts, or combinations thereof. Furthermore, the term "and / or" as used in this specification includes any and all combinations of the relevant listed items.

[0027] MEMS chips are combined with ASIC (Application Specific Integrated Circuit) chips to form sensors. The CP test of MEMS wafers is used to screen out MEMS dies that are obviously defective, which saves the cost of packaging bad MEMS dies and the cost of subsequent FT test (Final Test) and QA test (Quality Assurance Test) to test and screen the packaged MEMS chips. However, the CP test of MEMS wafers cannot screen out all static faults, nor can it screen out transient faults that may be more obvious in longer FT test insertions. The CP test of MEMS wafers cannot effectively screen out all manufacturing defects because directly probing the MEMS wafer without an ASIC circuit is incomplete. ATE can only use test modes supported by electronic resources for general equipment testing and cannot replicate or simulate the signal processing methods of ASIC chips that match the MEMS chips.

[0028] Based on this, the MEMS wafer inspection system provided by this application selects an ASIC chip that matches the MEMS chip that will be subsequently formed from the grains on the MEMS wafer. The probe card transmits the analog signal generated by the grains on the MEMS wafer when sensing the corresponding physical quantity to the ASIC chip. The ASIC chip is used to convert and process the analog signal and output a digital signal to the tester. The tester analyzes and processes the received digital signal to obtain the inspection results of the MEMS wafer. During the CP test phase of the MEMS wafer, relevant performance tests that can only be performed when the MEMS chip and ASIC chip are assembled into a sensor can be performed, better screening the grains on the MEMS wafer, and improving the reliability and comprehensiveness of the test.

[0029] In one embodiment, Figure 1 As shown, a MEMS wafer inspection system is provided, including a tester 100, an ASIC chip 200, and a probe card 300. The ASIC chip 200 matches the MEMS chip subsequently formed from the die on the MEMS wafer 400. The tester 100 is signal-connected to the ASIC chip 200, and the ASIC chip 200 is signal-connected to the probe card 300. The probe card 300 is provided with a number of probes that match the MEMS wafer 400 and are used to transmit the analog signals generated by the die on the MEMS wafer 400 when sensing corresponding physical quantities to the ASIC chip 200. The ASIC chip 200 is used to convert and process the analog signals and output digital signals to the tester 100. The tester 100 is used to analyze and process the received digital signals to obtain the inspection results of the MEMS wafer 400.

[0030] Among them, there are several MEMS grains on the MEMS wafer 400, and the MEMS grains are used to sense one or more physical quantities, such as acceleration, angular velocity, pressure, and temperature. Specifically, for example, the MEMS wafer 400 includes several first-type grains that sense acceleration, and the MEMS chip subsequently formed can be an acceleration sensor chip, or a chip including an acceleration sensor, such as an IMU (Inertial Measurement Unit) chip; and / or, the MEMS wafer 400 includes several second-type grains that sense angular velocity, and the MEMS chip subsequently formed can be a gyroscope chip, or a chip including a gyroscope, such as an IMU chip.

[0031] Depending on the type of die in MEMS wafer 400, the internal circuit structure and signal processing of ASIC chip 200 will vary, ensuring compatibility between ASIC chip 200 and the MEMS chip subsequently formed from the die on MEMS wafer 400. When a MEMS die senses a corresponding physical quantity (e.g., acceleration, angular velocity, pressure, temperature), it generates an analog signal. This analog signal is transmitted to ASIC chip 200 via probe card 300, where it is processed and output as a digital signal to tester 100.

[0032] The ASIC chip 200 has complex functions and millions of gates, which can drive and sense signals from the MEMS chip. By using the ASIC chip 200 that matches the MEMS chip, during the CP test phase of the MEMS wafer 400, relevant performance tests that can only be performed when the MEMS chip and the ASIC chip are assembled into a sensor can be achieved, thereby better screening the grains on the MEMS wafer 400, and grading of good products can be achieved, reducing the subsequent FT test and QA test time and saving costs.

[0033] In one embodiment, Figure 2As shown, the ASIC chip 200 includes a substrate 201 and an ASIC crystal 202, and the ASIC crystal 202 is connected to the substrate 201 by wire bonding. The functional modules required for testing are provided on the ASIC crystal 202, and the tester 100 and the ASIC chip 200 can be connected via I2C, I3C, SPI (3-wire or 4-wire signal connection) signals, with the tester 100 acting as the master device and the ASIC chip 200 acting as the slave device. The tester 100, the ASIC chip 200 and the probe card 300 are connected in sequence, so that the relevant performance test of the MEMS wafer 400 is completed by using the ASIC chip 200 in conjunction with the tester 100 and the probe card 300. Furthermore, the test channel of the tester 100 can be switched and connected, and the tester 100 can be directly connected to the probe card 300, so that the conventional CP test of the MEMS wafer 400 can be completed by using the existing electronic resources of the tester 100. The main purpose of direct testing by the tester 100 is to test the variability of capacitance and leakage current, and to apply and monitor AWG (arbitrary waveform generator) signals.

[0034] The ASIC chip 200 and the probe card 300 may be provided separately, or the ASIC chip 200 may be provided directly on the probe card 300. In one embodiment, Figure 3 As shown, the probe card 300 includes a base plate and signal leads, signal pads and probes arranged on the base plate. The ASIC chip 200 is arranged on the base plate and is electrically connected to the probes through the signal leads and signal pads. The base plate can specifically be a PCB board, and the signal leads are PCB leads. The relevant functional modules of the ASIC chip 200 are integrated in the ASIC crystal grain 202. Integrating the ASIC chip 200 on the probe card 300 can reduce the occupied space and facilitate testing. It can be understood that when the ASIC chip 200 is integrated on the probe card 300, the base plate of the probe card 300 can be used as the substrate 201 of the ASIC chip 200, that is, the ASIC crystal grain 202 is arranged on the base plate of the probe card 300.

[0035] The ASIC chip 200 is loaded with firmware (FW) for supporting CP testing. This firmware supports semi-automatic self-adjustment calibration and can perform linear frequency modulation mode testing. Compared to hard static failure mode, this linear frequency modulation mode test can be processed sequentially to determine whether the MEMS die functions in soft transient failure mode. The firmware of the ASIC chip 200 is loaded with one or more instructions that allow noise measurements for multiple gain settings. In addition, the firmware can be optimized to provide bins for passed MEMS dies, that is, to classify the performance levels of the MEMS dies, thereby reducing subsequent FT testing and QA testing time and saving costs.

[0036] Furthermore, the firmware of ASIC chip 200 is loaded into an auxiliary memory. This auxiliary memory stores the firmware and is loaded into registers of ASIC chip 200 during testing, allowing the detection system to use different firmware or allowing firmware updates and upgrades. The auxiliary memory is also used to store I2C instructions for setting up continuous testing, which includes test sequences that can be iterated over time to identify transient error patterns.

[0037] The specific structure and type of the functional modules in the ASIC chip 200 are not unique. In one embodiment, Figure 4 As shown, the ASIC chip 200 includes an analog signal conditioning module 210, an analog-to-digital conversion module 220, a digital signal processing module 230, and a digital signal output module 240, which are connected in sequence. The analog signal conditioning module 210 is connected to the probe card 300, and the digital signal output module 240 is connected to the tester 100. After the analog signal generated by the MEMS die is transmitted to the ASIC chip 200 through the probe card 300, it is processed in sequence by the analog signal conditioning module 210, the analog-to-digital conversion module 220, and the digital signal processing module 230. Finally, the digital signal is transmitted to the tester 100 through the digital signal output module 240. The tester 100 analyzes and processes the digital signal, thereby completing the inspection of the MEMS wafer.

[0038] In one embodiment, the MEMS wafer includes a plurality of first-type crystal grains that sense acceleration, and the first-type crystal grains are used to form an acceleration sensor chip or a chip including an acceleration sensor. The ASIC chip 200 can process the analog signal generated by the MEMS crystal grain sensing acceleration, and finally output the digital signal to the tester 100 for analysis and processing, so that the performance of the MEMS crystal grain in detecting acceleration can be tested during the CP test. Specifically, the MEMS crystal grain senses acceleration and generates an analog signal of acceleration (Ax Ay Az). Figure 5 As shown, analog signal conditioning module 210 includes a first charge amplifier 211, which is connected to probe card 300 and analog-to-digital conversion module 220. Probe card 300 transmits the analog acceleration signal generated by the first type of die to first charge amplifier 211. First charge amplifier 211 conditions the analog signal in the form of capacitance into a voltage signal, which is then converted into a digital signal by analog-to-digital conversion module 220. In one embodiment, analog-to-digital conversion module 220 includes an analog-to-digital converter (ADC), which converts the voltage signal into a digital signal.

[0039] Further, continue to refer to Figure 5The digital signal processing module 230 includes a filter (Filter) 231, a digital compensator (Dig Comp) 232, and a low-pass filter (LPF) 233 connected in sequence. The filter 231 is connected to the analog-to-digital conversion module 220, and the low-pass filter 233 is connected to the digital signal output module 240. The digital signal output module 240 may specifically include a multiplexer 241, a synchronous output (Output Sync) unit 242, a first-in-first-out (FIFO) unit 243, and a serial input / output (Serial I / O) unit 244. The multiplexer 241 is connected to the low-pass filter 233, the digital compensator 232, the synchronous output unit 242, and the first-in-first-out unit 243. The synchronous output unit 242 is connected to the serial input / output unit 244, and the serial input / output unit 244 is connected to the tester 100.

[0040] In the digital signal processing module 230, the digital signal is processed sequentially through the filter 231, the digital compensator 232, and the low-pass filter 233. The filter bandwidth of the low-pass filter 233 can be configured by adjusting the input selection configuration signal Select. Finally, in the digital signal output module 240, the multiplexer 241 selects the output signal of the digital compensator 232 or the low-pass filter 233 based on the selection configuration signal Select, stores the received signal in the first-in-first-out unit 243, and transmits it to the serial port input and output unit 244 through the synchronous output unit 242.

[0041] In one embodiment, the MEMS wafer includes a plurality of second-type grains that sense angular velocity, and the second-type grains are used to form a gyroscope chip or a chip including a gyroscope. The ASIC chip 200 can process the analog signal generated by the MEMS grain sensing angular velocity, and finally output the digital signal to the tester 100 for analysis and processing, so that during the CP test process, the performance of the MEMS grain in detecting angular velocity can be tested. Specifically, the MEMS grain senses angular velocity and generates an analog signal of angular velocity (Gx Gy Gz). Figure 6As shown, the analog signal conditioning module 210 includes a second charge amplifier 212, an orthogonal compensator 213, and a demodulator 214. The second charge amplifier 212 is connected to the probe card 300, the orthogonal compensator 213, and the demodulator 214. The demodulator 214 is connected to the analog-to-digital conversion module 220. The probe card 300 transmits the analog signal of the angular velocity generated by the second type of die to the second charge amplifier 212. The orthogonal compensator 213 compensates based on the driving detection voltage signal of the second type of die and outputs the compensated signal to the second charge amplifier 212. The second charge amplifier 212 conditions the received analog signal and the compensated signal to obtain a voltage signal, which is then sent to the analog-to-digital conversion module 220 through the demodulator 214. The voltage signal is then converted into a digital signal by the analog-to-digital conversion module 220.

[0042] Furthermore, the digital signal processing module 230 includes a filter 231, a digital compensator 232, and a low-pass filter 233, which are connected in sequence. The digital signal output module 240 includes a multiplexer 241, a synchronous output unit 242, a first-in-first-out unit 243, and a serial input / output unit 244. The connection relationship between the components in the digital signal processing module 230 and the digital signal output module 240 is consistent with the connection relationship between the digital signal processing module 230 and the digital signal output module 240 corresponding to the first-type die. In addition, the first-in-first-out unit 243 is also connected to the serial input / output unit 244.

[0043] After the second charge amplifier 212 conditions the analog signal in the form of capacitance into a voltage signal, it is sent to the analog-to-digital conversion module 220 through the demodulator 214 for conversion into a digital signal. In the digital signal processing module 230, the digital signal is processed in sequence by the filter 231, the digital compensator 232, and the low-pass filter 233. The filtering bandwidth of the low-pass filter 233 can also be selected and configured by adjusting the input selection configuration signal Select. Finally, in the digital signal output module 240, the multiplexer 241 selects the output signal of the digital compensator 232 or the low-pass filter 233 according to the selection configuration signal Select, and transmits the received signal to the first-in-first-out unit 243 and the synchronous output unit 242. Finally, the digital signal is output to the tester 100 through the serial port input and output unit 244.

[0044] Further, continue to refer to Figure 6 The ASIC chip 200 also includes a driving module 250, which is connected to the orthogonal compensator 213 and is also connected to the second type of grains through the probe card 300; the driving module 250 is used to drive the movement of the mass block of the second type of grains and output the driving detection voltage signal of the second type of grains to the orthogonal compensator 213.

[0045] Specifically, the driving module 250 includes a high-voltage driving unit (HV Driver) 251, a high-voltage charge pump (HVCP) 252, a third charge amplifier 253, an automatic gain control unit 254 and a gain coarse adjustment unit 255. The high-voltage driving unit 251 is connected to the high-voltage charge pump 252, and is also connected to the driver (GD) of the second type of grain through the probe card 300. The high-voltage charge pump 252 is connected to the mass block (GPM) of the second type of grain through the probe card 300. The third charge amplifier 253 is connected to the driving detection end (GDS) of the second type of grain through the probe card 300. The third charge amplifier 253 is also connected to the orthogonal compensator 213 and the automatic gain control unit 254. The automatic gain control unit 254 is connected to the high-voltage driving unit 251 and the gain coarse adjustment unit 255. The third charge amplifier 253 conditions the signal from the drive detection terminal of the second-type die into a drive detection voltage signal, which is then transmitted to the quadrature compensator 213 and the automatic gain control unit 254. The coarse gain adjustment unit 255 outputs the coarse gain adjustment signal to the automatic gain control unit 254. The automatic gain control unit 254 performs gain adjustment based on the coarse gain adjustment signal and the drive detection voltage signal output by the third charge amplifier 253. The adjustment signal is then sent to the high-voltage drive unit 251, which changes the output voltage of the high-voltage drive unit 251. The high voltage output of the high-voltage drive unit 251 is then transmitted to the drive of the second-type die and to the high-voltage charge pump 252. The high-voltage charge pump 252 drives the proof mass of the second-type die based on the received high voltage. The combined action of the high-voltage drive unit 251 and the high-voltage charge pump 252 causes the proof mass of the second-type die to move. The third charge amplifier 253 feeds back the drive detection information of the second-type die to the automatic gain control unit 254. The coarse gain adjustment unit 255 and the fine gain adjustment of the automatic gain control unit 254 jointly adjust the gain of the high-voltage drive.

[0046] In one embodiment, the ASIC chip 200 further includes a phase control module 260 for adjusting the phase difference. The phase control module 260 specifically includes a phase-locked loop (PLL) 261 and a phase-shift calibration unit 262. The PLL 261 is connected to the third charge amplifier 253, the demodulator 214, and the phase-shift calibration unit 262. The phase-shift calibration unit 262 is connected to the high-voltage driver 251. The PLL 261 performs phase-locked processing on the drive detection voltage signal output by the third charge amplifier 253 and outputs the corresponding signal to the demodulator 214 and the phase-shift calibration unit 262. The demodulator 214 demodulates the voltage signal output by the second charge amplifier 212 based on the signal output by the PLL 261 and transmits the demodulated signal to the analog-to-digital conversion module 220. The phase-shift calibration unit 262 calibrates the signal output by the PLL 261 and transmits it to the high-voltage driver 251. The high-voltage driver 251 adjusts its output voltage based on the adjustment signal output by the automatic gain control unit 254 and the calibrated signal output by the phase-shift calibration unit 262.

[0047] Existing MEMS wafer-level CP test methods require customized ATE testers, which are expensive due to the type of measurement and the required resolution. This application provides a MEMS wafer inspection system in which an ASIC chip is designed to be included as part of a probe card. The firmware loaded into the ASIC chip is specifically designed to support CP test modes, increasing the versatility of the CP probe to screen for transient failure modes or allowing for more comprehensive test procedures. By implementing a special ASIC chip on a wafer-level probe card, the tester requirements are simplified.

[0048] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0049] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A MEMS wafer detection system, characterized in that: It includes a tester, an ASIC chip and a probe card. The ASIC chip matches the MEMS chip formed subsequently by the die on the MEMS wafer. The tester is connected to the ASIC chip by signal, and the ASIC chip is connected to the probe card by signal; The probe card is provided with a number of probes matching the MEMS wafer, which are used to transmit the analog signals generated by the grains on the MEMS wafer when sensing the corresponding physical quantities to the ASIC chip; the ASIC chip is used to convert and process the analog signals and output digital signals to the tester; the tester is used to analyze and process the received digital signals to obtain the detection results of the MEMS wafer.

2. The MEMS wafer detection system according to claim 1, characterized in that: The ASIC chip includes an analog signal conditioning module, an analog-to-digital conversion module, a digital signal processing module and a digital signal output module connected in sequence. The analog signal conditioning module is connected to the probe card, and the digital signal output module is connected to the tester.

3. The MEMS wafer detection system according to claim 2, characterized in that: The MEMS wafer includes several first-type grains that sense acceleration, and the first-type grains are used to form an acceleration sensor chip or a chip including an acceleration sensor; the analog signal conditioning module includes a first charge amplifier, and the first charge amplifier is connected to the probe card and the analog-to-digital conversion module; the probe card transmits the analog signal of the acceleration generated by the first-type grains to the first charge amplifier, and the first charge amplifier conditions the received analog signal into a voltage signal and sends it to the analog-to-digital conversion module.

4. The MEMS wafer detection system according to claim 2, characterized in that: The MEMS wafer includes a plurality of second-type grains for sensing angular velocity, and the second-type grains are used to form a gyroscope chip or a chip including a gyroscope; the analog signal conditioning module includes a second charge amplifier, an orthogonal compensator and a demodulator, the second charge amplifier is connected to the probe card, the orthogonal compensator and the demodulator, and the demodulator is connected to the analog-to-digital conversion module; the probe card transmits the analog signal of the angular velocity generated by the second-type grain to the second charge amplifier, the orthogonal compensator compensates according to the driving detection voltage signal of the second-type grain, and outputs the compensated signal to the second charge amplifier, the second charge amplifier conditions the received analog signal and the compensated signal to obtain a voltage signal and sends it to the analog-to-digital conversion module through the demodulator.

5. The MEMS wafer detection system according to claim 4, characterized in that: The ASIC chip also includes a driving module, which is connected to the orthogonal compensator and is also connected to the second type of grain through the probe card; the driving module is used to drive the movement of the mass block of the second type of grain and output the driving detection voltage signal of the second type of grain to the orthogonal compensator.

6. The MEMS wafer detection system according to claim 5, characterized in that: The driving module includes a high-voltage driving unit, a high-voltage charge pump, a third charge amplifier, an automatic gain control unit and a gain coarse adjustment unit. The high-voltage driving unit is connected to the high-voltage charge pump and is also connected to the driving of the second type of grain through the probe card. The high-voltage charge pump is connected to the mass block of the second type of grain through the probe card. The third charge amplifier is connected to the driving detection end of the second type of grain through the probe card. The third charge amplifier is also connected to the orthogonal compensator and the automatic gain control unit. The automatic gain control unit is connected to the high-voltage driving unit and the gain coarse adjustment unit.

7. The MEMS wafer detection system according to claim 6, characterized in that: The ASIC chip further includes a phase control module, which includes a phase-locked loop and a phase-shift calibration unit. The phase-locked loop is connected to the third charge amplifier, the demodulator and the phase-shift calibration unit, and the phase-shift calibration unit is connected to the high-voltage driving unit.

8. The MEMS wafer detection system according to claim 2, characterized in that: The digital signal processing module includes a filter, a digital compensator and a low-pass filter connected in sequence, the filter is connected to the analog-to-digital conversion module, and the low-pass filter is connected to the digital signal output module.

9. The MEMS wafer detection system according to claim 8, characterized in that: The digital signal output module includes a multiplexer, a synchronous output unit, a first-in-first-out unit and a serial port input and output unit. The multiplexer is connected to the low-pass filter, the digital compensator, the synchronous output unit and the first-in-first-out unit. The synchronous output unit is connected to the serial port input and output unit, and the serial port input and output unit is connected to the tester.

10. The MEMS wafer inspection system according to any one of claims 1 to 9, characterized in that: The probe card includes a base plate and signal leads, signal pads and probes arranged on the base plate. The ASIC chip is arranged on the base plate and is electrically connected to the probes through the signal leads and the signal pads. The ASIC chip is loaded with firmware for supporting CP testing.

11. The MEMS wafer detection system according to claim 10, characterized in that: The firmware of the ASIC chip is used to determine whether the die has passed or failed functionality in a soft transient fault mode; and / or, the firmware of the ASIC chip is used to classify a performance level of the die; and / or, the firmware of the ASIC chip is loaded with instructions to perform noise measurements for multiple gain settings; And / or, the firmware of the ASIC chip is loaded into an auxiliary memory and loaded into a register of the ASIC chip during testing.

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