Thin film transistor and display substrate

Abstract

The present disclosure provides a thin film transistor, comprising a gate and an active layer which are arranged on a base substrate. The gate and the active layer are insulated and spaced apart from each other. The active layer comprises a channel portion arranged opposite to the gate. The channel portion comprises a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is located on the side of the first semiconductor layer close to the gate. The material of the first semiconductor layer comprises a first metal oxide, and the material of the second semiconductor layer comprises a second metal oxide doped with a first metal element. The first metal oxide and the second metal oxide each comprise an indium gallium zinc oxide, and the content of an indium element in the second metal oxide is greater than that in the first metal oxide. The present disclosure further provides a display substrate.

Description

Thin film transistors and display substrates Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a thin film transistor and a display substrate. Background Art

[0002] Thin-film transistors (TFTs), as switching control elements or integrated components in peripheral driver circuits, are core components in flat-panel display technology. In recent years, oxide semiconductor TFTs have attracted considerable attention, particularly indium gallium zinc oxide (IGZO) TFTs, which offer high mobility, low processing temperatures, and high transmittance in the visible light region, making them widely used in the display field. Summary of the Invention

[0003] In a first aspect, the present disclosure provides a thin film transistor, comprising a gate and an active layer arranged on a substrate, the gate being insulated from the active layer; the active layer comprising a channel portion arranged opposite to the gate, the channel portion comprising: a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being located on a side of the first semiconductor layer close to the gate; a material of the first semiconductor layer comprising a first metal oxide, a material of the second semiconductor layer comprising a second metal oxide doped with a first metal element; the first metal oxide and the second metal oxide both comprising indium gallium zinc oxide, the indium content of the second metal oxide being greater than the indium content of the first metal oxide.

[0004] In some embodiments, the first metal element includes at least one of tungsten, tantalum, and rare earth elements.

[0005] In some embodiments, the mobility of the first metal oxide is less than the mobility of the second metal oxide; and the first metal element is used to capture photogenerated carriers in the channel portion.

[0006] In a second aspect, the present disclosure provides a display substrate comprising a plurality of pixel structures, wherein the pixel structures include the aforementioned thin film transistors; the active layer further comprises a first conductor portion and a second conductor portion, each disposed in the same layer as the channel portion and electrically connected to the channel portion;

[0007] An LED chip is electrically connected to the second conductor portion.

[0008] In a third aspect, the present disclosure provides a display substrate, comprising a base substrate and a data line, a connecting line, a gate line, a thin film transistor, and a light-emitting unit disposed on the base substrate; the data line is electrically connected to a source electrode of the thin film transistor via the connecting line, a first electrode of the light-emitting unit is electrically connected to a drain electrode of the thin film transistor, and the gate line is electrically connected to a gate electrode of the thin film transistor;

[0009] The display substrate further includes a first insulating layer, the first insulating layer is located on a side of the active layer of the thin film transistor close to the base substrate, the data line is located on a side of the first insulating layer close to the base substrate, the connecting line is located on a side of the first insulating layer away from the base substrate, and the data line and the connecting line are electrically connected through a via hole on the first insulating layer.

[0010] In some embodiments, the data line is disposed in direct contact with the base substrate.

[0011] In some embodiments, the display substrate further includes a light shielding layer located between the thin film transistor and the base substrate. The light shielding layer is made of the same material as the data line and is disposed in the same layer.

[0012] In some embodiments, the orthographic projection of the active layer on the base substrate is located inside the orthographic projection of the light shielding layer on the base substrate.

[0013] In some embodiments, the display substrate further includes a conductive portion, the drain of the thin film transistor is electrically connected to the first electrode of the light-emitting device through the conductive portion, and at least a portion of the conductive portion is located on the light-emitting side of the light-emitting unit.

[0014] In some embodiments, the conductive portion and the drain electrode are continuously distributed and made of the same material.

[0015] In some embodiments, the conductive portion is provided in the same layer and made of the same material as at least one of the connecting line and the gate line.

[0016] In some embodiments, the connecting line is provided in the same layer as the gate and is made of the same material.

[0017] In some embodiments, the display substrate further includes a second insulating layer, which is located on a side of the active layer away from the base substrate; the gate and the gate line are both located on a side of the second insulating layer away from the base substrate.

[0018] In some embodiments, the active layer of the thin film transistor includes a channel portion arranged opposite to the gate, and the channel portion includes: a first semiconductor layer and a second semiconductor layer, the second semiconductor layer is located on a side of the first semiconductor layer close to the gate; the material of the first semiconductor layer includes a first metal oxide, and the material of the second semiconductor layer includes a second metal oxide doped with a first metal element; the first metal oxide and the second metal oxide both include indium gallium zinc oxide, and the content of indium element in the second metal oxide is greater than the content of indium element in the first metal oxide.

[0019] In some embodiments, the first metal element includes at least one of tungsten, tantalum, and rare earth elements.

[0020] In some embodiments, the mobility of the first metal oxide is less than the mobility of the second metal oxide; and the first metal element is used to capture photogenerated carriers in the channel portion.

[0021] In some embodiments, the display substrate further includes a shading structure located on the light-emitting side of the light-emitting unit, the shading structure having light-through holes corresponding one-to-one to the light-emitting units, and the orthographic projection of the light-through holes on the base substrate overlaps with the orthographic projection of the corresponding light-emitting unit on the base substrate.

[0022] In some embodiments, the light shielding structure includes a light absorbing material.

[0023] In some embodiments, the light-shielding structure includes a plurality of stacked filter layers, and different filter layers are used to transmit light of different colors.

[0024] In some embodiments, the display substrate further includes a filter unit corresponding one-to-one to the light-through holes, the filter unit is located on the light-emitting side of the light-emitting unit, and the orthographic projection of the filter unit on the base substrate covers the orthographic projection of the corresponding light-through hole on the base substrate.

[0025] In some embodiments, the light-shielding structure includes a plurality of filter layers stacked together, and different filter layers are used to transmit light of different colors; wherein each of the filter units is an integrated structure with one of the filter layers.

[0026] In some embodiments, the surface of the filter unit facing toward and / or away from the light-emitting unit is a light-collecting surface for converging the light emitted by the light-emitting unit.

[0027] In some embodiments, the light shielding structure is located on a side of the base substrate away from the light emitting unit.

[0028] In some embodiments, the display substrate further includes: a planarization layer, which is arranged on a side of the light-emitting unit away from the base substrate; and a reflective electrode, which is arranged on a side of the planarization layer away from the light-emitting chip and is electrically connected to the second electrode of the light-emitting unit through a via hole passing through the planarization layer.

[0029] In some embodiments, the material of the planarization layer includes a light absorbing material.

[0030] In some embodiments, the light emitting unit includes an LED chip.

[0031] In a fourth aspect, the present disclosure further provides a display substrate, comprising a base substrate and arranged on the base substrate: a first signal line, a second signal line, a thin film transistor and a light-emitting unit; one of the first signal line and the second signal line is a gate line, and the other is a data line, the source of the thin film transistor is connected to the data line, and the drain of the thin film transistor is electrically connected to the first electrode of the light-emitting unit; wherein the first signal line and the second signal line are arranged crosswise and insulated, and the first signal line comprises: a plurality of main bodies and a bridging part connecting two adjacent main bodies, the main body and the second signal line are arranged on the same layer, and the bridging part overlaps with the orthographic projection of the second signal line on the base substrate; the display substrate also comprises a second insulating layer, the second insulating layer is located on the side of the layer where the second signal line is located close to the base substrate, the bridging part is located on the side of the second insulating layer close to the base substrate, and part of the bridging part is exposed by the second insulating layer to connect the main body.

[0032] In some embodiments, the bridge portion is provided in the same layer as the active layer of the thin film transistor.

[0033] In some embodiments, the display substrate further includes a conductive portion, the drain of the thin film transistor is electrically connected to the first electrode of the light-emitting device through the conductive portion, and at least a portion of the conductive portion is located on the light-emitting side of the light-emitting unit.

[0034] In some embodiments, the active layer of the thin film transistor includes a channel portion arranged opposite to the gate, and the channel portion includes: a first semiconductor layer and a second semiconductor layer, the second semiconductor layer is located on a side of the first semiconductor layer close to the gate; the material of the first semiconductor layer includes a first metal oxide, and the material of the second semiconductor layer includes a second metal oxide doped with a first metal element; the first metal oxide and the second metal oxide both include indium gallium zinc oxide, and the content of indium element in the second metal oxide is greater than the content of indium element in the first metal oxide. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following detailed description, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0036] FIG1 is a schematic diagram of a thin film transistor provided in some embodiments of the present disclosure.

[0037] FIG2 is a schematic diagram showing a principle of reducing leakage current of a thin film transistor in an embodiment of the present disclosure.

[0038] FIG3 shows the current-voltage characteristic curves of thin film transistors with two structures.

[0039] FIG4 shows the transfer characteristic curves of the two structures at different aspect ratios.

[0040] FIG5 is a threshold voltage shift curve of a thin film transistor of a comparative example after being subjected to different conditions.

[0041] FIG. 6 is a threshold voltage shift curve of the thin film transistor according to an embodiment of the present disclosure after different conditions are applied.

[0042] FIG. 7 is a schematic diagram of a display substrate provided in some embodiments of the present disclosure.

[0043] FIG8 is a plan view showing a partial structure of a substrate according to some other embodiments of the present disclosure.

[0044] 9 to 14 are various cross-sectional views of display substrates provided in other embodiments of the present disclosure.

[0045] FIG15 is a plan view showing a partial structure of a display substrate provided in some further embodiments of the present disclosure.

[0046] 16 and 17 are two cross-sectional views of display substrates provided in some further embodiments of the present disclosure. DETAILED DESCRIPTION

[0047] The following describes the specific embodiments of the present disclosure in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to illustrate and explain the present disclosure and are not intended to limit the present disclosure.

[0048] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0049] Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should have the usual meanings understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0050] As used herein, "parallel" and "perpendicular" include the conditions described and conditions similar to the conditions described, and the range of the similar conditions is within an acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range for approximate parallelism can be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range for approximate perpendicularity can also be, for example, a deviation within 5°.

[0051] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0052] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0053] Thin-film transistors (TFTs), as switching control elements or integrated components of peripheral drive circuits, are core components in flat-panel display technology. In recent years, oxide semiconductor TFTs have attracted considerable attention, particularly indium gallium zinc oxide (IGZO) TFTs, which offer high mobility, low process temperatures, and high transmittance in the visible light region, and are widely used in the display field. In some related thin-film transistor technologies, increasing the indium content in the TFT increases its mobility, but this results in lower light stability.

[0054] FIG1 is a schematic diagram of a thin film transistor provided in some embodiments of the present disclosure. As shown in FIG1 , the thin film transistor includes a gate 21 and an active layer 22 disposed on a substrate 10. The gate 21 is insulated from the active layer 22. The active layer 22 includes a channel portion 220 disposed opposite the gate 21. The channel portion 220 includes: a first semiconductor layer 2201 and a second semiconductor layer 2202, wherein the second semiconductor layer 2202 is located on a side of the first semiconductor layer 2201 close to the gate 21; the material of the first semiconductor layer 2201 includes a first metal oxide, and the material of the second semiconductor layer 2202 includes a second metal oxide, wherein the second metal oxide is doped with a first metal element.

[0055] The first metal oxide and the second metal oxide both include indium gallium zinc oxide, and the content of indium element in the second metal oxide is greater than the content of indium element in the first metal oxide.

[0056] Among them, the indium in indium gallium zinc oxide can provide an electron transmission path. Therefore, when the content of indium increases, the carrier mobility of the channel portion 220 can be improved, and a higher on-state current can be provided to drive other devices (such as LED devices), while improving the refresh rate of the device. However, the increase in the indium content may introduce shallow energy level defects and deep energy level defects such as oxygen vacancies. Therefore, the increase in the indium content will not only improve the mobility of the material, but also introduce shallow energy level and deep energy level defects, causing the threshold voltage of the thin film transistor 20 to be negatively biased, and the light stability of the thin film transistor 20 to deteriorate. In severe cases, it will cause the off-state current of the thin film transistor 20 to increase, or even be unable to be turned off. In the second semiconductor layer 2202 of the embodiment of the present disclosure, the content of indium is relatively high, thereby improving the mobility of the channel portion 220. At the same time, the second semiconductor layer 2202 contains the first metal element, which is conducive to capturing photogenerated carriers (i.e., electrons), achieving continuous and rapid photogenerated carrier recombination, and improving the light stability of the thin film transistor 20. The carrier concentration inside the second semiconductor layer 2202 is low, thereby reducing the off-state current (leakage current) of the thin film transistor 20 and reducing product power consumption.

[0057] Figure 2 is a schematic diagram of the principle of reducing the leakage current of the thin film transistor in the embodiment of the present disclosure. As shown in Figure 2 (a), when the channel portion 220 only includes a single-layer first semiconductor layer 2201 but does not include the second semiconductor layer 2202, in the on state, most of the electrons inside it are attracted to the position close to the gate 21 in the channel portion 220 to participate in conduction, and in the off state, most of the electrons are repelled to the position away from the gate 21 in the channel portion 220. This phenomenon will cause the off-state current to increase; when the channel portion 220 includes the above-mentioned first semiconductor layer 2201 and the second semiconductor layer 2202, in the off state, due to the low carrier concentration, that is, the electron concentration, inside the first semiconductor layer 2201, the number of electrons repelled to the second semiconductor layer 2202 is relatively small, so the leakage current can be reduced, thereby reducing the power consumption of the product.

[0058] In some embodiments, the mobility of the first metal oxide is less than that of the second metal oxide, thereby improving the mobility of the first semiconductor layer 2201 ; the first metal element is used to capture photogenerated carriers in the channel portion 220 , thereby ensuring the light stability of the thin film transistor 20 .

[0059] In some embodiments, the first metal element includes at least one of tungsten, tantalum, and rare earth elements.

[0060] Among them, the rare earth elements can be one or more of: lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), yttrium (Y) and scandium (Sc).

[0061] In some embodiments, as shown in FIG1 , the active layer 22 further includes a first conductor portion 221 and a second conductor portion 222, respectively located on either side of the channel portion 220 and electrically connected to the channel portion 220. Optionally, the first conductor portion 221 and the second conductor portion 222 are both disposed in the same layer as the channel portion 220. The first conductor portion 221 may include a first conductor layer 2211 and a second conductor layer 2212, and the second conductor portion 222 may include a third conductor layer 2221 and a fourth conductor layer 2222. The first conductor layer 2211 and the third conductor layer 2221 are disposed in the same layer as the first semiconductor layer 2201, while the second conductor layer 2212 and the fourth conductor layer 2222 are disposed in the same layer as the second semiconductor layer 2202. For example, the first conductor portion 221 and the second conductor portion 222 are obtained by conducting the stacked first and second semiconductor material layers, with the unconducted region serving as the channel portion 220. At least a portion of the first conductor portion 221 may be used as a source of the thin film transistor 20 , and at least a portion of the second conductor portion 222 may be used as a drain of the thin film transistor 20 .

[0062] Figure 3 shows the current-voltage characteristic curves of thin-film transistors of two structures, Figure 4 shows the transfer characteristic curves (EPM curves) of the two structures at different aspect ratios, Figure 5 shows the threshold voltage shift curve of the thin-film transistor of the comparative example after applying different conditions, and Figure 6 shows the threshold voltage shift curve of the thin-film transistor of the embodiment of the present disclosure after applying different conditions. Vg represents the gate voltage, in V; Id represents the current flowing through the thin-film transistor, in A; Vd represents the voltage between the source and the drain, in V; in Figure 4, the data on the right side of the graph represents the number of different thin-film transistors. Table 1 shows a comparison of the characteristic parameters of thin-film transistors 20 of two structures, wherein, in the active layer 22 of the thin-film transistor 20 in the comparative example, the channel portion 220 only includes the first semiconductor layer 2201, but does not include the second semiconductor layer 2202. In the thin-film transistor of the embodiment of the present disclosure, the channel portion 220 includes the above-mentioned first semiconductor layer 2201 and the second semiconductor layer 2202. In Table 1, SS represents subthreshold swing (mV / dec), Mob. represents mobility, and 3σ represents the uniformity of the threshold voltage (Vth, in V) of multiple thin-film transistors across the entire display substrate. A smaller 3σ indicates higher uniformity. The data in Table 1 shows that when the channel portion 220 includes the first semiconductor layer 2201 and the second semiconductor layer 2202, the off-state current of the thin-film transistor 20 is significantly lower than that of the thin-film transistor 20 with a single-layer channel portion 220. The normalized off-state current is 6.69E-17, and the threshold voltage uniformity of the multiple thin-film transistors is high. Furthermore, in Table 1 and Figures 5 and 6, NBTIS represents the conditions for applying a negative bias voltage, temperature, and illumination to the thin-film transistor; the negative bias voltage is -30V, the temperature is 70°C, and the illumination is 6000 nits of white light. PBTS represents the conditions for applying a forward bias voltage and increasing the temperature to the thin-film transistor; the forward bias voltage is 30V and the temperature is 70°C. The values ​​marked on the curves in Figures 5 and 6 are the time of applying the conditions, where "0s-1", "0s-2", and "0s-3" respectively represent the first, second, and third tests at 0s. This is to allow the thin film transistor characteristics to stabilize before conducting subsequent tests. As can be seen from Table 1, the mobility (Mob.) of the thin film transistor 20 of the comparative example can reach 45.98 cm 2 / Vs, the threshold voltage and the threshold voltage offset within one hour meet the product requirements, but due to the increase in the off-state current of the device, the threshold voltage offset curves under NBTIS and PBTS conditions have different degrees of tailing. In the thin film transistor 20 provided in the embodiment of the present disclosure, the mobility can still reach 40cm 2 / Vs or above, under NBTIS conditions, the threshold voltage offset after one hour is within 1V, and under PBTS conditions, the threshold voltage offset after one hour is also within 3V, and the threshold voltage offset curves under the two conditions have no tail, which meets product requirements.

[0063] Table 1

[0064] FIG7 is a schematic diagram of a display substrate provided in accordance with some embodiments of the present disclosure. As shown in FIG7 , the display substrate includes multiple pixel structures, each including a thin-film transistor 20 and a mini light-emitting diode (LED) chip 51, as described in the aforementioned embodiments of the present disclosure. The active layer 22 of the thin-film transistor 20 further includes a first conductor portion 221 and a second conductor portion 222, which are disposed on the same layer as the channel portion 220 and are electrically connected to the channel portion 220, respectively. The LED chip 51 is electrically connected to the second conductor portion 222. For example, the first conductor portion 221 and the second conductor portion 222 are structures formed by converting semiconductor materials into conductors. The first conductor portion 221 and the second conductor portion 222 can serve as the source 2s and drain 2d of the thin-film transistor 20, respectively. Alternatively, the source 2s and drain 2d of the thin-film transistor 20 can be provided separately, with the source 2s electrically connected to the first conductor portion 221 and the drain 2d electrically connected to the second conductor portion 222.

[0065] Among them, the LED chip 51 can be a mini-LED light-emitting chip or a micro-LED light-emitting chip. The display substrate using LED chips has the advantages of pure chromaticity, wide dynamic range, high brightness, high clarity, low operating voltage, low power consumption, long life, impact resistance, large viewing angle and stable and reliable operation. In addition, in the pixel structure, the thin film transistor 20 is used to provide a driving signal for the LED chip, thereby forming an active (AM) device structure, which is beneficial to reducing the spacing between the LED chips 51, thereby facilitating the improvement of the pixel density (PPI) of the display substrate. Moreover, the thin film transistor 20 adopts the structure in the above embodiment, which can improve the mobility of the thin film transistor 20 and reduce the leakage current. Therefore, the display substrate using the above thin film transistor 20 can achieve a higher refresh rate and lower power consumption.

[0066] 8 is a plan view of a local structure of a display substrate provided in other embodiments of the present disclosure, and FIG. 9 to FIG. 14 are various cross-sectional views of the display substrate provided in other embodiments of the present disclosure, and FIG. 9 and FIG. 14 both correspond to the position of the AA' section line in FIG. 8 .

[0067] As shown in FIG. 8 to FIG. 14 , the display substrate includes a base substrate 10 , and data lines DL, connection lines 42 , gate lines GL, thin film transistors 20 and light emitting units 50 disposed on the base substrate 10 .

[0068] The base substrate 10 may be a glass substrate or a flexible substrate made of a flexible material. The thin-film transistor 20 includes a gate 21, an active layer 22, a source electrode 2s, and a drain electrode 2d. The active layer 22 includes a channel portion 220 and a first conductor portion 221 and a second conductor portion 222 located on either side of the channel portion 220. The first conductor portion 221 and the second conductor portion 222 are disposed on the same layer as the channel portion 220 and are connected to the channel portion 220. The gate 21 is disposed opposite the channel portion 220 of the active layer 22 and is insulated from the gate 21. In one example, the first conductor portion 221 can function as the source electrode 2s, and the second conductor portion 222 can function as the drain electrode 2d. In another example, the source electrode 2s and the first conductor portion 221 can have different structures, and the drain electrode 2d and the second conductor portion 222 can have different structures.

[0069] The thin film transistor 20 may be a top-gate structure, that is, the gate 21 is located on a side of the active layer 22 away from the base substrate 10 .

[0070] The data line DL is electrically connected to the source electrode 2s of the thin film transistor 20 via the connection line 42. The first electrode of the light emitting unit 50 is electrically connected to the drain electrode 2d of the thin film transistor 20. The gate line GL is electrically connected to the gate electrode 21 of the thin film transistor 20. The first electrode of the light emitting unit 50 can be directly or indirectly connected to the drain electrode 2d of the thin film transistor 20. The gate line GL and the gate electrode 21 of the thin film transistor 20 can be connected as an integral structure.

[0071] The display substrate further includes a first insulating layer 31, which is located on the side of the active layer 22 close to the base substrate 10 and is used to prevent or reduce the diffusion of metal atoms and / or impurities from the base substrate 10 into the active layer 22. The data line DL is located on the side of the first insulating layer 31 close to the base substrate 10, and the connecting line 42 is located on the side of the first insulating layer 31 away from the base substrate 10. The data line DL and the connecting line 42 are electrically connected through a via V1 in the first insulating layer 31.

[0072] In the embodiments of the present disclosure, compared with the insulating layer on the side of the active layer 22 away from the substrate 10, the thickness of the first insulating layer 31 on the side of the active layer 22 close to the substrate 10 is usually set to be relatively thin. Therefore, by disposing the data line DL on the side of the first insulating layer 31 close to the substrate 10 and connecting it to the source electrode 2s through the connection line 42, the problem of broken lines can be reduced, so that the connection line 42 can be set to be thinner, which is beneficial to improving the aperture ratio of the display substrate. In addition, an electrode for power supply is usually provided on the side of the light-emitting unit 50 away from the substrate 10. In the embodiments of the present disclosure, by disposing the data line DL between the first insulating layer 31 and the substrate 10, the distance between the electrode and the data line DL can be increased, thereby reducing the parasitic capacitance therebetween, and further reducing the influence of the parasitic capacitance on the display effect.

[0073] In some embodiments, the thin-film transistors 20 of the display substrate in the embodiments shown in FIGS. 8 to 14 can all adopt the thin-film transistors 20 shown in FIG. 1, so as to improve the mobility of the thin-film transistors 20, reduce the leakage current, and improve the light stability of the device.

[0074] In some embodiments, the light-emitting unit 50 may include an LED device, and the light-emitting unit 50 includes an LED chip, for example, a Mini-LED or Micro-LED chip. The LED chip includes a first electrode and a second electrode, and one of the first electrode and the second electrode is a positive electrode, and the other is a negative electrode. The LED chip further includes a third semiconductor layer, a light-emitting layer, and a fourth semiconductor layer that are stacked between the first electrode and the second electrode, wherein the fourth semiconductor layer is located on the light-emitting side of the light-emitting layer. One of the third semiconductor layer and the fourth semiconductor layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. The N-type semiconductor layer may include n-type GaN, and the P-type semiconductor layer may include In x Al y Ga 1-x-y a p-type nitride semiconductor layer of N (0≤x<1, 0≤y<1, 0≤x + y<1) composition, and the p-type impurity may be magnesium. For example, the P-type semiconductor layer may be a single-layer structure, but as in some exemplary embodiments, it may have a multi-layer structure containing different compositions. The light-emitting layer may be a multi-quantum well light-emitting layer, in which the quantum well layer and the quantum barrier layer are alternately stacked with each other. For example, the quantum well layer and the quantum barrier layer may respectively include In x Al y Ga 1-x-y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) of different compositions. In a certain example, the quantum well layer may include In x Ga 1-x N (0<x≤1) composition, and the quantum barrier layer may include GaN or AlGaN.

[0075] In some embodiments, the first insulating layer 31 may be a stack of one or more of a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), and a silicon oxynitride layer (SiOxNy). For example, the first insulating layer 31 may be a stack of a silicon oxide layer and a silicon nitride layer, with the silicon oxide layer being located on the side of the silicon nitride layer closer to the active layer 22, thereby supplementing the active layer 22 with oxygen.

[0076] In some embodiments, the data line DL is disposed in direct contact with the base substrate 10 so that the data line DL can be located on a flat surface.

[0077] In some embodiments, as shown in Figures 9 to 14, the display substrate further includes a light-shielding layer 41 located between the thin film transistor 20 and the base substrate 10. The light-shielding layer 41 is made of the same material as the data line DL and is arranged in the same layer, so that the light-shielding layer 41 and the data line DL can be simultaneously manufactured using the same patterning process to simplify the manufacturing process.

[0078] In some embodiments, as shown in FIG. 9 to FIG. 14 , the connection lines 42 and the gate lines GL are provided in the same layer and made of the same material, so that the connection lines 42 and the gate lines GL can be simultaneously manufactured using the same patterning process to simplify the manufacturing process.

[0079] In some embodiments, the orthographic projection of the active layer 22 of the thin film transistor 20 on the base substrate 10 is located inside the orthographic projection of the light shielding layer 41 on the base substrate 10 to prevent the active layer 22 from being exposed to light and affecting the characteristics of the thin film transistor 20 .

[0080] In some embodiments, the material of the light shielding layer 41 can be one or more of a single element or alloy material such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and nickel (Ni). The light shielding layer 41 can be a single layer or a multilayer structure. For example, the light shielding layer 41 can include a molybdenum nickel titanium alloy (MTD) layer, a copper metal layer, and a molybdenum nickel titanium alloy (MTD) layer sequentially disposed in a direction away from the base substrate 10.

[0081] In some embodiments, as shown in Figures 9 to 14 , the source electrode 2s and the drain electrode 2d are integrally formed with the channel portion 220. The drain electrode 2d is located on the light-emitting side of the light-emitting unit 50 and is transparent to ensure normal light emission from the light-emitting unit 50. The drain electrode 2d is formed by converting the same material as the channel portion 220 into a conductor. The drain electrode 2d is electrically connected to the light-emitting unit 50, reducing contact resistance.

[0082] In some embodiments, as shown in Figures 9 to 14, the display substrate further includes a conductive portion 23, the drain 2d is electrically connected to the conductive portion 23, at least a portion of the conductive portion 23 is located on the light-emitting side of the light-emitting unit 50, and the conductive portion 23 electrically connects the drain 2d to the first electrode of the light-emitting unit 50.

[0083] In one example, as shown in Figures 9 to 13 , the conductive portion 23 and the drain electrode 2d are continuously arranged and made of the same material to simplify the structure. For example, the drain electrode 2d, the conductive portion 23, and the second semiconductor portion of the active layer 22 are connected to form an integrated structure. In this case, the conductive portion 23 is transparent. Even if the orthographic projection of the conductive portion 23 on the base substrate 10 completely covers the orthographic projection of the light-emitting unit 50 on the base substrate 10, it will not affect the light output of the light-emitting unit 50.

[0084] In another example, as shown in FIG14 , the drain 2d and the second conductor portion 222 of the active layer 22 are an integral structure, while the conductive portion 23 and the drain 2d are different structures. For example, as shown in FIG14 , the conductive portion 23 is overlapped on the drain 2d.

[0085] Optionally, as shown in FIG14 , the conductive portion 23 is disposed in the same layer and made of the same material as at least one of the connecting line 42 and the gate line GL. This allows the conductive portion 23 and at least one of the connecting line 42 and the gate line GL to be fabricated using the same patterning process, thereby simplifying the process steps. For example, the conductive portion 23, the gate line GL, and the connecting line 42 are all disposed in the same layer; for another example, the conductive portion 23 is disposed in the same layer as the gate line GL and the connecting line 42, but in a different layer from the connecting line 42; or, the conductive portion 23 is disposed in the same layer as the connecting line 42, but in a different layer from the gate line GL.

[0086] Optionally, the conductive portion 23 in the above embodiment may be made of a transparent conductive material; alternatively, it may be made of an opaque conductive material, for example, a metal or alloy. When the conductive portion 23 is made of a transparent conductive material, the area of ​​the conductive portion 23 can be larger. When the conductive portion 23 is made of an opaque conductive material, to minimize the impact of the conductive portion 23 on the light output of the light-emitting unit 50, the area of ​​the conductive portion 23 may be minimized while ensuring a good connection between the conductive portion 23 and the light-emitting unit 50.

[0087] In some embodiments, as shown in Figures 9 to 14, the gate 21 is located on a side of the active layer 22 away from the base substrate 10. The display substrate further includes a second insulating layer 32. The second insulating layer 32 includes a first insulating portion 321 and a second insulating portion 322 arranged in the same layer and made of the same material. The orthographic projection of the first insulating portion 321 on the base substrate 10 is located within the orthographic projection of the gate 21 on the base substrate 10. The orthographic projection of the second insulating portion 322 on the base substrate 10 is located within the orthographic projection of the connecting line 42 on the base substrate 10.

[0088] In some embodiments, as shown in Figures 9 to 14 , the display substrate further includes a light-shielding structure 73 located on the light-emitting side of the light-emitting unit 50. The light-shielding structure 73 has light holes corresponding one to each light-emitting unit 50, and the orthographic projections of the light holes on the base substrate 10 overlap with the orthographic projections of the corresponding light-emitting units 50 on the base substrate 10. The light holes of the light-shielding structure 73 are used to transmit at least part of the light from the light-emitting unit 50 to achieve display; in other locations, the light-shielding structure 73 can absorb ambient light and stray light emitted by the light-emitting unit 50 to ensure the display effect of the display substrate.

[0089] In some embodiments, as shown in FIG. 9 to FIG. 14 , a first protective layer 71 may be provided on a side of the light-shielding structure 73 away from the light-emitting device. The first protective layer 71 may be a transparent organic adhesive layer.

[0090] In some embodiments, as shown in FIG. 10 , no other structure may be provided between the first protective layer 71 and the light shielding structure 73 , and a portion of the first protective layer 71 may be filled in the light-through hole.

[0091] In other embodiments, as shown in Figures 9 and 11 to 14, the display substrate further includes filter units 72 corresponding one-to-one to the light holes. The filter units 72 are located on the light-emitting side of the light-emitting unit 50, and the orthographic projections of the filter units 72 on the base substrate 10 cover the orthographic projections of the corresponding light holes on the base substrate 10. The first protective layer is located on the side of the filter units 72 away from the light-emitting unit 50.

[0092] The plurality of filter units 72 include a first filter unit, a second filter unit and a third filter unit; wherein the first filter unit is a red color block to ensure that red light passes through; the second filter unit is a green color block to ensure that green light passes through; and the third filter unit is a blue color block to ensure that blue light passes through.

[0093] Exemplarily, the red color resist can transmit red light and absorb light of other colors. In this way, the light emitted from the light-emitting unit 50 can be emitted after passing through the first filter unit, and the first filter unit can filter out light of other colors except red light. The green color resist can transmit green light and absorb light of other colors. In this way, the light emitted from the light-emitting unit 50 can be emitted after passing through the second filter unit, and the second filter unit can filter out light of other colors except green light. The blue color resist can transmit blue light and absorb light of other colors. In this way, the light emitted from the light-emitting unit 50 can be emitted after passing through the third filter unit, and the third filter unit can filter out light of other colors except blue light, so that the third filter unit transmits a relatively pure blue light.

[0094] In some embodiments, as shown in Figures 9, 11, 12, and 14, the surfaces of the filter unit 72 facing the light-emitting unit 50 and the surfaces away from the light-emitting unit 50 are both flat, thereby not changing the direction of light emitted by the light-emitting unit 50. In other embodiments, as shown in Figure 13, the surface of the filter unit 72 facing the light-emitting unit 50 and / or the surface of the filter unit 72 away from the light-emitting unit 50 are light-collecting surfaces, which are used to collect light emitted by the light-emitting unit 50. By configuring one or both surfaces of the filter unit 72 as light-collecting surfaces, the filter unit 72 can filter light while also extracting and utilizing the wide-angle light emitted by the light-emitting unit 50, thereby improving the luminous efficiency of the light-emitting unit 50.

[0095] In some embodiments, as shown in Figures 9 to 11, 13, and 14, the light shielding structure 73 includes a light absorbing material, which is used to absorb visible light. The light absorbing material absorbs light to achieve a light shielding effect.

[0096] In other embodiments, as shown in FIG12 , the light-shielding structure 73 includes multiple layers of filter layers 731 stacked together, with different filter layers 731 configured to transmit light of different colors. The filtering effect of the multiple filter layers 731 provides the light-shielding structure 73 with an overall light-shielding effect. For example, the multiple filter layers 731 include a red filter layer 731 , a green filter layer 731 , and a blue filter layer 731 . The red filter layer 731 transmits red light while filtering out green and blue light; the green filter layer 731 transmits green light while filtering out red and blue light; and the blue filter layer 731 transmits blue light while filtering out red and green light.

[0097] As shown in FIG12 , the shading structure 73 includes a plurality of stacked filter layers 731 , and a filter unit 72 is provided on the light-emitting side of each light-emitting unit 50 , wherein each filter unit 72 is integrated with one of the filter layers 731 , thereby simplifying the structure of the display substrate.

[0098] In some embodiments, as shown in Figures 9 to 14 , the light-emitting unit 50 emits light toward the base substrate 10, and the light-shielding structure 73 is located on the side of the base substrate 10 away from the light-emitting unit 50. This allows the light-shielding structure 73 to be located on a flat surface, eliminating the need for an additional flat film layer to provide the light-shielding structure 73, thereby simplifying the overall structure of the display substrate. It is understood that when the display substrate further includes a light-filtering unit 72, the light-filtering unit 72 is also located on the side of the base substrate 10 away from the light-emitting unit 50.

[0099] In some embodiments, as shown in Figures 9 to 14, the display substrate further includes a passivation layer PVX, which is disposed on a side of the light-emitting unit 50 away from the base substrate 10 and exposes at least a portion of the drain electrode 2d to facilitate bonding between the first electrode of the light-emitting unit 50 and the drain electrode 2d. The passivation layer PVX can be a stack of one or more of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer. For example, the passivation layer PVX can be a stack of a silicon oxide layer and a silicon nitride layer.

[0100] In some embodiments, as shown in Figures 9 to 14 , the display substrate further includes a planarization layer PLN and a reflective electrode 60. The planarization layer PLN is disposed on a side of the light-emitting unit 50 away from the base substrate 10; the reflective electrode 60 is disposed on a side of the planarization layer PLN away from the light-emitting chip and is electrically connected to the second electrode of the light-emitting unit 50 via a via hole penetrating the planarization layer PLN.

[0101] The planarization layer PLN can be made of an organic resin material, which can provide a buffering and protective effect, while also preventing external moisture from affecting the properties of the thin film transistor 20 and the light emitting unit 50. The reflective electrode 60 is used to reflect the light emitted by the light emitting unit 50 to improve light extraction efficiency.

[0102] The reflective electrode 60 may be made of a metal or metal stack with high reflectivity, such as silver (Ag), aluminum (Al), titanium / aluminum / titanium (Ti / Al / Ti) stack, indium tin oxide / silver / indium tin oxide (ITO / Ag / ITO) stack, etc.

[0103] In one example, the planarization layer PLN is made of a light-transmitting organic material; in another example, as shown in FIG11 , the material of the planarization layer PLN includes a light-absorbing material (such as a black organic material), thereby absorbing stray light above and on the sides of the light-emitting unit 50, thereby reducing the impact of stray light on the characteristics of the devices in the display substrate and the display effect.

[0104] In some embodiments, as shown in Figures 9 to 14, the display substrate further includes a second protective layer 72, which is located on the side of the reflective electrode 60 away from the base substrate 10 and is used to protect structures such as the thin film transistor 20 and the light-emitting device. The second protective layer 72 can be an inorganic layer with good density, for example, a stack of one or more of a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), and a silicon oxynitride layer (SiOxNy).

[0105] In some embodiments, a display substrate includes a plurality of gate lines GL and a plurality of data lines DL, which define a plurality of pixel regions, each of which is provided with a light-emitting unit 50. The light-emitting area of ​​the light-emitting unit 50 can be set relatively large to ensure that the pixel region has a sufficiently large light-emitting area; alternatively, as shown in FIG8 , the light-emitting area of ​​the light-emitting unit 50 can be set relatively small, for example, less than 1 / 2 of the area of ​​the pixel region, so that the pixel region includes both a light-emitting region and a light-transmitting region, making it suitable for transparent display products.

[0106] FIG15 is a plan view of a partial structure of a display substrate provided in some further embodiments of the present disclosure. FIG16 and FIG17 are two cross-sectional views of the display substrate provided in some further embodiments of the present disclosure. FIG16 corresponds to the position of the BB' section line in FIG15, and FIG17 corresponds to the position of the CC' section line in FIG15. As shown in FIG15 and FIG17, the display substrate may include a base substrate 10 and, disposed on the base substrate 10, a first signal line 81, a second signal line 82, a thin film transistor 20, and a light-emitting unit 50. Among them, one of the first signal line 81 and the second signal line 82 is a gate line GL, and the other is a data line DL. The source 2s of the thin film transistor 20 is connected to the data line DL, and the drain 2d of the thin film transistor 20 is electrically connected to the first electrode of the light-emitting unit 50.

[0107] Among them, the first signal line 81 and the second signal line 82 are arranged crosswise and insulated. The first signal line 81 includes: multiple main parts 811 and a bridge part 812 connecting two adjacent main parts 811. The main part 811 and the second signal line 82 are arranged on the same layer. The orthographic projection of the main part 811 on the base substrate 10 does not overlap with the orthographic projection of the second signal line 82 on the base substrate 10, and the orthographic projection of the bridge part 812 on the base substrate 10 overlaps with the orthographic projection of the second signal line 82 on the base substrate 10; the display substrate also includes a second insulating layer 32, the second insulating layer 32 is located on the side of the layer where the second signal line 82 is located close to the base substrate 10, the bridge part 812 is located on the side of the second insulating layer 32 close to the base substrate, and part of the bridge part 812 is exposed by the second insulating layer 32 to connect the main part 811; the other part of the bridge part 812 is covered by the second insulating layer 32 to insulate the bridge part 812 from the second signal line 82.

[0108] Taking the first signal line 81 as the data line DL and the second signal line 82 as the gate line GL as an example, in the display substrate shown in Figures 15 to 17, the source 2s of the thin film transistor 20 is electrically connected to the main body 811. Since the thickness of the insulating layer of the gate line GL close to the side of the base substrate 10 is relatively small, when the main body 811 of the data line DL and the gate line GL are set on the same layer, the film thickness between the data line DL and the source 2s, and between the main body 811 of the data line DL and the bridge portion 812 is relatively small, so as to reduce the problem of broken wires, so that the data line DL can be set thinner, which is beneficial to improving the aperture ratio of the display substrate.

[0109] Similarly, when the first signal line 81 is the gate line GL and the second signal line 82 is the data line DL, the line break problem can also be reduced.

[0110] In some embodiments, the bridge portion 812 is provided in the same layer as the active layer 22 of the thin film transistor 20 . In this case, the second insulating layer 32 is a gate insulating layer having a relatively small thickness.

[0111] As shown in FIG. 16 and FIG. 17 , a first insulating layer 31 is provided between the active layer 22 and the base substrate 10 . The first insulating layer 31 is used to prevent or reduce diffusion of metal atoms and / or impurities from the base substrate 10 into the active layer 22 .

[0112] As shown in Figures 16 and 17 , the active layer 22 includes a channel portion 220, and a first conductor portion 221 and a second conductor portion 222 located on either side of the channel portion 220 and electrically connected to the channel portion 220. The first conductor portion 221 functions as the source electrode 2s, and the second conductor portion 222 functions as the drain electrode 2d. In some embodiments, the display substrate further includes a conductive portion 23 that electrically connects the drain electrode 2d to the first electrode of the light-emitting unit 50. The conductive portion 23 and the drain electrode 2d are continuously disposed and made of the same material.

[0113] Of course, the conductive portion 23 may also be provided in the same layer as the gate line GL.

[0114] As shown in Figures 16 and 17, the display substrate may further include a light shielding structure 73 and a filter unit 72, wherein the light shielding structure 73 and the filter unit 72 may be arranged according to Figures 9 to 14. The light shielding structure 73 has light holes corresponding one to one with the light emitting units 50, and the orthographic projection of the light holes on the base substrate 10 overlaps with the orthographic projection of the corresponding light emitting unit 50 on the base substrate 10. The filter units 72 are arranged one by one on the light emitting side of the light emitting unit 50, and the orthographic projection of the filter unit 72 on the base substrate 10 overlaps the orthographic projection of the corresponding light holes on the base substrate 10. The multiple filter units 72 may include the aforementioned first filter unit, second filter unit, and third filter unit. The various configurations of each structure may be arranged in various combinations.

[0115] For example, as shown in Figures 9 to 11, 13, and 14, the light-shielding structure 73 is made of a light-absorbing material that absorbs visible light. This light-shielding effect is achieved by the light-absorbing material's absorption of light. As another example, the light-shielding structure 73, as shown in Figure 12, includes multiple stacked filter layers 731, with different filter layers 731 configured to transmit light of different colors. The filtering effect of these multiple filter layers 731 provides the light-shielding structure 73 with a light-shielding effect overall.

[0116] For example, the filter unit 72 can refer to the configurations shown in Figures 9, 11, 12, and 14, with the surface of the filter unit 72 facing the light-emitting unit 50 and the surface of the filter unit 72 away from the light-emitting unit 50 configured as a flat surface. For another example, the filter unit 72 can refer to the configuration shown in Figure 13, with the surface of the filter unit 72 facing the light-emitting unit 50 and / or the surface of the filter unit 72 away from the light-emitting unit 50 configured as a light-collecting surface. Furthermore, when the light-shielding structure 73 includes multiple filter layers 731, each filter unit 72 can be connected to one of the filter layers 731 to form an integral structure.

[0117] As shown in Figures 16 and 17 , the display substrate may further include a passivation layer PVX, a planarization layer PLN, a reflective electrode 60, a first protective layer 71, and a second protective layer 72. For details, see the description of Figures 9 to 14 . For example, the planarization layer PLN may be made of the aforementioned light-transmitting material or the aforementioned light-absorbing material.

[0118] In the display substrates shown in FIG. 16 and FIG. 17 , the thin film transistor 20 may also be the thin film transistor 20 in FIG. 1 , so as to improve the mobility of the thin film transistor 20 and reduce the off-state current.

[0119] The following describes the manufacturing process of the display substrate by taking the display substrate shown in FIG. 9 as an example.

[0120] S11 , forming a light shielding structure 73 on the back side of the base substrate 10 , wherein the light shielding structure 73 has a plurality of light holes.

[0121] S12. A plurality of filter units 72 are formed on a side of the light shielding structure 73 away from the base substrate 10. The filter units 72 correspond to the light holes one by one, and the orthographic projections of the filter units 72 on the base substrate 10 cover the orthographic projections of the corresponding light holes on the base substrate 10.

[0122] S13 , forming a first protective layer 71 on a side of the filter unit 72 and the light shielding structure 73 away from the base substrate 10 .

[0123] S21. A light-shielding metal layer is formed on the front side of the base substrate 10, and a patterning process is performed to form the light-shielding layer 41 and the data line DL. The material of the light-shielding metal layer may include one or more of a single substance or alloy material such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and nickel (Ni). The light-shielding metal layer may be a single layer or a multilayer structure. For example, the light-shielding metal layer may include a molybdenum nickel titanium alloy (MTD) layer, a copper metal layer, and a molybdenum nickel titanium alloy (MTD) layer sequentially arranged in a direction away from the base substrate 10.

[0124] S22. Form a first insulating layer 31 on a side of the light shielding layer 41 away from the base substrate 10. The first insulating layer 31 may be a stack of one or more of a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), and a silicon oxynitride layer (SiOxNy).

[0125] S23. Form a first semiconductor material layer and a second semiconductor material layer in sequence, wherein the material of the first semiconductor material layer includes a first metal oxide, and the material of the second semiconductor material layer includes a second metal oxide, and both the first metal oxide and the second metal oxide include indium gallium zinc oxide, and the content of indium in the second metal oxide is greater than the content of indium in the first metal oxide.

[0126] S24 , patterning the first semiconductor material layer and the second semiconductor material layer to form an intermediate pattern.

[0127] S25 , forming a second insulating layer 32 , and etching the second insulating layer 32 and the first insulating layer 31 to expose a portion of the data line DL and a portion of the intermediate pattern that needs to be conductive.

[0128] S26 , performing a conductor treatment on the intermediate pattern outside the area covered by the second insulating layer 32 , for example, by plasma treatment or doping treatment, to form an active layer 22 including a first conductor portion 221 , a second conductor portion 222 and a channel portion 220 .

[0129] S27. A gate metal layer is formed on the side of the active layer 22 away from the base substrate 10 and patterned to form a gate 21, a gate line GL, and a connecting line 42. The material of the gate metal layer may include one or more of a single element or alloy material such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), nickel (Ni), etc. The gate metal layer may have a single layer or a multilayer structure. For example, the gate metal layer may include a molybdenum nickel titanium alloy (MTD) layer, a copper metal layer, and a molybdenum nickel titanium alloy (MTD) layer sequentially arranged in a direction away from the base substrate 10.

[0130] S28. Use the gate 21, the gate line GL and the connecting line 42 as a mask to etch the second insulating layer 32 to form a first insulating portion and a second insulating portion. The orthographic projections of the gate 21 and the gate line GL on the base substrate 10 cover the orthographic projection of the first insulating portion on the base substrate 10, and the orthographic projection of the connecting line 42 on the base substrate 10 covers the orthographic projection of the second insulating portion on the base substrate 10.

[0131] S29 , forming a passivation layer PVX, wherein the passivation layer PVX exposes a portion of the conductive portion 23 .

[0132] S30 , bonding the first electrode of the light emitting unit 50 to the conductive portion 23 .

[0133] S31 , forming a planarization layer PLN, wherein the planarization layer PLN has a via hole to expose at least a portion of the second electrode of the light emitting unit 50 .

[0134] S32 , forming a reflective electrode 60 , wherein the reflective electrode 60 is electrically connected to the second electrode of the light emitting unit 50 through a via hole on the planarization layer PLN.

[0135] S33 , forming a second protective layer 72 on the side of the reflective electrode 60 away from the base substrate 10 . For specific materials, refer to the above description.

[0136] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A thin film transistor comprising a gate and an active layer provided on a substrate, wherein the gate is insulated from the active layer; The active layer includes a channel portion disposed opposite to the gate, and the channel portion includes: a first semiconductor layer and a second semiconductor layer, wherein the second semiconductor layer is located on a side of the first semiconductor layer close to the gate; The material of the first semiconductor layer includes a first metal oxide, and the material of the second semiconductor layer includes a second metal oxide doped with a first metal element; The first metal oxide and the second metal oxide both include indium gallium zinc oxide, and the content of indium in the second metal oxide is greater than the content of indium in the first metal oxide.

2. The thin film transistor according to claim 1, wherein The first metal element includes at least one of tungsten, tantalum, and rare earth elements.

3. The thin film transistor according to claim 1, wherein The mobility of the first metal oxide is smaller than that of the second metal oxide; the first metal element is used to capture photogenerated carriers in the channel portion.

4. A display substrate comprising a plurality of pixel structures, wherein: The pixel structure comprises: a thin film transistor according to any one of claims 1 to 3; the active layer further comprises a first conductor portion and a second conductor portion, each disposed in the same layer as the channel portion and electrically connected to the channel portion; An LED chip is electrically connected to the second conductor portion.

5. A display substrate comprising a base substrate and data lines, connecting lines, gate lines, thin film transistors and light-emitting units arranged on the base substrate; The data line is electrically connected to the source electrode of the thin film transistor through the connecting line, the first electrode of the light emitting unit is electrically connected to the drain electrode of the thin film transistor, and the gate line is electrically connected to the gate electrode of the thin film transistor; in, The display substrate also includes a first insulating layer, which is located on a side of the active layer of the thin film transistor close to the base substrate, the data line is located on a side of the first insulating layer close to the base substrate, and the connecting line is located on a side of the first insulating layer away from the base substrate, and the data line and the connecting line are electrically connected through a via hole on the first insulating layer. The display substrate according to claim 5 , wherein: The data line is directly in contact with the base substrate.

7. The display substrate according to claim 5, wherein: The display substrate further includes a light shielding layer located between the thin film transistor and the base substrate. The light shielding layer is made of the same material as the data line and is provided in the same layer.

8. The display substrate according to claim 7, wherein: The orthographic projection of the active layer on the base substrate is located inside the orthographic projection of the light shielding layer on the base substrate.

9. The display substrate according to claim 5, wherein: The display substrate further includes a conductive portion, through which the drain of the thin film transistor is electrically connected to the first electrode of the light-emitting device, and at least a portion of the conductive portion is located on the light-emitting side of the light-emitting unit.

10. The display substrate according to claim 9, wherein: The conductive portion and the drain electrode are continuously distributed and made of the same material.

11. The display substrate according to claim 9, wherein: The conductive portion is provided in the same layer as at least one of the connecting line and the gate line and is made of the same material.

12. The display substrate according to claim 5, wherein: The connecting line is provided in the same layer as the gate and is made of the same material.

13. The display substrate according to claim 5, wherein: The display substrate further includes a second insulating layer located on a side of the active layer away from the base substrate; the gate and the gate line are both located on a side of the second insulating layer away from the base substrate.

14. The display substrate according to any one of claims 5 to 13, wherein: The active layer of the thin film transistor includes a channel portion disposed opposite to the gate, the channel portion including: a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being located on a side of the first semiconductor layer close to the gate; a material of the first semiconductor layer includes a first metal oxide, and a material of the second semiconductor layer includes a second metal oxide doped with a first metal element; The first metal oxide and the second metal oxide both include indium gallium zinc oxide, and the content of indium in the second metal oxide is greater than the content of indium in the first metal oxide.

15. The display substrate according to claim 14, wherein: The first metal element includes at least one of tungsten, tantalum, and rare earth elements.

16. The display substrate according to claim 14, wherein: The mobility of the first metal oxide is smaller than that of the second metal oxide; the first metal element is used to capture photogenerated carriers in the channel portion.

17. The display substrate according to any one of claims 5 to 13, wherein: The display substrate also includes a shading structure located on the light-emitting side of the light-emitting unit, the shading structure having light-through holes corresponding one to one with the light-emitting units, and the orthographic projection of the light-through holes on the base substrate overlaps with the orthographic projection of the corresponding light-emitting unit on the base substrate.

18. The display substrate according to claim 17, wherein: The light-shielding structure includes a light-absorbing material.

19. The display substrate according to claim 17, wherein: The light-shielding structure includes multiple filter layers stacked together, and different filter layers are used to transmit light of different colors.

20. The display substrate according to claim 17, wherein The display substrate further includes a filter unit corresponding to each of the light holes. The filter unit is located on the light-emitting side of the light-emitting unit, and the orthographic projection of the filter unit on the base substrate covers the orthographic projection of the corresponding light hole on the base substrate.

21. The display substrate according to claim 20, wherein: The light-shielding structure includes multiple filter layers stacked together, and different filter layers are used to transmit light of different colors; Wherein, each of the filter units and one of the filter layers are an integrated structure.

22. The display substrate according to claim 20, wherein: The surface of the filter unit facing toward and / or away from the light emitting unit is a light-collecting surface, which is used to collect the light emitted by the light emitting unit.

23. The display substrate according to claim 17, wherein: The light shielding structure is located on a side of the base substrate away from the light emitting unit.

24. The display substrate according to any one of claims 5 to 13, wherein: The display substrate further includes: a planarization layer, the planarization layer being arranged on a side of the light emitting unit away from the base substrate; A reflective electrode is provided on a side of the planarization layer away from the light-emitting chip and is electrically connected to the second electrode of the light-emitting unit through a via hole penetrating the planarization layer.

25. The display substrate according to claim 24, wherein: The material of the planarization layer includes a light absorbing material.

26. The display substrate according to any one of claims 5 to 13, wherein: The light emitting unit includes an LED chip.

27. A display substrate, wherein: The device comprises a base substrate and, arranged on the base substrate, a first signal line, a second signal line, a thin film transistor, and a light-emitting unit; one of the first signal line and the second signal line is a gate line, and the other is a data line; a source of the thin film transistor is connected to the data line, and a drain of the thin film transistor is electrically connected to a first electrode of the light-emitting unit; The first signal line and the second signal line are arranged to cross and be insulated from each other, the first signal line comprises: a plurality of main bodies and a bridge portion connecting two adjacent main bodies, the main bodies and the second signal line are arranged on the same layer, and the bridge portion and the orthographic projection of the second signal line on the substrate overlap; The display substrate also includes a second insulating layer, which is located on the side of the layer where the second signal line is located close to the base substrate. The bridging portion is located on the side of the second insulating layer close to the base substrate, and part of the bridging portion is exposed by the second insulating layer to connect to the main body.

28. The display substrate according to claim 27, wherein: The bridge portion is provided in the same layer as the active layer of the thin film transistor.

29. The display substrate according to claim 27, wherein: The display substrate further includes a conductive portion, through which the drain of the thin film transistor is electrically connected to the first electrode of the light-emitting device, and at least a portion of the conductive portion is located on the light-emitting side of the light-emitting unit.

30. The display substrate according to any one of claims 27 to 29, wherein: The active layer of the thin film transistor includes a channel portion disposed opposite to the gate, the channel portion including: a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being located on a side of the first semiconductor layer close to the gate; a material of the first semiconductor layer includes a first metal oxide, and a material of the second semiconductor layer includes a second metal oxide doped with a first metal element; The first metal oxide and the second metal oxide both include indium gallium zinc oxide, and the content of indium in the second metal oxide is greater than the content of indium in the first metal oxide.

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