Single-mode laser and integration process for making the same

Abstract

The invention relates to single-mode laser and an integration process for making the same. The integration process for making a single-mode laser, comprising steps of: fabricating a III-V semiconductor optical amplifier (SOA) which includes an active layer; fabricating a silicon photonic (SiPh) waveguide which includes a passive waveguide layer and an interlayer; flipping and aligning the SOA; and connecting the SOA to the waveguide by one or more flip-chip bumps.

Description

[0001] SINGLE-MODE LASER AND INTEGRATION PROCESS FOR MAKING THE SAME

[0002] FIELD OF THE INVENTION

[0003] This invention relates to a single-mode laser and an integration process for making the same.

[0004] BACKGROUND OF THE INVENTION

[0005] In recent years, integrated photonics that base on thin-fdm lithium niobate on insulator (LNOI) wafer platform has shown tremendous potential for low-cost, scalable solutions over a wide spectrum of photonic applications in optical communications, sensing, computation, quantum-information processing, spectroscopy, non-linear photonics, and acousto -optics. These have been made possible by the success of the “SMART-CUT” technology, commonly used for silicon-on-insulator (SOI) substrate fabrication, to manufacture wafer-scale, high quality thin-fdms of LN using ion-slicing and wafer-bonding, coupled with breakthroughs in LN nanofabrication, bringing about high-performance LNOI- based nanophotonic components. LN inherently possesses excellent electro-optics material properties such as broad optical transparency window from 350nm to 5 pm, covering the visible, near-infrared and mid-infrared range, refractive index of 2.2 at 1550nm, high second-order non-linear / Pockel electro-optic coefficient (30pm / V). and large piezoelectric response (~250C / m2). Traditional bulk-LN, wherein LN optical waveguide being defined by ion-diffusion and proton-exchange resulting in low index contrast and weak optical confinement, has not surfaced out its advantageous value until the recent arrival of its thin-film form-factor in LNOI. Typical LNOI wafer has typical LN film thickness of 300-900nm, 2~4.5pm-thick SiO2 buried layer, on Si-substrate. LNOI allows the realization of ultra-low loss and high-index contrast waveguides, using air or SiO2 as the cladding layer, capable of exhibiting outstanding electro-optic performances. LNOI-based photonic -circuits can be formed by either partial or fully etched LN, forming shallow etched ridge or deeply etched strip LN waveguide, respectively. State-of-the-art propagation losses of shallow-ridge and deeply etched strip LN waveguides are 2.7dB / m and 8.5dB / m, respectively. These data enabled several breakthroughs in thin-film LN (TFLN) based devices.

[0006] Recent notable breakthrough is thin-film LNOI-based Mach-Zehnder Interferometer (MZI) electro-optic modulator (EOM) featured a low operating CMOS-compatible voltage of 1.4V, giving high optical power extinction ratio (ER) of 30dB, low on-chip optical loss of 0.5dB, while supporting high bandwidths of up to 210Gb / s. This is made possible by the strong electro-optic (Pockels) effect in LN and low loss LNOI waveguide. Due to the CMOS-compatible drive voltage, these LNOI-based MZI-EOM potentially can provide low-power, ultra-high bandwidth electro-optical / photonic devices for next generation commercial low- power Linear-Drive Pluggable Optical (LPO) transceiver wherein the Digital Signal Processor (DSP) for re-timing has been phased out to save power. In addition, photonic-circuits, that employ net-list of TLLN MZI-EOM devices as basic building-blocks, can be designed for high-performance coherent modulators with supported data rate up to 320Gbps data transmission, for microwave photonics and even for photonic quantum computation applications. In addition to electro-optics effect, LN possesses strong second order and third-order non-linearities over wide transparency window. Strong optical-confinement in LNOI-waveguide, enables it to be efficient candidate for non-linear light-source and frequency comb. Second- harmonic generation (SHG), sum-frequency generation (SPG), ultra-efficient frequency converters, parametric down conversion and four-wave-mixing, photonpair source, were demonstrated in photonic devices on LNOI platform. Frequency comb, in which spectrum consisting of phase-coherent equally spaced narrow spectral lines, has applications in precision-timing, frequency-metrology, and precision spectroscopy. TFLN is advantageous for chip-based frequency comb generation due to its strength in electro-optic coefficient and its non-linearity at the same time. LN with its unique non-centrosymmetric crystalline structure coupled with LNOI-based ridge-waveguide structure also offers flexibility of periodic inversion of the sign of / _2in the material to form periodic poled LN (PPLN) which is an important device structure for application in integrated quantum photonics. Despite all the wide spectrum of applications for TFLN, these PIC-based systems on LNOI photonic chip cannot move from academia research laboratory to commercial market without efficient on-chip light-amplification and detection. LN is a dielectric without direct bandgap and not amenable for carrier injection. Efforts have been made to dope LN with rare-earth metals such as erbium (Er), thulium (Tm), neodymium (Nd), or yttrium (Yb), to enable light-amplification in LN in various wavelength band [refer to R. Brinkmann, et al. “Baumann I, Dinand M, Sohler W, Suche H., “Erbium-doped single- and double-pass Ti:LiNbO3 waveguide amplifiers,” IEEE J Quantum Elect Vol.30, p.5356 (1994)]. Although light-amplification and laser action have been demonstrated, a separate pump-laser and the coupling of the pump light into the LN active medium has to be considered and engineered [refer to M. Hempstead, J. S. Wilkinson, and L. Reekie, “Waveguide lasers operating at 1084 nm in neodymium-diffiised lithium niobate,” IEEE Photon. Technol. Lett. Vol.4, p.855-855 (1995)]. The output lasing power is usually in the nW range and packaging is complicated since pump-laser has to be included. Successful commercialisations of TFLN-based PIC for applications in both direct-detect and coherent optical communications, in the afore-mentioned microwave transceiver, non-linear, quantum photonic-systems on LNOI chip, or even in its implementation for coherent LIDAR (Frequency-Modulated Continuous-Wave, FMCW LIDAR), the realization of high-power optical amplification or laser action on LNOI platform is paramount. Even for the recent CMOS-voltage compatible thin-film LNOI-based Mach-Zehnder Interferometer (MZI) electro-optic modulator (EOM) with 200Gb / s bandwidth, it requires light to be fiber-coupled into the EOM chip. Substantial optical power is lost when laser light from optical fiber has to be externally coupled into the TFLN chip. Typical external light to chip coupling loss is 2~4dB. For such MZI EOM to be commercialized, laser light generation must be built on the LNOI chip to produce ultra-high speed modulated light with sufficiently high power for application as transmitter in commercial transceiver.

[0007] Very recently, with the objective of making a TFLN-based external modulated laser, hybrid integration of III-V based distributed feedback (DFB) laser by flipchip bonding on LNOI-platform loaded with MZI-EOM, was attempted [refer to A. Shams-Ansari, et al, “On-chip Integration of High-Power Lasers and Thin-Film Lithium Niobate Modulators,” CLEO, Stu4G. l (5055)]. The output of the DFB laser is butt-coupled to the LNOI chip. In addition to the effort needed to design spot-size converters (SSC) for both DFB and input-port of the LN waveguide, the butt-coupling loss from DFB output to the TFLN waveguide is dependent on the gap between the laser output and the TFLN-waveguide. In the prior art, the smallest gap achievable is 0.5pm, limited by the vertical etch profde of the TFLN waveguide tip, giving a coupling loss of 2dB, or coupling efficiency of 63%. Furthermore, the mis-alignment tolerance in the transverse direction is tight. Misalignment of laser with respect to the TFLN waveguide by ±0.5pm will result in coupling loss penalty of~4dB.

[0008] On the other hand, the III-V epitaxy cannot be easily heterogeneously integrated on LN by direct covalent bonding as in the case of III- V / Si in the prior art since LN is not a semiconductor that can form a native oxide at the interface between III-V and LN. In addition, heterogeneous integration using the adhesive divinylsiloxane-bis- benzocyclobutene (DVS-BCB) bonding is also considered not a good approach since DVS-BCB presents a thermal impedance to the III-V active layer defeating the purpose for high optical power operation.

[0009] SUMMARY OF THE INVENTION

[0010] The above-mentioned drawbacks and difficulty are overcome by the invention elaborated in the paragraphs that follow.

[0011] One aspect of the invention provides an integration process for making a singlemode laser, comprising steps of: fabricating a III-V semiconductor optical amplifier (SOA) which includes an active layer; fabricating a silicon photonic (SiPh) waveguide which includes a passive waveguide layer and an interlayer; flipping and aligning the SOA with the waveguide in a passive manner; and connecting the SOA to the waveguide by one or more flip-chip bumps, such that when said SOA is powered, an evanescent coupling is formed between the SOA and the waveguide; characterised in that: the passive waveguide layer comprises a dielectric waveguide layer; and the step of fabricating the waveguide also comprises a step of depositing a silicon waveguide layer on the dielectric waveguide layer by physical vapour deposition, such that when said SOA is flipped and aligned with the waveguide, the silicon waveguide layer is sandwiched between the SOA and dielectric waveguide layer; or the passive waveguide layer also includes a silicon waveguide layer configured in a way such that when said SOA is flipped and aligned with the waveguide, the silicon waveguide layer is sandwiched between the SOA and dielectric waveguide layer.

[0012] Typically, the step of fabricating the SOA comprises steps of: forming a current channel on the SOA which comprises steps of: defining an opening of the current channel by photolithography; depositing a sacrificial metal on the SOA in a way such that the opening is masked; implanting hydrogen ions (H+) on the masked region of the SOA; and removing the metal from the SOA by wet etching, such that a current channel is formed; depositing a passivation dielectric layer on the side of the SOA proximal to the active layer; and depositing a P-metal contact on the opposing side of the SOA; characterised in that: the SOA also includes a N-InP layer proximal to the active layer, an N-InGaAsP layer configured adjacent the proximal N-InP layer, and a N-InP layer distal from the active layer; and the step of fabricating the SOA also comprises steps of: removing by wet etching the distal N-InP layer which has been implanted with H+, the N-InGaAsP layer being a stopper for the wet etching; and regrowing another N-InP layer on the proximal N- InP layer, for facilitating lateral current flow from the active layer to the flip-chip bumps.

[0013] Optionally, the step of fabricating the SOA comprises a step of: dry etching the active layer, proximal N-InP layer, another N-InP layer and passivation dielectric layer such that they taper toward the input and output facets of the SOA for facilitating optical mode transition between said SOA and silicon waveguide layer.

[0014] Typically, the step of fabricating the SOA also comprises steps of: forming an opening in the passivation dielectric layer by photolithography; depositing an bimetal contact in the opening; depositing an under-bump metallization (UBM) layer on the N-metal contact; and depositing a solder metal as part of a flip-chip bump on the UBM layer. Typically, the step of fabricating the SOA also comprises steps of: cleaving the SOA into a plurality of bars; depositing optionally an anti-reflection coating on facets of the bars; and cleaving the plurality of bars into a plurality of dies.

[0015] Typically, the step of fabricating the waveguide comprises steps of: defining and forming by photolithography a ridge capable of transmitting an optical mode in the passive waveguide layer; and subjecting the waveguide to a high temperature annealing such that the propagation loss of the waveguide is reduced; characterised in that: the step of fabricating the waveguide also comprises a step of dry etching the silicon waveguide layer such that it tapers beyond the input and output facets of the SOA for facilitating optical mode transition between the SOA, silicon waveguide layer and dielectric waveguide layer.

[0016] Typically, the ridge is defined and formed in the passive waveguide layer in a way such that the silicon waveguide layer of the ridge is of a width smaller than that of the dielectric waveguide layer of the ridge.

[0017] Typically, the step of fabricating the waveguide also comprises steps of: defining a channel in the dielectric waveguide layer and the interlayer by photolithography; forming the channel by dry etching; depositing a trace metal in the channel; depositing an under-bump metallization (UBM) layer on the trace metal; and depositing a solder metal as part of the flip-chip bump on the UBM layer.

[0018] In one embodiment, said dielectric waveguide layer is thin-film lithium niobate (TFLN) or another dielectric having a refractive index similar to that of TFLN, and said silicon waveguide layer is amorphous silicon or single-crystal silicon.

[0019] Another aspect of the invention provides a single-mode laser comprising a III-V semiconductor optical amplifier (SOA) and a silicon photonic (SiPh) waveguide, wherein said SOA is aligned and connected to said waveguide by one or more flipchip bumps, such that when said SOA is powered an evanescent coupling is formed between said SOA and waveguide, wherein said waveguide comprises a passive waveguide layer, characterised in that: said passive waveguide layer comprises a dielectric waveguide layer, and a silicon waveguide layer sandwiched between said SOA and dielectric waveguide layer for facilitating optical mode transition between said SOA and dielectric waveguide layer. Typically, said SOA comprises an active layer, an N-InP layer configured adjacent said active layer, and a passivation dielectric layer for preventing surface leakage current outside one or more predetermined current channels, characterised in that: said SOA also comprises another N-InP layer sandwiched between said N-InP layer and passivation dielectric layer, for facilitating lateral current flow from said active layer to the flip-chip bumps.

[0020] Typically, the single-mode laser is characterised in that: said active layer, N-InP layer, another N-InP layer and passivation dielectric layer taper toward the input and output facets of said SOA for facilitating optical mode transition between said SOA and silicon waveguide layer.

[0021] Typically, two elongate depressions are defined in said passive waveguide layer, said depressions being open toward two facets of said passive waveguide layer, a ridge capable of transmitting an optical mode being formed between said depressions, characterised in that: said silicon waveguide layer tapers beyond the input and output facets of said SOA for facilitating optical mode transition between said SOA, silicon waveguide layer and dielectric waveguide layer.

[0022] Typically, the silicon waveguide layer of said ridge is of a width smaller than that of the dielectric waveguide layer of said ridge.

[0023] Typically, said SOA also comprises an N-metal contact, two under-bump metallization (UBM) layers each being configured on an opposing end of the flipchip bumps, and said N-metal contact being sandwiched between said another N- InP layer and the UBM layer on the proximal end.

[0024] Typically, said SOA also comprises a P-InP substrate and a P-metal contact configured on said P-InP substrate, said P-InP substrate providing mechanical stability to the flip-chip bumps.

[0025] Typically, said waveguide also comprises an interlayer, configured adjacent said dielectric waveguide layer, refractive index of said dielectric waveguide layer being higher than that of said interlayer.

[0026] Typically, said SOA also comprises a P-InP cladding sandwiched between said active layer and P-InP substrate; and said waveguide also comprises a silicon substrate configured adjacent said interlayer, a trace metal layer being sandwiched between the UBM layer on the other end and said silicon substrate; such that heat generated from said active layer can be dissipated through said silicon substrate and / or said P-metal contact.

[0027] In one embodiment, said dielectric waveguide layer is thin-fdm lithium niobate (TFLN) or another dielectric having a refractive index similar to that of TFLN, and said silicon waveguide layer is amorphous silicon or single-crystal silicon.

[0028] In another embodiment, said ridge flares toward the facets such that optical confinement in said SOA is reduced; and / or said ridge is defined at an angle from the normal incidence, and / or an anti-reflection coating is deposited on the input and output facets of said SOA, such that reflection is minimised.

[0029] Another aspect of the invention provides a distributed feedback (DFB) laser comprising the single-mode laser as described above, wherein: the dielectric waveguide layer of said ridge is defined by a plurality of grooves configured at a generally right angle to the length of said ridge; or the two elongate depressions are defined by a plurality of grooves configured at a generally right angle to the length of said ridge, depth of which extends into said interlayer.

[0030] Another aspect of the invention provides a single-ended distributed feedback (DFB) laser comprising: the distributed feedback (DFB) laser as described above; and a reflectance loop mirror connected to one end of said ridge, such that the laser is emitted from the other end of said ridge.

[0031] Another aspect of the invention provides an external modulated laser comprising: the single-ended distributed feedback (DFB) laser as described above; and a Mach- Zehnder interferometer (MZI) electro-optic modulator (EOM) connected to the other end of said ridge.

[0032] Another aspect of the invention provides a distributed Bragg reflector (DBR) laser comprising: the single-mode laser as described above; a reflectance loop mirror connected to one end of said ridge; and the waveguide extending beyond the other end of said ridge comprises: a strip of said dielectric waveguide layer; and an interlayer defined by a plurality of grooves configured on both sides, at a generally right angle to the length, of said strip. Typically, the distributed Bragg reflector (DBR) laser as described above also comprises a phase shifter configured between said reflectance loop mirror and single-mode laser, for applying an electric field across said waveguide to adjust the phase of the optical mode transmitted therein.

[0033] Typically, the distributed Bragg reflector (DBR) laser as described above also comprises a pair of electrodes for applying an electric field across the plurality of grooves to adjust the refractive index thereof.

[0034] DESCRIPTION OF THE PREFERRED EMBODIMENT

[0035] The invention will now be described in greater detail, by way of example, with reference to the accompanying drawings, in which:

[0036] Fig. 1 is a top / plan view of the evanescently-coupled hybrid integration of III-V on TFLN-waveguide using intermediate tapered Si-waveguide to facilitate mode transitions;

[0037] Fig. 2 is a cross-sectional view of the evanescently-coupled hybrid integration of III-V on TFLN-waveguide using intermediate Si-waveguide to facilitate optical mode transitions;

[0038] Fig. 3 shows the direction of current-flow in the cross-sectional view of hybrid integrated III-V on TFLN-waveguide device. The H+implant funnels the current into MQW active layer to form the active medium;

[0039] Fig. 4 is part of a bar of III-V epi-wafer consisting of two III-V dies with AuSn- solder bumps and III-V tapered-mesa etched into the epitaxy, prior to cleaving and flip-chip bonding on interposer substrate;

[0040] Fig. 5 is an isometric perspective of the front view of the evanescently-coupled hybrid integrated III-V / Si / TFLN device employing III-V tapered-mesa for optical mode transition from III-V gain-medium to Si-waveguide, and Si-tapered waveguide for mode transition from Si to TFLN-waveguide;

[0041] Fig. 6 (a) is a top / plan view of hybrid integrated III-V on TFLN mode-field transformer consists of III-V tapered-mesa on Si-taper on TFLN-waveguide; and (b) is a longitudinal cross-sectional view of mode-field transformer showing the path of light moving from III-V tapered mesa to Si-taper and then to TFLN waveguide;

[0042] Fig. 7 (a) is a top / plan view of the III-V / Si / TFLN mode-field transformer by FIMMPROP simulations; and (b) is a cross-sectional view of the optical modes at various sections of the mode -field transformer by FIMMPROP simulations;

[0043] Fig. 8 shows the fabrication process flow depicting the preparation of III-V chip and a-Si / TFLN / BOX / Si-interposer substrate for flip-chip bonding;

[0044] Fig. 9 is a schematic diagram of the III-V epi-wafer: (i) before H+implant and (ii) after H+implant, wet-etch and epitaxial regrowth of n-InP;

[0045] Fig. 10 is a top / plan view of the III-V / Si / TFLN DFB laser formed using hybridintegration by evanescent coupling of III-V active medium (MQW) with TFLN DFB laser cavity, using III-V tapered-mesa and Si-taper for mode-field transformer;

[0046] Fig. 11 is a top / plan view of the III-V / Si / TFLN DFB diode-laser formed using hybrid-integration by evanescent coupling of MQW active medium with TFLN DFB laser cavity, without using III-V tapered-mesa, but only Si-taper for Si-to- TFLN mode -transitions;

[0047] Fig. 12 is a cross-sectional view of the III-V / Si / TFLN DFB-laser by evanescent hybrid-integration of MQW active medium with lateral gratings formed by etching periodic grooves on the both sides flanking the TFLN ridge;

[0048] Fig. 13 is a top / plan view of the III-V / Si / TFLN DFB-laser by evanescent hybridintegration of MQW active medium with lateral gratings with multiple distributed discrete phase shifts;

[0049] Fig. 14 is a transverse cross-sectional view of the III-V / Si / TFLN DFB diode-laser by evanescent hybrid-integration of MQW active medium with DFB gratings etched on top of TFLN;

[0050] Fig. 15 is a longitudinal cross-sectional view through centre of III-V / Si / TFLN DFB laser by evanescent hybrid-integration of MQW active medium with DFB gratings etched on top of TFLN; Fig. 16 is atop / plan view of the III-V / Si / TFLN-based External Modulated Laser by cascading III-V / Si / TFLN DFB to ultra-high bandwidth MZI-EOM;

[0051] Fig. 17 is a top / plan view of III-V / Si / TFLN -based External Modulated Laser array by cascading each III-V / Si / TFLN DFB in the array to MZI-EOM;

[0052] Fig. 18 is a top view of the evanescent hybrid-integrated III-V / Si / TFLN single- ended Distributed Bragg Reflector (DBR) laser; and

[0053] Fig. 19 is a calculated reflectance spectrum for narrow-bandwidth DBR for grating index contrast of An = 0.055% and vof 7 cm"1.

[0054] An Overview of the Invention

[0055] This invention is on the method of making TFLN single-mode lasers through hybrid integration by evanescent coupling of active III-V epitaxy with TFLN laser cavity on LNOI waveguide via flip-chip bonding. This method is based on the hybrid integration approach provided in the International Application No. PCT / MY2023 / 050100, with further development of evanescent-coupled hybrid integration of III-V on dielectric waveguide, in particular reference to TFLN- waveguide for this Invention. All the advantages of evanescent-coupled hybrid integration of III-V on photonic integrated circuits, such as better thermal dissipation, lower resistive path for current injection into III-V active layer and others are applicable to hybrid-integrated III-V / TFLN and are clearly spelled out in the International Application No. PCT / MY2023 / 050100. III-V / TFLN single-mode lasers can be cascaded to MZI-EOM to form ultra-high-speed external modulated transmitter for next generation commercial low-power Linear-Drive Pluggable Optical (LPO) transceiver. III-V / TFLN-lasers can also be the on-chip light-source for a wide spectrum of TFLN -PIC based applications in microwave photonics transceiver, non-linear optics and quantum-information processing, comb-source for spectroscopy chip, coherent FMCW LIDAR and many others.

[0056] Conventional method of making optical amplification in TFLN is to dope the TFLN medium with rare-earth metal and employ optical pumping to excite the rare-earth ions to population inversion. However, such method requires a long amplifier length, in the order of meters to kilometers, as in the case of optical fiber, to reach sufficiently large power for commercial market applications. To move TFLN innovation from academia to commercial application, chip-scale optical amplification is necessary. It has been well-known that III-V semiconductor- based quantum-confined structures such as multiple-quantum well (MQW), quantumwires (QWW) and quantum-dots (QD) have been the industry work-horse active optical amplification media for efficient chip-scale electrical current-injection based laser sources. This Invention is about the hybrid integration of such III-V active quantum-confined structures to TFLN-based photonic resonant cavity modes in general, and in particular, to TFLN waveguide mode for laser actions.

[0057] Since LN is a dielectric, III-V semiconductor can neither be epitaxially grown or chemical bonded on LN. The best and commercially viable way is to place the III- V active medium in close physical proximity to the TFLN-waveguide to allow evanescent coupling between the TFLN optical resonant mode with the III-V quantum -confined active structure, held together by flip-chip metal bumps bonding. Evanescent coupling between the III-V active medium and the TFLN waveguide requires the formation of hybrid optical mode between the two media in which majority of the optical intensity resides in the TFLN-waveguide. However, the effective refractive indexes of III-V gain medium and TFLN-waveguide are 3.2-3.2 and 2.2, respectively. That is, majority of the optical intensity of the hybrid optical mode resides instead mainly in the III-V gain medium since its refractive index is larger. As light in the TFLN-waveguide passes into the III-V gain-block, light is evanescently coupled into the III-V gain medium but has difficulty in coupling back to the TFLN-waveguide as it passes out of the III-V gain-block. The key novelty in this invention is to utilize an intermediate layer of Si waveguide inserted between the III-V gain medium and the TFLN-waveguide while the light is inside the III-V gain block to assist in the optical mode exchange of transition from TFLN- waveguide to III-V gain medium and vice versa, as light passes through the III-V gain block. The intermediate Si waveguide has tapers at both ends, pre-patterned and formed on the TFLN-waveguide in the region of the III-V gain block prior to hybrid integration of III-V on TFLN-waveguide by flip-chip bonding. The intermediate Si can be amorphous-Si (a-Si) with refractive index of 3.73, that can be deposited on LNOI-substrate by physical vapour deposition. Or it can be single- crystal Si (c-Si) from Si-on-LNOI interposer substrate fabricated via Smart-Cut process to be done by interposer substrate suppliers. The a-Si approach is easier in the near term as it utilizes a thinner a-Si since its refractive index is larger, without the need to develop a Smart-Cut process for Si-on-LNOI substrate. This invention first presents the basic embodiment of hybrid integration via flip-chip of III-V gain block on TFLN -waveguide to form on-chip semiconductor optical amplifier (SOA). In order to ensure energy-efficient mode transitions from TFLN to III-V gain medium and vice-versa, another novelty of this invention is the utilization of dual adiabatic tapers which consist of a taper at the die-edge of III-V gain medium to transition optical mode from III-V to Si-waveguide, and Si-taper for the transition for optical mode from Si-waveguide into the TFLN-waveguide. This basic embodiment also entails the fabrication process to realize the device structure. The adiabatic tapers for both the III-V gain medium and the Si-waveguide, are first patterned and formed by dry etch on both III-V epi-wafer (after H+implant) and Si (a-Si or c-Si) on LNOI substrate wafer, respectively. The III-V epi-wafers are cleaved into dies and flip-chip bonded on LNOI interposer substrate, using either die-to-die or die-to-wafer format.

[0058] Subsequently, based on the basic embodiment (Figure- 1 through 5), the current invention presents the implementation and extension of such III-V / Si / TFLN hybrid integration scheme to form on-chip single-mode III-V / Si / TFLN lasers. The singlemode III-V / Si / TFLN laser employs the implementation of distributed Bragg gratings on LNOI-platform either within or outside the III-V / Si / TFLN gain block to form TFLN DFB-laser or DBR-laser, respectively. Bragg gratings are periodic grooves etched into the LNOI platform in the vicinity of the TFLN waveguide that provide periodic perturbation to the effective refractive index of the TFLN waveguide which gives rise to distributed reflections or optical feedback to particular desired wavelength to form laser cavity, giving single-mode singlefrequency laser emission after the hybrid integration of III-V active gain medium onto the TFLN waveguide. Figure-6 shows schematic view of the working of the mode-field transformer. Figure-7 describes the design and simulation of the modefield transformer which has been designed for above 98% energy efficiency. This also ensures minimal back reflection which is necessary for proper working of the III-V / Si / TFLN DFB laser. Figure-8 and 9 show the fabrication process steps for the basic embodiment of III-V / Si / TFLN SOA. Figure- 10 through Figure- 19 show the embodiments for TFLN DFB and DBR lasers, respectively. In Figure-16, by cascading the III-V / Si / TFLN DFB laser with MZI-EOM, external modulated III- V / Si / TFLN laser can be fabricated. In addition, by reverse-biasing the III-V active element, such'hybrid integration can be implemented to form on-chip photodetector on TFLN platform.

[0059] Advantages and improvements over existing methods, devices or materials

[0060] The conventional method of implementing optical amplification or gain in TFLN is the doping of rare-earth metals into the TFLN. For example, for optical gain in C-band wavelength, Er3+is doped in TFLN. The reported Er3+-doped gain in TFLN is ~10dB per cm length. This is about 3~4 orders of magnitude less in comparison to the gain provided in III-V MQW active medium. This gain offered by rare-earth ion doped TFLN is far too low from the requirement for commercial device application. Another disadvantage is that the rare-earth ion requires high temperature of ~1100°C for its diffusion into the LN medium. Such high temperature may weaken the LNOI wafer, since the underlying Si, SiO2 and LN have different thermal expansion coefficient.

[0061] (1) In contrast, the proposed method of III-V / Si / TFLN hybrid integration is through evanescent coupling of TFLN resonant modes with III-V semiconductor quantum-confined active medium (for example, III-V MQW), so that the optical mode in the TFLN experiences the III-V optical gain at about similar level as commercial III-V devices that are built on native III-V (e.g. InP or GaAs or others) substrate.

[0062] (2) In the proposed method of III-V / Si / TFLN hybrid integration, the TFLN waveguide is held in close physical proximity to III-V active medium through flip-chip bumps. There is no employment of chemical bonding between Si / TFLN and the III-V gain medium. The flip-chip bonding process is done in environment of inert gas (e.g. N2) at temperature of 280-~300°C, so that the active III-V semiconductor that provides the optical-gain remains unscathed.

[0063] (3) Since there is no chemical bond formed between III-V and Si / TFLN interface, no bonding induced defects or threading dislocations in the semiconductor crystal can propagate from the III-V / Si interface to the III-V quantum-confined nano-structure (for example, MQW active layer).

[0064] In the prior art, the conventional approach of hybrid integration of III-V laser source on TFLN is by butt-coupling of fully fabricated and commercially available laser diode (in particular, high-power DFB laser in the prior art) to TFLN-waveguide terminated with spot-size converter (SSC). Butt-coupling has disadvantage of tight alignment tolerance requirement between laser output and the TFLN-waveguide termination. High power diode-laser is necessary to compensate for the high buttcoupling loss of 2~3dB, which is highly dependent on the butt-coupling gap size. High coupling loss also brings about penalty in the overall system energy efficiency.

[0065] (4) In contrast, for the proposed method of III-V / TFLN hybrid integration through utilization of intermediate Si-waveguide with its adiabatic-tapers, the TFLN resonant modes is evanescently coupled to III-V semiconductor quantum- confined active medium (for example, MQW active layer in the basic embodiment) for maximal optical gain. That is, the TFLN waveguide mode is seamlessly coupled to the III-V / Si / TFLN hybrid mode with efficiency of better than 95%. The details of the calculation will be presented in the next section. The coupling efficiency can be made to be near to 100% by well-designed III- V taper and utilizing sufficiently long Si-taper on TFLN-waveguide. The key parameter for device performance for both the III-V / Si / TFLN SOA and laser is quantified by the optical confinement factor in the III-V active layer, i.e. the percentage of optical resonant-mode field residing in the quantum confined active medium. The optical confinement factor in III-V and Si layers are adjustable by the number of quantum-wells in the III-V active layer and the thickness of the intermediate Si layer. For evanescent hybrid integrated III- V / Si / TFLN SOA, for confinement factor of 3~4%, the SOA length is typically l~1.5mm for typical gain of 10~20dB.

[0066] (5) In evanescent coupled III-V / Si / TFLN hybrid integration, the misalignment tolerance between the TFLN waveguide and the III-V active medium is relaxed. In the basic implementation of evanescent hybrid integration as shown in Figure-1 to 5, TFLN-waveguide has a typical width of 4~5pm, while the Si- waveguide has a width of 2 pm lying at the centre of the TFLN-waveguide. The carrier-injected MQW forming the III-V active medium has a width of typically 4pm as defined by proton (H+) implant (see Figure-3). Evanescent coupling is functional as long as the Si-waveguide is placed within the width of the active III-V gain medium. Hence, there is ±l~1.5pm mis-alignment tolerance for maintaining evanescent coupling.

[0067] In the utilization of the evanescent hybrid integration of III-V / Si / TFLN, both the un-removed InP substrate of the III-V and the utilization of flip-chip bumps placed in the vicinity of the TFLN-waveguide and the III-V active medium, facilitates thermal dissipation. In addition, the un-removed InP substrate enables wide electrical path for current spreading on the p-side while the flip-chip bumps can be optimally placed as near as possible to the III-V active medium to reduce electrical resistance at the w-sidc of the III-V active pw-junction. Both factors contribute to low differential resistance and capability of high optical output power for such a chip-scale TFLN single-mode laser, capable of meeting the commercial requirements for optical communication. In contrast, such possibility cannot or difficult to be fulfilled by butt-coupled hybrid integration approach or by Er+-doped TFLN.

[0068] Device Structure of III-V / TFLN SOA (Embodiment-1)

[0069] The generic structure and the fabrication process flow for passive -aligned evanescently coupled hybrid integration of III-V on passive waveguide of photonic integrated circuit via flip-chip bonding has been provided in the previous International Application No. PCT / MY2023 / 050100. This invention focuses on such hybrid integration on passive waveguide (e.g. SiN, TFLN or others) whose refractive index is lower than that of III-V active gain medium. Although this invention focuses on TFLN passive waveguide, the integration method is also applicable to others passive waveguide whose refractive index is near to that of TFLN.

[0070] Firstly, the basic embodiment of evanescently coupled hybrid integrated III- V / Si / TFLN SOA is presented, as shown in Figure- 1 through 5. In this basic embodiment, the III-V epi / substrate die is bonded flip-chip epi-side down on stack of Si (a-Si or c-Si) strip waveguide on TFLN waveguide of LNOI interposer substrate. The TFLN waveguide can be strip or rib waveguide, depending on whether TFLN is fully or partially etched. The Si strip waveguide resides at the centre of the TFLN-waveguide and has a typical width of 2pm. The Si-strip waveguide begins and ends with adiabatic tapers. The top view of the basic embodiment to form III-V / Si / TFLN SOA is shown in Figure- 1. Dashed lines for the TFLN and Si waveguides 1, 2 represent waveguides embedded beneath the III- V gain block. Both the TFLN-waveguide and the Si-waveguide taper 3, 4 down as soon as TFLN-waveguide 1 emerges out from the edge of the III-V gain block, as shown in Figure- 1. The Si-waveguide tapers 4 down from initial width of 2pm to 0.1~0.2pm tip-width. The shaded region depicts the H+implanted region 5. Unshaded region is where current is injected into the active layer of the III-V gainblock. The dash-double-dotted line depicts the H+implanted boundary 6. The dashsingle-dotted line depicts the tapered mesa 3 etched into the III-V epitaxy-layer. Figure-2 shows the cross-section view of hybrid integrated III-V on TFLN 24 with Si as intermediate layer 25. Within the III-V gain-block, the stack of III-V / Si / TFLN on buried-SiCL (BOX) gives rise to hybrid optical mode with majority of the optical intensity in the III-V / Si-waveguide. Also shown in Figure-3, the p-InP substrate 7 is not removed to provide low resistive path to current flow 8, to provide mechanical strength for flip-chip bonding, and to facilitate thermal dissipation. Current flows from p-metal contact 9 at the backside of the III-V epi / substrate. The H+implant 5 provides current blocking so that current is funnelled into the 4pm-wide narrow channel, and is injected into the MQW active layer 11 to form the gain-medium. Current then flows from the active MQW layer 11, through the w-InP channel layer 12 underneath the active layer 11, and out to the w-metal contact 13, the Au / Sn solder bumps 14 and into the trace-metal 15 on the interposer substrate 27. The n- InP channel 12 is a regrown layer on the epi-wafer after H+implant. Details of the fabrication will be described in the next section.

[0071] The III-V epitaxy / substrate is held down to the Si / LNOI interposer substrate by the flip-chip metal bumps 28 and their details have been provided in the previous International Application No. PCT / MY2023 / 050100. As light travels through the III-V gain block, the active layer provides the optical gain or amplification. As shown in Figure- 1, as light travels out of the III-V gain-block, the III-V epitaxy tapered-mesa 3 brings about the transition of optical intensity from III-V gain medium to Si-waveguide 2. Upon emerging out of the III-V gain-block, the Si-taper 4 on the TFLN-waveguide 1 brings about second stage optical mode transition, with optical intensity transition from Si to TFLN waveguide. Similarly, for light traveling into the III-V gain block, optical transition takes place from TFLN waveguide 1 into the Si-waveguide 2 through the Si-taper 4. Upon entering the III- V gain-block, light makes transition from Si-waveguide 2 into the III-V gain medium through the III-V tapered-mesa 3. The III-V tapered-mesa 3 allows almost 100% efficiency and seamless transition of optical mode from Si / TFLN to III- V / Si / TFLN-hybrid mode or vice versa. It ensures minimal back reflections into the III-V gain block. Low back reflection is paramount especially when the III- V / Si / TFLN hybrid integration embodiment is applied to form a distributed feedback (DFB) laser, which will be presented in the next section. As shown in Figure-8, the III-V epi-wafer 16 is patterned and dry-etched to form the tapered mesa 3 on the wafer prior to its cleaving into dies for flip-chip bonding. The dryetch process etches past the MQW 11 and stops just after the p-side Separate- Confinement Heterostructure (SCH). The III-V tapered mesa 3 is for the optical transition from III-V active layer 11 into Si-waveguide 2. Figure-4 shows schematically part of a bar of III-V epi-wafer 16 consists of two dies with tapered- mesas 3 and AuSn-solder bumps 14, prior to cleaving (or dicing). After cleaving along the dashed lines 17, 18, a III-V die will have two tapered-mesas 3 at both ends of the active region which has no H+implant. Then, the III-V die is flip-chip bonded on the Si / TFLN-waveguide with the III-V tapered mesa 3 in alignment with the Si-tapered waveguide 4 which has already been formed on the LNOI interposer substrate 27. Figure-5 shows the isometric perspective front view of the evanescently-coupled hybrid integrated III-V / Si / TFLN generic device with modefield transformer tapers 3, 4 that consist of III-V tapered mesa 3 and the Si-tapered waveguide 4 on TFLN waveguide 1. Flip-chip bumps have been omitted for simplicity of illustration. Fiducial marks are patterned and etched at the 4 comers of the III-V die as well as 4 comers of the Si / TFLN interposer die for flip-chip bonding alignment.

[0072] Simulation of the Mode-Field Transformer Figure-6(a) and (b) shows schematically the top and longitudinal cross-sectional views of the light passing through the optical mode-field transformer which consists of the III-V tapered mesa 3 in physical contact on Si-tapered waveguide 2 via flipchip bonding, and Si-taper 4 on TFLN-waveguide 1. FIMMWAVE / FIMMPROP was used to simulate and optimize the mode-field transformer structure. Figure-7(a) and (b) shows the results of the simulation. As shown in (i) of the Figure-7(b) for optical-mode inside the III-V gain block, majority of optical intensity of the hybrid optical mode of III-V / Si / TFLN stack on BOX resides in the III-V / Si. As light travels forward, the optical intensity transitions to the Si-waveguide 2 as the III-V mesa 3 tapers down, as shown in (ii). As the Si-waveguide 2 tapers down as shown in (iv) and (v) of the figure, light transitions to the TFLN-waveguide 1. Theoretical simulation shows that the efficiency of mode transformation is above 98%. This ensures little light energy is back reflected into the III-V gain block. Low back reflection is important when the III-V gain block is configured to form a DFB laser which will be presented later. In the next section, the fabrication process flow to form the basic embodiment for III-V / Si / TFLN SOA is presented.

[0073] Description of Fabrication of III-V / Si / TFLN SOA

[0074] The fabrication process flow is shown in Figure-8. The fabrication process flow consists of two parallel preparation processes for the III-V chip and the Si / LNOI interposer substrate, respectively. It finally ends in the flip-chip bonding of III-V die epi-side down on the Si / LNOI interposer substrate. The fabrication process flow herein is described for the case of hybrid integration of III-V die on Si / LNOI- interposer substrate, in which Si is on TFLN / BOX on Si-substrate. The Si can be a- Si, which is deposited in wafer-fab, or c-Si thin film which is part of the Si / TFLN / BOX / Si-substrate fabricated by Smart-Cut technique to be performed by substrate supplier.

[0075] The III-V epi-wafer is similar to the prior art, except that the w-InGaAsP / InP superlattice stack is replaced by a single layer of 30nm of lattice-matched n- InGaAsP bulk layer 19 in the w-InP. The schematic drawing of the III-V epi-wafer at the start ofthe process is shown in (i) of Figure-9. This w-InGaAsP layer 19 serves as etch-stop layer in the process. The first step of III-V wafer processing is the definition and formation of the III-V gain medium or the channel for current injection. Regions of the epi-wafer with H+implant becomes resistive to form current blocking region. After photolithography with patterned openings on the epi- wafer to form III-V gain region, TiAu is deposited and lift-off so that TiAu is used to mask off areas from H+implant. The H+implant front stops just after the p-InP cladding layer. After H+implant, the TiAu is removed by wet etch. In the currentblocking regions where H+ions are implanted, the layers have become resistive from the top of the epi-wafer 20, including the w-InP. Both the top w-InP and n- InGaAsP layers 19, 21 of the epi-wafer are then removed by wet etch. Next, new layer of w-InP channel layer 22 (typical thickness 1 lOnm) is epitaxially regrown on the epi-wafer. This is schematically shown in (ii) of Figure-9. Next, after the deposition of 5~7nm-thick of passivation dielectric 23 which can be SiCh or SiN, the III-V tapered-mesa 3 and fiducial marks are patterned and formed by dry etch. The dry-etch terminates just after the active layer 11 (i.e. MQW plus SCH). After dry etch of passivation dielectric 23 in the N-metal region, the N-metal 13, the UBM and the AuSn-solder 14 is deposited and lifted-off The fiducial marks must be printed on the III-V epi-wafer for each die to facilitate flip-chip bonding of III-V die on interposer substrate. After cleaving into bars, bars that employ the III-V tapered mesa 3 for mode transformation do not need to perform anti-reflection coating at the end facets. For bars that do not employ the III-V tapered mesa 3, the end facets are deposited with anti -reflection coatings prior to cleaving into dies for flip-chip bonding.

[0076] The investment for the development of c-Si / LNOI-substrate by Smart-Cut Technique is bome by the interposer substrate supplier. The lower cost approach is to use a-Si for Si / LNOI substrate for integration with III-V. Refractive index of a- Si is higher resulting in usage of thinner a-Si. For the preparation of a- Si / TFLN / BOX / Si interposer substrate, a-Si is first deposited by physical vapour deposition (PVD) on blank LNOI substrate. After annealing the a-Si, TFLN- waveguide 1 and the fiducial marks are patterned on the a-Si / LNOI substrate. TFLN-waveguide 1 is formed by dry etching through the a-Si, either partially or fully into TFLN layer 24. Next, the Si-waveguide 2 is patterned and etched-stop on TFLN. The Si-waveguide 2 patterns inclusive of the Si-tapers 4 on TFLN- waveguide 1 are formed within and in the vicinity of the III-V gain-block region. Next, step-4 is the definition and formation of trench opening in the interposer Si / LNOI-substrate for trace-metal 15 (typically, Ti / Au) and solder-metal 42 depositions. This trench is formed by etching through the Si 25 (a-Si or c-Si), TFLN 24, BOX 26, and stop on the interface between BOX 26 and Si-substrate 27. The deposition and lift-off of trace-metal 15, the UBM and AuSn-solder 42 are done each using separate mask such that these are to be localized underneath the III-V chip, and matched exactly with the patterns of the N-metal 13 of the III-V chip. Fiducial marks are for alignment with that of III-V chip during the flip-chip process. After the flip-chip bonding process, the AuSn 14, 42 on both the III-V and Si- interposer substrate merges as a single solder bump 28. The flip-chip bonding can be either die-on-die or die-on-wafer. The alignment of fiducial marks on both the III-V chip and the Si-interposer must be accurate enough such that the edges of the H+implant that defines the III-V gain medium are in alignment with the edges of the TFLN-waveguide 1 in the III-V gain block. The Si-waveguide 2 resides at the centre of the TFLN-waveguide 1 and the III-V gain medium.

[0077] The flip-chip bump 28 (AuSn) thickness must be designed to match the required thickness of the BOX 26, which is typically 2~4.5pm-thick. In specific applications such as high-speed MZI-EOM modulators, BOX 26 has certain thickness requirement for velocity-matching of RF modulation and optical signals. After flipchip bonding of III-V epi-side down on the LNOI / Si interposer substrate, the P- contact metal 9 on the backside of the III-V epi-substrate is wire-bonded to P- contact pad on the interposer substrate. The N-contact metal 13 on the III-V-epi- substrate is electrically connected through flip-chip bumps 28 to the trace-metal 15 deposited on the recessed regions of the LNOI / Si interposer.

[0078] In this section, the device structure and fabrication process of evanescently coupled hybrid integrated III-V / TFLN SOA, which is the basic embodiment in this invention, have been presented. In the next two sections, the basic embodiment is further extended to form III-V / Si / TFLN DFB laser, external-modulated laser or distributed Bragg reflector (DBR) lasers.

[0079] Hybrid Integrated III-V / Si / TFLN Distributed Feedback (DFB) laser (Embodiment-2)

[0080] Both Figures- 10 and 11 show the top views of the embodiments of III-V / Si / TFLN single-ended DFB lasers. The embodiment shown in Figure- 10 is utilized when III- V tapered mesa 3 is employed for highly efficient transition of mode-field from III-

[0081] V gain medium to the Si-waveguide 2 and from Si-waveguide 2 to the TFLN- waveguide 1 and vice versa. This ensures minimal back reflections into the DFB laser cavity. Embodiment of Figure- 11 is utilized when it is not convenient in the III-V preparation process to etch tapered mesa 3 to save cost for example. In this case, the Si / TFLN-waveguide 2, 1 before meeting the Si-taper 4 must exit the III-

[0082] V gain block facet plane at 12° from normal incidence, as mentioned in the previous International Application No. PCT / MY2023 / 050100, to ensure minimal back reflection into laser cavity. In Figure-11, the efficiency of the mode-field transition across the III-V gain-block facet is about 70-80% depending on the thickness of the Si-waveguide 2. Thicker Si-waveguide 2 has better mode-field transition efficiency but results in lower confinement factor in the MQW 11. This is compensated with longer laser cavity length. For both embodiments, the left (back) facet is terminated with a loop-mirror 43 with 100%-reflectance and all optical power is emitted from the right (front) facet. This is equivalent to a HR-AR coated DFB laser. In general, the loop-mirror can be replaced by Sagnac reflector if a small fraction of lasing optical power is to be extracted for power monitoring.

[0083] For the DFB laser fabrication, the TFLN waveguide 1 and subsequently Si- waveguide 2 are firstly formed by etching, similar to the above-mentioned process flow. Next, lateral gratings 30 of the DFB are then formed by partial dry-etching periodic rectangular grooves into the BOX 26 of the LNOI-platform flanking the TFLN ridge waveguide 1. The schematic cross-sectional view of the laser cavity at a particular cross-section of grating -groove is given in Figure- 12. The depth and nearness of the periodic grating grooves 30 to the ridge waveguide 1 determines the DFB grating coupling coefficient (K). In Figure-10 and 11, Lcavis the total length of the DFB grating. For normal high-power operation, the KLCOV is 1.2-1.5. For a stable single longitudinal mode (SLM) operation, asymmetric X / 4-shifted DFB grating is utilized. For DFB laser with full optical power coming from right (front) facet, the discrete / 4 phase-shift section is placed 1 / 3 of Lcavfrom the left-side of the gratings for stable single-longitudinal operation, as shown schematically in Figure- 10 and 11. In the prior art, the optical phase variation resulting from the path between the left end of the DFB gratings and the back-facet loop-mirror can result in unstable DFB laser operation. A phase-shifter 31, placed between the 100%- reflectance loop-mirror and the DFB gratings 30, is to adjust end-mirror phase-shift for stable kink-free DFB operation. On the LNOI platform, the phase-shifter 31 is simply a voltage applied across the TFLN waveguide mode via a pair of electrodes to control the LN refractive-index and hence, control the phase-shift in the section. For evanescent hybrid integrated DFB laser, the optical confinement factor in the MQW active layer 11 is typically 3~4%. The overall grating length of the DFB is in the order of l~1.5mm. The long-cavity DFB laser enables large optical confinement in the laser cavity and potentially gives a narrow linewidth. However, such laser tends to become multimode operation at high power operation due to spatial hole burning effect and can be mitigated by multiple-phase-shift (Figure-13). Although Figure-10 and 11 show single phase-shift at 1 / 3 of Lcavfrom the left facet, multiple-phase-shifts distributed across the grating cavity (Figure- 13) can be implemented to mitigate spatial hole burning effect. Another method to mitigate spatial hole burning, which is known to cause multimode instability, is to utilize quarter-wave phase shift distributed over several chirped grating periods which is a fraction of the total gratings length rather than a single discrete quarter-wave phaseshiftjump as shown in Figure-10 and 11. The lateral grating 30 as shown in Figure- 12 is suitable for low K and long cavity DFB. For short-cavity DFB-laser, higher K is needed. Higher K grating can be formed by directly etching shallow gratings 32 on top of the ridge waveguide. The transverse cross-section is shown in Figure-14. The longitudinal cross-section along the X / 4-phase-shifted DFB laser cavity is shown in Figure-15. 10~40nm-deep shallow gratings 32 can first be etched into the LNOI. After grating formation, a-Si is deposited. Subsequently, the strip or rib TFLN waveguide and strip Si-waveguide is formed by dry-etch. In evanescent hybrid integration, III-V epitaxy / substrate with epi-side down is flip-chip bonded on the grating cavity to form the III-V / Si / TFLN DFB laser. For embodiment of Figure- 11, at both facets of the III-V / Si / TFLN gain-block, the Si / TFLN waveguides is tilted at 12-15° from normal incidence to minimize back reflections into the cavity. Anti-reflection coatings (ARC) can also be deposited at both facets of the III-V gain block to minimize back reflection. Even without ARC, by adiabatically widening the Si-waveguide 2 widths while titling at 12-15° at the both facets, the reflections can be minimized to -58 to -30 dB. Embodiment III-V / Si / TFLN External Modulated Laser (Embodiment-3)

[0084] By placing the III-V / Si / TFLN DFB laser 33 in cascade to an MZI-EOM 34, an ultra-high bandwidth TFLN-based external modulated laser (EML) can be fabricated to serve as E / O-transmitter for the next generation commercial low- power Linear-Drive Pluggable Optical (LPO) transceiver. Figure- 16 shows the top view of the TFLN-based EML. The III-V substrate back-side is wire-bonded to p- Pad on the LNOI / Si-substrate interposer. The trace-metal pad is wire-bonded to the w-Pad. Under applied de operating current in the III-V / Si / TFLN DFB, singlewavelength laser light is emitted into the MZI-EOM for modulation. The grating period in the DFB can be designed to cater for the various Course-WDM wavelengths. In general, as shown in Figure- 17, in an array of 4 or 8 evanescent hybrid-integrated DFB lasers, each laser can be cascaded to an MZI-EOM to form an array of 4 or 8 ultra-high bandwidth EMLs. In this case, the evanescent hybrid- integrated DFB-array 44 is a single common die flip-chip bonded on LNOI / Si interposer. The P-metal 9 for each DFB laser on the backside of the III-V substrate can be individualized and segregated by isolation-dielectric. This can be realized by first depositing a layer of dielectric on the back-side of the die. This is followed by photolithograph using mask for P-contact openings. After removal of dielectric by dry-etch, the P-metal 9 can be formed by e-beam deposition or by sputtering and then lifted-off

[0085] Embodiment for III-V / Si / TFLN Distributed Bragg reflector (DBR) laser (Embodiment-4)

[0086] As shown in Figure- 18, III-V / Si / TFLN DBR laser can consist of a III-V / Si / TFLN- SOA with placing a 100%-reflectance loop-mirror (or Sagnac reflector) as rear-end mirror (left facet), and an ultra-narrow bandwidth distributed Bragg reflector (DBR) as front-end (right-facet) mirror. Current state-of-the-art commercial narrowlinewidth DBR laser consists of III-V gain-chip butt-coupled to low index-contrast, 1OW-K mirror which utilizes Fiber-Bragg-Gratings (FBG) or gratings on Planar Lightwave Circuits (PLC). Although such DBR lasers exhibit narrow line-width of < 1kHz, they are bulky and laser performance is dependent on the butt-coupling efficiency between III-V gain-chip and the FBG or PLC. The butt-coupling is labour-intensive resulting in high assembly cost. Its performance is vulnerable to system vibrations and mechanical stress. Furthermore, the emission wavelengths of these DBR-lasers are limited to O / C / L-band. The proposal in Figure- 18 allows III- V / Si / TFLN narrow-linewidth DBR lasers in a broad spectrum of wavelengths (350nm to 5pm) since TFLN is transparent to these wavelengths. The utilization of evanescent coupling between the III-V to TFLN waveguide in conjunction with the III-V tapered-mesa, Si-taper mode-field transformer, allows seamless and better than 95% coupling efficiency between III-V gain-chip and narrow bandwidth DBR. It promises good laser performance in terms of threshold current and slopeefficiency, performance repeatability and system stability. Since all components are integrated and assembled on the same LNOI / Si interposer platform, it allows a small foot-print for such narrow-linewidth laser. One further advantage of assembling the narrow-linewidth DBR on same LNOI / Si interposer platform is that it allows a phase-shifter to be integrated in the DBR laser cavity. The phase-shifter in LN is simply an applied electric field across the TFLN waveguide section to change the reflective index, and hence, change the phase. As current is injected into the III-V / TFLN gain block, heating and the presence of carriers in the active layer cause the lasing mode to move to longer wavelength. A bias voltage can be applied at the phase-shifter to change the refractive index to compensate for the shift in wavelength at high current, thereby stabilize the single mode operation. The phaseshifter allows the adjustment of in-cavity phase to prevent or minimize modehopping over a wide temperature range for commercial applications. Conventionally, for narrow-linewidth DBR which employs FBG, the emission wavelength is tuned thermally by applying different temperature to the FBG. As a result, the temperature of the gain-chip and that of the FBG requires complicated tracking synchronism. In contrast, yet another advantage of building DBR laser on LNOI / Si interposer is, that metal electrodes can be deposited across the narrowbandwidth DBR gratings. By applying voltage across the DBR gratings, its refractive index can be adjusted and hence, wavelength-tuning is enabled. This offers two advantages. First, both the DBR grating and the III-V / Si / TFLN gain-chip can be on the same thermo-electric cooler (TEC) so that temperature of both gainchip and DBR can be common. Temperature control and stability becomes easier. Second, wavelength tuning response through electro-optic effect by applied voltage is faster than thermal tuning. In addition, electro-optic tuning does not bring thermal cross-talk to the laser gain medium. In terms of wavelength, the loop-mirror is a very wide bandwidth reflector. The evanescent hybrid integrated III-V gain-block flip-chip on LNOI with the 100%- reflectance loop-mirror forms a gain-chip. The ultra-narrow bandwidth DBR mirror consists of low index-contrast gratings of low coupling coefficient (K), made by etching shallow periodic grooves (or holes) into the two sides flanking the TFLN ridge waveguide. The grating etch-depth and the nearness of the grooves to the optical mode in the TFLN-waveguide determines the K. Figure- 19 shows a typical narrow bandwidth DBR spectrum for index-contrast of Zf?=0.055% and vof 7 cm" '. For this particular case, the FWHM reflection-spectral bandwidth is 0.42nm. State-of-the-art low propagation losses of shallow-ridge TFLN-waveguide is 2.7dB / m. Maintaining KLgratmg= 1-1.2 for high power laser, such low propagation loss allows the utilization of low K (of < 1 cm"1) and long DBR length ranging from 1-5 cm potentially giving laser linewidth less than 1kHz. The applications for such a narrow-linewidth laser will be described in the next section.

[0087] Commercial applications of the invention

[0088] Commercial Applications for HI-V / TFLN External Modulated Laser (EML)

[0089] The III-V / / Si / TFLN EML which consists of cascade of DFB laser and ultra-high bandwidth MZI-EOM potentially can serve to replace traditional approach of utilizing InGaAsP / InP-based electro-absorption (EA) modulator for E / O- conversion in high-speed transmitter for the next generation of pluggable transceivers for Data-Center Interconnect (DCI) market.

[0090] Conventionally, the E / O-conversion transmitter in pluggable transceiver for DCI has been served either by InGaAsP / InP-based quantum-confinement Stark-effect (QCSE) based EA modulator or plasma-dispersion based Si-photonic MZI modulator. The current state-of-the-art best performing InGaAsP / InP-based EA- modulator integrated with DFB-laser featured a bandwidth of lOOGBd / s PAM4 or 224Gbps with 5-km transmission in the O-band. The E / O response bandwidth of the modulator is highly dependent on the length of the modulator wherein, currently, is in the order of 50~80pm. At this point, the future scalability of InGaAsP / InP EA-modulation bandwidth is dependent on precise control on the modulator-length. Reducing the modulator-length increases modulation bandwidth but requires larger number of QW in the EA active layer to compensate for the loss of extinction-ratio. In practice, there will be limitation on the number of QW’s that can be grown in the active layer and hence, place a limit to scaling up in modulation bandwidth. Meanwhile, the current state-of-the-art Si-photonic MZI modulator featured a highest possible modulation speed of 100~158Gbps transmission per wavelength, serving the IEEE 400G Ethernet standard for 4xl00Gbps optical interconnect. However, recent emergence of 800G and 1.6T Ethernet standards demand more than lOOGb / s data-rate per wavelength, in which Si-modulator may find difficulty for future scaling. Hybrid integration of TFLN on Si-photonics or evanescently coupled III-V / TFLN hybrid-integrated DFB in cascade with TFLN MZI-EOM can serve as E / O-modulator vehicle for future more-than-lOOGbps data- rate per wavelength applications in 800G / 1.6T Ethernet Linear-Drive pluggable transceiver, and also in Co-Package Optics. The high electro-optic coefficient of TFLN that gives good modulation efficiency and low operating CMOS -compatible modulator voltage potentially allows a driverless MZM, wherein MZM is driven directly by a CMOS IO, giving a lower power consumption. This will ensure sustainable scaling to higher speed with minimal penalty in energy efficiency. Availability of co-integrated single-wavelength TFLN DFB laser source will enable TFLN MZI-EOM to move from academia into commercial optical-interconnect roadmap to serve not only the DCI market, but also in the emerging optical- interconnect hardware market for Artificial Intelligence and Machine Learning.

[0091] Commercial Applications for III-V / TFLN Distributed Bragg reflector (DBR) laser

[0092] The III-V / Si / TFLN narrow-linewidth DBR laser can be coupled to optical fiber as a fiber-pigtailed packaged component useful for fiber-optics sensing applications. For example, these DBR lasers can be applied in interferometric acoustic sensing systems for exploration or sonar sensing system, distributed sensing systems in power industry for gas and oil well management, for wind-turbine stress sensing, for sensing along critical infrastructure such as buildings, power stations, bridges, tunnels, pipelines and electrical distribution systems. Another important sensing market is in free-space sensing such as LIDAR. The current evanescent hybrid integration scheme as proposed in this invention, utilizing the un-removed InP- substrate, the proximity of flip-chip bumps to MQW active medium that facilitates thermal conduction to interposer substrate and lower electrical resistance, can provision the advantage of better thermal dissipation, and hence, can potentially give higher laser output power. For such capability of high power, low relative intensity noise (RIN), narrow Lorentzian linewidth, while being in a compact formfactor, the III-V / TFLN DBR laser can potentially serve the above-mentioned market applications.

[0093] In addition, since TFLN possesses a broad optical transparency window from 350nm to 5pm, covering the visible, near-infrared and mid-infrared range, evanescent hybrid integrated III-V / Si / TFLN narrow linewidth DBR lasers emitting in wavelengths other than O / C / L-bands can also be made possible simply by using the appropriate III-V active gain medium and DBR period for the particular wavelength of interest.

Claims

CLAIMS1. An integration process for making a single-mode laser, comprising steps of: fabricating a III-V semiconductor optical amplifier (SOA) (39) which includes an active layer (11); fabricating a silicon photonic (SiPh) waveguide (40) which includes a passive waveguide layer (41) and an interlayer (26); flipping and aligning the SOA (39) with the waveguide (40) in a passive manner; and connecting the SOA (39) to the waveguide (40) by one or more flip-chip bumps (28), such that when said SOA (39) is powered an evanescent coupling is formed between the SOA (39) and the waveguide (40); characterised in that: the passive waveguide layer (41) comprises a dielectric waveguide layer (24); and the step of fabricating the waveguide (40) also comprises a step of depositing a silicon waveguide layer (25) on the dielectric waveguide layer(24) by physical vapour deposition, such that when said SOA (39) is flipped and aligned with the waveguide (40), the silicon waveguide layer (25) is sandwiched between the SOA (39) and dielectric waveguide layer (24); or the passive waveguide layer (41) also includes a silicon waveguide layer(25) configured in a way such that when said SOA (39) is flipped and aligned with the waveguide (40), the silicon waveguide layer (25) is sandwiched between the SOA (39) and dielectric waveguide layer (24).

2. An integration process for making a single-mode laser as claimed in claim 1, wherein the step of fabricating the SOA (39) comprises steps of: forming a current channel on the SOA (39) which comprises steps of: defining an opening of the current channel by photolithography; depositing a sacrificial metal on the SOA (39) in a way such that the opening is masked;implanting hydrogen ions (H+) on the masked region of the SOA (39); and removing the metal from the SOA (39) by wet etching, such that a current channel is formed; depositing a passivation dielectric layer (23) on the side of the SOA (39) proximal to the active layer (11); and depositing a P-metal contact (9) on the opposing side of the SOA (39); characterised in that: the SOA (39) also includes a N-InP layer (35) proximal to the active layer (11), an N-InGaAsP layer (19) configured adjacent the proximal N-InP layer (35), and aN-InP layer (21) distal from the active layer (11); and the step of fabricating the SOA (39) also comprises steps of: removing by wet etching the distal N-InP layer (21) which has been implanted with H+, the N-InGaAsP layer (19) being a stopper for the wet etching; and regrowing another N-InP layer (12) on the proximal N-InP layer (35), for facilitating lateral current flow from the active layer (11) to the flip-chip bumps (28).

3. An integration process for making a single-mode laser as claimed in claim2, characterised in that the step of fabricating the SOA (39) comprises an optional step of: dry etching the active layer (11), proximal N-InP layer (35), another N-InP layer (12) and passivation dielectric layer (23) such that they taper toward the input and output facets of the SOA (39) for facilitating optical mode transition between said SOA and silicon waveguide layer (25).

4. An integration process for making a single-mode laser as claimed in claim3, wherein the step of fabricating the SOA (39) also comprises steps of: forming an opening in the passivation dielectric layer (23) by photolithography;depositing an N-metal contact (13) in the opening; depositing an under-bump metallization (UBM) layer on the N-metal contact (13); and depositing a solder metal (14) as part of a flip-chip bump on the UBM layer.

5. An integration process for making a single-mode laser as claimed in claim 4, wherein the step of fabricating the SOA (39) also comprises steps of: cleaving the SOA (39) into a plurality of bars; depositing optionally an anti-reflection coating on facets of the bars; and cleaving the plurality of bars into a plurality of dies.

6. An integration process for making a single-mode laser as claimed in claim 1, wherein the step of fabricating the waveguide (40) comprises steps of: defining and forming by photolithography a ridge (43) capable of transmitting an optical mode (45) in the passive waveguide layer (41); and subjecting the waveguide (40) to a high temperature annealing such that the propagation loss of the waveguide (40) is reduced; characterised in that: the step of fabricating the waveguide (40) also comprises a step of dry etching the silicon waveguide layer (25) such that it tapers beyond the input and output facets of the SOA (39) for facilitating optical mode transition between the SOA (39), silicon waveguide layer (25) and dielectric waveguide layer (24).

7. An integration process for making a single-mode laser as claimed in claim 6, characterised in that the ridge (43) is defined and formed in the passive waveguide layer (41) in a way such that the silicon waveguide layer (25) of the ridge (43) is of a width smaller than that of the dielectric waveguide layer (24) of the ridge (43).

8. An integration process for making a single-mode laser as claimed in claim7, wherein the step of fabricating the waveguide (40) also comprises steps of: defining a channel in the dielectric waveguide layer and the interlayer by photolithography; forming the channel by dry etching; depositing a trace metal (15) in the channel; depositing an under-bump metallization (UBM) layer on the trace metal (15); and depositing a solder metal (14) as part of the flip-chip bump on the UBM layer.

9. An integration process for making a single-mode laser as claimed in claim 5 or claim 8, characterised in that said dielectric waveguide layer (24) is thin-film lithium niobate (TFLN) or another dielectric having a refractive index similar to that of TFLN, and said silicon waveguide layer (25) is amorphous silicon or single-crystal silicon.

10. A single-mode laser comprising a III-V semiconductor optical amplifier (SOA) (39) and a silicon photonic (SiPh) waveguide (40), wherein said SOA (39) is aligned and connected to said waveguide (40) by one or more flipchip bumps (28), such that when said SOA (39) is powered an evanescent coupling is formed between said SOA (39) and waveguide (40), wherein said waveguide (40) comprises a passive waveguide layer (41), characterised in that: said passive waveguide layer (41) comprises a dielectric waveguide layer (24), and a silicon waveguide layer (25) sandwiched between said SOA (39) and dielectric waveguide layer (24) for facilitating optical mode transition between said SOA (39) and dielectric waveguide layer (24).

11. A single-mode laser as claimed in claim 10, wherein said SOA (39) comprises an active layer (11), an N-InP layer (35) configured adjacent said active layer (11), and a passivation dielectric layer (23) for preventing surface leakage current outside one or more predetermined current channels, characterised in that: said SOA (39) also comprises another N-InP layer (12) sandwiched between said N-InP layer (35) and passivation dielectric layer (23), for facilitating lateral current flow from said active layer (11) to the flip-chip bumps.

12. A single-mode laser as claimed in claim 11, characterised in that: said active layer (11), N-InP layer (35), another N-InP layer (12) and passivation dielectric layer (23) taper toward the input and output facets of said SOA (39) for facilitating optical mode transition between said SOA (39) and silicon waveguide layer (25).

13. A single-mode laser as claimed in claim 11 or claim 12, wherein two elongate depressions are defined in said passive waveguide layer (41), said depressions being open toward two facets of said passive waveguide layer (41), a ridge (43) capable of transmitting an optical mode (45) being formed between said depressions, characterised in that: said silicon waveguide layer (25) tapers beyond the input and output facets of said SOA (39) for facilitating optical mode transition between said SOA (39), silicon waveguide layer (25) and dielectric waveguide layer (24).

14. A single-mode laser as claimed in claim 13, characterised in that the silicon waveguide layer (25) of said ridge (43) is of a width smaller than that of the dielectric waveguide layer (24) of said ridge (43).

15. A single-mode laser as claimed in claim 14, wherein said SOA (39) also comprises an N-metal contact (13), two under-bump metallization (UBM) layers each being configured on an opposing end of the flip-chip bumps, andsaid N-metal contact (13) being sandwiched between said another N-InP layer (12) and the UBM layer on the proximal end.

16. A single-mode laser as claimed in claim 15, wherein said SOA (39) also comprises a P-InP substrate (7) and a P-metal contact (9) configured on said P-InP substrate (7), said P-InP substrate (7) providing mechanical stability to the flip-chip bumps.

17. A single-mode laser as claimed in claim 16, wherein said waveguide (40) also comprises an interlayer (26), configured adjacent said dielectric waveguide layer (24), refractive index of said dielectric waveguide layer (24) being higher than that of said interlayer (26).

18. A single-mode laser as claimed in claim 17, wherein: said SOA (39) also comprises a P-InP cladding (36) sandwiched between said active layer (11) and P-InP substrate (7); and said waveguide (40) also comprises a silicon substrate (27) configured adjacent said interlayer (26), a trace metal layer (15) being sandwiched between the UBM layer on the other end and said silicon substrate (27); such that heat generated from said active layer (11) can be dissipated through said silicon substrate (27) and / or said P-metal contact (9).

19. A single-mode laser as claimed in claim 18, characterised in that said dielectric waveguide layer (24) is thin-film lithium niobate (TFLN) or another dielectric having a refractive index similar to that of TFLN, and said silicon waveguide layer (25) is amorphous silicon or single-crystal silicon.

20. A single-mode laser as claimed in claim 19, wherein: said ridge (43) flares toward the facets such that optical confinement in said SOA (39) is reduced; and / orsaid ridge (43) is defined at an angle from the normal incidence, and / or an anti-reflection coating is deposited on the input and output facets of said SOA (39), such that reflection is minimised.

21. A distributed feedback (DFB) laser comprising a single-mode laser as claimed in claim 19, characterised in that: the dielectric waveguide layer (24) of said ridge (43) is defined by a plurality of grooves (32) configured at a generally right angle to the length of said ridge (43); or the two elongate depressions are defined by a plurality of grooves (30) configured at a generally right angle to the length of said ridge (43), depth of which extends into said interlayer (26).

22. A single-ended distributed feedback (DFB) laser comprising: a distributed feedback (DFB) laser as claimed in claim 21; and a reflectance loop mirror (43) connected to one end of said ridge (43), such that the laser is emitted from the other end of said ridge (43).

23. An external modulated laser comprising: a single-ended distributed feedback (DFB) laser (33) as claimed in claim 22; and a Mach-Zehnder interferometer (MZI) electro-optic modulator (EOM) (34) connected to the other end of said ridge (43).

24. A distributed Bragg reflector (DBR) laser comprising: a single-mode laser as claimed in claim 19; a reflectance loop mirror connected to one end of said ridge (43); and the waveguide (40) extending beyond the other end of said ridge (43) comprises:a strip of said dielectric waveguide layer (24); and an interlayer (26) defined by a plurality of grooves (37) configured on both sides, at a generally right angle to the length, of said strip.

25. A distributed Bragg reflector (DBR) laser as claimed in claim 24, also comprising a phase shifter configured between said reflectance loop mirror and single-mode laser, for applying an electric field across said waveguide (40) to adjust the phase of the optical mode transmitted therein.

26. A distributed Bragg reflector (DBR) laser as claimed in claim 25, also comprising a pair of electrodes (38) for applying an electric field across the plurality of grooves (37) to adjust the refractive index thereof.

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