Systems and methods for providing forward power during a bin

WO2025188677A8PCT designated stage Publication Date: 2025-10-02LAM RES CORP
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Patent Information

Application Number
PCT/US2025/018230
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-03-08
Filing Date
2025-03-03
Publication Date
2025-10-02

AI Technical Summary

Technical Problem

Challenges exist in processing semiconductor wafers in a desirable manner due to difficulties in controlling RF generators and impedance matching networks in plasma tools.

Method used

A system and method for providing forward power during a bin by controlling an HF RF generator based on a selected forward power waveform, using a mapping between delivered and forward power waveforms, to enhance process rate uniformity.

Benefits of technology

The method increases process rate uniformity by controlling the HF RF generator to apply the forward power waveform during each bin, resulting in improved semiconductor wafer processing.

✦ Generated by Eureka AI based on patent content.

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Abstract

A method for providing forward power during a bin is described. The method includes receiving a first waveform indicating a plurality of power levels of power to be delivered from a radio frequency (RF) power supply. The plurality of power levels of the first waveform vary with a progression of bins of a voltage waveform. The method further includes identifying, from a mapping between a first plurality of waveforms and a second plurality of waveforms, one of the waveforms of the second plurality corresponding to the first waveform. The one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins. The method includes controlling the RF power supply to supply power according to the plurality of power levels of the one of the waveforms of the second plurality with the progression of the bins.
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Description

SYSTEMS AND METHODS FOR PROVIDING FORWARD POWER DURING A BINFIELD

[0001] The embodiments described in the present disclosure relate to systems and methods for providing forward power during a bin.BACKGROUND

[0002] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

[0003] In a plasma tool, a radio frequency (RF) generator, an impedance matching network, and a plasma chamber are provided. The RF generator is coupled via the impedance matching network to the plasma chamber. A semiconductor wafer is placed within the plasma chamber for being processed. However, it is difficult to process the semiconductor wafer in a desirable manner.

[0004] It is in this context that embodiments described in the present disclosure arise.SUMMARY

[0005] Embodiments of the disclosure provide systems and methods for providing forward power during a bin. It should be appreciated that the present embodiments can be implemented in numerous ways, e.g., a process, an apparatus, a system, a piece of hardware, or a method on a computer-readable medium. Several embodiments are described below.

[0006] In an embodiment, a waveform indicating a shape of power to be delivered by a high frequency (HF) radio frequency (RF) generator is used to determine a shape of forward power values to be applied to a drive of the HF RF generator. The delivered power waveform is received. Based on the delivered power waveform and a mapping between multiple delivered power waveforms and multiple forward power waveforms of a high frequency, one of the forward power waveforms is selected.

[0007] In one embodiment, a method for providing forward power during a bin is described. The method includes receiving a first waveform indicating a plurality of power levels of power to be delivered from an RF power supply. The plurality of power levels of the first waveform vary with a progression of bins of a voltage waveform. The method further includes identifying, from a mapping between a first plurality of waveforms and a second plurality of waveforms, one of the waveforms of the second plurality corresponding to the first waveform.The first plurality of waveforms represents power to be delivered from the RF power supply and the second plurality of waveforms represents power to be supplied by the RF power supply. The one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins. The method includes controlling the RF power supply to supply power according to the plurality of power levels of the one of the waveforms of the second plurality with the progression of the bins.

[0008] In an embodiment, a controller for providing forward power during a bin is described. The controller includes a processor and a memory device. The memory device is coupled to the processor. The processor receives a first waveform indicating a plurality of power levels of power to be delivered from an RF power supply. The plurality of power levels of the first waveform vary with a progression of bins of a voltage waveform. The processor identifies, from a mapping between a first plurality of waveforms and a second plurality of waveforms, one of the waveforms of the second plurality corresponding to the first waveform. The first plurality of waveforms represents power to be delivered from the RF power supply and the second plurality of waveforms represents power to be supplied by the RF power supply. The one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins. The processor controls the RF power supply to supply power according to the plurality of power levels of the one of the waveforms of the second plurality with the progression of the bins.

[0009] In an embodiment, a plasma system for providing forward power during a bin is described. The plasma system includes a low frequency (LF) radio frequency (RF) generator that generates an LF RF signal. The plasma system includes an HF RF generator that generates an HF RF signal, and an impedance matching circuit coupled to the LF RF generator and the HF RF generator to receive the LF and HF RF signals. The impedance matching circuit generates a modified RF signal based on the LF and HF RF signals. The impedance matching circuit has an output. The plasma system includes a plasma chamber coupled to the output of the impedance matching circuit to receive the modified RF signal. The plasma system further includes a controller coupled to the LF and HF RF generators. The controller receives a first waveform indicating a plurality of power levels of power to be delivered from the HF RF generator. The plurality of power levels of the first waveform vary with a progression of bins of a voltage waveform. The controller identifies, from a mapping between a first plurality of waveforms and a second plurality of waveforms, one of the waveforms of the second plurality corresponding to the first waveform. The first plurality of waveforms represents power to be delivered from the HF RF generator and the second plurality of waveforms represents power to be supplied by the HF RF generator. The one of the waveforms of the second plurality includes a plurality of powerlevels that vary with the progression of the bins. The controller controls the HF RF generator to supply power according to the plurality of power levels of the one of the waveforms of the second plurality with the progression of the bins.

[0010] Some advantages of the herein described systems and methods include controlling an HF RF generator according to a forward power waveform of an HF RF signal to be generated by the HF RF generator. Forward power of the HF RF generator is controlled for each bin of a measurement voltage signal to apply the forward power waveform. The forward power waveform is identified based on a corresponding delivered power waveform. The delivered power waveform is generated to achieve an increased process rate uniformity compared to another delivered power waveform. By controlling the HF RF generator during each bin of the measurement voltage signal to apply the forward power waveform, the process rate uniformity is increased.

[0011] Some other aspects will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The embodiments are understood by reference to the following description taken in conjunction with the accompanying drawings.

[0013] Figure 1A is an embodiment of a memory device to illustrate a table having a mapping between multiple delivered power waveforms and forward power waveforms.

[0014] Figure IB is a diagram of an embodiment illustrating a correspondence between delivered power values of a delivered power waveform and forward power values of a forward power waveform.

[0015] Figure 2A is an embodiment of a graph to illustrate multiple bins during each cycle of a low frequency (LF) radio frequency (RF) signal generated by an LF RF generator.

[0016] Figure 2B is an embodiment of a graph to illustrate a waveform of high frequency (HF) delivered power that is output from an HF RF generator.

[0017] Figure 2C is an embodiment of a graph to illustrate another waveform of HF delivered power that is output from the HF RF generator.

[0018] Figure 3A is an embodiment of a graph to illustrate a plot of forward power that is provided by the HF RF generator.

[0019] Figure 3B is an embodiment of a graph to illustrate another plot of forward power that is provided by the HF RF generator.

[0020] Figure 4 is a diagram of an embodiment of a system to illustrate a plasma tool for applying the table to determine and provide forward power from the HF RF generator.

[0021] Figure 5 is a diagram of an embodiment of a system to illustrate details of the HF RF generator.DETAILED DESCRIPTION

[0022] The following embodiments describe systems and methods for providing forward power during a bin. It will be apparent that the present embodiments may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present embodiments.

[0023] Figure 1A is an embodiment of a memory device 100 to illustrate a table 102 having a mapping 104 between multiple delivered power waveforms and forward power waveforms. Examples of a memory device, as used herein, include a read-only memory or a random access memory, or a combination thereof. To illustrate, the memory device is a flash memory or a redundant array of independent disks or a combination thereof. The mapping 104 is a correspondence, such as a one-to-one link or a one-to-one relationship or a unique relationship, between a delivered power waveform and a forward power waveform. For example, the mapping 104 includes a correspondence 106 between a delivered power waveform DPW1 and a forward power waveform FPW 1 , a correspondence finally between a delivered power waveform DPW2 and a forward power waveform FPW2, a correspondence 110 between a delivered power waveform DPW(n-l) and a forward power waveform FPW(n-l), and a correspondence 112 between a delivered power waveform DPWn and a forward power waveform FPWn, where n is a positive integer.

[0024] Figure IB is a diagram of an embodiment illustrating a correspondence 150 between delivered power values of a delivered power waveform and forward power values of a forward power waveform. The correspondence 150 is an example of the correspondence 112 (Figure 1A). The correspondence 150 includes a unique relationship 152 between a delivered power value DPbinln of the delivered power waveform DPWn during a bin 1 and a forward power value FPbinln of the forward power waveform FPWn during the bin 1, a unique relationship 154 between a delivered power value DPbin2n of the delivered power waveform DPWn during a bin 2 and a forward power value FPbin2n of the forward power waveform FPWn during the bin 2, and a unique relationship 156 between a delivered power value DPbinmn of the delivered power waveform DPWn during a bin m and a forward power value FPbinmn of the forward power waveform FPWn during the bin m, where m is a positive integer.

[0025] In an embodiment, the terms power value and power level are used herein interchangeably. For example, the delivered power value DPbinmn is a delivered power level DPbinmn and the forward power value FPbinmn is a forward power level FPbinmn.

[0026] Figure 2A is an embodiment of a graph 200 to illustrate multiple bins during each cycle of a low frequency (LF) radio frequency (RF) signal generated by an LF RF generator. An example of the low frequency includes a frequency of operation of 100 kilohertz (kHz) or 400 kHz or 2 megahertz (MHz). The low frequency varies with time. For example, the LF RF generator, having the frequency of operation of 100kHz, operates at frequency values between 98 kHz and 103 kHz. The graph 200 plots an LF voltage of the LF RF signal on a y- axis and time t on an x-axis. The x-axis includes multiple times tO, tl , t2, t3, t4, t5, t6, t7, t8, t9, HO, til, tl2, tl 3, tl4, tl5, and so on. A time interval between any two consecutive times plotted on the x-axis of the graph 200 is equal. For example, a time interval between the times tO and tl is equal to a time interval between the times tl and t2.

[0027] The graph 200 includes a plot 202 of the LF voltage of the LF RF signal. A frequency of the plot 202 is equal to a frequency of a measurement voltage signal that is generated by a voltage sensor coupled to an output of an impedance matching circuit, described below. The measurement voltage signal and the voltage sensor are further described below.

[0028] The LF voltage has multiple cycles p, (p+1), and so on, where p is a positive integer. For example, the cycle p starts at the time tO and ends at the time tlO, and the cycle (p+1) starts at the time tlO and ends at a time t20 (not shown). The cycles p, (p+1), and so on also represent cycles of the measurement voltage signal generated by the voltage sensor coupled to the output of the impedance matching circuit. Moreover, the cycles represent cycles of a clock signal, such as a digital pulsed signal, that is generated by a processor of a host computer, described below.

[0029] The processor divides each cycle of the LF voltage into a predetermined number of bins, such as 10 or 20 bins or 30 bins or 40 bins. For example, the cycle p is divided into 10 bins, which include a bin 1, a bin 2, a bin 3, a bin 4, a bin 5, a bin 6, a bin 7, a bin 8, a bin 9, and a bin 10. Also, the cycle (p+1) is divided into the predetermined number of bins. Each of the predetermined number of bins, such as the bin 1 or 2 or 8, occurs for a first time within the cycle p and occurs again for a second time within the cycle (p+1).

[0030] A bin, as described herein, is a time interval that occurs during each cycle of the LF voltage. For example, the bin 1 is the time interval between the times tO and tl, the bin 2 is the time interval between the times tl and t2, the bin 3 is the time interval between the times t2 and t3, the bin 4 is the time interval between the times t3 and t4, the bin 5 is the time interval between the times t4 and t5 , the bin 6 is the time interval between the times t5 and t6, the bin 7 is the time interval between the times t6 and t7, the bin 8 is the time interval between the times t7 and t8, the bin 9 is the time interval between the times t8 and t9, and the bin 10 is the time interval between the times t9 and tlO. Also, a time interval of a bin is equal to a time interval ofanother bin. For example, a time interval between the times tl and t2 of the bin 1 is equal to a time interval between the times t2 and t3 of the bin 2.

[0031] Figure 2B is an embodiment of a graph 220 to illustrate a waveform of high frequency (HF) delivered power that is output from an HF RF generator. An example of the high frequency includes a frequency of operation of 60 MHz. To illustrate, the HF RF generator operates at frequency values ranging from and including 57 MHz to 63 MHz. Another example of the high frequency is a frequency greater than the low frequency. To illustrate, the high frequency is a frequency of operation of 27 MHz. To further illustrate, the HF RF generator operates at frequency values ranging from and including 25 MHz to 29 MHz.

[0032] The graph 220 includes a plot 222 of power delivered from the HF RF generator. The power delivered from the HF RF generator is plotted, within the plot 222, on a y-axis and the time t is plotted on an x-axis. For example, delivered power values zero, Pl, and P2 are plotted on the y-axis of the graph 220. The power value Pl is greater than the power value 0 and the power value P2 is greater than the power value Pl. The x-axis of the graph 220 is the same as the x-axis of the graph 200 (Figure 2A). The plot 222 is an example of a waveform of the HF delivered power. For example, the plot 222 is an example of the delivered power waveform DPW(n-l) (Figure 1A).

[0033] As an example, power delivered from the HF RF generator is a difference between forward power output from the HF RF generator and power reflected towards the HF RF generator. The forward power is power supplied by the HF RF generator via the impedance matching circuit to a plasma chamber and the power reflected is reflected from the plasma chamber via the impedance matching circuit towards the HF generator. The plasma chamber is described below.

[0034] It should be noted that as shown in the plot 222, the delivered power output from the HF RF generator varies with a progression of the predetermined number of bins during each cycle, such as the cycle p or (p+1). For example, the delivered power output from the HF RF generator is greater than zero during the time period of the bin 7, is less than zero during the time period of the bin 8, and is greater than zero during the time period of the bin 9. The bin 8 occurs consecutive to an occurrence of the bin 7 and the bin 9 occurs consecutive to the occurrence of the bin 8 for the bins 7 through 9 to occur in progression. The delivered power less than zero is achieved when the forward power provided by the HF RF generator is equal to zero. For example, the HF RF generator is controlled to provide forward power of zero during the bin 8 of each cycle of the LF voltage of the LF RF signal. When the forward power is zero, power is reflected towards the HF RF generator, and the delivered power output from the HF RF generator is less than zero.

[0035] In an embodiment, a power value of the plot 222 is less than zero during one or more bins of the predetermined number. For example, the plot 222 has a power value less than zero during the bin 7 or bin 9 in addition to having the power value of less than zero during the bin 8.

[0036] Figure 2C is an embodiment of a graph 230 to illustrate another waveform of HF delivered power that is output from the HF RF generator. The graph 230 includes a plot 232 of power delivered from the HF RF generator. The power delivered from the HF RF generator is plotted, within the plot 232, on a y-axis and the time t is plotted on an x-axis. For example, the delivered power values zero, Pl, and P2 are plotted on the y-axis of the graph 230. The x-axis of the graph 230 is the same as the x-axis of the graph 200 (Figure 2A) and the y-axis of the graph 230 is the same as the y-axis of the graph 220 (Figure 2B). The plot 232 is an example of another waveform of the HF delivered power. For example, the plot 232 is an example of the delivered power waveform DPWn (Figure 1A).

[0037] It should be noted that as shown in the plot 232, the delivered power output from the HF RF generator is greater than zero during the time period of the bin 8. The delivered power greater than zero is achieved when the forward power provided by the HF RF generator is greater than zero. For example, the HF RF generator is controlled to provide forward power greater than zero during the bin 8 of each cycle of the LF voltage of the LF RF signal. In the example, during the bin 8, when the forward power output from the HF RF generator is greater than zero, although power is reflected towards the HF RF generator, the delivered power output from the HF RF generator is greater than zero.

[0038] It should also be noted that as shown in the plot 232, the delivered power output from the HF RF generator varies with a progression of the predetermined number of bins during each cycle, such as the cycle p or (p+1). For example, the delivered power output from the HF RF generator has a power value greater than zero and less than the power value P2 during the time period of the bin 8, has a power value between the power values Pl and P2 during the time period of the bin 9, and has the power value P2 during the time period of the bin 10. The bin 10 occurs consecutive to an occurrence of the bin 9 for the bins 9 and 10 to occur in progression.

[0039] It should be noted that an amount of delivered power that is output from the HF RF generator according to the plot 232 during each cycle of the voltage measurement signal is greater than an amount of delivered power output from the HF RF generator according to the plot 222 (Figure 2B) during the cycle. For example, an amount of delivered power that is output from the HF RF generator according to the plot 232 during one or more of the bins, such as the bin 8, of each cycle of the voltage measurement signal is greater than an amount of delivered power output from the HF RF generator during the one or more of the bins according to the plot222 during the cycle. As another example, a statistical value, such as a mean or median, of delivered power output from the HF RF generator according to the plot 232 during each cycle of the voltage measurement signal is greater than a statistical value, such as an average or median, of amount of delivered power output from the HF RF generator according to the plot 222 during the cycle.

[0040] Figure 3A is an embodiment of a graph 300 to illustrate a plot 302 of forward power that is provided by the HF RF generator. The plot 302 is an example of a waveform of the forward power. For example, the plot 302 is an example of the forward power waveform FPW(n-l) (Figure 1A).

[0041] The graph 300 plots the forward power on a y-axis and the time t on an axis. For example, forward power values zero, Pa, and Pb are plotted on the y-axis of the graph 300. The power value Pa is greater than the power value 0 and the power value Pb is greater than the power value Pa. The x-axis of the graph 300 is the same as the x-axis of the graph 200 (Figure 2A).

[0042] It should be noted that as shown in the plot 302, the forward power output from the HF RF generator varies with a progression of the predetermined number of bins during each cycle, such as the cycle p or (p+1). For example, as shown in the plot 302, during the bin 8, the forward power output from the HF RF generator is controlled by the processor to be zero to achieve the delivered power less than zero during the bin 8, as illustrated in the graph 220 (Figure 2B). Moreover, as shown in the plot 302, during the bin 7, the forward power output from the HF RF generator is controlled by the processor to transition from the value Pb to the value zero. Also, during the bins 8 and 9, the forward power output from the HF RF generator is controlled by the processor to transition from zero to the value Pb.

[0043] In an embodiment, a power value of the plot 302 is equal to zero during one or more bins of the predetermined number. For example, the plot 302 has a power value of zero during the bin 7 or bin 9 in addition to having the power value of zero during the bin 8.

[0044] Figure 3B is an embodiment of a graph 310 to illustrate another plot 312 of forward power that is provided by the HF RF generator. The plot 312 is an example of a waveform of the forward power. For example, the plot 312 is an example of the forward power waveform FPWn (Figure 1A).

[0045] The graph 310 plots the forward power on a y-axis and the time t on an axis. For example, the forward power values zero, Pa, and Pb are plotted on the y-axis of the graph 220. The x-axis of the graph 310 is the same as the x-axis of the graph 200 (Figure 2A). As shown in the plot 312, during the bin 8, the forward power output from the HF RF generator is controlledby the processor to be greater than zero to achieve the delivered power greater than zero during the bin 8, as illustrated in the graph 230 (Figure 2C).

[0046] It should be noted that as shown in the plot 312, the forward power output from the HF RF generator varies with a progression of the predetermined number of bins during each cycle, such as the cycle p or (p+1). For example, as shown in the plot 312, during the bin 7, the forward power output from the HF RF generator is controlled by the processor have a value between zero and Pa. Moreover, as shown in the plot 312, during the bin 8, the forward power output from the HF RF generator is controlled by the processor to transition from the value between zero and Pa to a value between Pa and Pb.

[0047] Figure 4 is a diagram of an embodiment of a system 400 to illustrate a plasma tool for applying the table 102 (Figure 1) to determine and provide forward power from an HF RF generator 404. The system 400 includes an LF RF generator 402, the HF RF generator 404, a match 406, a plasma chamber 408, a voltage sensor 410, and a host computer 412.

[0048] An example of the host computer 412 includes a desktop computer or a laptop computer or a smart phone or a tablet or a controller. An example of the LF RF generator 402 is an RF generator having the low frequency of operation. An example of the HF RF generator 404 is an RF generator having the high frequency of operation.

[0049] Examples of the match 406 include the impedance matching circuit, which is sometimes referred to herein as an impedance match or an impedance matching network. To illustrate, the match 406 includes a network of capacitors and inductors. The capacitors and inductors are sometimes referred to herein as network components. An example of the plasma chamber 408 includes a capacitively coupled plasma (CCP) chamber.

[0050] The host computer 412 includes a processor 414 and a memory device 416. Examples of the processor 414 include a central processing unit (CPU), an application specific integrated circuit (ASIC), and a programmable logic device (PLD). Examples of the memory device 416 include a read-only memory and a random access memory.

[0051] The plasma chamber 408 includes an electrostatic chuck 418 and an upper electrode 420. The upper electrode 420 is situated above the electrostatic chuck 418 to face the electrostatic chuck 418 and form a gap 422 between the electrostatic chuck 418 and the upper electrode 420. A substrate S, such as a semiconductor wafer on which one or more integrated circuits are to be formed, is placed on a top surface of the electrostatic chuck 418 for being processed.

[0052] An input of the LF RF generator 402 is coupled to the processor 414 via a transfer cable 424 and an input of the HF RF generator 404 is coupled to the processor 414 via a transfer cable 426. An example of a transfer cable, as used herein, includes a cable for paralleltransfer of data, or a cable for serial transfer of data, or a universal serial bus (USB) cable. Also, an output of the LF RF generator 402 is coupled to an input 428 of the match 406 via an RF cable 430 and an output of the HF generator 404 is coupled to another input 432 of the match 406 via an RF cable 434. The match 406 has an output 436 that is coupled to the voltage sensor 410 and that is coupled via an RF transmission line 438 to a lower electrode embedded within the electrostatic chuck 418.

[0053] The plasma chamber 408 further includes a window 440, another window 442, and another window 444. The window 440 is associated with, such as coupled to, a left wall 446 of the plasma chamber 408, and the windows 442 and 444 are associated with, such as coupled to, a right wall 448 of the plasma chamber 408. The right wall 448 faces the left wall 446 and is across from the left wall 446. The system 400 further includes processing rate measurement devices (PRMDs) 450, 452, and 454. An example of a processing rate measurement device that includes an etch rate measurement device (ERMD). To illustrate, an ERMD includes a spectrophotometer that monitors the plasma within the plasma chamber 408 to measure intensity of radiation emitted by the plasma generated within the plasma chamber 408. As an example, a processing rate, as used herein, is an etch rate or a deposition rate or a combination thereof.

[0054] The PRMD 450 is associated with the window 440, the PRMD 452 is associated with the window 442, and the PRMD 454 is associated with the window 444. For example, the PRMD 450 is attached to the window 440, the PRMD 452 is attached to the window 442, and the PRMD 454 is attached to the window 444. As another example, the PRMD 450 is placed proximate to the window 444, the PRMD 452 is placed proximate to the window 442, and the PRMD 454 is placed proximate to the window 444. As an example, each window 440, 442, and 444 is made of a transparent material, such as glass, that allows light emitted by the plasma to pass through. In various embodiments, each window 440, 442, and 444 is a translucent window.

[0055] The PRMD 450 is coupled to the processor 414 via a transfer cable 456 and has a line of sight via the window 440 into the gap 422 within the plasma chamber 408. The line of sight of the PRMD 450 is directed into a space in which the plasma is generated within the plasma chamber 408. For example, the PRMD 450 includes a spectrophotometer that monitors plasma within the plasma chamber 408 to measure intensity of radiation emitted by the plasma via the window 440. The intensity of radiation emitted by the plasma via the window 440 is directly proportional to a processing rate at a left edge region 458 of the substrate S. As an example, the line of sight of the PRMD 450 is directed to the left edge region 458 of the substrate S.

[0056] Similarly, the PRMD 452 is coupled to the processor 414 via a transfer cable 460 and has a line of sight via the window 442 into the gap 422. The line of sight of the PRMD452 is directed into the space in which the plasma is generated within the plasma chamber 408. For example, the PRMD 452 includes a spectrophotometer that monitors plasma within the plasma chamber 408 to measure intensity of radiation emitted by the plasma via the window 442. The intensity of radiation emitted by the plasma via the window 442 is directly proportional to a processing rate at a central region 462 of the substrate S that is processed by the plasma within the plasma chamber 408. As an example, the line of sight of the PRMD 452 is directed to the central region 462 of the substrate S.

[0057] Also, the PRMD 454 is coupled to the processor 414 via a transfer cable 464 and has a line of sight via the window 444 into the gap 422. The line of sight of the PRMD 454 is directed into the space in which the plasma is generated within the plasma chamber 408. For example, the PRMD 454 includes a spectrophotometer that monitors plasma within the plasma chamber 408 to measure intensity of radiation emitted by the plasma via the window 444. The intensity of radiation emitted by the plasma via the window 444 is directly proportional to a processing rate at a right edge region 466 of the substrate S that is processed by the plasma within the plasma chamber 408. As an example, the line of sight of the PRMD 454 is directed to the right edge region 466 of the substrate S. The central region 462 is surrounded by the edge regions 458 and 466. The voltage sensor 410 is coupled to the processor 414 via a transfer cable 468.

[0058] The processor 414 receives a recipe set 470 from a user via an input device that is coupled to the processor 414. Examples of input device include a keyboard, a keypad, a mouse, a stylus, a touchscreen, and a combination thereof. The recipe set 470 includes frequency and power information for the HF RF generator 404. For example, the frequency and power information of the recipe set 470 includes the delivered power waveform DWP(n-l) and the frequency of operation of the HF RF generator 404. To further illustrate, the recipe set 470 includes that the delivered power value DPbinl(n-l) corresponds to the bin 1, and so on until the delivered power value DPbinm(n-l) corresponds to the bin m. The recipe set 470 includes the predetermined number of bins.

[0059] Upon receiving the recipe set 470, the processor 414 accesses, such as reads, the table 102 (Figure 1A) from the memory device 416 to identify the forward power waveform FPW(n-l) based on the correspondence 110 (Figure 1A), and generates a recipe set 472. The recipe set 472 includes the forward power waveform FPW(n-l) and the frequency of operation of the HF RF generator 404. The recipe set 472 also includes the predetermined number of bins. For example, the recipe set 472 includes a forward power value of the forward power waveform FPW(n-l) for a respective one of the predetermined number of bins. To illustrate, the recipe set 472 includes a first primary forward power value to be applied during the bin (m-1) and a secondprimary forward power value to be applied during the bin m. The processor 414 sends the recipe set 472 via the transfer cable 426 to the input of the HF RF generator 404.

[0060] Moreover, the processor 414 sends a recipe set 474 via the transfer cable 424 to the input of the LF generator 402. The recipe set 474 includes frequency and power information for the LF RF generator 402.

[0061] Upon receiving a trigger signal from the processor 414 via the transfer cable 426, the HF RF generator 404 generates an HF RF signal 476 having forward power values of the forward power waveform FPW(n-l) for the predetermined number of bins according to the recipe set 474. Also, the HF RF signal 476 has the frequency values of the high frequency of operation. Also, upon receiving the trigger signal from the processor 414 via the transfer cable 424, the LF RF generator 402 generates an LF RF signal 478 having the frequency values of the low frequency of operation.

[0062] The HF RF generator 404 supplies the HF RF signal 476 via the RF cable 434 to the input 432. Similarly, the LF RF generator 402 supplies the LF RF signal 478 via the RF cable 430 to the input 428. Upon receiving the RF signals 476 and 478, the match 406 matches an impedance of a load coupled to the output 436 with an impedance of a source coupled to the inputs 428 and 432 to generate modified output signals and combines the modified output signals to generate a modified RF signal 480 at the output 436. An example of the load includes the RF transmission line 438 and the plasma chamber 408, and an example of the source includes the RF generators 402 and 404 and the RF cables 430 and 434.

[0063] The modified RF signal 480 is sent from the output 436 via the RF transmission line 438 to the lower electrode. When one or more process gases, such as an oxygen-containing gas or a halogen-containing gas or a phosphorus-containing gas or a combination thereof, are supplied to the gap 422 with the modified RF signal 480, the substrate S is processed, at a processing rate, within the plasma chamber 408. For example, one or more materials are deposited on the substrate S or the substrate S is etched or the substrate S is cleaned or a combination thereof to process the substrate S.

[0064] When the modified RF signal 480 is generated, the voltage sensor 410 senses a voltage of the modified RF signal 480 at the output 436 to generate a measurement voltage signal 482, and sends the measurement voltage signal 482 via the transfer cable 468 to the processor 414. As an example, the measurement voltage signal 482 has a frequency that is substantially similar to a frequency of the LF RF signal 478 generated by the LF RF generator 402. For example, the frequency of the measurement voltage signal 482 is the same as the frequency of the LF RF signal 478. To illustrate, the frequency of the measurement voltage signal 482 is equal to the frequency of the LF RF signal 478. In the illustration, the frequency ofthe LF RF signal 478 is substantially the same as, such as equal to, the low frequency of operation. To further illustrate, the frequency of the LF RF signal 478 has the frequency values of the low frequency of operation. As another illustration, the frequency of the measurement voltage signal 482 is equal to the frequency of the LF RF signal 478 slightly modified by the frequency of the HF RF signal 476.

[0065] Upon receiving a measurement voltage signal, such as the measurement voltage signal 482, from the voltage sensor 410, the processor 414 divides each cycle of the measurement voltage signal 482 into multiple time intervals, such as multiple time periods, and each of the time intervals is sometimes referred to herein as a bin.

[0066] Moreover, when the modified RF signal 480 is generated, the PRMD 450 generates intensity signals 484A and 484B based on the line of sight towards the left edge region 458 of the substrate S, and sends the intensity signals 484A and 484B via the transfer cable 456 to the processor 414. Similarly, during a time period in which the modified RF signal 480 is generated, the PRMD 452 generates intensity signals 484C and 484D based on the line of sight towards the central region 462 of the substrate S, and sends the intensity signals 484C and 484D via the transfer cable 460 to the processor 414. Also, during a time interval in which the modified RF signal 480 is generated, the PRMD 454 generates intensity signals 484E and 484F based on the line of sight towards the right edge region 466 of the substrate S, and sends the intensity signals 484E and 484F via the transfer cable 464 to the processor 414.

[0067] During a time period in which the RF signal 476 is being supplied by the HF RF generator 404, the processor 414 receives the intensity signals 484A through 484F and determines a first process rate uniformity from the intensity signals 484A through 484F. For example, the processor 414 receives the intensity signal 484A at a first primary time from the PRMD 450 and the intensity signal 484B at a second primary time from the PRMD 450 and calculates a processing rate at the left edge region 458 from the intensity signals 484A and 484B and the first and second primary times. The second primary time occurs after the first primary time. To illustrate, the processor 414 calculates the processing rate at the left edge region 458 to be a ratio of a first primary difference and a second primary difference. The processor 414 calculates the first primary difference to be a difference between an intensity value indicated within the intensity signal 484B and an intensity value indicated within the intensity signal 484B. Also, the processor 414 calculates the second primary difference to be a difference between the second and first primary times. In the illustration, the second primary time occurs after the first primary time.

[0068] Continuing with the example, the processor 414 receives the intensity signal 484C at the first primary time from the PRMD 452 and the intensity signal 484D at the secondprimary time from the PRMD 452 and calculates a processing rate at the central region 462 from the intensity signals 484C and 484D and the first and second primary times. To illustrate, the processor 414 calculates the processing rate at the central region 462 to be a ratio of a third primary difference and the second primary difference. The processor 414 calculates the third primary difference to be a difference between an intensity value indicated within the intensity signal 484D and an intensity value indicated within the intensity signal 484C.

[0069] Moreover, in the example, the processor 414 receives the intensity signal 484E at the first primary time from the PRMD 454 and the intensity signal 484F at the second primary time from the PRMD 454 and calculates a processing rate at the right edge region 466 from the intensity signals 484E and 484F and the first and second primary times. To illustrate, the processor 414 calculates the processing rate at the right edge region 466 to be a ratio of a fourth primary difference and the second primary difference. The processor 414 calculates the fourth primary difference to be a difference between an intensity value indicated within the intensity signal 484F and an intensity value indicated within the intensity signal 484E.

[0070] In the example, the processor 414 determines the first process rate uniformity from the processing rates at the left edge region 458, the central region 462, and the right edge region 466. To illustrate, the processor 414 determines that a combination of the processing rate at the left edge region 458, the processing rate at the central region 462, and the processing rate at the right edge region 466 is the first process rate uniformity.

[0071] The processor 414 receives another recipe set 401 from the user via the input device. For example, the recipe set 401 is received before or after receiving the recipe set 470. The recipe set 401 includes frequency and power information for the HF RF generator 404. For example, the frequency and power information of the recipe set 401 includes the delivered power waveform DWPn and the frequency of operation of the HF RF generator 404. To illustrate, the recipe set 401 includes a delivered power value of the delivered power waveform DWPn for a respective one of the predetermined number of bins. To further illustrate, the recipe set 401 includes that the delivered power value DPbinln corresponds to the bin 1, and so on until the delivered power value DPbinmn corresponds to the bin m. The recipe set 401 includes the predetermined number of bins.

[0072] Upon receiving the recipe set 401, the processor 414 accesses the table 102 (Figure 1A) from the memory device 416 to identify the forward power waveform FPWn based on the correspondence 112 (Figure 1A), and generates a recipe set 403. The recipe set 403 includes the forward power waveform FPWn and the frequency of operation of the HF RF generator 404. The recipe set 403 also includes the predetermined number of bins. For example, the recipe set 403 includes a forward power value of the forward power waveform FPWn for arespective one of the predetermined number of bins. To illustrate, the recipe set 403 includes a first secondary forward power value to be applied during the bin (m-1) and a second secondary forward power value to be applied during the bin m. The processor 414 sends the recipe set 403 via the transfer cable 426 to the input of the HF RF generator 404.

[0073] Upon receiving the trigger signal from the processor 414 via the transfer cable 426, the HF RF generator 404 generates an HF RF signal 405 having forward power values of the forward power waveform FPWn for the predetermined number of bins according to the recipe set 403. Also, the HF RF signal 405 has the frequency values of the high frequency of operation. Also, the LF RF generator 402 continues to generate the LF RF signal 478.

[0074] The HF RF generator 404 supplies the HF RF signal 405 via the RF cable 434 to the input 432. Upon receiving the RF signals 405 and 478, the match 406 matches an impedance of the load coupled with an impedance of the source to generate modified output signals and combines the modified output signals to generate a modified RF signal 407 at the output 436. The modified RF signal 407 is sent from the output 436 via the RF transmission line 438 to the lower electrode. When the one or more process gases are supplied to the gap 422 with the modified RF signal 407, the substrate S is processed, at a processing rate, within the plasma chamber 408.

[0075] When the modified RF signal 407 is generated, the voltage sensor 410 senses a voltage of the modified RF signal 407 at the output 436 to generate a measurement voltage signal 409, and sends the measurement voltage signal 409 via the transfer cable 468 to the processor 414. As an example, the measurement voltage signal 409 has a frequency that is substantially similar to, such as equal to, a frequency of the LF RF signal 478 generated by the LF RF generator 402. As another example, the frequency of the measurement voltage signal 409 is equal to the frequency of the LF RF signal 478 slightly modified by the frequency of the HF RF signal 405.

[0076] Moreover, when the modified RF signal 407 is generated, the PRMD 450 generates a first intensity signal and a second intensity signal based on the line of sight towards the left edge region 458 of the substrate S, and sends the first and second intensity signals via the transfer cable 456 to the processor 414. Similarly, during a time interval in which the modified RF signal 407 is generated, the PRMD 452 generates a third intensity signal and a fourth intensity signal based on the line of sight towards the central region 462 of the substrate S, and sends the third and fourth intensity signals via the transfer cable 460 to the processor 414. Also, during a time period in which the modified RF signal 407 is generated, the PRMD 454 generates a fourth intensity signal and a fifth intensity signal based on the line of sight towards the rightedge region 466 of the substrate S, and sends the fourth and fifth intensity signals via the transfer cable 464 to the processor 414.

[0077] During a time period in which the RF signal 405 is being supplied by the HF RF generator 404, the processor 414 receives the first through sixth intensity signals and determines a second process rate uniformity from the first through sixth intensity signals. For example, the processor 414 receives the first intensity signal at a first secondary time from the PRMD 450 and the second intensity signal at a second secondary time from the PRMD 450 and calculates a processing rate at the left edge region 458 from the first and second intensity signals and the first and second secondary times. The second secondary time occurs after the first secondary time. To illustrate, the processor 414 calculates the processing rate at the left edge region 458 to be a ratio of a first secondary difference and a second secondary difference. The processor 414 calculates the first secondary difference to be a difference between an intensity value indicated within the second intensity signal and an intensity value indicated within the first intensity signal. Also, the processor 414 calculates the second secondary difference to be a difference between the second and first secondary times.

[0078] Continuing with the example, the processor 414 receives the third intensity signal at the first secondary time from the PRMD 452 and the fourth intensity signal at the second secondary time from the PRMD 452 and calculates a processing rate at the central region 462 from the third and fourth intensity signals and the first and second secondary times. To illustrate, the processor 414 calculates the processing rate at the central region 462 to be a ratio of a third secondary difference and the second secondary difference. The processor 414 calculates the third secondary difference to be a difference between an intensity value indicated within the fourth intensity signal and an intensity value indicated within the third intensity signal.

[0079] Moreover, in the example, the processor 414 receives the fifth intensity signal at the first secondary time from the PRMD 454 and the sixth intensity signal at the second secondary time from the PRMD 454 and calculates a processing rate at the right edge region 466 from the fifth and sixth intensity signals and the first and second secondary times. To illustrate, the processor 414 calculates the processing rate at the right edge region 466 to be a ratio of a fourth secondary difference and the second secondary difference. The processor 414 calculates the fourth secondary difference to be a difference between an intensity value indicated within the sixth intensity signal and an intensity value indicated within the fifth intensity signal.

[0080] In the example, the processor 414 determines the second process rate uniformity from the processing rates at the left edge region 458, the central region 462, and the right edge region 466. To illustrate, the processor 414 determines that a combination of the processing rateat the left edge region 458, the processing rate at the central region 462, and the processing rate at the right edge region 466 is the second process rate uniformity.

[0081] The processor 414 further determines whether the second process rate uniformity is greater than the first process rate uniformity. For example, the processor 414 determines whether a first difference between the processing rate at the left edge region 458 used to calculate the second process rate uniformity and the processing rate at the central region 462 used to calculate the second process rate uniformity is less than a second difference. The second difference is between the processing rate at the left edge region 458 used to calculate the first process rate uniformity and the processing rate at the central region 462 used to calculate the first process rate uniformity. The first and second differences are calculated by the processor 414. The processor 414 further determines whether a third difference between the processing rate at the right edge region 466 used to calculate the second process rate uniformity and the processing rate at the central region 462 used to calculate the second process rate uniformity is less than a fourth difference. The fourth difference is between the processing rate at the right edge region 466 used to calculate the first process rate uniformity and the processing rate at the central region 462 used to calculate the first process rate uniformity. The third and fourth differences are calculated by the processor 414. Upon determining that the first difference is less than the second difference and the third difference is less than the fourth difference, the processor 414 determines that the second process rate uniformity is greater than the first process rate uniformity.

[0082] In response to determining that the second process rate uniformity is greater than the first processing or uniformity, the processor 414 determines to control the HF RF generator 404 based on the recipe set 403 instead of the recipe set 472. The HF RF generator 404 is controlled based on the recipe set 403 to apply the recipe set 403. For example, to process the substrate S, the processor 414 sends the recipe set 403 to the HF RF generator 404 for generating the HF RF signal 405. As another example, when the substrate S is replaced with the other substrate in the plasma chamber 408, the processor 414 sends the recipe set 403 to the HF RF generator 404 for generating the RF signal 405. The RF signal 405 is supplied to process the other substrate.

[0083] It should be noted that upon determining that the second process rate uniformity is greater than the first process rate uniformity, the processor 414 determines to control the HF RF generator 404 based on the recipe set 403 independent of whether a first amount of delivered power associated with the delivered power waveform DPWn is less than a second amount of delivered power associated with the delivered power waveform DPW(n-l). For example, the processor 414 identifies, from the delivered power waveforms DPWn and DPW(n-l), that adelivered power value, during the bin m, of the delivered power waveform DPWn is less than a delivered power value, during the bin m, of the delivered power waveform DPW(n-l). Upon identifying so, the processor 414 determines to control the HF RF generator 404 based on the recipe set 403. As another example, the processor 414 identifies, from the delivered power waveforms DPWn and DPW(n-l), that delivered power values, during one or more of the predetermined number of bins, of the delivered power waveform DPWn is less than delivered power values, during corresponding one or more of the predetermined number of bins, of the delivered power waveform DPW(n-l). To illustrate, the processor 414 identifies, from the delivered power waveforms DPWn and DPW(n-l), that the delivered power value, during the bin m, of the delivered power waveform DPWn is less than the delivered power value, during the bin m, of the delivered power waveform DPW(n-l) and that the delivered power value, during the bin (m-1), of the delivered power waveform DPWn is less than the delivered power value, during the bin (m-1), of the delivered power waveform DPW(n-l). Upon identifying so, the processor 414 determines to control the HF RF generator 404 based on the recipe set 403. As another example, the processor 414 identifies, from the delivered power waveforms DPWn and DPW(n-l), that a first statistical value of delivered power generated from the delivered power waveform DPWn is less than a second statistical value of delivered power value generated from the delivered power waveform DPW(n-l). Upon determining so, the processor 414 determines to control the HF RF generator 404 based on the recipe set 403. The processor 414 calculates the first statistical value, such as an average or median, from delivered power values of the predetermined number of bins of the delivered power waveform DPW(n-l). Also, the processor 414 calculates the second statistical value, such as an average or median, from delivered power values of the predetermined number of bins of the delivered power waveform DPWn. The processor 414 compares the first statistical value with the second statistical value to determine that the second statistical value is less than the first statistical value.

[0084] In an embodiment, instead of substrate S, a dummy substrate, such as a substrate on which an integrated circuit is not to be formed or a substrate made from glass, is used.

[0085] In an embodiment, the processor 414 is coupled to the RF generators 402 and 404 via a single transfer cable.

[0086] In one embodiment, the voltage sensor 410 is coupled at any point on the RF transmission line 438.

[0087] In an embodiment, the terms recipe set and recipe set are used herein interchangeably.

[0088] In one embodiment, independent of whether the second process rate uniformity is greater than the first process rate uniformity, the processor 414 determines to control the HFRF generator 404 based on the recipe set 472 instead of the recipe set 403 to achieve a higher amount of delivered power during each cycle of the voltage measurement signal 482. The HF RF generator 404 is controlled based on the recipe set 472 to apply the recipe set 472. For example, to process the substrate S, the processor 414 sends the recipe set 472 to the HF RF generator 404 for generating the HF RF signal 476. As another example, when the substrate S is replaced with the other substrate in the plasma chamber 408, the processor 414 sends the recipe set 472 to the HF RF generator 404 for generating the HF RF signal 476. The HF RF signal 476 is supplied to process the other substrate.

[0089] In an embodiment, the terms process rate and processing rate are used herein interchangeably.

[0090] Figure 5 is a diagram of an embodiment of a system 500 to illustrate details of an HF RF generator 502, which is an example of the HF RF generator 404 (Figure 4). The HF RF generator 502 includes a digital signal processor (DSP) 504, a driver and amplifier circuit 506, and forward power controllers PWRbinl, PWRbin2, and so on until a forward power controller PWRbinm. As an example, a controller includes a processor and a memory device. The processor of the controller is coupled to the memory device of the controller. The driver and amplifier circuit 506 includes a driver circuit and an amplifier. An example of the driver circuit includes one or more transistors that are coupled to each other. The HF RF generator 502 further includes a power supply 508, such as an RF oscillator.

[0091] The processor 414 is coupled via the transfer cable 426 to the DSP 504. The DSP 504 is coupled to the power controllers PWRbinl, PWRbin2, and PWRbinm. The power controllers PWRbinl, PWRbin2, and PWRbinm are coupled to the driver and amplifier circuit 506. The driver and amplifier circuit 506 is coupled to the power supply 508. The power supply 508 is coupled to the RF cable 434.

[0092] The processor 414 receives a recipe set 510 from the user via the input device. An example of the recipe set 510 is the recipe set 470 (Figure 4). Another example of the recipe set 510 is the recipe set 401 (Figure 4). Upon receiving the recipe set 510, the processor 414 parses the recipe set 401 to identify whether the recipe set 510 includes the delivered power waveform DPW(n-l) or DPWn. For example, the processor 414, identifies from the recipe set 510, the predetermined number of bins and a delivered power value, such as DPbinm(n-l) or DPbinmn, during a respective one of the predetermined number of bins.

[0093] The processor 414 generates a recipe set 512 including a forward power waveform having forward power values that are determined based on the recipe set 510, and a time period of each of the predetermined number of bins. For example, the processor 414 accesses, such as reads the mapping 104 (Figure 1A), from the memory device 416, anddetermines, based on the correspondences 106, 108, 110, and 112 (Figure 1A), that the delivered power waveform of the recipe set 510 corresponds to the forward power waveform FPW(n-l) or FPWn. Upon determining so, the processor 414 creates the recipe set 512 including the forward power waveform FPW(n-l) or FPWn having forward power values, and including the predetermined number of bins and correspondences between the forward power values and the predetermined number of bins. To illustrate, the recipe set 512 includes that a forward power value FPbinl (n-l) of the forward power waveform FPW(n-l ) be applied during the bin 1 , a forward power value FPbin2(n-l) of the forward power waveform FPW(n-l) be applied during the bin 2, and a forward power value FPbinm(n-l) of the forward power waveform FPW(n-l) be applied during the bin m. As another illustration, the recipe set 512 includes that the forward power value FPbinln of the forward power waveform FPWn be applied during the bin 1, the forward power value FPbin2n of the forward power waveform FPWn be applied during the bin 2, and the forward power value FPbinmn of the forward power waveform FPWn be applied during the bin m. An example of the recipe set 512 is the recipe set 472 (Figure 4). Another example of the recipe set 512 is the recipe set 403 (Figure 4).

[0094] The processor 414 receives a voltage measurement signal 516 from the voltage sensor 410 (Figure 4). An example of the voltage measurement signal 516 is the voltage measurement signal 482 (Figure 4) and another example of the voltage measurement signal 516 is the voltage measurement signal 409 (Figure 4). Upon receiving the voltage measurement signal 516, the processor 414 determines each cycle of the voltage measurement signal 516. For example, the processor 414 determines that the voltage measurement signal 516 has a first negative zero crossing and a second negative zero crossing, and determines that the second negative zero crossing occurs consecutive to the first negative zero crossing. To illustrate, the processor 414, based on the clock signal, determines that the first negative zero crossing occurs at a first time at which the voltage measurement signal 516 transitions from a negative value to a positive value. Also, the processor 414, based on the clock signal, determines that the second negative zero crossing occurs at a second time at which the voltage measurement signal 516 transitions from a negative value to a positive value. In the example, the processor 414 determines that a cycle of the voltage measurement signal 516 occurs between the first and second times. Also, in the example, the processor 414 determines that the second negative zero crossing is consecutive to the first negative zero crossing when there is no negative zero crossing between the first and second negative zero crossings. Upon determining each cycle of the voltage measurement signal 516, the processor 414 divides the cycle into the predetermined number of bins to determine a time interval of each of the bins.

[0095] The processor 414 includes within the recipe set 512, the time interval of each of the bins of the predetermined number and a time period of each cycle of the voltage measurement signal 516. The processor 414 sends the recipe set 512 via the transfer cable 426 to the DSP 504 to control the power supply 508 of the HF RF generator 502 to generate an HF RF signal 514 according to, such as based on, the recipe set 512.

[0096] In response to receiving the recipe set 512, the DSP 504, parses the recipe set 512 to identify, from the recipe set 512, the correspondences between the forward power values and the bins, the time period of each cycle of the voltage measurement signal 516, and the time interval of each of the bins of the predetermined number. For example, the DSP 504 determines that the forward power value FPbinln has a unique relationship with the time interval of the bin 1 and the forward power value FPbinmn has a unique relationship with the time interval of the bin m. As another example, the DSP 504 determines that the forward power value FPbinl(n-l) has a unique relationship with the time interval of the bin 1 and the forward power value FPbinm(n-l) has a unique relationship with the time interval of the bin m.

[0097] Upon identifying the correspondences between the forward power values of the forward power waveform FPW(n-l) or FPWn during the time intervals of the bins identified within the recipe set 512, the DSP 504 sends the forward power values of the forward power waveform FPW(n-l) or FPWn to the corresponding controllers PWRRbinl through PWRbinm. For example, the DSP 504 sends the forward power value FPbinl(n-l) of the forward power waveform FPW(n-l) or the forward power value FPbin ln of the forward power waveform FPWn to the forward power controller PWRbinl and sends the forward power value FPbinm(n- 1) of the forward power waveform FPW(n-l) or the forward power value FPbinmn of the forward power waveform FPWn to the forward power controller PWRbinm.

[0098] Upon receiving the forward power values from the DSP 504, each of the controllers PWRbinl through PWRbinm stores a respective one of the forward power values within the memory device of the controller. For example, the controller PWRbinl stores the forward power value FPbinl(n-l) or FPbinln within the memory device of the controller PWRbinl and the controller PWRbinm stores the forward power value FPbinm(n-l) or FPbinmn within the memory device of the controller PWRbinm.

[0099] The processor 414 sends the trigger signal via the transfer cable 426 to the DSP 504 to control the power supply 508 via the DSP 504 or to control the HF RFG 502. Upon receiving the trigger signal, the DSP 504 controls the controllers PWRbinl through PWRbinm and the power supply 508 to generate the HF RF signal 514 having the forward power values stored within the controllers PWRbinl through PWRbinm. For example, in response to receiving the trigger signal, the DSP 504, based on the clock signal received from the processor 414 viathe transfer cable 426, determines that a time interval of a cycle of the voltage measurement signal 516 has started and a time period of the bin 1 has started. Upon determining so, the DSP 504 generates and sends an on control signal to the controller PWRbinl. When the controller PWRbinl receives the on control signal, the controller PWRbinl accesses the forward power value FPbinl(n-l) or FPbinln from the memory device of the controller PWRbinl, and generates a current signal based on the forward power value, and sends the current signal to the driver circuit of the driver and amplifier circuit 506. In response to receiving the current signal, the driver and amplifier circuit 506 generates a current signal to achieve the forward power value of the RF signal 514 during the bin 1, and sends the current signal to the power supply 508. The power supply 508 converts the current signal received from the driver and amplifier circuit 506 into the forward power value of the RF signal 514 during the bin 1.

[0100] Continuing with the example, based on the clock signal, the DSP 504 determines that the time period of the bin 1 has ended and determines that the time period for the bin m has started. Upon determining that the time of the bin 1 has ended and the time period for the bin m has started, the DSP 504 generates and sends an off control signal to the controller PWRbinl and generates and sends an on control signal to the controller PWRbinm. In response to receiving the off control signal from the DSP 504, the controller PWRbinl stops generating the current signal for the bin 1. In response to not receiving the current signal, the driver and amplifier circuit 506 stops generating the current signal to transition the RF signal 514 from the forward power value of the RF signal 514 during the bin 1 to the forward value of the RF signal 514 during the bin m. When the current signal is not received from the driver and amplifier circuit 506, the power supply 508 transitions the RF signal 514 from the forward power value of the RF signal 514 during the bin 1 to the forward value of the RF signal 514 during the bin m.

[0101] In response to receiving the on control signal from the DSP 504, the controller PWRbinm accesses the forward power value FPbinm(n-l) or FPbinmn from the memory device of the controller PWRbinm, generates a current signal based on the forward power value, and sends the current signal to the driver circuit of the driver and amplifier circuit 506. In response to receiving the current signal, the driver circuit of the driver and amplifier circuit 506 generates a current signal to achieve the forward power value of the RF signal 514 during the bin m, and sends the current signal to the power supply 508. The power supply 508 converts the current signal received from the driver and amplifier circuit 506 into the forward power value of the RF signal 412 during the bin m.

[0102] The DSP 504 further determines, from the clock signal, that the time period of the cycle of the voltage measurement signal 514 has ended, the time period of the bin m during the cycle has ended, a time period of a consecutive cycle of the voltage measurement signal 514has begun, and the time period of the bin 1 during the consecutive cycle has started. Upon determining so, the DSP 504 generates and sends an off control signal to the controller PWRbinm and generates and sends an on control signal to the controller PWRbinl. In response to receiving the off control signal from the DSP 504, the controller PWRbinm stops generating the current signal for the bin m. In response to not receiving the current signal, the driver and amplifier circuit 506 stops generating the current signal to transition the RF signal 514 from the forward power level of the RF signal 514 during the bin m to the forward level of the RF signal 514 during the bin 1. When the current signal is not received from the driver and amplifier circuit 506, the power supply 508 transitions the RF signal 514 from the forward power level of the RF signal 514 during the bin m to the forward level of the RF signal 514 during the bin 1. In response to receiving the on control signal from the DSP 504, the controller PWRbinl controls the power supply 508 via the driver and amplifier circuit 506 in the same manner as that described above to generate the forward power value of the HF RF signal 514 during the bin 1 of the consecutive cycle of a voltage measurement signal 514.

[0103] The consecutive cycle of the voltage measurement signal 514 immediately follows the cycle of the voltage measurement signal 514. For example, when the cycle of the voltage measurement signal 514 is the cycle p (Figure 2A), the consecutive cycle of the voltage measurement signal 514 is the cycle (p+1). It should be noted that one example of the HF RF signal 514 is the HF RF signal 476 (Figure 4) and another example of the HF RF signal 514 is the HF RF signal 405 (Figure 4).

[0104] In an embodiment, functionality, described herein as being performed by the DSP 504 is performed by one or more of the controllers PWRbinl through PWRbinm. There is no need for the DSP 504, and each of the controllers PWRbinl through PWRbinm is coupled to the processor 414 via a connection, such as a transfer cable.

[0105] In an embodiment, functionality, described herein, as being performed by the processor 414 is performed instead by the DSP 504 within the HF RFG 502. For example, the DSP 504 is coupled to the sensors 450, 452, 454, and 410 (Figure 4) and to the LF RF generator 402 (Figure 4) in the same manner in which the processor 414 is coupled to the sensors 450, 452, 454, and 410 and the LF RF generator 402. The DSP 504 is coupled to the sensors 450, 452, 454, and 410 and to the LF RF generator 402 to perform the operations, described herein, as being performed by the processor 414.

[0106] In one embodiment, some functionality, described herein as being performed by the processor 414 is performed instead by the DSP 504 within the HF RFG 502 and the remaining functions, described herein, are being performed by the processor 414.

[0107] In an embodiment, functionality, described herein, as being performed by the DSP 504 is performed by the processor 114.

[0108] Embodiments, described herein, may be practiced with various computer system configurations including hand-held hardware units, microprocessor systems, microprocessorbased or programmable consumer electronics, minicomputers, mainframe computers and the like. The embodiments, described herein, can also be practiced in distributed computing environments where tasks are performed by remote processing hardware units that are linked through a computer network.

[0109] In some embodiments, a controller is part of a system, which may be part of the above-described examples. The system includes semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). The system is integrated with electronics for controlling its operation before, during, and after processing of a semiconductor wafer or substrate. The electronics is referred to as the “controller,” which may control various components or subparts of the system. The controller, depending on processing requirements and / or a type of the system, is programmed to control any process disclosed herein, including a delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with the system.

[0110] Broadly speaking, in a variety of embodiments, the controller is defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as ASICs, PLDs, one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). The program instructions are instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a process on or for a semiconductor wafer. The operational parameters are, in some embodiments, a part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0111] The controller, in some embodiments, is a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combinationthereof. For example, the controller is in a “cloud” or all or a part of a fab host computer system, which allows for remote access for wafer processing. The controller enables remote access to the system to monitor current progress of fabrication operations, examines a history of past fabrication operations, examines trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process.

[0112] In some embodiments, a remote computer (e.g. a server) provides process recipes to the system over a computer network, which includes a local network or the Internet. The remote computer includes a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of settings for processing a wafer. It should be understood that the settings are specific to a type of process to be performed on a wafer and a type of tool that the controller interfaces with or controls. Thus as described above, the controller is distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the fulfilling processes described herein. An example of a distributed controller for such purposes includes one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at a platform level or as part of a remote computer) that combine to control a process in a chamber.

[0113] Without limitation, in various embodiments, a plasma system, described herein, includes a plasma etch chamber, a deposition chamber, a spin-rinse chamber, a metal plating chamber, a clean chamber, a bevel edge etch chamber, a physical vapor deposition (PVD) chamber, a chemical vapor deposition (CVD) chamber, an atomic layer deposition (ALD) chamber, an atomic layer etch (ALE) chamber, an ion implantation chamber, a track chamber, or any other semiconductor processing chamber that is associated or used in fabrication and / or manufacturing of semiconductor wafers.

[0114] It is further noted that although the above-described operations are described with reference to a parallel plate plasma chamber, e.g., a CCP chamber, etc., in some embodiments, the above-described operations apply to other types of plasma chambers, e.g., a plasma chamber including an inductively coupled plasma (ICP) reactor, a transformer coupled plasma (TCP) reactor, conductor tools, dielectric tools, a plasma chamber including an electron cyclotron resonance (ECR) reactor, etc. For example, an X MHz RF generator, a Y MHz RF generator, and a Z MHz RF generator are coupled to an inductor within the ICP plasma chamber.

[0115] As noted above, depending on a process operation to be performed by the tool, the controller communicates with one or more of other tool circuits or modules, other toolcomponents, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.

[0116] With the above embodiments in mind, it should be understood that some of the embodiments employ various computer-implemented operations involving data stored in computer systems. These computer-implemented operations are those that manipulate physical quantities.

[0117] Some of the embodiments also relate to a hardware unit or an apparatus for performing these operations. The apparatus is specially constructed for a special purpose computer. When defined as a special purpose computer, the computer performs other processing, program execution or routines that are not part of the special purpose, while still being capable of operating for the special purpose.

[0118] In some embodiments, the operations, described herein, are performed by a computer selectively activated, or are configured by one or more computer programs stored in a computer memory, or are obtained over a computer network. When data is obtained over the computer network, the data may be processed by other computers on the computer network, e.g., a cloud of computing resources.

[0119] One or more embodiments, described herein, can also be fabricated as computer- readable code on a non-transitory computer-readable medium. The non-transitory computer- readable medium is any data storage hardware unit, e.g., a memory device, etc., that stores data, which is thereafter read by a computer system. Examples of the non-transitory computer- readable medium include hard drives, network attached storage (NAS), ROM, RAM, compact disc-ROMs (CD-ROMs), CD-recordables (CD-Rs), CD-rewritables (CD-RWs), magnetic tapes and other optical and non-optical data storage hardware units. In some embodiments, the non- transitory computer-readable medium includes a computer-readable tangible medium distributed over a network-coupled computer system so that the computer-readable code is stored and executed in a distributed fashion.

[0120] Although some method operations, described above, were presented in a specific order, it should be understood that in various embodiments, other housekeeping operations are performed in between the method operations, or the method operations are adjusted so that they occur at slightly different times, or are distributed in a system which allows the occurrence of the method operations at various intervals, or are performed in a different order than that described above.

[0121] It should further be noted that in an embodiment, one or more features from any embodiment described above are combined with one or more features of any other embodiment without departing from a scope described in various embodiments described in the present disclosure.

[0122] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

Claims

CLAIMS1. A method for providing forward power during a bin, comprising: receiving a first waveform indicating a plurality of power levels of power to be delivered from a radio frequency (RF) power supply, wherein the plurality of power levels of the first waveform vary with a progression of bins of a voltage waveform; identifying, from a mapping between a first plurality of waveforms and a second plurality of waveforms, one of the waveforms of the second plurality corresponding to the first waveform, wherein the first plurality of waveforms represents power to be delivered from the RF power supply and the second plurality of waveforms represents power to be supplied by the RF power supply, wherein the one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins; and controlling the RF power supply to supply power according to the plurality of power levels of the one of the waveforms of the second plurality with the progression of the bins.

2. The method of claim 1 , wherein the voltage waveform is a voltage measurement signal, the method further comprising: receiving the voltage measurement signal from an output of an impedance matching circuit coupled to the RF power supply; and dividing the voltage measurement signal into the bins to determine a plurality of time intervals of the bins.

3. The method of claim 1, wherein the power to be delivered from the RF power supply is a difference between the power to be supplied from the RF power supply and power reflected towards the RF power supply.

4. The method of claim 1 , wherein one or more of the plurality of power levels of the first waveform are less than zero.

5. The method of claim 1, wherein a first power level from the plurality of power levels of the first waveform is less than zero during a time interval of a first one of the bins and a second power level from the plurality of power levels of the first waveform is greater than zero during a time interval of a second one of the bins.

6. The method of claim 1, further comprising: receiving a second waveform indicating a plurality of power levels of power to be delivered from the RF power supply, wherein the plurality of power levels of the second waveform vary with the progression of bins of the voltage waveform; identifying, from the mapping between the first plurality of waveformsand the second plurality of waveforms, another one of the waveforms of the second plurality corresponding to the second waveform, wherein the another one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins; and controlling the RF power supply to supply power according to the plurality of power levels of the another one of the waveforms with the progression of the bins.

7. The method of claim 6, wherein the second waveform includes one or more power levels of power to be delivered from the RF power supply, wherein the one or more power levels of the second waveform are greater than zero.

8. The method of claim 6, wherein a first power level from the plurality of power levels of the second waveform is greater than zero during a time interval of a first one of the bins and a second power level from the plurality of power levels of the second waveform is greater than zero during a time interval of a second one of the bins.

9. The method of claim 6, further comprising: determining a first process rate uniformity when the RF power supply is controlled to supply power according to the plurality of power levels of the one of the waveforms of the second plurality; determining a second process rate uniformity when the RF power supply is controlled to supply power according to the plurality of power levels of the another one of the waveforms of the second plurality; determining that the second process rate uniformity is greater than the first process rate uniformity; and controlling the RF power supply to supply power according to the plurality of power levels of the another one of the waveforms of the second plurality with the progression of the bins upon determining that the second process rate uniformity is greater than the first process rate uniformity.

10. A controller for providing forward power during a bin, comprising: a processor configured to: receive a first waveform indicating a plurality of power levels of power to be delivered from a radio frequency (RF) power supply, wherein the plurality of power levels of the first waveform vary with a progression of bins of a voltage waveform; identify, from a mapping between a first plurality of waveforms and a second plurality of waveforms, one of the waveforms of the second plurality corresponding to the first waveform, wherein the first plurality of waveforms represents power to be delivered from the RF power supply and the second plurality of waveforms represents power to be supplied by the RF power supply, wherein the one of thewaveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins; and control the RF power supply to supply power according to the plurality of power levels of the one of the waveforms of the second plurality with the progression of the bins; and a memory device coupled to the processor.1 1 . The controller of claim 10, wherein the voltage waveform is a voltage measurement signal, wherein the processor is configured to: receive the voltage measurement signal from an output of an impedance matching circuit coupled to the RF power supply; and divide the voltage measurement signal into the bins to determine a plurality of time intervals of the bins.

12. The controller of claim 10, wherein the power to be delivered from the RF power supply is a difference between the power to be supplied from the RF power supply and power reflected towards the RF power supply.

13. The controller of claim 10, wherein one or more of the plurality of power levels of the first waveform are less than zero.

14. The controller of claim 10, wherein a first power level from the plurality of power levels of the first waveform is less than zero during a time interval of a first one of the bins and a second power level from the plurality of power levels of the first waveform is greater than zero during a time interval of a second one of the bins.

15. The controller of claim 10, wherein the processor is configured to: receive a second waveform indicating a plurality of power levels of power to be delivered from the RF power supply, wherein the plurality of power levels of the second waveform vary with the progression of bins of the voltage waveform; identify, from the mapping between the first plurality of waveforms and the second plurality of waveforms, another one of the waveforms of the second plurality corresponding to the second waveform, wherein the another one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins; and control the RF power supply to supply power according to the plurality of power levels of the another one of the waveforms with the progression of the bins.

16. The controller of claim 15, wherein the second waveform includes one or more power levels of power to be delivered from the RF power supply, wherein the one or more power levels of the second waveform are greater than zero.

17. The controller of claim 15, wherein a first power level from the plurality of power levels of the second waveform is greater than zero during a time interval of a first one of the bins and a second power level from the plurality of power levels of the second waveform is greater than zero during a time interval of a second one of the bins.

18. The controller of claim 15, wherein the processor is configured to: determine a first process rate uniformity when the RF power supply is controlled to supply power according to the plurality of power levels of the one of the waveforms of the second plurality; determine a second process rate uniformity when the RF power supply is controlled to supply power according to the plurality of power levels of the another one of the waveforms of the second plurality; determine that the second process rate uniformity is greater than the first process rate uniformity; and control the RF power supply to supply power according to the plurality of power levels of the another one of the waveforms of the second plurality with the progression of the bins upon determining that the second process rate uniformity is greater than the first process rate uniformity.

19. A plasma system for providing forward power during a bin, comprising: a low frequency (LF) radio frequency (RF) generator configured to generate an LF RF signal; a high frequency (HF) RF generator configured to generate an HF RF signal; an impedance matching circuit coupled to the LF RF generator and the HF RF generator to receive the LF and HF RF signals, wherein the impedance matching circuit is configured to generate a modified RF signal based on the LF and HF RF signals, wherein the impedance matching circuit has an output; and a plasma chamber coupled to the output of the impedance matching circuit to receive the modified RF signal; and a controller coupled to the LF and HF RF generators, wherein the controller is configured to: receive a first waveform indicating a plurality of power levels of power to be delivered from the HF RF generator, wherein the plurality of power levels of the first waveform vary with a progression of bins of a voltage waveform; identify, from a mapping between a first plurality of waveforms and a second plurality of waveforms, one of the waveforms of the second plurality corresponding to the first waveform, wherein the first plurality of waveforms representspower to be delivered from the HF RF generator and the second plurality of waveforms represents power to be supplied by the HF RF generator, wherein the one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins; and control the HF RF generator to supply power according to the plurality of power levels of the one of the waveforms of the second plurality with the progression of the bins.

20. The plasma system of claim 19, wherein the voltage waveform is a voltage measurement signal, wherein the controller is configured to: receive the voltage measurement signal from the output of the impedance matching circuit; and divide the voltage measurement signal into the bins to determine a plurality of time intervals of the bins.

21. The plasma system of claim 19, wherein a first power level from the plurality of power levels of the first waveform is less than zero during a time interval of a first one of the bins and a second power level from the plurality of power levels of the first waveform is greater than zero during a time interval of a second one of the bins.

22. The plasma system of claim 19, wherein the controller is configured to: receive a second waveform indicating a plurality of power levels of power to be delivered from the HF RF generator, wherein the plurality of power levels of the second waveform vary with the progression of bins of the voltage waveform; identify, from the mapping between the first plurality of waveforms and the second plurality of waveforms, another one of the waveforms of the second plurality corresponding to the second waveform, wherein the another one of the waveforms of the second plurality includes a plurality of power levels that vary with the progression of the bins; control the HF RF generator to supply power according to the plurality of power levels of the another one of the waveforms of the second plurality with the progression of the bins; determine a first process rate uniformity when the HF RF generator is controlled to supply power according to the plurality of power levels of the one of the waveforms of the second plurality; determine a second process rate uniformity when the HF RF generator is controlled to supply power according to the plurality of power levels of the another one of the waveforms of the second plurality; determine that the second process rate uniformity is greater than the first process rate uniformity; andcontrol the HF RF generator to supply power according to the plurality of power levels of the another one of the waveforms of the second plurality with the progression of the bins upon determining that the second process rate uniformity is greater than the first process rate uniformity.